Merge branch 'tc1100-wmi' into release
[linux-2.6-block.git] / drivers / net / e1000 / e1000_ethtool.c
CommitLineData
1da177e4
LT
1/*******************************************************************************
2
0abb6eb1
AK
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29/* ethtool support for e1000 */
30
31#include "e1000.h"
1da177e4
LT
32#include <asm/uaccess.h>
33
8328c38f
AK
34enum {NETDEV_STATS, E1000_STATS};
35
1da177e4
LT
36struct e1000_stats {
37 char stat_string[ETH_GSTRING_LEN];
8328c38f 38 int type;
1da177e4
LT
39 int sizeof_stat;
40 int stat_offset;
41};
42
8328c38f
AK
43#define E1000_STAT(m) E1000_STATS, \
44 sizeof(((struct e1000_adapter *)0)->m), \
45 offsetof(struct e1000_adapter, m)
46#define E1000_NETDEV_STAT(m) NETDEV_STATS, \
47 sizeof(((struct net_device *)0)->m), \
48 offsetof(struct net_device, m)
49
1da177e4 50static const struct e1000_stats e1000_gstrings_stats[] = {
49559854
MW
51 { "rx_packets", E1000_STAT(stats.gprc) },
52 { "tx_packets", E1000_STAT(stats.gptc) },
53 { "rx_bytes", E1000_STAT(stats.gorcl) },
54 { "tx_bytes", E1000_STAT(stats.gotcl) },
55 { "rx_broadcast", E1000_STAT(stats.bprc) },
56 { "tx_broadcast", E1000_STAT(stats.bptc) },
57 { "rx_multicast", E1000_STAT(stats.mprc) },
58 { "tx_multicast", E1000_STAT(stats.mptc) },
59 { "rx_errors", E1000_STAT(stats.rxerrc) },
60 { "tx_errors", E1000_STAT(stats.txerrc) },
5fe31def 61 { "tx_dropped", E1000_NETDEV_STAT(stats.tx_dropped) },
49559854
MW
62 { "multicast", E1000_STAT(stats.mprc) },
63 { "collisions", E1000_STAT(stats.colc) },
64 { "rx_length_errors", E1000_STAT(stats.rlerrc) },
5fe31def 65 { "rx_over_errors", E1000_NETDEV_STAT(stats.rx_over_errors) },
49559854 66 { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
5fe31def 67 { "rx_frame_errors", E1000_NETDEV_STAT(stats.rx_frame_errors) },
2648345f 68 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
49559854
MW
69 { "rx_missed_errors", E1000_STAT(stats.mpc) },
70 { "tx_aborted_errors", E1000_STAT(stats.ecol) },
71 { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
5fe31def
AK
72 { "tx_fifo_errors", E1000_NETDEV_STAT(stats.tx_fifo_errors) },
73 { "tx_heartbeat_errors", E1000_NETDEV_STAT(stats.tx_heartbeat_errors) },
49559854 74 { "tx_window_errors", E1000_STAT(stats.latecol) },
1da177e4
LT
75 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
76 { "tx_deferred_ok", E1000_STAT(stats.dc) },
77 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
78 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
6b7660cd 79 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
fcfb1224 80 { "tx_restart_queue", E1000_STAT(restart_queue) },
1da177e4
LT
81 { "rx_long_length_errors", E1000_STAT(stats.roc) },
82 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
83 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
84 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
85 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
86 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
87 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
88 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
89 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
90 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
91 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
e4c811c9 92 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
6b7660cd 93 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
15e376b4
JG
94 { "tx_smbus", E1000_STAT(stats.mgptc) },
95 { "rx_smbus", E1000_STAT(stats.mgprc) },
96 { "dropped_smbus", E1000_STAT(stats.mgpdc) },
1da177e4 97};
7bfa4816 98
7bfa4816 99#define E1000_QUEUE_STATS_LEN 0
ff8ac609 100#define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
7bfa4816 101#define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
1da177e4
LT
102static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
103 "Register test (offline)", "Eeprom test (offline)",
104 "Interrupt test (offline)", "Loopback test (offline)",
105 "Link test (on/offline)"
106};
4c3616cd 107#define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
1da177e4 108
64798845
JP
109static int e1000_get_settings(struct net_device *netdev,
110 struct ethtool_cmd *ecmd)
1da177e4 111{
60490fe0 112 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
113 struct e1000_hw *hw = &adapter->hw;
114
96838a40 115 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT
116
117 ecmd->supported = (SUPPORTED_10baseT_Half |
118 SUPPORTED_10baseT_Full |
119 SUPPORTED_100baseT_Half |
120 SUPPORTED_100baseT_Full |
121 SUPPORTED_1000baseT_Full|
122 SUPPORTED_Autoneg |
123 SUPPORTED_TP);
1da177e4
LT
124 ecmd->advertising = ADVERTISED_TP;
125
96838a40 126 if (hw->autoneg == 1) {
1da177e4 127 ecmd->advertising |= ADVERTISED_Autoneg;
1da177e4 128 /* the e1000 autoneg seems to match ethtool nicely */
1da177e4
LT
129 ecmd->advertising |= hw->autoneg_advertised;
130 }
131
132 ecmd->port = PORT_TP;
133 ecmd->phy_address = hw->phy_addr;
134
96838a40 135 if (hw->mac_type == e1000_82543)
1da177e4
LT
136 ecmd->transceiver = XCVR_EXTERNAL;
137 else
138 ecmd->transceiver = XCVR_INTERNAL;
139
140 } else {
141 ecmd->supported = (SUPPORTED_1000baseT_Full |
142 SUPPORTED_FIBRE |
143 SUPPORTED_Autoneg);
144
012609a8
MC
145 ecmd->advertising = (ADVERTISED_1000baseT_Full |
146 ADVERTISED_FIBRE |
147 ADVERTISED_Autoneg);
1da177e4
LT
148
149 ecmd->port = PORT_FIBRE;
150
96838a40 151 if (hw->mac_type >= e1000_82545)
1da177e4
LT
152 ecmd->transceiver = XCVR_INTERNAL;
153 else
154 ecmd->transceiver = XCVR_EXTERNAL;
155 }
156
1dc32918 157 if (er32(STATUS) & E1000_STATUS_LU) {
1da177e4
LT
158
159 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
160 &adapter->link_duplex);
161 ecmd->speed = adapter->link_speed;
162
163 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
164 * and HALF_DUPLEX != DUPLEX_HALF */
165
96838a40 166 if (adapter->link_duplex == FULL_DUPLEX)
1da177e4
LT
167 ecmd->duplex = DUPLEX_FULL;
168 else
169 ecmd->duplex = DUPLEX_HALF;
170 } else {
171 ecmd->speed = -1;
172 ecmd->duplex = -1;
173 }
174
175 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
176 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
177 return 0;
178}
179
64798845
JP
180static int e1000_set_settings(struct net_device *netdev,
181 struct ethtool_cmd *ecmd)
1da177e4 182{
60490fe0 183 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
184 struct e1000_hw *hw = &adapter->hw;
185
1a821ca5
JB
186 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
187 msleep(1);
188
57128197 189 if (ecmd->autoneg == AUTONEG_ENABLE) {
1da177e4 190 hw->autoneg = 1;
96838a40 191 if (hw->media_type == e1000_media_type_fiber)
012609a8
MC
192 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
193 ADVERTISED_FIBRE |
194 ADVERTISED_Autoneg;
96838a40 195 else
2f2ca263
JK
196 hw->autoneg_advertised = ecmd->advertising |
197 ADVERTISED_TP |
198 ADVERTISED_Autoneg;
012609a8 199 ecmd->advertising = hw->autoneg_advertised;
1da177e4 200 } else
1a821ca5
JB
201 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
202 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 203 return -EINVAL;
1a821ca5 204 }
1da177e4
LT
205
206 /* reset the link */
207
1a821ca5
JB
208 if (netif_running(adapter->netdev)) {
209 e1000_down(adapter);
210 e1000_up(adapter);
211 } else
1da177e4
LT
212 e1000_reset(adapter);
213
1a821ca5 214 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
215 return 0;
216}
217
64798845
JP
218static void e1000_get_pauseparam(struct net_device *netdev,
219 struct ethtool_pauseparam *pause)
1da177e4 220{
60490fe0 221 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
222 struct e1000_hw *hw = &adapter->hw;
223
96838a40 224 pause->autoneg =
1da177e4 225 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
96838a40 226
11241b10 227 if (hw->fc == E1000_FC_RX_PAUSE)
1da177e4 228 pause->rx_pause = 1;
11241b10 229 else if (hw->fc == E1000_FC_TX_PAUSE)
1da177e4 230 pause->tx_pause = 1;
11241b10 231 else if (hw->fc == E1000_FC_FULL) {
1da177e4
LT
232 pause->rx_pause = 1;
233 pause->tx_pause = 1;
234 }
235}
236
64798845
JP
237static int e1000_set_pauseparam(struct net_device *netdev,
238 struct ethtool_pauseparam *pause)
1da177e4 239{
60490fe0 240 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 241 struct e1000_hw *hw = &adapter->hw;
1a821ca5 242 int retval = 0;
96838a40 243
1da177e4
LT
244 adapter->fc_autoneg = pause->autoneg;
245
1a821ca5
JB
246 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
247 msleep(1);
248
96838a40 249 if (pause->rx_pause && pause->tx_pause)
11241b10 250 hw->fc = E1000_FC_FULL;
96838a40 251 else if (pause->rx_pause && !pause->tx_pause)
11241b10 252 hw->fc = E1000_FC_RX_PAUSE;
96838a40 253 else if (!pause->rx_pause && pause->tx_pause)
11241b10 254 hw->fc = E1000_FC_TX_PAUSE;
96838a40 255 else if (!pause->rx_pause && !pause->tx_pause)
11241b10 256 hw->fc = E1000_FC_NONE;
1da177e4
LT
257
258 hw->original_fc = hw->fc;
259
96838a40 260 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
1a821ca5
JB
261 if (netif_running(adapter->netdev)) {
262 e1000_down(adapter);
263 e1000_up(adapter);
264 } else
1da177e4 265 e1000_reset(adapter);
96838a40 266 } else
1a821ca5 267 retval = ((hw->media_type == e1000_media_type_fiber) ?
90fb5135 268 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
96838a40 269
1a821ca5
JB
270 clear_bit(__E1000_RESETTING, &adapter->flags);
271 return retval;
1da177e4
LT
272}
273
64798845 274static u32 e1000_get_rx_csum(struct net_device *netdev)
1da177e4 275{
60490fe0 276 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
277 return adapter->rx_csum;
278}
279
64798845 280static int e1000_set_rx_csum(struct net_device *netdev, u32 data)
1da177e4 281{
60490fe0 282 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
283 adapter->rx_csum = data;
284
2db10a08
AK
285 if (netif_running(netdev))
286 e1000_reinit_locked(adapter);
287 else
1da177e4
LT
288 e1000_reset(adapter);
289 return 0;
290}
96838a40 291
64798845 292static u32 e1000_get_tx_csum(struct net_device *netdev)
1da177e4
LT
293{
294 return (netdev->features & NETIF_F_HW_CSUM) != 0;
295}
296
64798845 297static int e1000_set_tx_csum(struct net_device *netdev, u32 data)
1da177e4 298{
60490fe0 299 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 300 struct e1000_hw *hw = &adapter->hw;
1da177e4 301
1dc32918 302 if (hw->mac_type < e1000_82543) {
1da177e4
LT
303 if (!data)
304 return -EINVAL;
305 return 0;
306 }
307
308 if (data)
309 netdev->features |= NETIF_F_HW_CSUM;
310 else
311 netdev->features &= ~NETIF_F_HW_CSUM;
312
313 return 0;
314}
315
64798845 316static int e1000_set_tso(struct net_device *netdev, u32 data)
1da177e4 317{
60490fe0 318 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP
319 struct e1000_hw *hw = &adapter->hw;
320
321 if ((hw->mac_type < e1000_82544) ||
322 (hw->mac_type == e1000_82547))
1da177e4
LT
323 return data ? -EINVAL : 0;
324
325 if (data)
326 netdev->features |= NETIF_F_TSO;
327 else
328 netdev->features &= ~NETIF_F_TSO;
7e6c9861 329
1532ecea 330 netdev->features &= ~NETIF_F_TSO6;
87ca4e5b 331
7e6c9861 332 DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
c3033b01 333 adapter->tso_force = true;
1da177e4 334 return 0;
96838a40 335}
1da177e4 336
64798845 337static u32 e1000_get_msglevel(struct net_device *netdev)
1da177e4 338{
60490fe0 339 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
340 return adapter->msg_enable;
341}
342
64798845 343static void e1000_set_msglevel(struct net_device *netdev, u32 data)
1da177e4 344{
60490fe0 345 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
346 adapter->msg_enable = data;
347}
348
64798845 349static int e1000_get_regs_len(struct net_device *netdev)
1da177e4
LT
350{
351#define E1000_REGS_LEN 32
406874a7 352 return E1000_REGS_LEN * sizeof(u32);
1da177e4
LT
353}
354
64798845
JP
355static void e1000_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
356 void *p)
1da177e4 357{
60490fe0 358 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 359 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
360 u32 *regs_buff = p;
361 u16 phy_data;
1da177e4 362
406874a7 363 memset(p, 0, E1000_REGS_LEN * sizeof(u32));
1da177e4
LT
364
365 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
366
1dc32918
JP
367 regs_buff[0] = er32(CTRL);
368 regs_buff[1] = er32(STATUS);
1da177e4 369
1dc32918
JP
370 regs_buff[2] = er32(RCTL);
371 regs_buff[3] = er32(RDLEN);
372 regs_buff[4] = er32(RDH);
373 regs_buff[5] = er32(RDT);
374 regs_buff[6] = er32(RDTR);
1da177e4 375
1dc32918
JP
376 regs_buff[7] = er32(TCTL);
377 regs_buff[8] = er32(TDLEN);
378 regs_buff[9] = er32(TDH);
379 regs_buff[10] = er32(TDT);
380 regs_buff[11] = er32(TIDV);
1da177e4 381
1dc32918 382 regs_buff[12] = hw->phy_type; /* PHY type (IGP=1, M88=0) */
96838a40 383 if (hw->phy_type == e1000_phy_igp) {
1da177e4
LT
384 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
385 IGP01E1000_PHY_AGC_A);
386 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
387 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 388 regs_buff[13] = (u32)phy_data; /* cable length */
1da177e4
LT
389 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
390 IGP01E1000_PHY_AGC_B);
391 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
392 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 393 regs_buff[14] = (u32)phy_data; /* cable length */
1da177e4
LT
394 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
395 IGP01E1000_PHY_AGC_C);
396 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
397 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 398 regs_buff[15] = (u32)phy_data; /* cable length */
1da177e4
LT
399 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
400 IGP01E1000_PHY_AGC_D);
401 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
402 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 403 regs_buff[16] = (u32)phy_data; /* cable length */
1da177e4
LT
404 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
405 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
406 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
407 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 408 regs_buff[18] = (u32)phy_data; /* cable polarity */
1da177e4
LT
409 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
410 IGP01E1000_PHY_PCS_INIT_REG);
411 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
412 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
406874a7 413 regs_buff[19] = (u32)phy_data; /* cable polarity */
1da177e4
LT
414 regs_buff[20] = 0; /* polarity correction enabled (always) */
415 regs_buff[22] = 0; /* phy receive errors (unavailable) */
416 regs_buff[23] = regs_buff[18]; /* mdix mode */
417 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
418 } else {
8fc897b0 419 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
406874a7 420 regs_buff[13] = (u32)phy_data; /* cable length */
1da177e4
LT
421 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
422 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
423 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
8fc897b0 424 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
406874a7 425 regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
1da177e4
LT
426 regs_buff[18] = regs_buff[13]; /* cable polarity */
427 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
428 regs_buff[20] = regs_buff[17]; /* polarity correction */
429 /* phy receive errors */
430 regs_buff[22] = adapter->phy_stats.receive_errors;
431 regs_buff[23] = regs_buff[13]; /* mdix mode */
432 }
433 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
434 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
406874a7 435 regs_buff[24] = (u32)phy_data; /* phy local receiver status */
1da177e4 436 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
96838a40 437 if (hw->mac_type >= e1000_82540 &&
4ccc12ae 438 hw->media_type == e1000_media_type_copper) {
1dc32918 439 regs_buff[26] = er32(MANC);
1da177e4
LT
440 }
441}
442
64798845 443static int e1000_get_eeprom_len(struct net_device *netdev)
1da177e4 444{
60490fe0 445 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP
446 struct e1000_hw *hw = &adapter->hw;
447
448 return hw->eeprom.word_size * 2;
1da177e4
LT
449}
450
64798845
JP
451static int e1000_get_eeprom(struct net_device *netdev,
452 struct ethtool_eeprom *eeprom, u8 *bytes)
1da177e4 453{
60490fe0 454 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 455 struct e1000_hw *hw = &adapter->hw;
406874a7 456 u16 *eeprom_buff;
1da177e4
LT
457 int first_word, last_word;
458 int ret_val = 0;
406874a7 459 u16 i;
1da177e4 460
96838a40 461 if (eeprom->len == 0)
1da177e4
LT
462 return -EINVAL;
463
464 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
465
466 first_word = eeprom->offset >> 1;
467 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
468
406874a7 469 eeprom_buff = kmalloc(sizeof(u16) *
1da177e4 470 (last_word - first_word + 1), GFP_KERNEL);
96838a40 471 if (!eeprom_buff)
1da177e4
LT
472 return -ENOMEM;
473
96838a40 474 if (hw->eeprom.type == e1000_eeprom_spi)
1da177e4
LT
475 ret_val = e1000_read_eeprom(hw, first_word,
476 last_word - first_word + 1,
477 eeprom_buff);
478 else {
c7be73bc
JP
479 for (i = 0; i < last_word - first_word + 1; i++) {
480 ret_val = e1000_read_eeprom(hw, first_word + i, 1,
481 &eeprom_buff[i]);
482 if (ret_val)
1da177e4 483 break;
c7be73bc 484 }
1da177e4
LT
485 }
486
487 /* Device's eeprom is always little-endian, word addressable */
488 for (i = 0; i < last_word - first_word + 1; i++)
489 le16_to_cpus(&eeprom_buff[i]);
490
406874a7 491 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
1da177e4
LT
492 eeprom->len);
493 kfree(eeprom_buff);
494
495 return ret_val;
496}
497
64798845
JP
498static int e1000_set_eeprom(struct net_device *netdev,
499 struct ethtool_eeprom *eeprom, u8 *bytes)
1da177e4 500{
60490fe0 501 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 502 struct e1000_hw *hw = &adapter->hw;
406874a7 503 u16 *eeprom_buff;
1da177e4
LT
504 void *ptr;
505 int max_len, first_word, last_word, ret_val = 0;
406874a7 506 u16 i;
1da177e4 507
96838a40 508 if (eeprom->len == 0)
1da177e4
LT
509 return -EOPNOTSUPP;
510
96838a40 511 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
1da177e4
LT
512 return -EFAULT;
513
514 max_len = hw->eeprom.word_size * 2;
515
516 first_word = eeprom->offset >> 1;
517 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
518 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
96838a40 519 if (!eeprom_buff)
1da177e4
LT
520 return -ENOMEM;
521
522 ptr = (void *)eeprom_buff;
523
96838a40 524 if (eeprom->offset & 1) {
1da177e4
LT
525 /* need read/modify/write of first changed EEPROM word */
526 /* only the second byte of the word is being modified */
527 ret_val = e1000_read_eeprom(hw, first_word, 1,
528 &eeprom_buff[0]);
529 ptr++;
530 }
96838a40 531 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
1da177e4
LT
532 /* need read/modify/write of last changed EEPROM word */
533 /* only the first byte of the word is being modified */
534 ret_val = e1000_read_eeprom(hw, last_word, 1,
535 &eeprom_buff[last_word - first_word]);
536 }
537
538 /* Device's eeprom is always little-endian, word addressable */
539 for (i = 0; i < last_word - first_word + 1; i++)
540 le16_to_cpus(&eeprom_buff[i]);
541
542 memcpy(ptr, bytes, eeprom->len);
543
544 for (i = 0; i < last_word - first_word + 1; i++)
545 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
546
547 ret_val = e1000_write_eeprom(hw, first_word,
548 last_word - first_word + 1, eeprom_buff);
549
1532ecea
JB
550 /* Update the checksum over the first part of the EEPROM if needed */
551 if ((ret_val == 0) && (first_word <= EEPROM_CHECKSUM_REG))
1da177e4
LT
552 e1000_update_eeprom_checksum(hw);
553
554 kfree(eeprom_buff);
555 return ret_val;
556}
557
64798845
JP
558static void e1000_get_drvinfo(struct net_device *netdev,
559 struct ethtool_drvinfo *drvinfo)
1da177e4 560{
60490fe0 561 struct e1000_adapter *adapter = netdev_priv(netdev);
a2917e22 562 char firmware_version[32];
1da177e4
LT
563
564 strncpy(drvinfo->driver, e1000_driver_name, 32);
565 strncpy(drvinfo->version, e1000_driver_version, 32);
a2917e22 566
1532ecea 567 sprintf(firmware_version, "N/A");
a2917e22 568 strncpy(drvinfo->fw_version, firmware_version, 32);
1da177e4 569 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
1da177e4
LT
570 drvinfo->regdump_len = e1000_get_regs_len(netdev);
571 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
572}
573
64798845
JP
574static void e1000_get_ringparam(struct net_device *netdev,
575 struct ethtool_ringparam *ring)
1da177e4 576{
60490fe0 577 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP
578 struct e1000_hw *hw = &adapter->hw;
579 e1000_mac_type mac_type = hw->mac_type;
581d708e
MC
580 struct e1000_tx_ring *txdr = adapter->tx_ring;
581 struct e1000_rx_ring *rxdr = adapter->rx_ring;
1da177e4
LT
582
583 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
584 E1000_MAX_82544_RXD;
585 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
586 E1000_MAX_82544_TXD;
587 ring->rx_mini_max_pending = 0;
588 ring->rx_jumbo_max_pending = 0;
589 ring->rx_pending = rxdr->count;
590 ring->tx_pending = txdr->count;
591 ring->rx_mini_pending = 0;
592 ring->rx_jumbo_pending = 0;
593}
594
64798845
JP
595static int e1000_set_ringparam(struct net_device *netdev,
596 struct ethtool_ringparam *ring)
1da177e4 597{
60490fe0 598 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918
JP
599 struct e1000_hw *hw = &adapter->hw;
600 e1000_mac_type mac_type = hw->mac_type;
793fab72
VA
601 struct e1000_tx_ring *txdr, *tx_old;
602 struct e1000_rx_ring *rxdr, *rx_old;
1c7e5b12 603 int i, err;
581d708e 604
0989aa43
JK
605 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
606 return -EINVAL;
607
2db10a08
AK
608 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
609 msleep(1);
610
581d708e
MC
611 if (netif_running(adapter->netdev))
612 e1000_down(adapter);
1da177e4
LT
613
614 tx_old = adapter->tx_ring;
615 rx_old = adapter->rx_ring;
616
793fab72 617 err = -ENOMEM;
1c7e5b12 618 txdr = kcalloc(adapter->num_tx_queues, sizeof(struct e1000_tx_ring), GFP_KERNEL);
793fab72
VA
619 if (!txdr)
620 goto err_alloc_tx;
581d708e 621
1c7e5b12 622 rxdr = kcalloc(adapter->num_rx_queues, sizeof(struct e1000_rx_ring), GFP_KERNEL);
793fab72
VA
623 if (!rxdr)
624 goto err_alloc_rx;
581d708e 625
793fab72
VA
626 adapter->tx_ring = txdr;
627 adapter->rx_ring = rxdr;
581d708e 628
406874a7
JP
629 rxdr->count = max(ring->rx_pending,(u32)E1000_MIN_RXD);
630 rxdr->count = min(rxdr->count,(u32)(mac_type < e1000_82544 ?
1da177e4 631 E1000_MAX_RXD : E1000_MAX_82544_RXD));
9099cfb9 632 rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
1da177e4 633
406874a7
JP
634 txdr->count = max(ring->tx_pending,(u32)E1000_MIN_TXD);
635 txdr->count = min(txdr->count,(u32)(mac_type < e1000_82544 ?
1da177e4 636 E1000_MAX_TXD : E1000_MAX_82544_TXD));
9099cfb9 637 txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
1da177e4 638
f56799ea 639 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 640 txdr[i].count = txdr->count;
f56799ea 641 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 642 rxdr[i].count = rxdr->count;
581d708e 643
96838a40 644 if (netif_running(adapter->netdev)) {
1da177e4 645 /* Try to get new resources before deleting old */
c7be73bc
JP
646 err = e1000_setup_all_rx_resources(adapter);
647 if (err)
1da177e4 648 goto err_setup_rx;
c7be73bc
JP
649 err = e1000_setup_all_tx_resources(adapter);
650 if (err)
1da177e4
LT
651 goto err_setup_tx;
652
653 /* save the new, restore the old in order to free it,
654 * then restore the new back again */
655
1da177e4
LT
656 adapter->rx_ring = rx_old;
657 adapter->tx_ring = tx_old;
581d708e
MC
658 e1000_free_all_rx_resources(adapter);
659 e1000_free_all_tx_resources(adapter);
660 kfree(tx_old);
661 kfree(rx_old);
793fab72
VA
662 adapter->rx_ring = rxdr;
663 adapter->tx_ring = txdr;
c7be73bc
JP
664 err = e1000_up(adapter);
665 if (err)
2db10a08 666 goto err_setup;
1da177e4
LT
667 }
668
2db10a08 669 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
670 return 0;
671err_setup_tx:
581d708e 672 e1000_free_all_rx_resources(adapter);
1da177e4
LT
673err_setup_rx:
674 adapter->rx_ring = rx_old;
675 adapter->tx_ring = tx_old;
793fab72
VA
676 kfree(rxdr);
677err_alloc_rx:
678 kfree(txdr);
679err_alloc_tx:
1da177e4 680 e1000_up(adapter);
2db10a08
AK
681err_setup:
682 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT
683 return err;
684}
685
64798845
JP
686static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data, int reg,
687 u32 mask, u32 write)
7e64300a 688{
1dc32918 689 struct e1000_hw *hw = &adapter->hw;
406874a7 690 static const u32 test[] =
7e64300a 691 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1dc32918 692 u8 __iomem *address = hw->hw_addr + reg;
406874a7 693 u32 read;
7e64300a
JP
694 int i;
695
696 for (i = 0; i < ARRAY_SIZE(test); i++) {
697 writel(write & test[i], address);
698 read = readl(address);
699 if (read != (write & test[i] & mask)) {
700 DPRINTK(DRV, ERR, "pattern test reg %04X failed: "
701 "got 0x%08X expected 0x%08X\n",
cba0516d 702 reg, read, (write & test[i] & mask));
7e64300a
JP
703 *data = reg;
704 return true;
705 }
706 }
707 return false;
1da177e4
LT
708}
709
64798845
JP
710static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data, int reg,
711 u32 mask, u32 write)
7e64300a 712{
1dc32918
JP
713 struct e1000_hw *hw = &adapter->hw;
714 u8 __iomem *address = hw->hw_addr + reg;
406874a7 715 u32 read;
7e64300a
JP
716
717 writel(write & mask, address);
718 read = readl(address);
719 if ((read & mask) != (write & mask)) {
720 DPRINTK(DRV, ERR, "set/check reg %04X test failed: "
721 "got 0x%08X expected 0x%08X\n",
722 reg, (read & mask), (write & mask));
723 *data = reg;
724 return true;
725 }
726 return false;
1da177e4
LT
727}
728
7e64300a
JP
729#define REG_PATTERN_TEST(reg, mask, write) \
730 do { \
731 if (reg_pattern_test(adapter, data, \
1dc32918 732 (hw->mac_type >= e1000_82543) \
7e64300a
JP
733 ? E1000_##reg : E1000_82542_##reg, \
734 mask, write)) \
735 return 1; \
736 } while (0)
737
738#define REG_SET_AND_CHECK(reg, mask, write) \
739 do { \
740 if (reg_set_and_check(adapter, data, \
1dc32918 741 (hw->mac_type >= e1000_82543) \
7e64300a
JP
742 ? E1000_##reg : E1000_82542_##reg, \
743 mask, write)) \
744 return 1; \
745 } while (0)
746
64798845 747static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 748{
406874a7
JP
749 u32 value, before, after;
750 u32 i, toggle;
1dc32918 751 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
752
753 /* The status register is Read Only, so a write should fail.
754 * Some bits that get toggled are ignored.
755 */
1532ecea 756
868d5309 757 /* there are several bits on newer hardware that are r/w */
1532ecea 758 toggle = 0xFFFFF833;
b01f6691 759
1dc32918
JP
760 before = er32(STATUS);
761 value = (er32(STATUS) & toggle);
762 ew32(STATUS, toggle);
763 after = er32(STATUS) & toggle;
96838a40 764 if (value != after) {
b01f6691
MC
765 DPRINTK(DRV, ERR, "failed STATUS register test got: "
766 "0x%08X expected: 0x%08X\n", after, value);
1da177e4
LT
767 *data = 1;
768 return 1;
769 }
b01f6691 770 /* restore previous status */
1dc32918 771 ew32(STATUS, before);
90fb5135 772
1532ecea
JB
773 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
774 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
775 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
776 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
90fb5135 777
1da177e4
LT
778 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
779 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
780 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
781 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
782 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
783 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
784 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
785 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
786 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
787 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
788
789 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
90fb5135 790
1532ecea 791 before = 0x06DFB3FE;
cd94dd0b 792 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
1da177e4
LT
793 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
794
1dc32918 795 if (hw->mac_type >= e1000_82543) {
1da177e4 796
cd94dd0b 797 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
1da177e4 798 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
1532ecea 799 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
1da177e4
LT
800 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
801 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
1532ecea 802 value = E1000_RAR_ENTRIES;
cd94dd0b 803 for (i = 0; i < value; i++) {
1da177e4 804 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
90fb5135 805 0xFFFFFFFF);
1da177e4
LT
806 }
807
808 } else {
809
810 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
811 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
812 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
813 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
814
815 }
816
1532ecea 817 value = E1000_MC_TBL_SIZE;
cd94dd0b 818 for (i = 0; i < value; i++)
1da177e4
LT
819 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
820
821 *data = 0;
822 return 0;
823}
824
64798845 825static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 826{
1dc32918 827 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
828 u16 temp;
829 u16 checksum = 0;
830 u16 i;
1da177e4
LT
831
832 *data = 0;
833 /* Read and add up the contents of the EEPROM */
96838a40 834 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
1dc32918 835 if ((e1000_read_eeprom(hw, i, 1, &temp)) < 0) {
1da177e4
LT
836 *data = 1;
837 break;
838 }
839 checksum += temp;
840 }
841
842 /* If Checksum is not Correct return error else test passed */
e982f17c 843 if ((checksum != (u16)EEPROM_SUM) && !(*data))
1da177e4
LT
844 *data = 2;
845
846 return *data;
847}
848
64798845 849static irqreturn_t e1000_test_intr(int irq, void *data)
1da177e4 850{
e982f17c 851 struct net_device *netdev = (struct net_device *)data;
60490fe0 852 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 853 struct e1000_hw *hw = &adapter->hw;
1da177e4 854
1dc32918 855 adapter->test_icr |= er32(ICR);
1da177e4
LT
856
857 return IRQ_HANDLED;
858}
859
64798845 860static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
1da177e4
LT
861{
862 struct net_device *netdev = adapter->netdev;
406874a7 863 u32 mask, i = 0;
c3033b01 864 bool shared_int = true;
406874a7 865 u32 irq = adapter->pdev->irq;
1dc32918 866 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT
867
868 *data = 0;
869
8fc897b0 870 /* NOTE: we don't test MSI interrupts here, yet */
1da177e4 871 /* Hook up test interrupt handler just for this test */
a0607fd3 872 if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
90fb5135 873 netdev))
c3033b01 874 shared_int = false;
a0607fd3 875 else if (request_irq(irq, e1000_test_intr, IRQF_SHARED,
90fb5135 876 netdev->name, netdev)) {
1da177e4
LT
877 *data = 1;
878 return -1;
879 }
8fc897b0 880 DPRINTK(HW, INFO, "testing %s interrupt\n",
b9b6e78b 881 (shared_int ? "shared" : "unshared"));
1da177e4
LT
882
883 /* Disable all the interrupts */
1dc32918 884 ew32(IMC, 0xFFFFFFFF);
f8ec4733 885 msleep(10);
1da177e4
LT
886
887 /* Test each interrupt */
96838a40 888 for (; i < 10; i++) {
1da177e4
LT
889
890 /* Interrupt to test */
891 mask = 1 << i;
892
76c224bc
AK
893 if (!shared_int) {
894 /* Disable the interrupt to be reported in
895 * the cause register and then force the same
896 * interrupt and see if one gets posted. If
897 * an interrupt was posted to the bus, the
898 * test failed.
899 */
900 adapter->test_icr = 0;
1dc32918
JP
901 ew32(IMC, mask);
902 ew32(ICS, mask);
f8ec4733 903 msleep(10);
76c224bc
AK
904
905 if (adapter->test_icr & mask) {
906 *data = 3;
907 break;
908 }
1da177e4
LT
909 }
910
911 /* Enable the interrupt to be reported in
912 * the cause register and then force the same
913 * interrupt and see if one gets posted. If
914 * an interrupt was not posted to the bus, the
915 * test failed.
916 */
917 adapter->test_icr = 0;
1dc32918
JP
918 ew32(IMS, mask);
919 ew32(ICS, mask);
f8ec4733 920 msleep(10);
1da177e4 921
96838a40 922 if (!(adapter->test_icr & mask)) {
1da177e4
LT
923 *data = 4;
924 break;
925 }
926
76c224bc 927 if (!shared_int) {
1da177e4
LT
928 /* Disable the other interrupts to be reported in
929 * the cause register and then force the other
930 * interrupts and see if any get posted. If
931 * an interrupt was posted to the bus, the
932 * test failed.
933 */
934 adapter->test_icr = 0;
1dc32918
JP
935 ew32(IMC, ~mask & 0x00007FFF);
936 ew32(ICS, ~mask & 0x00007FFF);
f8ec4733 937 msleep(10);
1da177e4 938
96838a40 939 if (adapter->test_icr) {
1da177e4
LT
940 *data = 5;
941 break;
942 }
943 }
944 }
945
946 /* Disable all the interrupts */
1dc32918 947 ew32(IMC, 0xFFFFFFFF);
f8ec4733 948 msleep(10);
1da177e4
LT
949
950 /* Unhook test interrupt handler */
951 free_irq(irq, netdev);
952
953 return *data;
954}
955
64798845 956static void e1000_free_desc_rings(struct e1000_adapter *adapter)
1da177e4 957{
581d708e
MC
958 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
959 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4
LT
960 struct pci_dev *pdev = adapter->pdev;
961 int i;
962
96838a40
JB
963 if (txdr->desc && txdr->buffer_info) {
964 for (i = 0; i < txdr->count; i++) {
965 if (txdr->buffer_info[i].dma)
1da177e4
LT
966 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
967 txdr->buffer_info[i].length,
968 PCI_DMA_TODEVICE);
96838a40 969 if (txdr->buffer_info[i].skb)
1da177e4
LT
970 dev_kfree_skb(txdr->buffer_info[i].skb);
971 }
972 }
973
96838a40
JB
974 if (rxdr->desc && rxdr->buffer_info) {
975 for (i = 0; i < rxdr->count; i++) {
976 if (rxdr->buffer_info[i].dma)
1da177e4
LT
977 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
978 rxdr->buffer_info[i].length,
979 PCI_DMA_FROMDEVICE);
96838a40 980 if (rxdr->buffer_info[i].skb)
1da177e4
LT
981 dev_kfree_skb(rxdr->buffer_info[i].skb);
982 }
983 }
984
f5645110 985 if (txdr->desc) {
1da177e4 986 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
6b27adb6
JL
987 txdr->desc = NULL;
988 }
f5645110 989 if (rxdr->desc) {
1da177e4 990 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
6b27adb6
JL
991 rxdr->desc = NULL;
992 }
1da177e4 993
b4558ea9 994 kfree(txdr->buffer_info);
6b27adb6 995 txdr->buffer_info = NULL;
b4558ea9 996 kfree(rxdr->buffer_info);
6b27adb6 997 rxdr->buffer_info = NULL;
f5645110 998
1da177e4
LT
999 return;
1000}
1001
64798845 1002static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
1da177e4 1003{
1dc32918 1004 struct e1000_hw *hw = &adapter->hw;
581d708e
MC
1005 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1006 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1007 struct pci_dev *pdev = adapter->pdev;
406874a7 1008 u32 rctl;
1c7e5b12 1009 int i, ret_val;
1da177e4
LT
1010
1011 /* Setup Tx descriptor ring and Tx buffers */
1012
96838a40
JB
1013 if (!txdr->count)
1014 txdr->count = E1000_DEFAULT_TXD;
1da177e4 1015
c7be73bc
JP
1016 txdr->buffer_info = kcalloc(txdr->count, sizeof(struct e1000_buffer),
1017 GFP_KERNEL);
1018 if (!txdr->buffer_info) {
1da177e4
LT
1019 ret_val = 1;
1020 goto err_nomem;
1021 }
1da177e4
LT
1022
1023 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1024 txdr->size = ALIGN(txdr->size, 4096);
c7be73bc
JP
1025 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1026 if (!txdr->desc) {
1da177e4
LT
1027 ret_val = 2;
1028 goto err_nomem;
1029 }
1030 memset(txdr->desc, 0, txdr->size);
1031 txdr->next_to_use = txdr->next_to_clean = 0;
1032
e982f17c
JP
1033 ew32(TDBAL, ((u64)txdr->dma & 0x00000000FFFFFFFF));
1034 ew32(TDBAH, ((u64)txdr->dma >> 32));
1dc32918
JP
1035 ew32(TDLEN, txdr->count * sizeof(struct e1000_tx_desc));
1036 ew32(TDH, 0);
1037 ew32(TDT, 0);
1038 ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN |
1039 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1040 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1da177e4 1041
96838a40 1042 for (i = 0; i < txdr->count; i++) {
1da177e4
LT
1043 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1044 struct sk_buff *skb;
1045 unsigned int size = 1024;
1046
c7be73bc
JP
1047 skb = alloc_skb(size, GFP_KERNEL);
1048 if (!skb) {
1da177e4
LT
1049 ret_val = 3;
1050 goto err_nomem;
1051 }
1052 skb_put(skb, size);
1053 txdr->buffer_info[i].skb = skb;
1054 txdr->buffer_info[i].length = skb->len;
1055 txdr->buffer_info[i].dma =
1056 pci_map_single(pdev, skb->data, skb->len,
1057 PCI_DMA_TODEVICE);
1058 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1059 tx_desc->lower.data = cpu_to_le32(skb->len);
1060 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1061 E1000_TXD_CMD_IFCS |
1062 E1000_TXD_CMD_RPS);
1063 tx_desc->upper.data = 0;
1064 }
1065
1066 /* Setup Rx descriptor ring and Rx buffers */
1067
96838a40
JB
1068 if (!rxdr->count)
1069 rxdr->count = E1000_DEFAULT_RXD;
1da177e4 1070
c7be73bc
JP
1071 rxdr->buffer_info = kcalloc(rxdr->count, sizeof(struct e1000_buffer),
1072 GFP_KERNEL);
1073 if (!rxdr->buffer_info) {
1da177e4
LT
1074 ret_val = 4;
1075 goto err_nomem;
1076 }
1da177e4
LT
1077
1078 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
c7be73bc
JP
1079 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1080 if (!rxdr->desc) {
1da177e4
LT
1081 ret_val = 5;
1082 goto err_nomem;
1083 }
1084 memset(rxdr->desc, 0, rxdr->size);
1085 rxdr->next_to_use = rxdr->next_to_clean = 0;
1086
1dc32918
JP
1087 rctl = er32(RCTL);
1088 ew32(RCTL, rctl & ~E1000_RCTL_EN);
e982f17c
JP
1089 ew32(RDBAL, ((u64)rxdr->dma & 0xFFFFFFFF));
1090 ew32(RDBAH, ((u64)rxdr->dma >> 32));
1dc32918
JP
1091 ew32(RDLEN, rxdr->size);
1092 ew32(RDH, 0);
1093 ew32(RDT, 0);
1da177e4
LT
1094 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1095 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918
JP
1096 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1097 ew32(RCTL, rctl);
1da177e4 1098
96838a40 1099 for (i = 0; i < rxdr->count; i++) {
1da177e4
LT
1100 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1101 struct sk_buff *skb;
1102
c7be73bc
JP
1103 skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN, GFP_KERNEL);
1104 if (!skb) {
1da177e4
LT
1105 ret_val = 6;
1106 goto err_nomem;
1107 }
1108 skb_reserve(skb, NET_IP_ALIGN);
1109 rxdr->buffer_info[i].skb = skb;
1110 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1111 rxdr->buffer_info[i].dma =
1112 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1113 PCI_DMA_FROMDEVICE);
1114 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1115 memset(skb->data, 0x00, skb->len);
1116 }
1117
1118 return 0;
1119
1120err_nomem:
1121 e1000_free_desc_rings(adapter);
1122 return ret_val;
1123}
1124
64798845 1125static void e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1da177e4 1126{
1dc32918
JP
1127 struct e1000_hw *hw = &adapter->hw;
1128
1da177e4 1129 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1dc32918
JP
1130 e1000_write_phy_reg(hw, 29, 0x001F);
1131 e1000_write_phy_reg(hw, 30, 0x8FFC);
1132 e1000_write_phy_reg(hw, 29, 0x001A);
1133 e1000_write_phy_reg(hw, 30, 0x8FF0);
1da177e4
LT
1134}
1135
64798845 1136static void e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1da177e4 1137{
1dc32918 1138 struct e1000_hw *hw = &adapter->hw;
406874a7 1139 u16 phy_reg;
1da177e4
LT
1140
1141 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1142 * Extended PHY Specific Control Register to 25MHz clock. This
1143 * value defaults back to a 2.5MHz clock when the PHY is reset.
1144 */
1dc32918 1145 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1da177e4 1146 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1dc32918 1147 e1000_write_phy_reg(hw,
1da177e4
LT
1148 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1149
1150 /* In addition, because of the s/w reset above, we need to enable
1151 * CRS on TX. This must be set for both full and half duplex
1152 * operation.
1153 */
1dc32918 1154 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1da177e4 1155 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1dc32918 1156 e1000_write_phy_reg(hw,
1da177e4
LT
1157 M88E1000_PHY_SPEC_CTRL, phy_reg);
1158}
1159
64798845 1160static int e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1161{
1dc32918 1162 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
1163 u32 ctrl_reg;
1164 u16 phy_reg;
1da177e4
LT
1165
1166 /* Setup the Device Control Register for PHY loopback test. */
1167
1dc32918 1168 ctrl_reg = er32(CTRL);
1da177e4
LT
1169 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1170 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1171 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1172 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1173 E1000_CTRL_FD); /* Force Duplex to FULL */
1174
1dc32918 1175 ew32(CTRL, ctrl_reg);
1da177e4
LT
1176
1177 /* Read the PHY Specific Control Register (0x10) */
1dc32918 1178 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1da177e4
LT
1179
1180 /* Clear Auto-Crossover bits in PHY Specific Control Register
1181 * (bits 6:5).
1182 */
1183 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1dc32918 1184 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1da177e4
LT
1185
1186 /* Perform software reset on the PHY */
1dc32918 1187 e1000_phy_reset(hw);
1da177e4
LT
1188
1189 /* Have to setup TX_CLK and TX_CRS after software reset */
1190 e1000_phy_reset_clk_and_crs(adapter);
1191
1dc32918 1192 e1000_write_phy_reg(hw, PHY_CTRL, 0x8100);
1da177e4
LT
1193
1194 /* Wait for reset to complete. */
1195 udelay(500);
1196
1197 /* Have to setup TX_CLK and TX_CRS after software reset */
1198 e1000_phy_reset_clk_and_crs(adapter);
1199
1200 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1201 e1000_phy_disable_receiver(adapter);
1202
1203 /* Set the loopback bit in the PHY control register. */
1dc32918 1204 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1da177e4 1205 phy_reg |= MII_CR_LOOPBACK;
1dc32918 1206 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1da177e4
LT
1207
1208 /* Setup TX_CLK and TX_CRS one more time. */
1209 e1000_phy_reset_clk_and_crs(adapter);
1210
1211 /* Check Phy Configuration */
1dc32918 1212 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
96838a40 1213 if (phy_reg != 0x4100)
1da177e4
LT
1214 return 9;
1215
1dc32918 1216 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
96838a40 1217 if (phy_reg != 0x0070)
1da177e4
LT
1218 return 10;
1219
1dc32918 1220 e1000_read_phy_reg(hw, 29, &phy_reg);
96838a40 1221 if (phy_reg != 0x001A)
1da177e4
LT
1222 return 11;
1223
1224 return 0;
1225}
1226
64798845 1227static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1228{
1dc32918 1229 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
1230 u32 ctrl_reg = 0;
1231 u32 stat_reg = 0;
1da177e4 1232
1dc32918 1233 hw->autoneg = false;
1da177e4 1234
1dc32918 1235 if (hw->phy_type == e1000_phy_m88) {
1da177e4 1236 /* Auto-MDI/MDIX Off */
1dc32918 1237 e1000_write_phy_reg(hw,
1da177e4
LT
1238 M88E1000_PHY_SPEC_CTRL, 0x0808);
1239 /* reset to update Auto-MDI/MDIX */
1dc32918 1240 e1000_write_phy_reg(hw, PHY_CTRL, 0x9140);
1da177e4 1241 /* autoneg off */
1dc32918 1242 e1000_write_phy_reg(hw, PHY_CTRL, 0x8140);
1532ecea 1243 }
1da177e4 1244
1dc32918 1245 ctrl_reg = er32(CTRL);
cd94dd0b 1246
1532ecea
JB
1247 /* force 1000, set loopback */
1248 e1000_write_phy_reg(hw, PHY_CTRL, 0x4140);
cd94dd0b 1249
1532ecea
JB
1250 /* Now set up the MAC to the same speed/duplex as the PHY. */
1251 ctrl_reg = er32(CTRL);
1252 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1253 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1254 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1255 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1256 E1000_CTRL_FD); /* Force Duplex to FULL */
1da177e4 1257
1dc32918
JP
1258 if (hw->media_type == e1000_media_type_copper &&
1259 hw->phy_type == e1000_phy_m88)
1da177e4 1260 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
8fc897b0 1261 else {
1da177e4
LT
1262 /* Set the ILOS bit on the fiber Nic is half
1263 * duplex link is detected. */
1dc32918 1264 stat_reg = er32(STATUS);
96838a40 1265 if ((stat_reg & E1000_STATUS_FD) == 0)
1da177e4
LT
1266 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1267 }
1268
1dc32918 1269 ew32(CTRL, ctrl_reg);
1da177e4
LT
1270
1271 /* Disable the receiver on the PHY so when a cable is plugged in, the
1272 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1273 */
1dc32918 1274 if (hw->phy_type == e1000_phy_m88)
1da177e4
LT
1275 e1000_phy_disable_receiver(adapter);
1276
1277 udelay(500);
1278
1279 return 0;
1280}
1281
64798845 1282static int e1000_set_phy_loopback(struct e1000_adapter *adapter)
1da177e4 1283{
1dc32918 1284 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
1285 u16 phy_reg = 0;
1286 u16 count = 0;
1da177e4 1287
1dc32918 1288 switch (hw->mac_type) {
1da177e4 1289 case e1000_82543:
1dc32918 1290 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT
1291 /* Attempt to setup Loopback mode on Non-integrated PHY.
1292 * Some PHY registers get corrupted at random, so
1293 * attempt this 10 times.
1294 */
96838a40 1295 while (e1000_nonintegrated_phy_loopback(adapter) &&
1da177e4 1296 count++ < 10);
96838a40 1297 if (count < 11)
1da177e4
LT
1298 return 0;
1299 }
1300 break;
1301
1302 case e1000_82544:
1303 case e1000_82540:
1304 case e1000_82545:
1305 case e1000_82545_rev_3:
1306 case e1000_82546:
1307 case e1000_82546_rev_3:
1308 case e1000_82541:
1309 case e1000_82541_rev_2:
1310 case e1000_82547:
1311 case e1000_82547_rev_2:
1312 return e1000_integrated_phy_loopback(adapter);
1313 break;
1da177e4
LT
1314 default:
1315 /* Default PHY loopback work is to read the MII
1316 * control register and assert bit 14 (loopback mode).
1317 */
1dc32918 1318 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1da177e4 1319 phy_reg |= MII_CR_LOOPBACK;
1dc32918 1320 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1da177e4
LT
1321 return 0;
1322 break;
1323 }
1324
1325 return 8;
1326}
1327
64798845 1328static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
1da177e4 1329{
49273163 1330 struct e1000_hw *hw = &adapter->hw;
406874a7 1331 u32 rctl;
1da177e4 1332
49273163
JK
1333 if (hw->media_type == e1000_media_type_fiber ||
1334 hw->media_type == e1000_media_type_internal_serdes) {
1335 switch (hw->mac_type) {
1336 case e1000_82545:
1337 case e1000_82546:
1338 case e1000_82545_rev_3:
1339 case e1000_82546_rev_3:
1da177e4 1340 return e1000_set_phy_loopback(adapter);
49273163 1341 break;
49273163 1342 default:
1dc32918 1343 rctl = er32(RCTL);
1da177e4 1344 rctl |= E1000_RCTL_LBM_TCVR;
1dc32918 1345 ew32(RCTL, rctl);
1da177e4
LT
1346 return 0;
1347 }
49273163 1348 } else if (hw->media_type == e1000_media_type_copper)
1da177e4
LT
1349 return e1000_set_phy_loopback(adapter);
1350
1351 return 7;
1352}
1353
64798845 1354static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
1da177e4 1355{
49273163 1356 struct e1000_hw *hw = &adapter->hw;
406874a7
JP
1357 u32 rctl;
1358 u16 phy_reg;
1da177e4 1359
1dc32918 1360 rctl = er32(RCTL);
1da177e4 1361 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1dc32918 1362 ew32(RCTL, rctl);
1da177e4 1363
49273163 1364 switch (hw->mac_type) {
49273163
JK
1365 case e1000_82545:
1366 case e1000_82546:
1367 case e1000_82545_rev_3:
1368 case e1000_82546_rev_3:
1369 default:
c3033b01 1370 hw->autoneg = true;
49273163
JK
1371 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1372 if (phy_reg & MII_CR_LOOPBACK) {
1da177e4 1373 phy_reg &= ~MII_CR_LOOPBACK;
49273163
JK
1374 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1375 e1000_phy_reset(hw);
1da177e4 1376 }
49273163 1377 break;
1da177e4
LT
1378 }
1379}
1380
64798845
JP
1381static void e1000_create_lbtest_frame(struct sk_buff *skb,
1382 unsigned int frame_size)
1da177e4
LT
1383{
1384 memset(skb->data, 0xFF, frame_size);
ce7393b9 1385 frame_size &= ~1;
1da177e4
LT
1386 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1387 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1388 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1389}
1390
64798845
JP
1391static int e1000_check_lbtest_frame(struct sk_buff *skb,
1392 unsigned int frame_size)
1da177e4 1393{
ce7393b9 1394 frame_size &= ~1;
96838a40
JB
1395 if (*(skb->data + 3) == 0xFF) {
1396 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1da177e4
LT
1397 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1398 return 0;
1399 }
1400 }
1401 return 13;
1402}
1403
64798845 1404static int e1000_run_loopback_test(struct e1000_adapter *adapter)
1da177e4 1405{
1dc32918 1406 struct e1000_hw *hw = &adapter->hw;
581d708e
MC
1407 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1408 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1da177e4 1409 struct pci_dev *pdev = adapter->pdev;
e4eff729
MC
1410 int i, j, k, l, lc, good_cnt, ret_val=0;
1411 unsigned long time;
1da177e4 1412
1dc32918 1413 ew32(RDT, rxdr->count - 1);
1da177e4 1414
96838a40 1415 /* Calculate the loop count based on the largest descriptor ring
e4eff729
MC
1416 * The idea is to wrap the largest ring a number of times using 64
1417 * send/receive pairs during each loop
1418 */
1da177e4 1419
96838a40 1420 if (rxdr->count <= txdr->count)
e4eff729
MC
1421 lc = ((txdr->count / 64) * 2) + 1;
1422 else
1423 lc = ((rxdr->count / 64) * 2) + 1;
1424
1425 k = l = 0;
96838a40
JB
1426 for (j = 0; j <= lc; j++) { /* loop count loop */
1427 for (i = 0; i < 64; i++) { /* send the packets */
1428 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
e4eff729 1429 1024);
96838a40 1430 pci_dma_sync_single_for_device(pdev,
e4eff729
MC
1431 txdr->buffer_info[k].dma,
1432 txdr->buffer_info[k].length,
1433 PCI_DMA_TODEVICE);
96838a40 1434 if (unlikely(++k == txdr->count)) k = 0;
e4eff729 1435 }
1dc32918 1436 ew32(TDT, k);
f8ec4733 1437 msleep(200);
e4eff729
MC
1438 time = jiffies; /* set the start time for the receive */
1439 good_cnt = 0;
1440 do { /* receive the sent packets */
96838a40 1441 pci_dma_sync_single_for_cpu(pdev,
e4eff729
MC
1442 rxdr->buffer_info[l].dma,
1443 rxdr->buffer_info[l].length,
1444 PCI_DMA_FROMDEVICE);
96838a40 1445
e4eff729
MC
1446 ret_val = e1000_check_lbtest_frame(
1447 rxdr->buffer_info[l].skb,
1448 1024);
96838a40 1449 if (!ret_val)
e4eff729 1450 good_cnt++;
96838a40
JB
1451 if (unlikely(++l == rxdr->count)) l = 0;
1452 /* time + 20 msecs (200 msecs on 2.4) is more than
1453 * enough time to complete the receives, if it's
e4eff729
MC
1454 * exceeded, break and error off
1455 */
1456 } while (good_cnt < 64 && jiffies < (time + 20));
96838a40 1457 if (good_cnt != 64) {
e4eff729 1458 ret_val = 13; /* ret_val is the same as mis-compare */
96838a40 1459 break;
e4eff729 1460 }
96838a40 1461 if (jiffies >= (time + 2)) {
e4eff729
MC
1462 ret_val = 14; /* error code for time out error */
1463 break;
1464 }
1465 } /* end loop count loop */
1da177e4
LT
1466 return ret_val;
1467}
1468
64798845 1469static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 1470{
c7be73bc
JP
1471 *data = e1000_setup_desc_rings(adapter);
1472 if (*data)
57128197 1473 goto out;
c7be73bc
JP
1474 *data = e1000_setup_loopback_test(adapter);
1475 if (*data)
57128197 1476 goto err_loopback;
1da177e4
LT
1477 *data = e1000_run_loopback_test(adapter);
1478 e1000_loopback_cleanup(adapter);
57128197 1479
1da177e4 1480err_loopback:
57128197
JK
1481 e1000_free_desc_rings(adapter);
1482out:
1da177e4
LT
1483 return *data;
1484}
1485
64798845 1486static int e1000_link_test(struct e1000_adapter *adapter, u64 *data)
1da177e4 1487{
1dc32918 1488 struct e1000_hw *hw = &adapter->hw;
1da177e4 1489 *data = 0;
1dc32918 1490 if (hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 1491 int i = 0;
be0f0719 1492 hw->serdes_has_link = false;
1da177e4 1493
2648345f
MC
1494 /* On some blade server designs, link establishment
1495 * could take as long as 2-3 minutes */
1da177e4 1496 do {
1dc32918 1497 e1000_check_for_link(hw);
be0f0719 1498 if (hw->serdes_has_link)
1da177e4 1499 return *data;
f8ec4733 1500 msleep(20);
1da177e4
LT
1501 } while (i++ < 3750);
1502
2648345f 1503 *data = 1;
1da177e4 1504 } else {
1dc32918
JP
1505 e1000_check_for_link(hw);
1506 if (hw->autoneg) /* if auto_neg is set wait for it */
f8ec4733 1507 msleep(4000);
1da177e4 1508
1dc32918 1509 if (!(er32(STATUS) & E1000_STATUS_LU)) {
1da177e4
LT
1510 *data = 1;
1511 }
1512 }
1513 return *data;
1514}
1515
64798845 1516static int e1000_get_sset_count(struct net_device *netdev, int sset)
1da177e4 1517{
b9f2c044
JG
1518 switch (sset) {
1519 case ETH_SS_TEST:
1520 return E1000_TEST_LEN;
1521 case ETH_SS_STATS:
1522 return E1000_STATS_LEN;
1523 default:
1524 return -EOPNOTSUPP;
1525 }
1da177e4
LT
1526}
1527
64798845
JP
1528static void e1000_diag_test(struct net_device *netdev,
1529 struct ethtool_test *eth_test, u64 *data)
1da177e4 1530{
60490fe0 1531 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1532 struct e1000_hw *hw = &adapter->hw;
c3033b01 1533 bool if_running = netif_running(netdev);
1da177e4 1534
1314bbf3 1535 set_bit(__E1000_TESTING, &adapter->flags);
96838a40 1536 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1da177e4
LT
1537 /* Offline tests */
1538
1539 /* save speed, duplex, autoneg settings */
1dc32918
JP
1540 u16 autoneg_advertised = hw->autoneg_advertised;
1541 u8 forced_speed_duplex = hw->forced_speed_duplex;
1542 u8 autoneg = hw->autoneg;
1da177e4 1543
d658266e
JB
1544 DPRINTK(HW, INFO, "offline testing starting\n");
1545
1da177e4
LT
1546 /* Link test performed before hardware reset so autoneg doesn't
1547 * interfere with test result */
96838a40 1548 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT
1549 eth_test->flags |= ETH_TEST_FL_FAILED;
1550
96838a40 1551 if (if_running)
2db10a08
AK
1552 /* indicate we're in test mode */
1553 dev_close(netdev);
1da177e4
LT
1554 else
1555 e1000_reset(adapter);
1556
96838a40 1557 if (e1000_reg_test(adapter, &data[0]))
1da177e4
LT
1558 eth_test->flags |= ETH_TEST_FL_FAILED;
1559
1560 e1000_reset(adapter);
96838a40 1561 if (e1000_eeprom_test(adapter, &data[1]))
1da177e4
LT
1562 eth_test->flags |= ETH_TEST_FL_FAILED;
1563
1564 e1000_reset(adapter);
96838a40 1565 if (e1000_intr_test(adapter, &data[2]))
1da177e4
LT
1566 eth_test->flags |= ETH_TEST_FL_FAILED;
1567
1568 e1000_reset(adapter);
d658266e
JB
1569 /* make sure the phy is powered up */
1570 e1000_power_up_phy(adapter);
96838a40 1571 if (e1000_loopback_test(adapter, &data[3]))
1da177e4
LT
1572 eth_test->flags |= ETH_TEST_FL_FAILED;
1573
1574 /* restore speed, duplex, autoneg settings */
1dc32918
JP
1575 hw->autoneg_advertised = autoneg_advertised;
1576 hw->forced_speed_duplex = forced_speed_duplex;
1577 hw->autoneg = autoneg;
1da177e4
LT
1578
1579 e1000_reset(adapter);
1314bbf3 1580 clear_bit(__E1000_TESTING, &adapter->flags);
96838a40 1581 if (if_running)
2db10a08 1582 dev_open(netdev);
1da177e4 1583 } else {
d658266e 1584 DPRINTK(HW, INFO, "online testing starting\n");
1da177e4 1585 /* Online tests */
96838a40 1586 if (e1000_link_test(adapter, &data[4]))
1da177e4
LT
1587 eth_test->flags |= ETH_TEST_FL_FAILED;
1588
90fb5135 1589 /* Online tests aren't run; pass by default */
1da177e4
LT
1590 data[0] = 0;
1591 data[1] = 0;
1592 data[2] = 0;
1593 data[3] = 0;
2db10a08 1594
1314bbf3 1595 clear_bit(__E1000_TESTING, &adapter->flags);
1da177e4 1596 }
352c9f85 1597 msleep_interruptible(4 * 1000);
1da177e4
LT
1598}
1599
64798845
JP
1600static int e1000_wol_exclusion(struct e1000_adapter *adapter,
1601 struct ethtool_wolinfo *wol)
1da177e4 1602{
1da177e4 1603 struct e1000_hw *hw = &adapter->hw;
120cd576 1604 int retval = 1; /* fail by default */
1da177e4 1605
120cd576 1606 switch (hw->device_id) {
dc1f71f6 1607 case E1000_DEV_ID_82542:
1da177e4
LT
1608 case E1000_DEV_ID_82543GC_FIBER:
1609 case E1000_DEV_ID_82543GC_COPPER:
1610 case E1000_DEV_ID_82544EI_FIBER:
1611 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1612 case E1000_DEV_ID_82545EM_FIBER:
1613 case E1000_DEV_ID_82545EM_COPPER:
84916829 1614 case E1000_DEV_ID_82546GB_QUAD_COPPER:
120cd576
JB
1615 case E1000_DEV_ID_82546GB_PCIE:
1616 /* these don't support WoL at all */
1da177e4 1617 wol->supported = 0;
120cd576 1618 break;
1da177e4
LT
1619 case E1000_DEV_ID_82546EB_FIBER:
1620 case E1000_DEV_ID_82546GB_FIBER:
120cd576 1621 /* Wake events not supported on port B */
1dc32918 1622 if (er32(STATUS) & E1000_STATUS_FUNC_1) {
1da177e4 1623 wol->supported = 0;
120cd576 1624 break;
1da177e4 1625 }
120cd576
JB
1626 /* return success for non excluded adapter ports */
1627 retval = 0;
1628 break;
1629 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1630 /* quad port adapters only support WoL on port A */
1631 if (!adapter->quad_port_a) {
1632 wol->supported = 0;
1633 break;
1634 }
1635 /* return success for non excluded adapter ports */
1636 retval = 0;
1637 break;
1da177e4 1638 default:
120cd576
JB
1639 /* dual port cards only support WoL on port A from now on
1640 * unless it was enabled in the eeprom for port B
1641 * so exclude FUNC_1 ports from having WoL enabled */
1dc32918 1642 if (er32(STATUS) & E1000_STATUS_FUNC_1 &&
120cd576
JB
1643 !adapter->eeprom_wol) {
1644 wol->supported = 0;
1645 break;
1646 }
84916829 1647
120cd576
JB
1648 retval = 0;
1649 }
1650
1651 return retval;
1652}
1653
64798845
JP
1654static void e1000_get_wol(struct net_device *netdev,
1655 struct ethtool_wolinfo *wol)
120cd576
JB
1656{
1657 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1658 struct e1000_hw *hw = &adapter->hw;
120cd576
JB
1659
1660 wol->supported = WAKE_UCAST | WAKE_MCAST |
1661 WAKE_BCAST | WAKE_MAGIC;
1662 wol->wolopts = 0;
1663
1664 /* this function will set ->supported = 0 and return 1 if wol is not
1665 * supported by this hardware */
de126489
RW
1666 if (e1000_wol_exclusion(adapter, wol) ||
1667 !device_can_wakeup(&adapter->pdev->dev))
1da177e4 1668 return;
120cd576
JB
1669
1670 /* apply any specific unsupported masks here */
1dc32918 1671 switch (hw->device_id) {
120cd576
JB
1672 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1673 /* KSP3 does not suppport UCAST wake-ups */
1674 wol->supported &= ~WAKE_UCAST;
1675
1676 if (adapter->wol & E1000_WUFC_EX)
1677 DPRINTK(DRV, ERR, "Interface does not support "
1678 "directed (unicast) frame wake-up packets\n");
1679 break;
1680 default:
1681 break;
1da177e4 1682 }
120cd576
JB
1683
1684 if (adapter->wol & E1000_WUFC_EX)
1685 wol->wolopts |= WAKE_UCAST;
1686 if (adapter->wol & E1000_WUFC_MC)
1687 wol->wolopts |= WAKE_MCAST;
1688 if (adapter->wol & E1000_WUFC_BC)
1689 wol->wolopts |= WAKE_BCAST;
1690 if (adapter->wol & E1000_WUFC_MAG)
1691 wol->wolopts |= WAKE_MAGIC;
1692
1693 return;
1da177e4
LT
1694}
1695
64798845 1696static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1da177e4 1697{
60490fe0 1698 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1699 struct e1000_hw *hw = &adapter->hw;
1700
120cd576
JB
1701 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1702 return -EOPNOTSUPP;
1703
de126489
RW
1704 if (e1000_wol_exclusion(adapter, wol) ||
1705 !device_can_wakeup(&adapter->pdev->dev))
1da177e4
LT
1706 return wol->wolopts ? -EOPNOTSUPP : 0;
1707
120cd576 1708 switch (hw->device_id) {
84916829 1709 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
84916829
JK
1710 if (wol->wolopts & WAKE_UCAST) {
1711 DPRINTK(DRV, ERR, "Interface does not support "
1712 "directed (unicast) frame wake-up packets\n");
1713 return -EOPNOTSUPP;
1714 }
120cd576 1715 break;
1da177e4 1716 default:
120cd576 1717 break;
1da177e4
LT
1718 }
1719
120cd576
JB
1720 /* these settings will always override what we currently have */
1721 adapter->wol = 0;
1722
1723 if (wol->wolopts & WAKE_UCAST)
1724 adapter->wol |= E1000_WUFC_EX;
1725 if (wol->wolopts & WAKE_MCAST)
1726 adapter->wol |= E1000_WUFC_MC;
1727 if (wol->wolopts & WAKE_BCAST)
1728 adapter->wol |= E1000_WUFC_BC;
1729 if (wol->wolopts & WAKE_MAGIC)
1730 adapter->wol |= E1000_WUFC_MAG;
1731
de126489
RW
1732 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1733
1da177e4
LT
1734 return 0;
1735}
1736
1737/* toggle LED 4 times per second = 2 "blinks" per second */
1738#define E1000_ID_INTERVAL (HZ/4)
1739
1740/* bit defines for adapter->led_status */
1741#define E1000_LED_ON 0
1742
64798845 1743static void e1000_led_blink_callback(unsigned long data)
1da177e4
LT
1744{
1745 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1dc32918 1746 struct e1000_hw *hw = &adapter->hw;
1da177e4 1747
96838a40 1748 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1dc32918 1749 e1000_led_off(hw);
1da177e4 1750 else
1dc32918 1751 e1000_led_on(hw);
1da177e4
LT
1752
1753 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1754}
1755
64798845 1756static int e1000_phys_id(struct net_device *netdev, u32 data)
1da177e4 1757{
60490fe0 1758 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1759 struct e1000_hw *hw = &adapter->hw;
1da177e4 1760
abec42a4
SH
1761 if (!data)
1762 data = INT_MAX;
1da177e4 1763
1532ecea
JB
1764 if (!adapter->blink_timer.function) {
1765 init_timer(&adapter->blink_timer);
1766 adapter->blink_timer.function = e1000_led_blink_callback;
1767 adapter->blink_timer.data = (unsigned long)adapter;
1da177e4 1768 }
1532ecea
JB
1769 e1000_setup_led(hw);
1770 mod_timer(&adapter->blink_timer, jiffies);
1771 msleep_interruptible(data * 1000);
1772 del_timer_sync(&adapter->blink_timer);
1da177e4 1773
1dc32918 1774 e1000_led_off(hw);
1da177e4 1775 clear_bit(E1000_LED_ON, &adapter->led_status);
1dc32918 1776 e1000_cleanup_led(hw);
1da177e4
LT
1777
1778 return 0;
1779}
1780
94c9e5a8
JB
1781static int e1000_get_coalesce(struct net_device *netdev,
1782 struct ethtool_coalesce *ec)
1783{
1784 struct e1000_adapter *adapter = netdev_priv(netdev);
1785
1786 if (adapter->hw.mac_type < e1000_82545)
1787 return -EOPNOTSUPP;
1788
1789 if (adapter->itr_setting <= 3)
1790 ec->rx_coalesce_usecs = adapter->itr_setting;
1791 else
1792 ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting;
1793
1794 return 0;
1795}
1796
1797static int e1000_set_coalesce(struct net_device *netdev,
1798 struct ethtool_coalesce *ec)
1799{
1800 struct e1000_adapter *adapter = netdev_priv(netdev);
1801 struct e1000_hw *hw = &adapter->hw;
1802
1803 if (hw->mac_type < e1000_82545)
1804 return -EOPNOTSUPP;
1805
1806 if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) ||
1807 ((ec->rx_coalesce_usecs > 3) &&
1808 (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) ||
1809 (ec->rx_coalesce_usecs == 2))
1810 return -EINVAL;
1811
1812 if (ec->rx_coalesce_usecs <= 3) {
1813 adapter->itr = 20000;
1814 adapter->itr_setting = ec->rx_coalesce_usecs;
1815 } else {
1816 adapter->itr = (1000000 / ec->rx_coalesce_usecs);
1817 adapter->itr_setting = adapter->itr & ~3;
1818 }
1819
1820 if (adapter->itr_setting != 0)
1821 ew32(ITR, 1000000000 / (adapter->itr * 256));
1822 else
1823 ew32(ITR, 0);
1824
1825 return 0;
1826}
1827
64798845 1828static int e1000_nway_reset(struct net_device *netdev)
1da177e4 1829{
60490fe0 1830 struct e1000_adapter *adapter = netdev_priv(netdev);
2db10a08
AK
1831 if (netif_running(netdev))
1832 e1000_reinit_locked(adapter);
1da177e4
LT
1833 return 0;
1834}
1835
64798845
JP
1836static void e1000_get_ethtool_stats(struct net_device *netdev,
1837 struct ethtool_stats *stats, u64 *data)
1da177e4 1838{
60490fe0 1839 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1840 int i;
8328c38f 1841 char *p = NULL;
1da177e4
LT
1842
1843 e1000_update_stats(adapter);
7bfa4816 1844 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
8328c38f
AK
1845 switch (e1000_gstrings_stats[i].type) {
1846 case NETDEV_STATS:
1847 p = (char *) netdev +
1848 e1000_gstrings_stats[i].stat_offset;
1849 break;
1850 case E1000_STATS:
1851 p = (char *) adapter +
1852 e1000_gstrings_stats[i].stat_offset;
1853 break;
1854 }
1855
7bfa4816 1856 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
406874a7 1857 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1da177e4 1858 }
7bfa4816 1859/* BUG_ON(i != E1000_STATS_LEN); */
1da177e4
LT
1860}
1861
64798845
JP
1862static void e1000_get_strings(struct net_device *netdev, u32 stringset,
1863 u8 *data)
1da177e4 1864{
406874a7 1865 u8 *p = data;
1da177e4
LT
1866 int i;
1867
96838a40 1868 switch (stringset) {
1da177e4 1869 case ETH_SS_TEST:
96838a40 1870 memcpy(data, *e1000_gstrings_test,
c32bc6e9 1871 sizeof(e1000_gstrings_test));
1da177e4
LT
1872 break;
1873 case ETH_SS_STATS:
7bfa4816
JK
1874 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1875 memcpy(p, e1000_gstrings_stats[i].stat_string,
1876 ETH_GSTRING_LEN);
1877 p += ETH_GSTRING_LEN;
1878 }
7bfa4816 1879/* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1da177e4
LT
1880 break;
1881 }
1882}
1883
7282d491 1884static const struct ethtool_ops e1000_ethtool_ops = {
1da177e4
LT
1885 .get_settings = e1000_get_settings,
1886 .set_settings = e1000_set_settings,
1887 .get_drvinfo = e1000_get_drvinfo,
1888 .get_regs_len = e1000_get_regs_len,
1889 .get_regs = e1000_get_regs,
1890 .get_wol = e1000_get_wol,
1891 .set_wol = e1000_set_wol,
8fc897b0
AK
1892 .get_msglevel = e1000_get_msglevel,
1893 .set_msglevel = e1000_set_msglevel,
1da177e4
LT
1894 .nway_reset = e1000_nway_reset,
1895 .get_link = ethtool_op_get_link,
1896 .get_eeprom_len = e1000_get_eeprom_len,
1897 .get_eeprom = e1000_get_eeprom,
1898 .set_eeprom = e1000_set_eeprom,
1899 .get_ringparam = e1000_get_ringparam,
1900 .set_ringparam = e1000_set_ringparam,
8fc897b0
AK
1901 .get_pauseparam = e1000_get_pauseparam,
1902 .set_pauseparam = e1000_set_pauseparam,
1903 .get_rx_csum = e1000_get_rx_csum,
1904 .set_rx_csum = e1000_set_rx_csum,
1905 .get_tx_csum = e1000_get_tx_csum,
1906 .set_tx_csum = e1000_set_tx_csum,
8fc897b0 1907 .set_sg = ethtool_op_set_sg,
8fc897b0 1908 .set_tso = e1000_set_tso,
1da177e4
LT
1909 .self_test = e1000_diag_test,
1910 .get_strings = e1000_get_strings,
1911 .phys_id = e1000_phys_id,
1da177e4 1912 .get_ethtool_stats = e1000_get_ethtool_stats,
94c9e5a8
JB
1913 .get_sset_count = e1000_get_sset_count,
1914 .get_coalesce = e1000_get_coalesce,
1915 .set_coalesce = e1000_set_coalesce,
1da177e4
LT
1916};
1917
1918void e1000_set_ethtool_ops(struct net_device *netdev)
1919{
1920 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1921}