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91da11f8 LB |
1 | /* |
2 | * net/dsa/mv88e6xxx.h - Marvell 88e6xxx switch chip support | |
3 | * Copyright (c) 2008 Marvell Semiconductor | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or | |
8 | * (at your option) any later version. | |
9 | */ | |
10 | ||
11 | #ifndef __MV88E6XXX_H | |
12 | #define __MV88E6XXX_H | |
13 | ||
14 | #define REG_PORT(p) (0x10 + (p)) | |
15 | #define REG_GLOBAL 0x1b | |
16 | #define REG_GLOBAL2 0x1c | |
17 | ||
18 | struct mv88e6xxx_priv_state { | |
3675c8d7 | 19 | /* When using multi-chip addressing, this mutex protects |
91da11f8 LB |
20 | * access to the indirect access registers. (In single-chip |
21 | * mode, this mutex is effectively useless.) | |
22 | */ | |
23 | struct mutex smi_mutex; | |
24 | ||
2e5f0320 | 25 | #ifdef CONFIG_NET_DSA_MV88E6XXX_NEED_PPU |
3675c8d7 | 26 | /* Handles automatic disabling and re-enabling of the PHY |
2e5f0320 LB |
27 | * polling unit. |
28 | */ | |
29 | struct mutex ppu_mutex; | |
30 | int ppu_disabled; | |
31 | struct work_struct ppu_work; | |
32 | struct timer_list ppu_timer; | |
33 | #endif | |
34 | ||
3675c8d7 | 35 | /* This mutex serialises access to the statistics unit. |
91da11f8 LB |
36 | * Hold this mutex over snapshot + dump sequences. |
37 | */ | |
38 | struct mutex stats_mutex; | |
ec80bfcb | 39 | |
3ad50cca GR |
40 | /* This mutex serializes phy access for chips with |
41 | * indirect phy addressing. It is unused for chips | |
42 | * with direct phy access. | |
43 | */ | |
44 | struct mutex phy_mutex; | |
45 | ||
33b43df4 GR |
46 | /* This mutex serializes eeprom access for chips with |
47 | * eeprom support. | |
48 | */ | |
49 | struct mutex eeprom_mutex; | |
50 | ||
ec80bfcb | 51 | int id; /* switch product id */ |
91da11f8 LB |
52 | }; |
53 | ||
54 | struct mv88e6xxx_hw_stat { | |
55 | char string[ETH_GSTRING_LEN]; | |
56 | int sizeof_stat; | |
57 | int reg; | |
58 | }; | |
59 | ||
60 | int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg); | |
61 | int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg); | |
62 | int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr, | |
85686581 | 63 | int reg, u16 val); |
91da11f8 LB |
64 | int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val); |
65 | int mv88e6xxx_config_prio(struct dsa_switch *ds); | |
2e5f0320 | 66 | int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr); |
91da11f8 LB |
67 | int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr); |
68 | int mv88e6xxx_phy_read(struct dsa_switch *ds, int addr, int regnum); | |
69 | int mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum, u16 val); | |
2e5f0320 LB |
70 | void mv88e6xxx_ppu_state_init(struct dsa_switch *ds); |
71 | int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum); | |
72 | int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr, | |
73 | int regnum, u16 val); | |
91da11f8 LB |
74 | void mv88e6xxx_poll_link(struct dsa_switch *ds); |
75 | void mv88e6xxx_get_strings(struct dsa_switch *ds, | |
76 | int nr_stats, struct mv88e6xxx_hw_stat *stats, | |
77 | int port, uint8_t *data); | |
78 | void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds, | |
79 | int nr_stats, struct mv88e6xxx_hw_stat *stats, | |
80 | int port, uint64_t *data); | |
a1ab91f3 GR |
81 | int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port); |
82 | void mv88e6xxx_get_regs(struct dsa_switch *ds, int port, | |
83 | struct ethtool_regs *regs, void *_p); | |
eaa23765 | 84 | int mv88e6xxx_get_temp(struct dsa_switch *ds, int *temp); |
91da11f8 | 85 | |
98e67308 BH |
86 | extern struct dsa_switch_driver mv88e6131_switch_driver; |
87 | extern struct dsa_switch_driver mv88e6123_61_65_switch_driver; | |
3ad50cca | 88 | extern struct dsa_switch_driver mv88e6352_switch_driver; |
42f27253 | 89 | extern struct dsa_switch_driver mv88e6171_switch_driver; |
98e67308 | 90 | |
91da11f8 LB |
91 | #define REG_READ(addr, reg) \ |
92 | ({ \ | |
93 | int __ret; \ | |
94 | \ | |
95 | __ret = mv88e6xxx_reg_read(ds, addr, reg); \ | |
96 | if (__ret < 0) \ | |
97 | return __ret; \ | |
98 | __ret; \ | |
99 | }) | |
100 | ||
101 | #define REG_WRITE(addr, reg, val) \ | |
102 | ({ \ | |
103 | int __ret; \ | |
104 | \ | |
105 | __ret = mv88e6xxx_reg_write(ds, addr, reg, val); \ | |
106 | if (__ret < 0) \ | |
107 | return __ret; \ | |
108 | }) | |
109 | ||
110 | ||
111 | ||
112 | #endif |