Blackfin arch: There is no CDPRIO Bit in the EBIU_AMGCTL Register of BF54x arch
[linux-block.git] / drivers / net / dm9000.c
CommitLineData
a1365275
SH
1/*
2 * dm9000.c: Version 1.2 03/18/2003
3 *
4 * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
5 * Copyright (C) 1997 Sten Wang
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
18 *
19 * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
20 * 06/22/2001 Support DM9801 progrmming
21 * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
22 * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
23 * R17 = (R17 & 0xfff0) | NF + 3
24 * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
25 * R17 = (R17 & 0xfff0) | NF
26 *
27 * v1.00 modify by simon 2001.9.5
28 * change for kernel 2.4.x
29 *
30 * v1.1 11/09/2001 fix force mode bug
31 *
32 * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
33 * Fixed phy reset.
34 * Added tx/rx 32 bit mode.
35 * Cleaned up for kernel merge.
36 *
37 * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de>
38 * Port to 2.6 kernel
39 *
40 * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk>
41 * Cleanup of code to remove ifdefs
42 * Allowed platform device data to influence access width
43 * Reformatting areas of code
44 *
45 * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de>
46 * * removed 2.4 style module parameters
47 * * removed removed unused stat counter and fixed
48 * net_device_stats
49 * * introduced tx_timeout function
50 * * reworked locking
9ef9ac51
BD
51 *
52 * 01-Jul-2005 Ben Dooks <ben@simtec.co.uk>
53 * * fixed spinlock call without pointer
54 * * ensure spinlock is initialised
a1365275
SH
55 */
56
57#include <linux/module.h>
58#include <linux/ioport.h>
59#include <linux/netdevice.h>
60#include <linux/etherdevice.h>
61#include <linux/init.h>
62#include <linux/skbuff.h>
a1365275
SH
63#include <linux/spinlock.h>
64#include <linux/crc32.h>
65#include <linux/mii.h>
66#include <linux/dm9000.h>
67#include <linux/delay.h>
d052d1be 68#include <linux/platform_device.h>
a1365275
SH
69
70#include <asm/delay.h>
71#include <asm/irq.h>
72#include <asm/io.h>
73
74#include "dm9000.h"
75
76/* Board/System/Debug information/definition ---------------- */
77
78#define DM9000_PHY 0x40 /* PHY address 0x01 */
79
a1365275
SH
80#define CARDNAME "dm9000"
81#define PFX CARDNAME ": "
82
83#define DM9000_TIMER_WUT jiffies+(HZ*2) /* timer wakeup time : 2 second */
84
85#define DM9000_DEBUG 0
86
87#if DM9000_DEBUG > 2
88#define PRINTK3(args...) printk(CARDNAME ": " args)
89#else
90#define PRINTK3(args...) do { } while(0)
91#endif
92
93#if DM9000_DEBUG > 1
94#define PRINTK2(args...) printk(CARDNAME ": " args)
95#else
96#define PRINTK2(args...) do { } while(0)
97#endif
98
99#if DM9000_DEBUG > 0
100#define PRINTK1(args...) printk(CARDNAME ": " args)
101#define PRINTK(args...) printk(CARDNAME ": " args)
102#else
103#define PRINTK1(args...) do { } while(0)
104#define PRINTK(args...) printk(KERN_DEBUG args)
105#endif
106
107/*
108 * Transmit timeout, default 5 seconds.
109 */
110static int watchdog = 5000;
111module_param(watchdog, int, 0400);
112MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
113
114/* Structure/enum declaration ------------------------------- */
115typedef struct board_info {
116
117 void __iomem *io_addr; /* Register I/O base address */
118 void __iomem *io_data; /* Data I/O address */
119 u16 irq; /* IRQ */
120
121 u16 tx_pkt_cnt;
122 u16 queue_pkt_len;
123 u16 queue_start_addr;
124 u16 dbug_cnt;
125 u8 io_mode; /* 0:word, 2:byte */
126 u8 phy_addr;
127
128 void (*inblk)(void __iomem *port, void *data, int length);
129 void (*outblk)(void __iomem *port, void *data, int length);
130 void (*dumpblk)(void __iomem *port, int length);
131
132 struct resource *addr_res; /* resources found */
133 struct resource *data_res;
134 struct resource *addr_req; /* resources requested */
135 struct resource *data_req;
136 struct resource *irq_res;
137
138 struct timer_list timer;
139 struct net_device_stats stats;
140 unsigned char srom[128];
141 spinlock_t lock;
142
143 struct mii_if_info mii;
144 u32 msg_enable;
145} board_info_t;
146
147/* function declaration ------------------------------------- */
3ae5eaec 148static int dm9000_probe(struct platform_device *);
a1365275
SH
149static int dm9000_open(struct net_device *);
150static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
151static int dm9000_stop(struct net_device *);
a1365275
SH
152
153
154static void dm9000_timer(unsigned long);
155static void dm9000_init_dm9000(struct net_device *);
156
157static struct net_device_stats *dm9000_get_stats(struct net_device *);
158
7d12e780 159static irqreturn_t dm9000_interrupt(int, void *);
a1365275
SH
160
161static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
162static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
163 int value);
164static u16 read_srom_word(board_info_t *, int);
165static void dm9000_rx(struct net_device *);
166static void dm9000_hash_table(struct net_device *);
167
168//#define DM9000_PROGRAM_EEPROM
169#ifdef DM9000_PROGRAM_EEPROM
170static void program_eeprom(board_info_t * db);
171#endif
172/* DM9000 network board routine ---------------------------- */
173
174static void
175dm9000_reset(board_info_t * db)
176{
177 PRINTK1("dm9000x: resetting\n");
178 /* RESET device */
179 writeb(DM9000_NCR, db->io_addr);
180 udelay(200);
181 writeb(NCR_RST, db->io_data);
182 udelay(200);
183}
184
185/*
186 * Read a byte from I/O port
187 */
188static u8
189ior(board_info_t * db, int reg)
190{
191 writeb(reg, db->io_addr);
192 return readb(db->io_data);
193}
194
195/*
196 * Write a byte to I/O port
197 */
198
199static void
200iow(board_info_t * db, int reg, int value)
201{
202 writeb(reg, db->io_addr);
203 writeb(value, db->io_data);
204}
205
206/* routines for sending block to chip */
207
208static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
209{
210 writesb(reg, data, count);
211}
212
213static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
214{
215 writesw(reg, data, (count+1) >> 1);
216}
217
218static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
219{
220 writesl(reg, data, (count+3) >> 2);
221}
222
223/* input block from chip to memory */
224
225static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
226{
5f6b5517 227 readsb(reg, data, count);
a1365275
SH
228}
229
230
231static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
232{
233 readsw(reg, data, (count+1) >> 1);
234}
235
236static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
237{
238 readsl(reg, data, (count+3) >> 2);
239}
240
241/* dump block from chip to null */
242
243static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
244{
245 int i;
246 int tmp;
247
248 for (i = 0; i < count; i++)
249 tmp = readb(reg);
250}
251
252static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
253{
254 int i;
255 int tmp;
256
257 count = (count + 1) >> 1;
258
259 for (i = 0; i < count; i++)
260 tmp = readw(reg);
261}
262
263static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
264{
265 int i;
266 int tmp;
267
268 count = (count + 3) >> 2;
269
270 for (i = 0; i < count; i++)
271 tmp = readl(reg);
272}
273
274/* dm9000_set_io
275 *
276 * select the specified set of io routines to use with the
277 * device
278 */
279
280static void dm9000_set_io(struct board_info *db, int byte_width)
281{
282 /* use the size of the data resource to work out what IO
283 * routines we want to use
284 */
285
286 switch (byte_width) {
287 case 1:
288 db->dumpblk = dm9000_dumpblk_8bit;
289 db->outblk = dm9000_outblk_8bit;
290 db->inblk = dm9000_inblk_8bit;
291 break;
292
293 case 2:
294 db->dumpblk = dm9000_dumpblk_16bit;
295 db->outblk = dm9000_outblk_16bit;
296 db->inblk = dm9000_inblk_16bit;
297 break;
298
299 case 3:
300 printk(KERN_ERR PFX ": 3 byte IO, falling back to 16bit\n");
301 db->dumpblk = dm9000_dumpblk_16bit;
302 db->outblk = dm9000_outblk_16bit;
303 db->inblk = dm9000_inblk_16bit;
304 break;
305
306 case 4:
307 default:
308 db->dumpblk = dm9000_dumpblk_32bit;
309 db->outblk = dm9000_outblk_32bit;
310 db->inblk = dm9000_inblk_32bit;
311 break;
312 }
313}
314
315
316/* Our watchdog timed out. Called by the networking layer */
317static void dm9000_timeout(struct net_device *dev)
318{
319 board_info_t *db = (board_info_t *) dev->priv;
320 u8 reg_save;
321 unsigned long flags;
322
323 /* Save previous register address */
324 reg_save = readb(db->io_addr);
9ef9ac51 325 spin_lock_irqsave(&db->lock,flags);
a1365275
SH
326
327 netif_stop_queue(dev);
328 dm9000_reset(db);
329 dm9000_init_dm9000(dev);
330 /* We can accept TX packets again */
331 dev->trans_start = jiffies;
332 netif_wake_queue(dev);
333
334 /* Restore previous register address */
335 writeb(reg_save, db->io_addr);
9ef9ac51 336 spin_unlock_irqrestore(&db->lock,flags);
a1365275
SH
337}
338
2fd0e33f
KH
339#ifdef CONFIG_NET_POLL_CONTROLLER
340/*
341 *Used by netconsole
342 */
343static void dm9000_poll_controller(struct net_device *dev)
344{
345 disable_irq(dev->irq);
28431146 346 dm9000_interrupt(dev->irq,dev);
2fd0e33f
KH
347 enable_irq(dev->irq);
348}
349#endif
a1365275
SH
350
351/* dm9000_release_board
352 *
353 * release a board, and any mapped resources
354 */
355
356static void
357dm9000_release_board(struct platform_device *pdev, struct board_info *db)
358{
359 if (db->data_res == NULL) {
360 if (db->addr_res != NULL)
361 release_mem_region((unsigned long)db->io_addr, 4);
362 return;
363 }
364
365 /* unmap our resources */
366
367 iounmap(db->io_addr);
368 iounmap(db->io_data);
369
370 /* release the resources */
371
372 if (db->data_req != NULL) {
373 release_resource(db->data_req);
374 kfree(db->data_req);
375 }
376
51985487
DO
377 if (db->addr_req != NULL) {
378 release_resource(db->addr_req);
a1365275
SH
379 kfree(db->addr_req);
380 }
381}
382
383#define res_size(_r) (((_r)->end - (_r)->start) + 1)
384
385/*
386 * Search DM9000 board, allocate space and register it
387 */
388static int
3ae5eaec 389dm9000_probe(struct platform_device *pdev)
a1365275 390{
a1365275
SH
391 struct dm9000_plat_data *pdata = pdev->dev.platform_data;
392 struct board_info *db; /* Point a board information structure */
393 struct net_device *ndev;
394 unsigned long base;
395 int ret = 0;
396 int iosize;
397 int i;
398 u32 id_val;
399
a1365275
SH
400 /* Init network device */
401 ndev = alloc_etherdev(sizeof (struct board_info));
402 if (!ndev) {
403 printk("%s: could not allocate device.\n", CARDNAME);
404 return -ENOMEM;
405 }
406
407 SET_MODULE_OWNER(ndev);
3ae5eaec 408 SET_NETDEV_DEV(ndev, &pdev->dev);
a1365275
SH
409
410 PRINTK2("dm9000_probe()");
411
412 /* setup board info structure */
413 db = (struct board_info *) ndev->priv;
414 memset(db, 0, sizeof (*db));
415
9ef9ac51
BD
416 spin_lock_init(&db->lock);
417
a1365275
SH
418 if (pdev->num_resources < 2) {
419 ret = -ENODEV;
420 goto out;
b4ed03ff 421 } else if (pdev->num_resources == 2) {
a1365275
SH
422 base = pdev->resource[0].start;
423
424 if (!request_mem_region(base, 4, ndev->name)) {
425 ret = -EBUSY;
426 goto out;
427 }
428
429 ndev->base_addr = base;
430 ndev->irq = pdev->resource[1].start;
b4ed03ff
BD
431 db->io_addr = (void __iomem *)base;
432 db->io_data = (void __iomem *)(base + 4);
a1365275 433
b4ed03ff 434 } else {
a1365275
SH
435 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
436 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
437 db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
438
b4ed03ff
BD
439 if (db->addr_res == NULL || db->data_res == NULL ||
440 db->irq_res == NULL) {
a1365275
SH
441 printk(KERN_ERR PFX "insufficient resources\n");
442 ret = -ENOENT;
443 goto out;
444 }
445
446 i = res_size(db->addr_res);
447 db->addr_req = request_mem_region(db->addr_res->start, i,
448 pdev->name);
449
450 if (db->addr_req == NULL) {
451 printk(KERN_ERR PFX "cannot claim address reg area\n");
452 ret = -EIO;
453 goto out;
454 }
455
456 db->io_addr = ioremap(db->addr_res->start, i);
457
458 if (db->io_addr == NULL) {
459 printk(KERN_ERR "failed to ioremap address reg\n");
460 ret = -EINVAL;
461 goto out;
462 }
463
464 iosize = res_size(db->data_res);
465 db->data_req = request_mem_region(db->data_res->start, iosize,
466 pdev->name);
467
468 if (db->data_req == NULL) {
469 printk(KERN_ERR PFX "cannot claim data reg area\n");
470 ret = -EIO;
471 goto out;
472 }
473
474 db->io_data = ioremap(db->data_res->start, iosize);
475
476 if (db->io_data == NULL) {
477 printk(KERN_ERR "failed to ioremap data reg\n");
478 ret = -EINVAL;
479 goto out;
480 }
481
482 /* fill in parameters for net-dev structure */
483
484 ndev->base_addr = (unsigned long)db->io_addr;
485 ndev->irq = db->irq_res->start;
486
487 /* ensure at least we have a default set of IO routines */
488 dm9000_set_io(db, iosize);
a1365275
SH
489 }
490
491 /* check to see if anything is being over-ridden */
492 if (pdata != NULL) {
493 /* check to see if the driver wants to over-ride the
494 * default IO width */
495
496 if (pdata->flags & DM9000_PLATF_8BITONLY)
497 dm9000_set_io(db, 1);
498
499 if (pdata->flags & DM9000_PLATF_16BITONLY)
500 dm9000_set_io(db, 2);
501
502 if (pdata->flags & DM9000_PLATF_32BITONLY)
503 dm9000_set_io(db, 4);
504
505 /* check to see if there are any IO routine
506 * over-rides */
507
508 if (pdata->inblk != NULL)
509 db->inblk = pdata->inblk;
510
511 if (pdata->outblk != NULL)
512 db->outblk = pdata->outblk;
513
514 if (pdata->dumpblk != NULL)
515 db->dumpblk = pdata->dumpblk;
516 }
517
518 dm9000_reset(db);
519
520 /* try two times, DM9000 sometimes gets the first read wrong */
521 for (i = 0; i < 2; i++) {
522 id_val = ior(db, DM9000_VIDL);
523 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
524 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
525 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
526
527 if (id_val == DM9000_ID)
528 break;
529 printk("%s: read wrong id 0x%08x\n", CARDNAME, id_val);
530 }
531
532 if (id_val != DM9000_ID) {
533 printk("%s: wrong id: 0x%08x\n", CARDNAME, id_val);
534 goto release;
535 }
536
537 /* from this point we assume that we have found a DM9000 */
538
539 /* driver system function */
540 ether_setup(ndev);
541
542 ndev->open = &dm9000_open;
543 ndev->hard_start_xmit = &dm9000_start_xmit;
544 ndev->tx_timeout = &dm9000_timeout;
545 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
546 ndev->stop = &dm9000_stop;
547 ndev->get_stats = &dm9000_get_stats;
548 ndev->set_multicast_list = &dm9000_hash_table;
2fd0e33f
KH
549#ifdef CONFIG_NET_POLL_CONTROLLER
550 ndev->poll_controller = &dm9000_poll_controller;
551#endif
a1365275
SH
552
553#ifdef DM9000_PROGRAM_EEPROM
554 program_eeprom(db);
555#endif
556 db->msg_enable = NETIF_MSG_LINK;
557 db->mii.phy_id_mask = 0x1f;
558 db->mii.reg_num_mask = 0x1f;
559 db->mii.force_media = 0;
560 db->mii.full_duplex = 0;
561 db->mii.dev = ndev;
562 db->mii.mdio_read = dm9000_phy_read;
563 db->mii.mdio_write = dm9000_phy_write;
564
565 /* Read SROM content */
566 for (i = 0; i < 64; i++)
567 ((u16 *) db->srom)[i] = read_srom_word(db, i);
568
569 /* Set Node Address */
570 for (i = 0; i < 6; i++)
571 ndev->dev_addr[i] = db->srom[i];
572
5b55dda6
BD
573 if (!is_valid_ether_addr(ndev->dev_addr)) {
574 /* try reading from mac */
575
576 for (i = 0; i < 6; i++)
577 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
578 }
579
a1365275
SH
580 if (!is_valid_ether_addr(ndev->dev_addr))
581 printk("%s: Invalid ethernet MAC address. Please "
582 "set using ifconfig\n", ndev->name);
583
3ae5eaec 584 platform_set_drvdata(pdev, ndev);
a1365275
SH
585 ret = register_netdev(ndev);
586
587 if (ret == 0) {
588 printk("%s: dm9000 at %p,%p IRQ %d MAC: ",
589 ndev->name, db->io_addr, db->io_data, ndev->irq);
590 for (i = 0; i < 5; i++)
591 printk("%02x:", ndev->dev_addr[i]);
592 printk("%02x\n", ndev->dev_addr[5]);
593 }
594 return 0;
595
596 release:
597 out:
598 printk("%s: not found (%d).\n", CARDNAME, ret);
599
600 dm9000_release_board(pdev, db);
9fd9f9b6 601 free_netdev(ndev);
a1365275
SH
602
603 return ret;
604}
605
606/*
607 * Open the interface.
608 * The interface is opened whenever "ifconfig" actives it.
609 */
610static int
611dm9000_open(struct net_device *dev)
612{
613 board_info_t *db = (board_info_t *) dev->priv;
614
615 PRINTK2("entering dm9000_open\n");
616
1fb9df5d 617 if (request_irq(dev->irq, &dm9000_interrupt, IRQF_SHARED, dev->name, dev))
a1365275
SH
618 return -EAGAIN;
619
620 /* Initialize DM9000 board */
621 dm9000_reset(db);
622 dm9000_init_dm9000(dev);
623
624 /* Init driver variable */
625 db->dbug_cnt = 0;
626
627 /* set and active a timer process */
628 init_timer(&db->timer);
9ef9ac51 629 db->timer.expires = DM9000_TIMER_WUT;
a1365275
SH
630 db->timer.data = (unsigned long) dev;
631 db->timer.function = &dm9000_timer;
632 add_timer(&db->timer);
633
634 mii_check_media(&db->mii, netif_msg_link(db), 1);
635 netif_start_queue(dev);
636
637 return 0;
638}
639
640/*
641 * Initilize dm9000 board
642 */
643static void
644dm9000_init_dm9000(struct net_device *dev)
645{
646 board_info_t *db = (board_info_t *) dev->priv;
647
648 PRINTK1("entering %s\n",__FUNCTION__);
649
650 /* I/O mode */
651 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
652
653 /* GPIO0 on pre-activate PHY */
654 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
655 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
656 iow(db, DM9000_GPR, 0); /* Enable PHY */
657
658 /* Program operating register */
659 iow(db, DM9000_TCR, 0); /* TX Polling clear */
660 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
661 iow(db, DM9000_FCR, 0xff); /* Flow Control */
662 iow(db, DM9000_SMCR, 0); /* Special Mode */
663 /* clear TX status */
664 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
665 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
666
667 /* Set address filter table */
668 dm9000_hash_table(dev);
669
670 /* Activate DM9000 */
671 iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
672 /* Enable TX/RX interrupt mask */
673 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
674
675 /* Init Driver variable */
676 db->tx_pkt_cnt = 0;
677 db->queue_pkt_len = 0;
678 dev->trans_start = 0;
a1365275
SH
679}
680
681/*
682 * Hardware start transmission.
683 * Send a packet to media from the upper layer.
684 */
685static int
686dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
687{
688 board_info_t *db = (board_info_t *) dev->priv;
689
690 PRINTK3("dm9000_start_xmit\n");
691
692 if (db->tx_pkt_cnt > 1)
693 return 1;
694
695 netif_stop_queue(dev);
696
697 /* Disable all interrupts */
698 iow(db, DM9000_IMR, IMR_PAR);
699
700 /* Move data to DM9000 TX RAM */
701 writeb(DM9000_MWCMD, db->io_addr);
702
703 (db->outblk)(db->io_data, skb->data, skb->len);
704 db->stats.tx_bytes += skb->len;
705
706 /* TX control: First packet immediately send, second packet queue */
707 if (db->tx_pkt_cnt == 0) {
708
709 /* First Packet */
710 db->tx_pkt_cnt++;
711
712 /* Set TX length to DM9000 */
713 iow(db, DM9000_TXPLL, skb->len & 0xff);
714 iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff);
715
716 /* Issue TX polling command */
717 iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
718
719 dev->trans_start = jiffies; /* save the time stamp */
720
721 } else {
722 /* Second packet */
723 db->tx_pkt_cnt++;
724 db->queue_pkt_len = skb->len;
725 }
726
727 /* free this SKB */
728 dev_kfree_skb(skb);
729
730 /* Re-enable resource check */
731 if (db->tx_pkt_cnt == 1)
732 netif_wake_queue(dev);
733
734 /* Re-enable interrupt */
735 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
736
737 return 0;
738}
739
740static void
741dm9000_shutdown(struct net_device *dev)
742{
743 board_info_t *db = (board_info_t *) dev->priv;
744
745 /* RESET device */
746 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
747 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
748 iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
749 iow(db, DM9000_RCR, 0x00); /* Disable RX */
750}
751
752/*
753 * Stop the interface.
754 * The interface is stopped when it is brought.
755 */
756static int
757dm9000_stop(struct net_device *ndev)
758{
759 board_info_t *db = (board_info_t *) ndev->priv;
760
761 PRINTK1("entering %s\n",__FUNCTION__);
762
763 /* deleted timer */
764 del_timer(&db->timer);
765
766 netif_stop_queue(ndev);
767 netif_carrier_off(ndev);
768
769 /* free interrupt */
770 free_irq(ndev->irq, ndev);
771
772 dm9000_shutdown(ndev);
773
774 return 0;
775}
776
777/*
778 * DM9000 interrupt handler
779 * receive the packet to upper layer, free the transmitted packet
780 */
781
5d22a312 782static void
a1365275
SH
783dm9000_tx_done(struct net_device *dev, board_info_t * db)
784{
785 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
786
787 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
788 /* One packet sent complete */
789 db->tx_pkt_cnt--;
790 db->stats.tx_packets++;
791
792 /* Queue packet check & send */
793 if (db->tx_pkt_cnt > 0) {
794 iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff);
795 iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff);
796 iow(db, DM9000_TCR, TCR_TXREQ);
797 dev->trans_start = jiffies;
798 }
799 netif_wake_queue(dev);
800 }
801}
802
803static irqreturn_t
7d12e780 804dm9000_interrupt(int irq, void *dev_id)
a1365275
SH
805{
806 struct net_device *dev = dev_id;
807 board_info_t *db;
808 int int_status;
809 u8 reg_save;
810
811 PRINTK3("entering %s\n",__FUNCTION__);
812
813 if (!dev) {
814 PRINTK1("dm9000_interrupt() without DEVICE arg\n");
815 return IRQ_HANDLED;
816 }
817
818 /* A real interrupt coming */
819 db = (board_info_t *) dev->priv;
820 spin_lock(&db->lock);
821
822 /* Save previous register address */
823 reg_save = readb(db->io_addr);
824
825 /* Disable all interrupts */
826 iow(db, DM9000_IMR, IMR_PAR);
827
828 /* Got DM9000 interrupt status */
829 int_status = ior(db, DM9000_ISR); /* Got ISR */
830 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
831
832 /* Received the coming packet */
833 if (int_status & ISR_PRS)
834 dm9000_rx(dev);
835
836 /* Trnasmit Interrupt check */
837 if (int_status & ISR_PTS)
838 dm9000_tx_done(dev, db);
839
840 /* Re-enable interrupt mask */
841 iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
842
843 /* Restore previous register address */
844 writeb(reg_save, db->io_addr);
845
846 spin_unlock(&db->lock);
847
848 return IRQ_HANDLED;
849}
850
851/*
852 * Get statistics from driver.
853 */
854static struct net_device_stats *
855dm9000_get_stats(struct net_device *dev)
856{
857 board_info_t *db = (board_info_t *) dev->priv;
858 return &db->stats;
859}
860
a1365275
SH
861
862/*
863 * A periodic timer routine
864 * Dynamic media sense, allocated Rx buffer...
865 */
866static void
867dm9000_timer(unsigned long data)
868{
869 struct net_device *dev = (struct net_device *) data;
870 board_info_t *db = (board_info_t *) dev->priv;
a1365275
SH
871
872 PRINTK3("dm9000_timer()\n");
873
a1365275
SH
874 mii_check_media(&db->mii, netif_msg_link(db), 0);
875
a1365275
SH
876 /* Set timer again */
877 db->timer.expires = DM9000_TIMER_WUT;
878 add_timer(&db->timer);
879}
880
881struct dm9000_rxhdr {
882 u16 RxStatus;
883 u16 RxLen;
884} __attribute__((__packed__));
885
886/*
887 * Received a packet and pass to upper layer
888 */
889static void
890dm9000_rx(struct net_device *dev)
891{
892 board_info_t *db = (board_info_t *) dev->priv;
893 struct dm9000_rxhdr rxhdr;
894 struct sk_buff *skb;
895 u8 rxbyte, *rdptr;
6478fac6 896 bool GoodPacket;
a1365275
SH
897 int RxLen;
898
899 /* Check packet ready or not */
900 do {
901 ior(db, DM9000_MRCMDX); /* Dummy read */
902
903 /* Get most updated data */
904 rxbyte = readb(db->io_data);
905
906 /* Status check: this byte must be 0 or 1 */
907 if (rxbyte > DM9000_PKT_RDY) {
908 printk("status check failed: %d\n", rxbyte);
909 iow(db, DM9000_RCR, 0x00); /* Stop Device */
910 iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
911 return;
912 }
913
914 if (rxbyte != DM9000_PKT_RDY)
915 return;
916
917 /* A packet ready now & Get status/length */
6478fac6 918 GoodPacket = true;
a1365275
SH
919 writeb(DM9000_MRCMD, db->io_addr);
920
921 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
922
923 RxLen = rxhdr.RxLen;
924
925 /* Packet Status check */
926 if (RxLen < 0x40) {
6478fac6 927 GoodPacket = false;
a1365275
SH
928 PRINTK1("Bad Packet received (runt)\n");
929 }
930
931 if (RxLen > DM9000_PKT_MAX) {
932 PRINTK1("RST: RX Len:%x\n", RxLen);
933 }
934
935 if (rxhdr.RxStatus & 0xbf00) {
6478fac6 936 GoodPacket = false;
a1365275
SH
937 if (rxhdr.RxStatus & 0x100) {
938 PRINTK1("fifo error\n");
939 db->stats.rx_fifo_errors++;
940 }
941 if (rxhdr.RxStatus & 0x200) {
942 PRINTK1("crc error\n");
943 db->stats.rx_crc_errors++;
944 }
945 if (rxhdr.RxStatus & 0x8000) {
946 PRINTK1("length error\n");
947 db->stats.rx_length_errors++;
948 }
949 }
950
951 /* Move data from DM9000 */
952 if (GoodPacket
953 && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
a1365275
SH
954 skb_reserve(skb, 2);
955 rdptr = (u8 *) skb_put(skb, RxLen - 4);
956
957 /* Read received packet from RX SRAM */
958
959 (db->inblk)(db->io_data, rdptr, RxLen);
960 db->stats.rx_bytes += RxLen;
961
962 /* Pass to upper layer */
963 skb->protocol = eth_type_trans(skb, dev);
964 netif_rx(skb);
965 db->stats.rx_packets++;
966
967 } else {
968 /* need to dump the packet's data */
969
970 (db->dumpblk)(db->io_data, RxLen);
971 }
972 } while (rxbyte == DM9000_PKT_RDY);
973}
974
975/*
976 * Read a word data from SROM
977 */
978static u16
979read_srom_word(board_info_t * db, int offset)
980{
981 iow(db, DM9000_EPAR, offset);
982 iow(db, DM9000_EPCR, EPCR_ERPRR);
983 mdelay(8); /* according to the datasheet 200us should be enough,
984 but it doesn't work */
985 iow(db, DM9000_EPCR, 0x0);
986 return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8));
987}
988
989#ifdef DM9000_PROGRAM_EEPROM
990/*
991 * Write a word data to SROM
992 */
993static void
994write_srom_word(board_info_t * db, int offset, u16 val)
995{
996 iow(db, DM9000_EPAR, offset);
997 iow(db, DM9000_EPDRH, ((val >> 8) & 0xff));
998 iow(db, DM9000_EPDRL, (val & 0xff));
999 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
1000 mdelay(8); /* same shit */
1001 iow(db, DM9000_EPCR, 0);
1002}
1003
1004/*
1005 * Only for development:
1006 * Here we write static data to the eeprom in case
1007 * we don't have valid content on a new board
1008 */
1009static void
1010program_eeprom(board_info_t * db)
1011{
1012 u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */
1013 0x0000, /* Autoload: accept nothing */
1014 0x0a46, 0x9000, /* Vendor / Product ID */
1015 0x0000, /* pin control */
1016 0x0000,
1017 }; /* Wake-up mode control */
1018 int i;
1019 for (i = 0; i < 8; i++)
1020 write_srom_word(db, i, eeprom[i]);
1021}
1022#endif
1023
1024
1025/*
1026 * Calculate the CRC valude of the Rx packet
1027 * flag = 1 : return the reverse CRC (for the received packet CRC)
1028 * 0 : return the normal CRC (for Hash Table index)
1029 */
1030
1031static unsigned long
1032cal_CRC(unsigned char *Data, unsigned int Len, u8 flag)
1033{
1034
1035 u32 crc = ether_crc_le(Len, Data);
1036
1037 if (flag)
1038 return ~crc;
1039
1040 return crc;
1041}
1042
1043/*
1044 * Set DM9000 multicast address
1045 */
1046static void
1047dm9000_hash_table(struct net_device *dev)
1048{
1049 board_info_t *db = (board_info_t *) dev->priv;
1050 struct dev_mc_list *mcptr = dev->mc_list;
1051 int mc_cnt = dev->mc_count;
1052 u32 hash_val;
1053 u16 i, oft, hash_table[4];
1054 unsigned long flags;
1055
1056 PRINTK2("dm9000_hash_table()\n");
1057
1058 spin_lock_irqsave(&db->lock,flags);
1059
1060 for (i = 0, oft = 0x10; i < 6; i++, oft++)
1061 iow(db, oft, dev->dev_addr[i]);
1062
1063 /* Clear Hash Table */
1064 for (i = 0; i < 4; i++)
1065 hash_table[i] = 0x0;
1066
1067 /* broadcast address */
1068 hash_table[3] = 0x8000;
1069
1070 /* the multicast address in Hash Table : 64 bits */
1071 for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
1072 hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f;
1073 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
1074 }
1075
1076 /* Write the hash table to MAC MD table */
1077 for (i = 0, oft = 0x16; i < 4; i++) {
1078 iow(db, oft++, hash_table[i] & 0xff);
1079 iow(db, oft++, (hash_table[i] >> 8) & 0xff);
1080 }
1081
1082 spin_unlock_irqrestore(&db->lock,flags);
1083}
1084
1085
1086/*
1087 * Read a word from phyxcer
1088 */
1089static int
1090dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
1091{
1092 board_info_t *db = (board_info_t *) dev->priv;
1093 unsigned long flags;
9ef9ac51 1094 unsigned int reg_save;
a1365275
SH
1095 int ret;
1096
1097 spin_lock_irqsave(&db->lock,flags);
9ef9ac51
BD
1098
1099 /* Save previous register address */
1100 reg_save = readb(db->io_addr);
1101
a1365275
SH
1102 /* Fill the phyxcer register into REG_0C */
1103 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1104
1105 iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
1106 udelay(100); /* Wait read complete */
1107 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
1108
1109 /* The read data keeps on REG_0D & REG_0E */
1110 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
1111
9ef9ac51
BD
1112 /* restore the previous address */
1113 writeb(reg_save, db->io_addr);
1114
a1365275
SH
1115 spin_unlock_irqrestore(&db->lock,flags);
1116
1117 return ret;
1118}
1119
1120/*
1121 * Write a word to phyxcer
1122 */
1123static void
1124dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
1125{
1126 board_info_t *db = (board_info_t *) dev->priv;
1127 unsigned long flags;
9ef9ac51 1128 unsigned long reg_save;
a1365275
SH
1129
1130 spin_lock_irqsave(&db->lock,flags);
1131
9ef9ac51
BD
1132 /* Save previous register address */
1133 reg_save = readb(db->io_addr);
1134
a1365275
SH
1135 /* Fill the phyxcer register into REG_0C */
1136 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1137
1138 /* Fill the written data into REG_0D & REG_0E */
1139 iow(db, DM9000_EPDRL, (value & 0xff));
1140 iow(db, DM9000_EPDRH, ((value >> 8) & 0xff));
1141
1142 iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
1143 udelay(500); /* Wait write complete */
1144 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
1145
9ef9ac51
BD
1146 /* restore the previous address */
1147 writeb(reg_save, db->io_addr);
1148
a1365275
SH
1149 spin_unlock_irqrestore(&db->lock,flags);
1150}
1151
1152static int
3ae5eaec 1153dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
a1365275 1154{
3ae5eaec 1155 struct net_device *ndev = platform_get_drvdata(dev);
a1365275 1156
9480e307 1157 if (ndev) {
a1365275
SH
1158 if (netif_running(ndev)) {
1159 netif_device_detach(ndev);
1160 dm9000_shutdown(ndev);
1161 }
1162 }
1163 return 0;
1164}
1165
1166static int
3ae5eaec 1167dm9000_drv_resume(struct platform_device *dev)
a1365275 1168{
3ae5eaec 1169 struct net_device *ndev = platform_get_drvdata(dev);
a1365275
SH
1170 board_info_t *db = (board_info_t *) ndev->priv;
1171
9480e307 1172 if (ndev) {
a1365275
SH
1173
1174 if (netif_running(ndev)) {
1175 dm9000_reset(db);
1176 dm9000_init_dm9000(ndev);
1177
1178 netif_device_attach(ndev);
1179 }
1180 }
1181 return 0;
1182}
1183
1184static int
3ae5eaec 1185dm9000_drv_remove(struct platform_device *pdev)
a1365275 1186{
3ae5eaec 1187 struct net_device *ndev = platform_get_drvdata(pdev);
a1365275 1188
3ae5eaec 1189 platform_set_drvdata(pdev, NULL);
a1365275
SH
1190
1191 unregister_netdev(ndev);
1192 dm9000_release_board(pdev, (board_info_t *) ndev->priv);
9fd9f9b6 1193 free_netdev(ndev); /* free device structure */
a1365275
SH
1194
1195 PRINTK1("clean_module() exit\n");
1196
1197 return 0;
1198}
1199
3ae5eaec 1200static struct platform_driver dm9000_driver = {
5d22a312
BD
1201 .driver = {
1202 .name = "dm9000",
1203 .owner = THIS_MODULE,
1204 },
a1365275
SH
1205 .probe = dm9000_probe,
1206 .remove = dm9000_drv_remove,
1207 .suspend = dm9000_drv_suspend,
1208 .resume = dm9000_drv_resume,
1209};
1210
1211static int __init
1212dm9000_init(void)
1213{
2ae2d77c
BD
1214 printk(KERN_INFO "%s Ethernet Driver\n", CARDNAME);
1215
3ae5eaec 1216 return platform_driver_register(&dm9000_driver); /* search board and register */
a1365275
SH
1217}
1218
1219static void __exit
1220dm9000_cleanup(void)
1221{
3ae5eaec 1222 platform_driver_unregister(&dm9000_driver);
a1365275
SH
1223}
1224
1225module_init(dm9000_init);
1226module_exit(dm9000_cleanup);
1227
1228MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1229MODULE_DESCRIPTION("Davicom DM9000 network driver");
1230MODULE_LICENSE("GPL");