Commit | Line | Data |
---|---|---|
6aa20a22 | 1 | /* |
1da177e4 LT |
2 | * Lance ethernet driver for the MIPS processor based |
3 | * DECstation family | |
4 | * | |
5 | * | |
6 | * adopted from sunlance.c by Richard van den Berg | |
7 | * | |
36156cdf | 8 | * Copyright (C) 2002, 2003, 2005 Maciej W. Rozycki |
1da177e4 LT |
9 | * |
10 | * additional sources: | |
11 | * - PMAD-AA TURBOchannel Ethernet Module Functional Specification, | |
12 | * Revision 1.2 | |
13 | * | |
14 | * History: | |
15 | * | |
16 | * v0.001: The kernel accepts the code and it shows the hardware address. | |
17 | * | |
18 | * v0.002: Removed most sparc stuff, left only some module and dma stuff. | |
19 | * | |
20 | * v0.003: Enhanced base address calculation from proposals by | |
21 | * Harald Koerfgen and Thomas Riemer. | |
22 | * | |
23 | * v0.004: lance-regs is pointing at the right addresses, added prom | |
24 | * check. First start of address mapping and DMA. | |
25 | * | |
26 | * v0.005: started to play around with LANCE-DMA. This driver will not | |
27 | * work for non IOASIC lances. HK | |
28 | * | |
29 | * v0.006: added pointer arrays to lance_private and setup routine for | |
30 | * them in dec_lance_init. HK | |
31 | * | |
32 | * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to | |
33 | * access the init block. This looks like one (short) word at a | |
34 | * time, but the smallest amount the IOASIC can transfer is a | |
35 | * (long) word. So we have a 2-2 padding here. Changed | |
36 | * lance_init_block accordingly. The 16-16 padding for the buffers | |
37 | * seems to be correct. HK | |
38 | * | |
39 | * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer | |
40 | * | |
41 | * v0.009: Module support fixes, multiple interfaces support, various | |
42 | * bits. macro | |
3b6e8fe7 MR |
43 | * |
44 | * v0.010: Fixes for the PMAD mapping of the LANCE buffer and for the | |
45 | * PMAX requirement to only use halfword accesses to the | |
46 | * buffer. macro | |
1da177e4 LT |
47 | */ |
48 | ||
1da177e4 LT |
49 | #include <linux/crc32.h> |
50 | #include <linux/delay.h> | |
51 | #include <linux/errno.h> | |
52 | #include <linux/if_ether.h> | |
53 | #include <linux/init.h> | |
54 | #include <linux/kernel.h> | |
55 | #include <linux/module.h> | |
56 | #include <linux/netdevice.h> | |
57 | #include <linux/etherdevice.h> | |
58 | #include <linux/spinlock.h> | |
59 | #include <linux/stddef.h> | |
60 | #include <linux/string.h> | |
3b6e8fe7 | 61 | #include <linux/types.h> |
1da177e4 LT |
62 | |
63 | #include <asm/addrspace.h> | |
36156cdf RB |
64 | #include <asm/system.h> |
65 | ||
1da177e4 LT |
66 | #include <asm/dec/interrupts.h> |
67 | #include <asm/dec/ioasic.h> | |
68 | #include <asm/dec/ioasic_addrs.h> | |
69 | #include <asm/dec/kn01.h> | |
70 | #include <asm/dec/machtype.h> | |
36156cdf | 71 | #include <asm/dec/system.h> |
1da177e4 | 72 | #include <asm/dec/tc.h> |
1da177e4 LT |
73 | |
74 | static char version[] __devinitdata = | |
3b6e8fe7 | 75 | "declance.c: v0.010 by Linux MIPS DECstation task force\n"; |
1da177e4 LT |
76 | |
77 | MODULE_AUTHOR("Linux MIPS DECstation task force"); | |
78 | MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver"); | |
79 | MODULE_LICENSE("GPL"); | |
80 | ||
81 | /* | |
82 | * card types | |
83 | */ | |
84 | #define ASIC_LANCE 1 | |
85 | #define PMAD_LANCE 2 | |
86 | #define PMAX_LANCE 3 | |
87 | ||
1da177e4 LT |
88 | |
89 | #define LE_CSR0 0 | |
90 | #define LE_CSR1 1 | |
91 | #define LE_CSR2 2 | |
92 | #define LE_CSR3 3 | |
93 | ||
94 | #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */ | |
95 | ||
96 | #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */ | |
97 | #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */ | |
98 | #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */ | |
99 | #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */ | |
100 | #define LE_C0_MERR 0x0800 /* ME: Memory error */ | |
101 | #define LE_C0_RINT 0x0400 /* Received interrupt */ | |
102 | #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */ | |
103 | #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */ | |
104 | #define LE_C0_INTR 0x0080 /* Interrupt or error */ | |
105 | #define LE_C0_INEA 0x0040 /* Interrupt enable */ | |
106 | #define LE_C0_RXON 0x0020 /* Receiver on */ | |
107 | #define LE_C0_TXON 0x0010 /* Transmitter on */ | |
108 | #define LE_C0_TDMD 0x0008 /* Transmitter demand */ | |
109 | #define LE_C0_STOP 0x0004 /* Stop the card */ | |
110 | #define LE_C0_STRT 0x0002 /* Start the card */ | |
111 | #define LE_C0_INIT 0x0001 /* Init the card */ | |
112 | ||
113 | #define LE_C3_BSWP 0x4 /* SWAP */ | |
114 | #define LE_C3_ACON 0x2 /* ALE Control */ | |
115 | #define LE_C3_BCON 0x1 /* Byte control */ | |
116 | ||
117 | /* Receive message descriptor 1 */ | |
3b6e8fe7 MR |
118 | #define LE_R1_OWN 0x8000 /* Who owns the entry */ |
119 | #define LE_R1_ERR 0x4000 /* Error: if FRA, OFL, CRC or BUF is set */ | |
120 | #define LE_R1_FRA 0x2000 /* FRA: Frame error */ | |
121 | #define LE_R1_OFL 0x1000 /* OFL: Frame overflow */ | |
122 | #define LE_R1_CRC 0x0800 /* CRC error */ | |
123 | #define LE_R1_BUF 0x0400 /* BUF: Buffer error */ | |
124 | #define LE_R1_SOP 0x0200 /* Start of packet */ | |
125 | #define LE_R1_EOP 0x0100 /* End of packet */ | |
126 | #define LE_R1_POK 0x0300 /* Packet is complete: SOP + EOP */ | |
127 | ||
128 | /* Transmit message descriptor 1 */ | |
129 | #define LE_T1_OWN 0x8000 /* Lance owns the packet */ | |
130 | #define LE_T1_ERR 0x4000 /* Error summary */ | |
131 | #define LE_T1_EMORE 0x1000 /* Error: more than one retry needed */ | |
132 | #define LE_T1_EONE 0x0800 /* Error: one retry needed */ | |
133 | #define LE_T1_EDEF 0x0400 /* Error: deferred */ | |
134 | #define LE_T1_SOP 0x0200 /* Start of packet */ | |
135 | #define LE_T1_EOP 0x0100 /* End of packet */ | |
136 | #define LE_T1_POK 0x0300 /* Packet is complete: SOP + EOP */ | |
1da177e4 LT |
137 | |
138 | #define LE_T3_BUF 0x8000 /* Buffer error */ | |
139 | #define LE_T3_UFL 0x4000 /* Error underflow */ | |
140 | #define LE_T3_LCOL 0x1000 /* Error late collision */ | |
141 | #define LE_T3_CLOS 0x0800 /* Error carrier loss */ | |
142 | #define LE_T3_RTY 0x0400 /* Error retry */ | |
143 | #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */ | |
144 | ||
145 | /* Define: 2^4 Tx buffers and 2^4 Rx buffers */ | |
146 | ||
147 | #ifndef LANCE_LOG_TX_BUFFERS | |
148 | #define LANCE_LOG_TX_BUFFERS 4 | |
149 | #define LANCE_LOG_RX_BUFFERS 4 | |
150 | #endif | |
151 | ||
152 | #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS)) | |
153 | #define TX_RING_MOD_MASK (TX_RING_SIZE - 1) | |
154 | ||
155 | #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS)) | |
156 | #define RX_RING_MOD_MASK (RX_RING_SIZE - 1) | |
157 | ||
158 | #define PKT_BUF_SZ 1536 | |
159 | #define RX_BUFF_SIZE PKT_BUF_SZ | |
160 | #define TX_BUFF_SIZE PKT_BUF_SZ | |
161 | ||
162 | #undef TEST_HITS | |
163 | #define ZERO 0 | |
164 | ||
3b6e8fe7 MR |
165 | /* |
166 | * The DS2100/3100 have a linear 64 kB buffer which supports halfword | |
167 | * accesses only. Each halfword of the buffer is word-aligned in the | |
168 | * CPU address space. | |
169 | * | |
170 | * The PMAD-AA has a 128 kB buffer on-board. | |
1da177e4 | 171 | * |
3b6e8fe7 MR |
172 | * The IOASIC LANCE devices use a shared memory region. This region |
173 | * as seen from the CPU is (max) 128 kB long and has to be on an 128 kB | |
174 | * boundary. The LANCE sees this as a 64 kB long continuous memory | |
175 | * region. | |
1da177e4 | 176 | * |
3b6e8fe7 MR |
177 | * The LANCE's DMA address is used as an index in this buffer and DMA |
178 | * takes place in bursts of eight 16-bit words which are packed into | |
179 | * four 32-bit words by the IOASIC. This leads to a strange padding: | |
180 | * 16 bytes of valid data followed by a 16 byte gap :-(. | |
1da177e4 LT |
181 | */ |
182 | ||
183 | struct lance_rx_desc { | |
184 | unsigned short rmd0; /* low address of packet */ | |
3b6e8fe7 MR |
185 | unsigned short rmd1; /* high address of packet |
186 | and descriptor bits */ | |
1da177e4 LT |
187 | short length; /* 2s complement (negative!) |
188 | of buffer length */ | |
1da177e4 | 189 | unsigned short mblength; /* actual number of bytes received */ |
1da177e4 LT |
190 | }; |
191 | ||
192 | struct lance_tx_desc { | |
193 | unsigned short tmd0; /* low address of packet */ | |
3b6e8fe7 MR |
194 | unsigned short tmd1; /* high address of packet |
195 | and descriptor bits */ | |
1da177e4 LT |
196 | short length; /* 2s complement (negative!) |
197 | of buffer length */ | |
1da177e4 | 198 | unsigned short misc; |
1da177e4 LT |
199 | }; |
200 | ||
201 | ||
202 | /* First part of the LANCE initialization block, described in databook. */ | |
203 | struct lance_init_block { | |
204 | unsigned short mode; /* pre-set mode (reg. 15) */ | |
1da177e4 | 205 | |
3b6e8fe7 MR |
206 | unsigned short phys_addr[3]; /* physical ethernet address */ |
207 | unsigned short filter[4]; /* multicast filter */ | |
1da177e4 LT |
208 | |
209 | /* Receive and transmit ring base, along with extra bits. */ | |
210 | unsigned short rx_ptr; /* receive descriptor addr */ | |
1da177e4 | 211 | unsigned short rx_len; /* receive len and high addr */ |
1da177e4 | 212 | unsigned short tx_ptr; /* transmit descriptor addr */ |
1da177e4 | 213 | unsigned short tx_len; /* transmit len and high addr */ |
3b6e8fe7 MR |
214 | |
215 | short gap[4]; | |
1da177e4 LT |
216 | |
217 | /* The buffer descriptors */ | |
218 | struct lance_rx_desc brx_ring[RX_RING_SIZE]; | |
219 | struct lance_tx_desc btx_ring[TX_RING_SIZE]; | |
220 | }; | |
221 | ||
222 | #define BUF_OFFSET_CPU sizeof(struct lance_init_block) | |
3b6e8fe7 | 223 | #define BUF_OFFSET_LNC sizeof(struct lance_init_block) |
1da177e4 | 224 | |
3b6e8fe7 MR |
225 | #define shift_off(off, type) \ |
226 | (type == ASIC_LANCE || type == PMAX_LANCE ? off << 1 : off) | |
1da177e4 | 227 | |
3b6e8fe7 MR |
228 | #define lib_off(rt, type) \ |
229 | shift_off(offsetof(struct lance_init_block, rt), type) | |
230 | ||
231 | #define lib_ptr(ib, rt, type) \ | |
232 | ((volatile u16 *)((u8 *)(ib) + lib_off(rt, type))) | |
233 | ||
234 | #define rds_off(rt, type) \ | |
235 | shift_off(offsetof(struct lance_rx_desc, rt), type) | |
236 | ||
237 | #define rds_ptr(rd, rt, type) \ | |
238 | ((volatile u16 *)((u8 *)(rd) + rds_off(rt, type))) | |
239 | ||
240 | #define tds_off(rt, type) \ | |
241 | shift_off(offsetof(struct lance_tx_desc, rt), type) | |
242 | ||
243 | #define tds_ptr(td, rt, type) \ | |
244 | ((volatile u16 *)((u8 *)(td) + tds_off(rt, type))) | |
1da177e4 LT |
245 | |
246 | struct lance_private { | |
247 | struct net_device *next; | |
248 | int type; | |
249 | int slot; | |
250 | int dma_irq; | |
251 | volatile struct lance_regs *ll; | |
1da177e4 LT |
252 | |
253 | spinlock_t lock; | |
254 | ||
255 | int rx_new, tx_new; | |
256 | int rx_old, tx_old; | |
257 | ||
258 | struct net_device_stats stats; | |
259 | ||
260 | unsigned short busmaster_regval; | |
261 | ||
262 | struct timer_list multicast_timer; | |
263 | ||
264 | /* Pointers to the ring buffers as seen from the CPU */ | |
265 | char *rx_buf_ptr_cpu[RX_RING_SIZE]; | |
266 | char *tx_buf_ptr_cpu[TX_RING_SIZE]; | |
267 | ||
268 | /* Pointers to the ring buffers as seen from the LANCE */ | |
3b6e8fe7 MR |
269 | uint rx_buf_ptr_lnc[RX_RING_SIZE]; |
270 | uint tx_buf_ptr_lnc[TX_RING_SIZE]; | |
1da177e4 LT |
271 | }; |
272 | ||
273 | #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\ | |
274 | lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\ | |
275 | lp->tx_old - lp->tx_new-1) | |
276 | ||
277 | /* The lance control ports are at an absolute address, machine and tc-slot | |
278 | * dependent. | |
279 | * DECstations do only 32-bit access and the LANCE uses 16 bit addresses, | |
280 | * so we have to give the structure an extra member making rap pointing | |
281 | * at the right address | |
282 | */ | |
283 | struct lance_regs { | |
284 | volatile unsigned short rdp; /* register data port */ | |
285 | unsigned short pad; | |
286 | volatile unsigned short rap; /* register address port */ | |
287 | }; | |
288 | ||
289 | int dec_lance_debug = 2; | |
290 | ||
291 | static struct net_device *root_lance_dev; | |
292 | ||
293 | static inline void writereg(volatile unsigned short *regptr, short value) | |
294 | { | |
295 | *regptr = value; | |
296 | iob(); | |
297 | } | |
298 | ||
299 | /* Load the CSR registers */ | |
300 | static void load_csrs(struct lance_private *lp) | |
301 | { | |
302 | volatile struct lance_regs *ll = lp->ll; | |
3b6e8fe7 | 303 | uint leptr; |
1da177e4 LT |
304 | |
305 | /* The address space as seen from the LANCE | |
306 | * begins at address 0. HK | |
307 | */ | |
308 | leptr = 0; | |
309 | ||
310 | writereg(&ll->rap, LE_CSR1); | |
311 | writereg(&ll->rdp, (leptr & 0xFFFF)); | |
312 | writereg(&ll->rap, LE_CSR2); | |
313 | writereg(&ll->rdp, leptr >> 16); | |
314 | writereg(&ll->rap, LE_CSR3); | |
315 | writereg(&ll->rdp, lp->busmaster_regval); | |
316 | ||
317 | /* Point back to csr0 */ | |
318 | writereg(&ll->rap, LE_CSR0); | |
319 | } | |
320 | ||
321 | /* | |
322 | * Our specialized copy routines | |
323 | * | |
324 | */ | |
3b6e8fe7 | 325 | static void cp_to_buf(const int type, void *to, const void *from, int len) |
1da177e4 LT |
326 | { |
327 | unsigned short *tp, *fp, clen; | |
328 | unsigned char *rtp, *rfp; | |
329 | ||
3b6e8fe7 MR |
330 | if (type == PMAD_LANCE) { |
331 | memcpy(to, from, len); | |
332 | } else if (type == PMAX_LANCE) { | |
1da177e4 LT |
333 | clen = len >> 1; |
334 | tp = (unsigned short *) to; | |
335 | fp = (unsigned short *) from; | |
336 | ||
337 | while (clen--) { | |
338 | *tp++ = *fp++; | |
339 | tp++; | |
340 | } | |
341 | ||
342 | clen = len & 1; | |
343 | rtp = (unsigned char *) tp; | |
344 | rfp = (unsigned char *) fp; | |
345 | while (clen--) { | |
346 | *rtp++ = *rfp++; | |
347 | } | |
348 | } else { | |
349 | /* | |
350 | * copy 16 Byte chunks | |
351 | */ | |
352 | clen = len >> 4; | |
353 | tp = (unsigned short *) to; | |
354 | fp = (unsigned short *) from; | |
355 | while (clen--) { | |
356 | *tp++ = *fp++; | |
357 | *tp++ = *fp++; | |
358 | *tp++ = *fp++; | |
359 | *tp++ = *fp++; | |
360 | *tp++ = *fp++; | |
361 | *tp++ = *fp++; | |
362 | *tp++ = *fp++; | |
363 | *tp++ = *fp++; | |
364 | tp += 8; | |
365 | } | |
366 | ||
367 | /* | |
368 | * do the rest, if any. | |
369 | */ | |
370 | clen = len & 15; | |
371 | rtp = (unsigned char *) tp; | |
372 | rfp = (unsigned char *) fp; | |
373 | while (clen--) { | |
374 | *rtp++ = *rfp++; | |
375 | } | |
376 | } | |
377 | ||
378 | iob(); | |
379 | } | |
380 | ||
3b6e8fe7 | 381 | static void cp_from_buf(const int type, void *to, const void *from, int len) |
1da177e4 LT |
382 | { |
383 | unsigned short *tp, *fp, clen; | |
384 | unsigned char *rtp, *rfp; | |
385 | ||
3b6e8fe7 MR |
386 | if (type == PMAD_LANCE) { |
387 | memcpy(to, from, len); | |
388 | } else if (type == PMAX_LANCE) { | |
1da177e4 LT |
389 | clen = len >> 1; |
390 | tp = (unsigned short *) to; | |
391 | fp = (unsigned short *) from; | |
392 | while (clen--) { | |
393 | *tp++ = *fp++; | |
394 | fp++; | |
395 | } | |
396 | ||
397 | clen = len & 1; | |
398 | ||
399 | rtp = (unsigned char *) tp; | |
400 | rfp = (unsigned char *) fp; | |
401 | ||
402 | while (clen--) { | |
403 | *rtp++ = *rfp++; | |
404 | } | |
405 | } else { | |
406 | ||
407 | /* | |
408 | * copy 16 Byte chunks | |
409 | */ | |
410 | clen = len >> 4; | |
411 | tp = (unsigned short *) to; | |
412 | fp = (unsigned short *) from; | |
413 | while (clen--) { | |
414 | *tp++ = *fp++; | |
415 | *tp++ = *fp++; | |
416 | *tp++ = *fp++; | |
417 | *tp++ = *fp++; | |
418 | *tp++ = *fp++; | |
419 | *tp++ = *fp++; | |
420 | *tp++ = *fp++; | |
421 | *tp++ = *fp++; | |
422 | fp += 8; | |
423 | } | |
424 | ||
425 | /* | |
426 | * do the rest, if any. | |
427 | */ | |
428 | clen = len & 15; | |
429 | rtp = (unsigned char *) tp; | |
430 | rfp = (unsigned char *) fp; | |
431 | while (clen--) { | |
432 | *rtp++ = *rfp++; | |
433 | } | |
434 | ||
435 | ||
436 | } | |
437 | ||
438 | } | |
439 | ||
440 | /* Setup the Lance Rx and Tx rings */ | |
441 | static void lance_init_ring(struct net_device *dev) | |
442 | { | |
443 | struct lance_private *lp = netdev_priv(dev); | |
3b6e8fe7 MR |
444 | volatile u16 *ib = (volatile u16 *)dev->mem_start; |
445 | uint leptr; | |
1da177e4 LT |
446 | int i; |
447 | ||
1da177e4 LT |
448 | /* Lock out other processes while setting up hardware */ |
449 | netif_stop_queue(dev); | |
450 | lp->rx_new = lp->tx_new = 0; | |
451 | lp->rx_old = lp->tx_old = 0; | |
452 | ||
453 | /* Copy the ethernet address to the lance init block. | |
454 | * XXX bit 0 of the physical address registers has to be zero | |
455 | */ | |
3b6e8fe7 MR |
456 | *lib_ptr(ib, phys_addr[0], lp->type) = (dev->dev_addr[1] << 8) | |
457 | dev->dev_addr[0]; | |
458 | *lib_ptr(ib, phys_addr[1], lp->type) = (dev->dev_addr[3] << 8) | | |
459 | dev->dev_addr[2]; | |
460 | *lib_ptr(ib, phys_addr[2], lp->type) = (dev->dev_addr[5] << 8) | | |
461 | dev->dev_addr[4]; | |
1da177e4 LT |
462 | /* Setup the initialization block */ |
463 | ||
464 | /* Setup rx descriptor pointer */ | |
3b6e8fe7 MR |
465 | leptr = offsetof(struct lance_init_block, brx_ring); |
466 | *lib_ptr(ib, rx_len, lp->type) = (LANCE_LOG_RX_BUFFERS << 13) | | |
467 | (leptr >> 16); | |
468 | *lib_ptr(ib, rx_ptr, lp->type) = leptr; | |
1da177e4 | 469 | if (ZERO) |
3b6e8fe7 MR |
470 | printk("RX ptr: %8.8x(%8.8x)\n", |
471 | leptr, lib_off(brx_ring, lp->type)); | |
1da177e4 LT |
472 | |
473 | /* Setup tx descriptor pointer */ | |
3b6e8fe7 MR |
474 | leptr = offsetof(struct lance_init_block, btx_ring); |
475 | *lib_ptr(ib, tx_len, lp->type) = (LANCE_LOG_TX_BUFFERS << 13) | | |
476 | (leptr >> 16); | |
477 | *lib_ptr(ib, tx_ptr, lp->type) = leptr; | |
1da177e4 | 478 | if (ZERO) |
3b6e8fe7 MR |
479 | printk("TX ptr: %8.8x(%8.8x)\n", |
480 | leptr, lib_off(btx_ring, lp->type)); | |
1da177e4 LT |
481 | |
482 | if (ZERO) | |
483 | printk("TX rings:\n"); | |
484 | ||
485 | /* Setup the Tx ring entries */ | |
486 | for (i = 0; i < TX_RING_SIZE; i++) { | |
3b6e8fe7 MR |
487 | leptr = lp->tx_buf_ptr_lnc[i]; |
488 | *lib_ptr(ib, btx_ring[i].tmd0, lp->type) = leptr; | |
489 | *lib_ptr(ib, btx_ring[i].tmd1, lp->type) = (leptr >> 16) & | |
490 | 0xff; | |
491 | *lib_ptr(ib, btx_ring[i].length, lp->type) = 0xf000; | |
492 | /* The ones required by tmd2 */ | |
493 | *lib_ptr(ib, btx_ring[i].misc, lp->type) = 0; | |
1da177e4 | 494 | if (i < 3 && ZERO) |
3b6e8fe7 MR |
495 | printk("%d: 0x%8.8x(0x%8.8x)\n", |
496 | i, leptr, (uint)lp->tx_buf_ptr_cpu[i]); | |
1da177e4 LT |
497 | } |
498 | ||
499 | /* Setup the Rx ring entries */ | |
500 | if (ZERO) | |
501 | printk("RX rings:\n"); | |
502 | for (i = 0; i < RX_RING_SIZE; i++) { | |
3b6e8fe7 MR |
503 | leptr = lp->rx_buf_ptr_lnc[i]; |
504 | *lib_ptr(ib, brx_ring[i].rmd0, lp->type) = leptr; | |
505 | *lib_ptr(ib, brx_ring[i].rmd1, lp->type) = ((leptr >> 16) & | |
506 | 0xff) | | |
507 | LE_R1_OWN; | |
508 | *lib_ptr(ib, brx_ring[i].length, lp->type) = -RX_BUFF_SIZE | | |
509 | 0xf000; | |
510 | *lib_ptr(ib, brx_ring[i].mblength, lp->type) = 0; | |
1da177e4 | 511 | if (i < 3 && ZERO) |
3b6e8fe7 MR |
512 | printk("%d: 0x%8.8x(0x%8.8x)\n", |
513 | i, leptr, (uint)lp->rx_buf_ptr_cpu[i]); | |
1da177e4 LT |
514 | } |
515 | iob(); | |
516 | } | |
517 | ||
518 | static int init_restart_lance(struct lance_private *lp) | |
519 | { | |
520 | volatile struct lance_regs *ll = lp->ll; | |
521 | int i; | |
522 | ||
523 | writereg(&ll->rap, LE_CSR0); | |
524 | writereg(&ll->rdp, LE_C0_INIT); | |
525 | ||
526 | /* Wait for the lance to complete initialization */ | |
527 | for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) { | |
528 | udelay(10); | |
529 | } | |
530 | if ((i == 100) || (ll->rdp & LE_C0_ERR)) { | |
3b6e8fe7 MR |
531 | printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", |
532 | i, ll->rdp); | |
1da177e4 LT |
533 | return -1; |
534 | } | |
535 | if ((ll->rdp & LE_C0_ERR)) { | |
3b6e8fe7 MR |
536 | printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", |
537 | i, ll->rdp); | |
1da177e4 LT |
538 | return -1; |
539 | } | |
540 | writereg(&ll->rdp, LE_C0_IDON); | |
541 | writereg(&ll->rdp, LE_C0_STRT); | |
542 | writereg(&ll->rdp, LE_C0_INEA); | |
543 | ||
544 | return 0; | |
545 | } | |
546 | ||
547 | static int lance_rx(struct net_device *dev) | |
548 | { | |
549 | struct lance_private *lp = netdev_priv(dev); | |
3b6e8fe7 MR |
550 | volatile u16 *ib = (volatile u16 *)dev->mem_start; |
551 | volatile u16 *rd; | |
552 | unsigned short bits; | |
553 | int entry, len; | |
554 | struct sk_buff *skb; | |
1da177e4 LT |
555 | |
556 | #ifdef TEST_HITS | |
557 | { | |
558 | int i; | |
559 | ||
560 | printk("["); | |
561 | for (i = 0; i < RX_RING_SIZE; i++) { | |
562 | if (i == lp->rx_new) | |
3b6e8fe7 MR |
563 | printk("%s", *lib_ptr(ib, brx_ring[i].rmd1, |
564 | lp->type) & | |
1da177e4 LT |
565 | LE_R1_OWN ? "_" : "X"); |
566 | else | |
3b6e8fe7 MR |
567 | printk("%s", *lib_ptr(ib, brx_ring[i].rmd1, |
568 | lp->type) & | |
1da177e4 LT |
569 | LE_R1_OWN ? "." : "1"); |
570 | } | |
571 | printk("]"); | |
572 | } | |
573 | #endif | |
574 | ||
3b6e8fe7 MR |
575 | for (rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type); |
576 | !((bits = *rds_ptr(rd, rmd1, lp->type)) & LE_R1_OWN); | |
577 | rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type)) { | |
578 | entry = lp->rx_new; | |
1da177e4 LT |
579 | |
580 | /* We got an incomplete frame? */ | |
581 | if ((bits & LE_R1_POK) != LE_R1_POK) { | |
582 | lp->stats.rx_over_errors++; | |
583 | lp->stats.rx_errors++; | |
584 | } else if (bits & LE_R1_ERR) { | |
585 | /* Count only the end frame as a rx error, | |
586 | * not the beginning | |
587 | */ | |
588 | if (bits & LE_R1_BUF) | |
589 | lp->stats.rx_fifo_errors++; | |
590 | if (bits & LE_R1_CRC) | |
591 | lp->stats.rx_crc_errors++; | |
592 | if (bits & LE_R1_OFL) | |
593 | lp->stats.rx_over_errors++; | |
594 | if (bits & LE_R1_FRA) | |
595 | lp->stats.rx_frame_errors++; | |
596 | if (bits & LE_R1_EOP) | |
597 | lp->stats.rx_errors++; | |
598 | } else { | |
3b6e8fe7 | 599 | len = (*rds_ptr(rd, mblength, lp->type) & 0xfff) - 4; |
1da177e4 LT |
600 | skb = dev_alloc_skb(len + 2); |
601 | ||
602 | if (skb == 0) { | |
603 | printk("%s: Memory squeeze, deferring packet.\n", | |
604 | dev->name); | |
605 | lp->stats.rx_dropped++; | |
3b6e8fe7 MR |
606 | *rds_ptr(rd, mblength, lp->type) = 0; |
607 | *rds_ptr(rd, rmd1, lp->type) = | |
608 | ((lp->rx_buf_ptr_lnc[entry] >> 16) & | |
609 | 0xff) | LE_R1_OWN; | |
610 | lp->rx_new = (entry + 1) & RX_RING_MOD_MASK; | |
1da177e4 LT |
611 | return 0; |
612 | } | |
613 | lp->stats.rx_bytes += len; | |
614 | ||
615 | skb->dev = dev; | |
616 | skb_reserve(skb, 2); /* 16 byte align */ | |
617 | skb_put(skb, len); /* make room */ | |
618 | ||
619 | cp_from_buf(lp->type, skb->data, | |
3b6e8fe7 | 620 | (char *)lp->rx_buf_ptr_cpu[entry], len); |
1da177e4 LT |
621 | |
622 | skb->protocol = eth_type_trans(skb, dev); | |
623 | netif_rx(skb); | |
624 | dev->last_rx = jiffies; | |
625 | lp->stats.rx_packets++; | |
626 | } | |
627 | ||
628 | /* Return the packet to the pool */ | |
3b6e8fe7 MR |
629 | *rds_ptr(rd, mblength, lp->type) = 0; |
630 | *rds_ptr(rd, length, lp->type) = -RX_BUFF_SIZE | 0xf000; | |
631 | *rds_ptr(rd, rmd1, lp->type) = | |
632 | ((lp->rx_buf_ptr_lnc[entry] >> 16) & 0xff) | LE_R1_OWN; | |
633 | lp->rx_new = (entry + 1) & RX_RING_MOD_MASK; | |
1da177e4 LT |
634 | } |
635 | return 0; | |
636 | } | |
637 | ||
638 | static void lance_tx(struct net_device *dev) | |
639 | { | |
640 | struct lance_private *lp = netdev_priv(dev); | |
3b6e8fe7 | 641 | volatile u16 *ib = (volatile u16 *)dev->mem_start; |
1da177e4 | 642 | volatile struct lance_regs *ll = lp->ll; |
3b6e8fe7 | 643 | volatile u16 *td; |
1da177e4 LT |
644 | int i, j; |
645 | int status; | |
3b6e8fe7 | 646 | |
1da177e4 LT |
647 | j = lp->tx_old; |
648 | ||
649 | spin_lock(&lp->lock); | |
650 | ||
651 | for (i = j; i != lp->tx_new; i = j) { | |
3b6e8fe7 | 652 | td = lib_ptr(ib, btx_ring[i], lp->type); |
1da177e4 | 653 | /* If we hit a packet not owned by us, stop */ |
3b6e8fe7 | 654 | if (*tds_ptr(td, tmd1, lp->type) & LE_T1_OWN) |
1da177e4 LT |
655 | break; |
656 | ||
3b6e8fe7 MR |
657 | if (*tds_ptr(td, tmd1, lp->type) & LE_T1_ERR) { |
658 | status = *tds_ptr(td, misc, lp->type); | |
1da177e4 LT |
659 | |
660 | lp->stats.tx_errors++; | |
661 | if (status & LE_T3_RTY) | |
662 | lp->stats.tx_aborted_errors++; | |
663 | if (status & LE_T3_LCOL) | |
664 | lp->stats.tx_window_errors++; | |
665 | ||
666 | if (status & LE_T3_CLOS) { | |
667 | lp->stats.tx_carrier_errors++; | |
668 | printk("%s: Carrier Lost\n", dev->name); | |
669 | /* Stop the lance */ | |
670 | writereg(&ll->rap, LE_CSR0); | |
671 | writereg(&ll->rdp, LE_C0_STOP); | |
672 | lance_init_ring(dev); | |
673 | load_csrs(lp); | |
674 | init_restart_lance(lp); | |
675 | goto out; | |
676 | } | |
677 | /* Buffer errors and underflows turn off the | |
678 | * transmitter, restart the adapter. | |
679 | */ | |
680 | if (status & (LE_T3_BUF | LE_T3_UFL)) { | |
681 | lp->stats.tx_fifo_errors++; | |
682 | ||
683 | printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n", | |
684 | dev->name); | |
685 | /* Stop the lance */ | |
686 | writereg(&ll->rap, LE_CSR0); | |
687 | writereg(&ll->rdp, LE_C0_STOP); | |
688 | lance_init_ring(dev); | |
689 | load_csrs(lp); | |
690 | init_restart_lance(lp); | |
691 | goto out; | |
692 | } | |
3b6e8fe7 MR |
693 | } else if ((*tds_ptr(td, tmd1, lp->type) & LE_T1_POK) == |
694 | LE_T1_POK) { | |
1da177e4 LT |
695 | /* |
696 | * So we don't count the packet more than once. | |
697 | */ | |
3b6e8fe7 | 698 | *tds_ptr(td, tmd1, lp->type) &= ~(LE_T1_POK); |
1da177e4 LT |
699 | |
700 | /* One collision before packet was sent. */ | |
3b6e8fe7 | 701 | if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EONE) |
1da177e4 LT |
702 | lp->stats.collisions++; |
703 | ||
704 | /* More than one collision, be optimistic. */ | |
3b6e8fe7 | 705 | if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EMORE) |
1da177e4 LT |
706 | lp->stats.collisions += 2; |
707 | ||
708 | lp->stats.tx_packets++; | |
709 | } | |
710 | j = (j + 1) & TX_RING_MOD_MASK; | |
711 | } | |
712 | lp->tx_old = j; | |
713 | out: | |
714 | if (netif_queue_stopped(dev) && | |
715 | TX_BUFFS_AVAIL > 0) | |
716 | netif_wake_queue(dev); | |
717 | ||
718 | spin_unlock(&lp->lock); | |
719 | } | |
720 | ||
7d12e780 | 721 | static irqreturn_t lance_dma_merr_int(const int irq, void *dev_id) |
1da177e4 | 722 | { |
c31f28e7 | 723 | struct net_device *dev = dev_id; |
1da177e4 LT |
724 | |
725 | printk("%s: DMA error\n", dev->name); | |
da848ec3 | 726 | return IRQ_HANDLED; |
1da177e4 LT |
727 | } |
728 | ||
7d12e780 | 729 | static irqreturn_t lance_interrupt(const int irq, void *dev_id) |
1da177e4 | 730 | { |
c31f28e7 | 731 | struct net_device *dev = dev_id; |
1da177e4 LT |
732 | struct lance_private *lp = netdev_priv(dev); |
733 | volatile struct lance_regs *ll = lp->ll; | |
734 | int csr0; | |
735 | ||
736 | writereg(&ll->rap, LE_CSR0); | |
737 | csr0 = ll->rdp; | |
738 | ||
739 | /* Acknowledge all the interrupt sources ASAP */ | |
740 | writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT)); | |
741 | ||
742 | if ((csr0 & LE_C0_ERR)) { | |
743 | /* Clear the error condition */ | |
744 | writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS | | |
745 | LE_C0_CERR | LE_C0_MERR); | |
746 | } | |
747 | if (csr0 & LE_C0_RINT) | |
748 | lance_rx(dev); | |
749 | ||
750 | if (csr0 & LE_C0_TINT) | |
751 | lance_tx(dev); | |
752 | ||
753 | if (csr0 & LE_C0_BABL) | |
754 | lp->stats.tx_errors++; | |
755 | ||
756 | if (csr0 & LE_C0_MISS) | |
757 | lp->stats.rx_errors++; | |
758 | ||
759 | if (csr0 & LE_C0_MERR) { | |
760 | printk("%s: Memory error, status %04x\n", dev->name, csr0); | |
761 | ||
762 | writereg(&ll->rdp, LE_C0_STOP); | |
763 | ||
764 | lance_init_ring(dev); | |
765 | load_csrs(lp); | |
766 | init_restart_lance(lp); | |
767 | netif_wake_queue(dev); | |
768 | } | |
769 | ||
770 | writereg(&ll->rdp, LE_C0_INEA); | |
771 | writereg(&ll->rdp, LE_C0_INEA); | |
772 | return IRQ_HANDLED; | |
773 | } | |
774 | ||
775 | struct net_device *last_dev = 0; | |
776 | ||
777 | static int lance_open(struct net_device *dev) | |
778 | { | |
3b6e8fe7 | 779 | volatile u16 *ib = (volatile u16 *)dev->mem_start; |
1da177e4 LT |
780 | struct lance_private *lp = netdev_priv(dev); |
781 | volatile struct lance_regs *ll = lp->ll; | |
782 | int status = 0; | |
783 | ||
784 | last_dev = dev; | |
785 | ||
786 | /* Stop the Lance */ | |
787 | writereg(&ll->rap, LE_CSR0); | |
788 | writereg(&ll->rdp, LE_C0_STOP); | |
789 | ||
790 | /* Set mode and clear multicast filter only at device open, | |
791 | * so that lance_init_ring() called at any error will not | |
792 | * forget multicast filters. | |
793 | * | |
794 | * BTW it is common bug in all lance drivers! --ANK | |
795 | */ | |
3b6e8fe7 MR |
796 | *lib_ptr(ib, mode, lp->type) = 0; |
797 | *lib_ptr(ib, filter[0], lp->type) = 0; | |
798 | *lib_ptr(ib, filter[1], lp->type) = 0; | |
799 | *lib_ptr(ib, filter[2], lp->type) = 0; | |
800 | *lib_ptr(ib, filter[3], lp->type) = 0; | |
1da177e4 LT |
801 | |
802 | lance_init_ring(dev); | |
803 | load_csrs(lp); | |
804 | ||
805 | netif_start_queue(dev); | |
806 | ||
807 | /* Associate IRQ with lance_interrupt */ | |
808 | if (request_irq(dev->irq, &lance_interrupt, 0, "lance", dev)) { | |
809 | printk("%s: Can't get IRQ %d\n", dev->name, dev->irq); | |
810 | return -EAGAIN; | |
811 | } | |
812 | if (lp->dma_irq >= 0) { | |
813 | unsigned long flags; | |
814 | ||
815 | if (request_irq(lp->dma_irq, &lance_dma_merr_int, 0, | |
816 | "lance error", dev)) { | |
817 | free_irq(dev->irq, dev); | |
818 | printk("%s: Can't get DMA IRQ %d\n", dev->name, | |
819 | lp->dma_irq); | |
820 | return -EAGAIN; | |
821 | } | |
822 | ||
823 | spin_lock_irqsave(&ioasic_ssr_lock, flags); | |
824 | ||
825 | fast_mb(); | |
826 | /* Enable I/O ASIC LANCE DMA. */ | |
827 | ioasic_write(IO_REG_SSR, | |
828 | ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN); | |
829 | ||
830 | fast_mb(); | |
831 | spin_unlock_irqrestore(&ioasic_ssr_lock, flags); | |
832 | } | |
833 | ||
834 | status = init_restart_lance(lp); | |
835 | return status; | |
836 | } | |
837 | ||
838 | static int lance_close(struct net_device *dev) | |
839 | { | |
840 | struct lance_private *lp = netdev_priv(dev); | |
841 | volatile struct lance_regs *ll = lp->ll; | |
842 | ||
843 | netif_stop_queue(dev); | |
844 | del_timer_sync(&lp->multicast_timer); | |
845 | ||
846 | /* Stop the card */ | |
847 | writereg(&ll->rap, LE_CSR0); | |
848 | writereg(&ll->rdp, LE_C0_STOP); | |
849 | ||
850 | if (lp->dma_irq >= 0) { | |
851 | unsigned long flags; | |
852 | ||
853 | spin_lock_irqsave(&ioasic_ssr_lock, flags); | |
854 | ||
855 | fast_mb(); | |
856 | /* Disable I/O ASIC LANCE DMA. */ | |
857 | ioasic_write(IO_REG_SSR, | |
858 | ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN); | |
859 | ||
860 | fast_iob(); | |
861 | spin_unlock_irqrestore(&ioasic_ssr_lock, flags); | |
862 | ||
863 | free_irq(lp->dma_irq, dev); | |
864 | } | |
865 | free_irq(dev->irq, dev); | |
866 | return 0; | |
867 | } | |
868 | ||
869 | static inline int lance_reset(struct net_device *dev) | |
870 | { | |
871 | struct lance_private *lp = netdev_priv(dev); | |
872 | volatile struct lance_regs *ll = lp->ll; | |
873 | int status; | |
874 | ||
875 | /* Stop the lance */ | |
876 | writereg(&ll->rap, LE_CSR0); | |
877 | writereg(&ll->rdp, LE_C0_STOP); | |
878 | ||
879 | lance_init_ring(dev); | |
880 | load_csrs(lp); | |
881 | dev->trans_start = jiffies; | |
882 | status = init_restart_lance(lp); | |
883 | return status; | |
884 | } | |
885 | ||
886 | static void lance_tx_timeout(struct net_device *dev) | |
887 | { | |
888 | struct lance_private *lp = netdev_priv(dev); | |
889 | volatile struct lance_regs *ll = lp->ll; | |
890 | ||
891 | printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n", | |
892 | dev->name, ll->rdp); | |
893 | lance_reset(dev); | |
894 | netif_wake_queue(dev); | |
895 | } | |
896 | ||
897 | static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev) | |
898 | { | |
899 | struct lance_private *lp = netdev_priv(dev); | |
900 | volatile struct lance_regs *ll = lp->ll; | |
3b6e8fe7 MR |
901 | volatile u16 *ib = (volatile u16 *)dev->mem_start; |
902 | int entry, len; | |
1da177e4 | 903 | |
3b6e8fe7 | 904 | len = skb->len; |
6aa20a22 | 905 | |
1da177e4 | 906 | if (len < ETH_ZLEN) { |
5b057c6b | 907 | if (skb_padto(skb, ETH_ZLEN)) |
1da177e4 LT |
908 | return 0; |
909 | len = ETH_ZLEN; | |
910 | } | |
911 | ||
912 | lp->stats.tx_bytes += len; | |
913 | ||
3b6e8fe7 MR |
914 | entry = lp->tx_new; |
915 | *lib_ptr(ib, btx_ring[entry].length, lp->type) = (-len); | |
916 | *lib_ptr(ib, btx_ring[entry].misc, lp->type) = 0; | |
1da177e4 | 917 | |
3b6e8fe7 | 918 | cp_to_buf(lp->type, (char *)lp->tx_buf_ptr_cpu[entry], skb->data, len); |
1da177e4 LT |
919 | |
920 | /* Now, give the packet to the lance */ | |
3b6e8fe7 MR |
921 | *lib_ptr(ib, btx_ring[entry].tmd1, lp->type) = |
922 | ((lp->tx_buf_ptr_lnc[entry] >> 16) & 0xff) | | |
923 | (LE_T1_POK | LE_T1_OWN); | |
924 | lp->tx_new = (entry + 1) & TX_RING_MOD_MASK; | |
1da177e4 LT |
925 | |
926 | if (TX_BUFFS_AVAIL <= 0) | |
927 | netif_stop_queue(dev); | |
928 | ||
929 | /* Kick the lance: transmit now */ | |
930 | writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD); | |
931 | ||
932 | spin_unlock_irq(&lp->lock); | |
933 | ||
934 | dev->trans_start = jiffies; | |
935 | dev_kfree_skb(skb); | |
936 | ||
937 | return 0; | |
938 | } | |
939 | ||
940 | static struct net_device_stats *lance_get_stats(struct net_device *dev) | |
941 | { | |
942 | struct lance_private *lp = netdev_priv(dev); | |
943 | ||
944 | return &lp->stats; | |
945 | } | |
946 | ||
947 | static void lance_load_multicast(struct net_device *dev) | |
948 | { | |
3b6e8fe7 MR |
949 | struct lance_private *lp = netdev_priv(dev); |
950 | volatile u16 *ib = (volatile u16 *)dev->mem_start; | |
1da177e4 LT |
951 | struct dev_mc_list *dmi = dev->mc_list; |
952 | char *addrs; | |
953 | int i; | |
954 | u32 crc; | |
955 | ||
956 | /* set all multicast bits */ | |
957 | if (dev->flags & IFF_ALLMULTI) { | |
3b6e8fe7 MR |
958 | *lib_ptr(ib, filter[0], lp->type) = 0xffff; |
959 | *lib_ptr(ib, filter[1], lp->type) = 0xffff; | |
960 | *lib_ptr(ib, filter[2], lp->type) = 0xffff; | |
961 | *lib_ptr(ib, filter[3], lp->type) = 0xffff; | |
1da177e4 LT |
962 | return; |
963 | } | |
964 | /* clear the multicast filter */ | |
3b6e8fe7 MR |
965 | *lib_ptr(ib, filter[0], lp->type) = 0; |
966 | *lib_ptr(ib, filter[1], lp->type) = 0; | |
967 | *lib_ptr(ib, filter[2], lp->type) = 0; | |
968 | *lib_ptr(ib, filter[3], lp->type) = 0; | |
1da177e4 LT |
969 | |
970 | /* Add addresses */ | |
971 | for (i = 0; i < dev->mc_count; i++) { | |
972 | addrs = dmi->dmi_addr; | |
973 | dmi = dmi->next; | |
974 | ||
975 | /* multicast address? */ | |
976 | if (!(*addrs & 1)) | |
977 | continue; | |
978 | ||
979 | crc = ether_crc_le(ETH_ALEN, addrs); | |
980 | crc = crc >> 26; | |
3b6e8fe7 | 981 | *lib_ptr(ib, filter[crc >> 4], lp->type) |= 1 << (crc & 0xf); |
1da177e4 LT |
982 | } |
983 | return; | |
984 | } | |
985 | ||
986 | static void lance_set_multicast(struct net_device *dev) | |
987 | { | |
988 | struct lance_private *lp = netdev_priv(dev); | |
3b6e8fe7 | 989 | volatile u16 *ib = (volatile u16 *)dev->mem_start; |
1da177e4 LT |
990 | volatile struct lance_regs *ll = lp->ll; |
991 | ||
1da177e4 LT |
992 | if (!netif_running(dev)) |
993 | return; | |
994 | ||
995 | if (lp->tx_old != lp->tx_new) { | |
996 | mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100); | |
997 | netif_wake_queue(dev); | |
998 | return; | |
999 | } | |
1000 | ||
1001 | netif_stop_queue(dev); | |
1002 | ||
1003 | writereg(&ll->rap, LE_CSR0); | |
1004 | writereg(&ll->rdp, LE_C0_STOP); | |
1005 | ||
1006 | lance_init_ring(dev); | |
1007 | ||
1008 | if (dev->flags & IFF_PROMISC) { | |
3b6e8fe7 | 1009 | *lib_ptr(ib, mode, lp->type) |= LE_MO_PROM; |
1da177e4 | 1010 | } else { |
3b6e8fe7 | 1011 | *lib_ptr(ib, mode, lp->type) &= ~LE_MO_PROM; |
1da177e4 LT |
1012 | lance_load_multicast(dev); |
1013 | } | |
1014 | load_csrs(lp); | |
1015 | init_restart_lance(lp); | |
1016 | netif_wake_queue(dev); | |
1017 | } | |
1018 | ||
1019 | static void lance_set_multicast_retry(unsigned long _opaque) | |
1020 | { | |
1021 | struct net_device *dev = (struct net_device *) _opaque; | |
1022 | ||
1023 | lance_set_multicast(dev); | |
1024 | } | |
1025 | ||
1026 | static int __init dec_lance_init(const int type, const int slot) | |
1027 | { | |
1028 | static unsigned version_printed; | |
1029 | static const char fmt[] = "declance%d"; | |
1030 | char name[10]; | |
1031 | struct net_device *dev; | |
1032 | struct lance_private *lp; | |
1033 | volatile struct lance_regs *ll; | |
1034 | int i, ret; | |
1035 | unsigned long esar_base; | |
1036 | unsigned char *esar; | |
1037 | ||
1da177e4 LT |
1038 | if (dec_lance_debug && version_printed++ == 0) |
1039 | printk(version); | |
1040 | ||
1041 | i = 0; | |
1042 | dev = root_lance_dev; | |
1043 | while (dev) { | |
1044 | i++; | |
1045 | lp = (struct lance_private *)dev->priv; | |
1046 | dev = lp->next; | |
1047 | } | |
1048 | snprintf(name, sizeof(name), fmt, i); | |
1049 | ||
1050 | dev = alloc_etherdev(sizeof(struct lance_private)); | |
1051 | if (!dev) { | |
1052 | printk(KERN_ERR "%s: Unable to allocate etherdev, aborting.\n", | |
1053 | name); | |
1054 | ret = -ENOMEM; | |
1055 | goto err_out; | |
1056 | } | |
1057 | ||
1058 | /* | |
1059 | * alloc_etherdev ensures the data structures used by the LANCE | |
1060 | * are aligned. | |
1061 | */ | |
1062 | lp = netdev_priv(dev); | |
1063 | spin_lock_init(&lp->lock); | |
1064 | ||
1065 | lp->type = type; | |
1066 | lp->slot = slot; | |
1067 | switch (type) { | |
1068 | #ifdef CONFIG_TC | |
1069 | case ASIC_LANCE: | |
36156cdf | 1070 | dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE); |
1da177e4 LT |
1071 | |
1072 | /* buffer space for the on-board LANCE shared memory */ | |
1073 | /* | |
1074 | * FIXME: ugly hack! | |
1075 | */ | |
4569504a | 1076 | dev->mem_start = CKSEG1ADDR(0x00020000); |
1da177e4 LT |
1077 | dev->mem_end = dev->mem_start + 0x00020000; |
1078 | dev->irq = dec_interrupt[DEC_IRQ_LANCE]; | |
36156cdf | 1079 | esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR); |
1da177e4 LT |
1080 | |
1081 | /* Workaround crash with booting KN04 2.1k from Disk */ | |
1082 | memset((void *)dev->mem_start, 0, | |
1083 | dev->mem_end - dev->mem_start); | |
1084 | ||
1085 | /* | |
1086 | * setup the pointer arrays, this sucks [tm] :-( | |
1087 | */ | |
1088 | for (i = 0; i < RX_RING_SIZE; i++) { | |
1089 | lp->rx_buf_ptr_cpu[i] = | |
3b6e8fe7 | 1090 | (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + |
1da177e4 LT |
1091 | 2 * i * RX_BUFF_SIZE); |
1092 | lp->rx_buf_ptr_lnc[i] = | |
3b6e8fe7 | 1093 | (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); |
1da177e4 LT |
1094 | } |
1095 | for (i = 0; i < TX_RING_SIZE; i++) { | |
1096 | lp->tx_buf_ptr_cpu[i] = | |
3b6e8fe7 | 1097 | (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + |
1da177e4 LT |
1098 | 2 * RX_RING_SIZE * RX_BUFF_SIZE + |
1099 | 2 * i * TX_BUFF_SIZE); | |
1100 | lp->tx_buf_ptr_lnc[i] = | |
3b6e8fe7 MR |
1101 | (BUF_OFFSET_LNC + |
1102 | RX_RING_SIZE * RX_BUFF_SIZE + | |
1103 | i * TX_BUFF_SIZE); | |
1da177e4 LT |
1104 | } |
1105 | ||
1106 | /* Setup I/O ASIC LANCE DMA. */ | |
1107 | lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR]; | |
1108 | ioasic_write(IO_REG_LANCE_DMA_P, | |
6684b4e2 | 1109 | CPHYSADDR(dev->mem_start) << 3); |
1da177e4 LT |
1110 | |
1111 | break; | |
1112 | ||
1113 | case PMAD_LANCE: | |
1114 | claim_tc_card(slot); | |
1115 | ||
36156cdf | 1116 | dev->mem_start = CKSEG1ADDR(get_tc_base_addr(slot)); |
3b6e8fe7 | 1117 | dev->mem_end = dev->mem_start + 0x100000; |
1da177e4 LT |
1118 | dev->base_addr = dev->mem_start + 0x100000; |
1119 | dev->irq = get_tc_irq_nr(slot); | |
1120 | esar_base = dev->mem_start + 0x1c0002; | |
1121 | lp->dma_irq = -1; | |
1122 | ||
1123 | for (i = 0; i < RX_RING_SIZE; i++) { | |
1124 | lp->rx_buf_ptr_cpu[i] = | |
1125 | (char *)(dev->mem_start + BUF_OFFSET_CPU + | |
1126 | i * RX_BUFF_SIZE); | |
1127 | lp->rx_buf_ptr_lnc[i] = | |
3b6e8fe7 | 1128 | (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); |
1da177e4 LT |
1129 | } |
1130 | for (i = 0; i < TX_RING_SIZE; i++) { | |
1131 | lp->tx_buf_ptr_cpu[i] = | |
1132 | (char *)(dev->mem_start + BUF_OFFSET_CPU + | |
1133 | RX_RING_SIZE * RX_BUFF_SIZE + | |
1134 | i * TX_BUFF_SIZE); | |
1135 | lp->tx_buf_ptr_lnc[i] = | |
3b6e8fe7 MR |
1136 | (BUF_OFFSET_LNC + |
1137 | RX_RING_SIZE * RX_BUFF_SIZE + | |
1138 | i * TX_BUFF_SIZE); | |
1da177e4 LT |
1139 | } |
1140 | ||
1141 | break; | |
1142 | #endif | |
1143 | ||
1144 | case PMAX_LANCE: | |
1145 | dev->irq = dec_interrupt[DEC_IRQ_LANCE]; | |
36156cdf RB |
1146 | dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE); |
1147 | dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM); | |
3b6e8fe7 | 1148 | dev->mem_end = dev->mem_start + KN01_SLOT_SIZE; |
36156cdf | 1149 | esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1); |
1da177e4 LT |
1150 | lp->dma_irq = -1; |
1151 | ||
1152 | /* | |
1153 | * setup the pointer arrays, this sucks [tm] :-( | |
1154 | */ | |
1155 | for (i = 0; i < RX_RING_SIZE; i++) { | |
1156 | lp->rx_buf_ptr_cpu[i] = | |
3b6e8fe7 | 1157 | (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + |
1da177e4 LT |
1158 | 2 * i * RX_BUFF_SIZE); |
1159 | lp->rx_buf_ptr_lnc[i] = | |
3b6e8fe7 | 1160 | (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); |
1da177e4 LT |
1161 | } |
1162 | for (i = 0; i < TX_RING_SIZE; i++) { | |
1163 | lp->tx_buf_ptr_cpu[i] = | |
3b6e8fe7 | 1164 | (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + |
1da177e4 LT |
1165 | 2 * RX_RING_SIZE * RX_BUFF_SIZE + |
1166 | 2 * i * TX_BUFF_SIZE); | |
1167 | lp->tx_buf_ptr_lnc[i] = | |
3b6e8fe7 MR |
1168 | (BUF_OFFSET_LNC + |
1169 | RX_RING_SIZE * RX_BUFF_SIZE + | |
1170 | i * TX_BUFF_SIZE); | |
1da177e4 LT |
1171 | } |
1172 | ||
1173 | break; | |
1174 | ||
1175 | default: | |
1176 | printk(KERN_ERR "%s: declance_init called with unknown type\n", | |
1177 | name); | |
1178 | ret = -ENODEV; | |
1179 | goto err_out_free_dev; | |
1180 | } | |
1181 | ||
1182 | ll = (struct lance_regs *) dev->base_addr; | |
1183 | esar = (unsigned char *) esar_base; | |
1184 | ||
1185 | /* prom checks */ | |
1186 | /* First, check for test pattern */ | |
1187 | if (esar[0x60] != 0xff && esar[0x64] != 0x00 && | |
1188 | esar[0x68] != 0x55 && esar[0x6c] != 0xaa) { | |
1189 | printk(KERN_ERR | |
1190 | "%s: Ethernet station address prom not found!\n", | |
1191 | name); | |
1192 | ret = -ENODEV; | |
1193 | goto err_out_free_dev; | |
1194 | } | |
1195 | /* Check the prom contents */ | |
1196 | for (i = 0; i < 8; i++) { | |
1197 | if (esar[i * 4] != esar[0x3c - i * 4] && | |
1198 | esar[i * 4] != esar[0x40 + i * 4] && | |
1199 | esar[0x3c - i * 4] != esar[0x40 + i * 4]) { | |
1200 | printk(KERN_ERR "%s: Something is wrong with the " | |
1201 | "ethernet station address prom!\n", name); | |
1202 | ret = -ENODEV; | |
1203 | goto err_out_free_dev; | |
1204 | } | |
1205 | } | |
1206 | ||
1207 | /* Copy the ethernet address to the device structure, later to the | |
1208 | * lance initialization block so the lance gets it every time it's | |
1209 | * (re)initialized. | |
1210 | */ | |
1211 | switch (type) { | |
1212 | case ASIC_LANCE: | |
1213 | printk("%s: IOASIC onboard LANCE, addr = ", name); | |
1214 | break; | |
1215 | case PMAD_LANCE: | |
1216 | printk("%s: PMAD-AA, addr = ", name); | |
1217 | break; | |
1218 | case PMAX_LANCE: | |
1219 | printk("%s: PMAX onboard LANCE, addr = ", name); | |
1220 | break; | |
1221 | } | |
1222 | for (i = 0; i < 6; i++) { | |
1223 | dev->dev_addr[i] = esar[i * 4]; | |
1224 | printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ',' : ':'); | |
1225 | } | |
1226 | ||
1227 | printk(" irq = %d\n", dev->irq); | |
1228 | ||
1229 | dev->open = &lance_open; | |
1230 | dev->stop = &lance_close; | |
1231 | dev->hard_start_xmit = &lance_start_xmit; | |
1232 | dev->tx_timeout = &lance_tx_timeout; | |
1233 | dev->watchdog_timeo = 5*HZ; | |
1234 | dev->get_stats = &lance_get_stats; | |
1235 | dev->set_multicast_list = &lance_set_multicast; | |
1236 | ||
1237 | /* lp->ll is the location of the registers for lance card */ | |
1238 | lp->ll = ll; | |
1239 | ||
1240 | /* busmaster_regval (CSR3) should be zero according to the PMAD-AA | |
1241 | * specification. | |
1242 | */ | |
1243 | lp->busmaster_regval = 0; | |
1244 | ||
1245 | dev->dma = 0; | |
1246 | ||
1247 | /* We cannot sleep if the chip is busy during a | |
1248 | * multicast list update event, because such events | |
1249 | * can occur from interrupts (ex. IPv6). So we | |
1250 | * use a timer to try again later when necessary. -DaveM | |
1251 | */ | |
1252 | init_timer(&lp->multicast_timer); | |
1253 | lp->multicast_timer.data = (unsigned long) dev; | |
1254 | lp->multicast_timer.function = &lance_set_multicast_retry; | |
1255 | ||
1256 | ret = register_netdev(dev); | |
1257 | if (ret) { | |
1258 | printk(KERN_ERR | |
1259 | "%s: Unable to register netdev, aborting.\n", name); | |
1260 | goto err_out_free_dev; | |
1261 | } | |
1262 | ||
1263 | lp->next = root_lance_dev; | |
1264 | root_lance_dev = dev; | |
1265 | ||
1266 | printk("%s: registered as %s.\n", name, dev->name); | |
1267 | return 0; | |
1268 | ||
1269 | err_out_free_dev: | |
b07db75a | 1270 | free_netdev(dev); |
1da177e4 LT |
1271 | |
1272 | err_out: | |
1273 | return ret; | |
1274 | } | |
1275 | ||
1276 | ||
1277 | /* Find all the lance cards on the system and initialize them */ | |
1278 | static int __init dec_lance_probe(void) | |
1279 | { | |
1280 | int count = 0; | |
1281 | ||
1282 | /* Scan slots for PMAD-AA cards first. */ | |
1283 | #ifdef CONFIG_TC | |
1284 | if (TURBOCHANNEL) { | |
1285 | int slot; | |
1286 | ||
1287 | while ((slot = search_tc_card("PMAD-AA")) >= 0) { | |
1288 | if (dec_lance_init(PMAD_LANCE, slot) < 0) | |
1289 | break; | |
1290 | count++; | |
1291 | } | |
1292 | } | |
1293 | #endif | |
1294 | ||
1295 | /* Then handle onboard devices. */ | |
1296 | if (dec_interrupt[DEC_IRQ_LANCE] >= 0) { | |
1297 | if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) { | |
1298 | #ifdef CONFIG_TC | |
1299 | if (dec_lance_init(ASIC_LANCE, -1) >= 0) | |
1300 | count++; | |
1301 | #endif | |
1302 | } else if (!TURBOCHANNEL) { | |
1303 | if (dec_lance_init(PMAX_LANCE, -1) >= 0) | |
1304 | count++; | |
1305 | } | |
1306 | } | |
1307 | ||
1308 | return (count > 0) ? 0 : -ENODEV; | |
1309 | } | |
1310 | ||
1311 | static void __exit dec_lance_cleanup(void) | |
1312 | { | |
1313 | while (root_lance_dev) { | |
1314 | struct net_device *dev = root_lance_dev; | |
1315 | struct lance_private *lp = netdev_priv(dev); | |
b07db75a | 1316 | |
1da177e4 LT |
1317 | unregister_netdev(dev); |
1318 | #ifdef CONFIG_TC | |
1319 | if (lp->slot >= 0) | |
1320 | release_tc_card(lp->slot); | |
1321 | #endif | |
1322 | root_lance_dev = lp->next; | |
1323 | free_netdev(dev); | |
1324 | } | |
1325 | } | |
1326 | ||
1327 | module_init(dec_lance_probe); | |
1328 | module_exit(dec_lance_cleanup); |