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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
5efa1d1c | 2 | /* |
1da177e4 LT |
3 | * e100net.c: A network driver for the ETRAX 100LX network controller. |
4 | * | |
5 | * Copyright (c) 1998-2002 Axis Communications AB. | |
6 | * | |
7 | * The outline of this driver comes from skeleton.c. | |
8 | * | |
1da177e4 LT |
9 | */ |
10 | ||
1da177e4 | 11 | #include <linux/kernel.h> |
1da177e4 LT |
12 | #include <linux/delay.h> |
13 | #include <linux/types.h> | |
14 | #include <linux/fcntl.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/ptrace.h> | |
17 | #include <linux/ioport.h> | |
18 | #include <linux/in.h> | |
1da177e4 LT |
19 | #include <linux/string.h> |
20 | #include <linux/spinlock.h> | |
21 | #include <linux/errno.h> | |
22 | #include <linux/init.h> | |
1977f032 | 23 | #include <linux/bitops.h> |
1da177e4 LT |
24 | |
25 | #include <linux/if.h> | |
26 | #include <linux/mii.h> | |
27 | #include <linux/netdevice.h> | |
28 | #include <linux/etherdevice.h> | |
29 | #include <linux/skbuff.h> | |
30 | #include <linux/ethtool.h> | |
31 | ||
556dcee7 | 32 | #include <arch/svinto.h>/* DMA and register descriptions */ |
5efa1d1c | 33 | #include <asm/io.h> /* CRIS_LED_* I/O functions */ |
1da177e4 LT |
34 | #include <asm/irq.h> |
35 | #include <asm/dma.h> | |
1da177e4 LT |
36 | #include <asm/ethernet.h> |
37 | #include <asm/cache.h> | |
556dcee7 | 38 | #include <arch/io_interface_mux.h> |
1da177e4 LT |
39 | |
40 | //#define ETHDEBUG | |
41 | #define D(x) | |
42 | ||
43 | /* | |
44 | * The name of the card. Is used for messages and in the requests for | |
45 | * io regions, irqs and dma channels | |
46 | */ | |
47 | ||
48 | static const char* cardname = "ETRAX 100LX built-in ethernet controller"; | |
49 | ||
50 | /* A default ethernet address. Highlevel SW will set the real one later */ | |
51 | ||
52 | static struct sockaddr default_mac = { | |
53 | 0, | |
54 | { 0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00 } | |
55 | }; | |
56 | ||
57 | /* Information that need to be kept for each board. */ | |
58 | struct net_local { | |
1da177e4 LT |
59 | struct mii_if_info mii_if; |
60 | ||
61 | /* Tx control lock. This protects the transmit buffer ring | |
62 | * state along with the "tx full" state of the driver. This | |
63 | * means all netif_queue flow control actions are protected | |
64 | * by this lock as well. | |
65 | */ | |
66 | spinlock_t lock; | |
bafef0ae JN |
67 | |
68 | spinlock_t led_lock; /* Protect LED state */ | |
69 | spinlock_t transceiver_lock; /* Protect transceiver state. */ | |
1da177e4 LT |
70 | }; |
71 | ||
72 | typedef struct etrax_eth_descr | |
73 | { | |
74 | etrax_dma_descr descr; | |
75 | struct sk_buff* skb; | |
76 | } etrax_eth_descr; | |
77 | ||
78 | /* Some transceivers requires special handling */ | |
79 | struct transceiver_ops | |
80 | { | |
81 | unsigned int oui; | |
82 | void (*check_speed)(struct net_device* dev); | |
83 | void (*check_duplex)(struct net_device* dev); | |
84 | }; | |
85 | ||
1da177e4 LT |
86 | /* Duplex settings */ |
87 | enum duplex | |
88 | { | |
89 | half, | |
90 | full, | |
91 | autoneg | |
92 | }; | |
93 | ||
94 | /* Dma descriptors etc. */ | |
95 | ||
bafef0ae | 96 | #define MAX_MEDIA_DATA_SIZE 1522 |
1da177e4 LT |
97 | |
98 | #define MIN_PACKET_LEN 46 | |
99 | #define ETHER_HEAD_LEN 14 | |
100 | ||
101 | /* | |
102 | ** MDIO constants. | |
103 | */ | |
104 | #define MDIO_START 0x1 | |
105 | #define MDIO_READ 0x2 | |
106 | #define MDIO_WRITE 0x1 | |
107 | #define MDIO_PREAMBLE 0xfffffffful | |
108 | ||
109 | /* Broadcom specific */ | |
110 | #define MDIO_AUX_CTRL_STATUS_REG 0x18 | |
111 | #define MDIO_BC_FULL_DUPLEX_IND 0x1 | |
112 | #define MDIO_BC_SPEED 0x2 | |
113 | ||
114 | /* TDK specific */ | |
115 | #define MDIO_TDK_DIAGNOSTIC_REG 18 | |
116 | #define MDIO_TDK_DIAGNOSTIC_RATE 0x400 | |
117 | #define MDIO_TDK_DIAGNOSTIC_DPLX 0x800 | |
118 | ||
119 | /*Intel LXT972A specific*/ | |
120 | #define MDIO_INT_STATUS_REG_2 0x0011 | |
bafef0ae JN |
121 | #define MDIO_INT_FULL_DUPLEX_IND (1 << 9) |
122 | #define MDIO_INT_SPEED (1 << 14) | |
1da177e4 LT |
123 | |
124 | /* Network flash constants */ | |
125 | #define NET_FLASH_TIME (HZ/50) /* 20 ms */ | |
126 | #define NET_FLASH_PAUSE (HZ/100) /* 10 ms */ | |
127 | #define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 s */ | |
128 | #define NET_DUPLEX_CHECK_INTERVAL (2*HZ) /* 2 s */ | |
129 | ||
130 | #define NO_NETWORK_ACTIVITY 0 | |
131 | #define NETWORK_ACTIVITY 1 | |
132 | ||
bafef0ae JN |
133 | #define NBR_OF_RX_DESC 32 |
134 | #define NBR_OF_TX_DESC 16 | |
1da177e4 LT |
135 | |
136 | /* Large packets are sent directly to upper layers while small packets are */ | |
137 | /* copied (to reduce memory waste). The following constant decides the breakpoint */ | |
138 | #define RX_COPYBREAK 256 | |
139 | ||
140 | /* Due to a chip bug we need to flush the cache when descriptors are returned */ | |
141 | /* to the DMA. To decrease performance impact we return descriptors in chunks. */ | |
142 | /* The following constant determines the number of descriptors to return. */ | |
143 | #define RX_QUEUE_THRESHOLD NBR_OF_RX_DESC/2 | |
144 | ||
145 | #define GET_BIT(bit,val) (((val) >> (bit)) & 0x01) | |
146 | ||
147 | /* Define some macros to access ETRAX 100 registers */ | |
148 | #define SETF(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \ | |
149 | IO_FIELD_(reg##_, field##_, val) | |
150 | #define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \ | |
151 | IO_STATE_(reg##_, field##_, _##val) | |
152 | ||
153 | static etrax_eth_descr *myNextRxDesc; /* Points to the next descriptor to | |
154 | to be processed */ | |
155 | static etrax_eth_descr *myLastRxDesc; /* The last processed descriptor */ | |
1da177e4 LT |
156 | |
157 | static etrax_eth_descr RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned(32))); | |
158 | ||
159 | static etrax_eth_descr* myFirstTxDesc; /* First packet not yet sent */ | |
160 | static etrax_eth_descr* myLastTxDesc; /* End of send queue */ | |
161 | static etrax_eth_descr* myNextTxDesc; /* Next descriptor to use */ | |
162 | static etrax_eth_descr TxDescList[NBR_OF_TX_DESC] __attribute__ ((aligned(32))); | |
163 | ||
164 | static unsigned int network_rec_config_shadow = 0; | |
1da177e4 LT |
165 | |
166 | static unsigned int network_tr_ctrl_shadow = 0; | |
167 | ||
168 | /* Network speed indication. */ | |
8d06afab IM |
169 | static DEFINE_TIMER(speed_timer, NULL, 0, 0); |
170 | static DEFINE_TIMER(clear_led_timer, NULL, 0, 0); | |
1da177e4 LT |
171 | static int current_speed; /* Speed read from transceiver */ |
172 | static int current_speed_selection; /* Speed selected by user */ | |
173 | static unsigned long led_next_time; | |
174 | static int led_active; | |
175 | static int rx_queue_len; | |
176 | ||
177 | /* Duplex */ | |
8d06afab | 178 | static DEFINE_TIMER(duplex_timer, NULL, 0, 0); |
1da177e4 LT |
179 | static int full_duplex; |
180 | static enum duplex current_duplex; | |
181 | ||
182 | /* Index to functions, as function prototypes. */ | |
183 | ||
184 | static int etrax_ethernet_init(void); | |
185 | ||
186 | static int e100_open(struct net_device *dev); | |
187 | static int e100_set_mac_address(struct net_device *dev, void *addr); | |
188 | static int e100_send_packet(struct sk_buff *skb, struct net_device *dev); | |
7d12e780 DH |
189 | static irqreturn_t e100rxtx_interrupt(int irq, void *dev_id); |
190 | static irqreturn_t e100nw_interrupt(int irq, void *dev_id); | |
1da177e4 LT |
191 | static void e100_rx(struct net_device *dev); |
192 | static int e100_close(struct net_device *dev); | |
193 | static int e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); | |
1da177e4 LT |
194 | static int e100_set_config(struct net_device* dev, struct ifmap* map); |
195 | static void e100_tx_timeout(struct net_device *dev); | |
196 | static struct net_device_stats *e100_get_stats(struct net_device *dev); | |
197 | static void set_multicast_list(struct net_device *dev); | |
bafef0ae | 198 | static void e100_hardware_send_packet(struct net_local* np, char *buf, int length); |
1da177e4 LT |
199 | static void update_rx_stats(struct net_device_stats *); |
200 | static void update_tx_stats(struct net_device_stats *); | |
201 | static int e100_probe_transceiver(struct net_device* dev); | |
202 | ||
203 | static void e100_check_speed(unsigned long priv); | |
204 | static void e100_set_speed(struct net_device* dev, unsigned long speed); | |
205 | static void e100_check_duplex(unsigned long priv); | |
206 | static void e100_set_duplex(struct net_device* dev, enum duplex); | |
207 | static void e100_negotiate(struct net_device* dev); | |
208 | ||
209 | static int e100_get_mdio_reg(struct net_device *dev, int phy_id, int location); | |
210 | static void e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value); | |
211 | ||
212 | static void e100_send_mdio_cmd(unsigned short cmd, int write_cmd); | |
213 | static void e100_send_mdio_bit(unsigned char bit); | |
214 | static unsigned char e100_receive_mdio_bit(void); | |
215 | static void e100_reset_transceiver(struct net_device* net); | |
216 | ||
217 | static void e100_clear_network_leds(unsigned long dummy); | |
218 | static void e100_set_network_leds(int active); | |
219 | ||
7282d491 | 220 | static const struct ethtool_ops e100_ethtool_ops; |
bafef0ae JN |
221 | #if defined(CONFIG_ETRAX_NO_PHY) |
222 | static void dummy_check_speed(struct net_device* dev); | |
223 | static void dummy_check_duplex(struct net_device* dev); | |
224 | #else | |
1da177e4 LT |
225 | static void broadcom_check_speed(struct net_device* dev); |
226 | static void broadcom_check_duplex(struct net_device* dev); | |
227 | static void tdk_check_speed(struct net_device* dev); | |
228 | static void tdk_check_duplex(struct net_device* dev); | |
229 | static void intel_check_speed(struct net_device* dev); | |
230 | static void intel_check_duplex(struct net_device* dev); | |
231 | static void generic_check_speed(struct net_device* dev); | |
232 | static void generic_check_duplex(struct net_device* dev); | |
bafef0ae JN |
233 | #endif |
234 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
235 | static void e100_netpoll(struct net_device* dev); | |
236 | #endif | |
237 | ||
238 | static int autoneg_normal = 1; | |
1da177e4 LT |
239 | |
240 | struct transceiver_ops transceivers[] = | |
241 | { | |
bafef0ae JN |
242 | #if defined(CONFIG_ETRAX_NO_PHY) |
243 | {0x0000, dummy_check_speed, dummy_check_duplex} /* Dummy */ | |
244 | #else | |
1da177e4 LT |
245 | {0x1018, broadcom_check_speed, broadcom_check_duplex}, /* Broadcom */ |
246 | {0xC039, tdk_check_speed, tdk_check_duplex}, /* TDK 2120 */ | |
247 | {0x039C, tdk_check_speed, tdk_check_duplex}, /* TDK 2120C */ | |
248 | {0x04de, intel_check_speed, intel_check_duplex}, /* Intel LXT972A*/ | |
249 | {0x0000, generic_check_speed, generic_check_duplex} /* Generic, must be last */ | |
bafef0ae | 250 | #endif |
1da177e4 LT |
251 | }; |
252 | ||
bafef0ae JN |
253 | struct transceiver_ops* transceiver = &transceivers[0]; |
254 | ||
a95c2a3b AB |
255 | static const struct net_device_ops e100_netdev_ops = { |
256 | .ndo_open = e100_open, | |
257 | .ndo_stop = e100_close, | |
258 | .ndo_start_xmit = e100_send_packet, | |
259 | .ndo_tx_timeout = e100_tx_timeout, | |
260 | .ndo_get_stats = e100_get_stats, | |
afc4b13d | 261 | .ndo_set_rx_mode = set_multicast_list, |
a95c2a3b AB |
262 | .ndo_do_ioctl = e100_ioctl, |
263 | .ndo_set_mac_address = e100_set_mac_address, | |
264 | .ndo_validate_addr = eth_validate_addr, | |
a95c2a3b AB |
265 | .ndo_set_config = e100_set_config, |
266 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
267 | .ndo_poll_controller = e100_netpoll, | |
268 | #endif | |
269 | }; | |
270 | ||
1da177e4 LT |
271 | #define tx_done(dev) (*R_DMA_CH0_CMD == 0) |
272 | ||
273 | /* | |
274 | * Check for a network adaptor of this type, and return '0' if one exists. | |
275 | * If dev->base_addr == 0, probe all likely locations. | |
276 | * If dev->base_addr == 1, always return failure. | |
277 | * If dev->base_addr == 2, allocate space for the device and return success | |
278 | * (detachable devices only). | |
279 | */ | |
280 | ||
281 | static int __init | |
282 | etrax_ethernet_init(void) | |
283 | { | |
284 | struct net_device *dev; | |
285 | struct net_local* np; | |
286 | int i, err; | |
287 | ||
288 | printk(KERN_INFO | |
bafef0ae | 289 | "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 1998-2007 Axis Communications AB\n"); |
1da177e4 | 290 | |
bafef0ae JN |
291 | if (cris_request_io_interface(if_eth, cardname)) { |
292 | printk(KERN_CRIT "etrax_ethernet_init failed to get IO interface\n"); | |
293 | return -EBUSY; | |
294 | } | |
1da177e4 | 295 | |
bafef0ae | 296 | dev = alloc_etherdev(sizeof(struct net_local)); |
1da177e4 LT |
297 | if (!dev) |
298 | return -ENOMEM; | |
299 | ||
bafef0ae JN |
300 | np = netdev_priv(dev); |
301 | ||
302 | /* we do our own locking */ | |
303 | dev->features |= NETIF_F_LLTX; | |
304 | ||
1da177e4 LT |
305 | dev->base_addr = (unsigned int)R_NETWORK_SA_0; /* just to have something to show */ |
306 | ||
307 | /* now setup our etrax specific stuff */ | |
308 | ||
309 | dev->irq = NETWORK_DMA_RX_IRQ_NBR; /* we really use DMATX as well... */ | |
310 | dev->dma = NETWORK_RX_DMA_NBR; | |
311 | ||
312 | /* fill in our handlers so the network layer can talk to us in the future */ | |
313 | ||
76f2b4d9 | 314 | dev->ethtool_ops = &e100_ethtool_ops; |
a95c2a3b | 315 | dev->netdev_ops = &e100_netdev_ops; |
bafef0ae JN |
316 | |
317 | spin_lock_init(&np->lock); | |
318 | spin_lock_init(&np->led_lock); | |
319 | spin_lock_init(&np->transceiver_lock); | |
1da177e4 LT |
320 | |
321 | /* Initialise the list of Etrax DMA-descriptors */ | |
322 | ||
323 | /* Initialise receive descriptors */ | |
324 | ||
325 | for (i = 0; i < NBR_OF_RX_DESC; i++) { | |
bafef0ae JN |
326 | /* Allocate two extra cachelines to make sure that buffer used |
327 | * by DMA does not share cacheline with any other data (to | |
328 | * avoid cache bug) | |
1da177e4 LT |
329 | */ |
330 | RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES); | |
92b1f905 DR |
331 | if (!RxDescList[i].skb) |
332 | return -ENOMEM; | |
1da177e4 LT |
333 | RxDescList[i].descr.ctrl = 0; |
334 | RxDescList[i].descr.sw_len = MAX_MEDIA_DATA_SIZE; | |
335 | RxDescList[i].descr.next = virt_to_phys(&RxDescList[i + 1]); | |
336 | RxDescList[i].descr.buf = L1_CACHE_ALIGN(virt_to_phys(RxDescList[i].skb->data)); | |
337 | RxDescList[i].descr.status = 0; | |
338 | RxDescList[i].descr.hw_len = 0; | |
339 | prepare_rx_descriptor(&RxDescList[i].descr); | |
340 | } | |
341 | ||
342 | RxDescList[NBR_OF_RX_DESC - 1].descr.ctrl = d_eol; | |
343 | RxDescList[NBR_OF_RX_DESC - 1].descr.next = virt_to_phys(&RxDescList[0]); | |
344 | rx_queue_len = 0; | |
345 | ||
346 | /* Initialize transmit descriptors */ | |
347 | for (i = 0; i < NBR_OF_TX_DESC; i++) { | |
348 | TxDescList[i].descr.ctrl = 0; | |
349 | TxDescList[i].descr.sw_len = 0; | |
350 | TxDescList[i].descr.next = virt_to_phys(&TxDescList[i + 1].descr); | |
351 | TxDescList[i].descr.buf = 0; | |
352 | TxDescList[i].descr.status = 0; | |
353 | TxDescList[i].descr.hw_len = 0; | |
354 | TxDescList[i].skb = 0; | |
355 | } | |
356 | ||
357 | TxDescList[NBR_OF_TX_DESC - 1].descr.ctrl = d_eol; | |
358 | TxDescList[NBR_OF_TX_DESC - 1].descr.next = virt_to_phys(&TxDescList[0].descr); | |
359 | ||
360 | /* Initialise initial pointers */ | |
361 | ||
362 | myNextRxDesc = &RxDescList[0]; | |
363 | myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1]; | |
1da177e4 LT |
364 | myFirstTxDesc = &TxDescList[0]; |
365 | myNextTxDesc = &TxDescList[0]; | |
366 | myLastTxDesc = &TxDescList[NBR_OF_TX_DESC - 1]; | |
367 | ||
368 | /* Register device */ | |
369 | err = register_netdev(dev); | |
370 | if (err) { | |
371 | free_netdev(dev); | |
372 | return err; | |
373 | } | |
374 | ||
375 | /* set the default MAC address */ | |
376 | ||
377 | e100_set_mac_address(dev, &default_mac); | |
378 | ||
379 | /* Initialize speed indicator stuff. */ | |
380 | ||
381 | current_speed = 10; | |
382 | current_speed_selection = 0; /* Auto */ | |
383 | speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL; | |
bafef0ae | 384 | speed_timer.data = (unsigned long)dev; |
1da177e4 LT |
385 | speed_timer.function = e100_check_speed; |
386 | ||
387 | clear_led_timer.function = e100_clear_network_leds; | |
bafef0ae | 388 | clear_led_timer.data = (unsigned long)dev; |
1da177e4 LT |
389 | |
390 | full_duplex = 0; | |
391 | current_duplex = autoneg; | |
392 | duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL; | |
393 | duplex_timer.data = (unsigned long)dev; | |
394 | duplex_timer.function = e100_check_duplex; | |
395 | ||
396 | /* Initialize mii interface */ | |
1da177e4 LT |
397 | np->mii_if.phy_id_mask = 0x1f; |
398 | np->mii_if.reg_num_mask = 0x1f; | |
399 | np->mii_if.dev = dev; | |
400 | np->mii_if.mdio_read = e100_get_mdio_reg; | |
401 | np->mii_if.mdio_write = e100_set_mdio_reg; | |
402 | ||
403 | /* Initialize group address registers to make sure that no */ | |
404 | /* unwanted addresses are matched */ | |
405 | *R_NETWORK_GA_0 = 0x00000000; | |
406 | *R_NETWORK_GA_1 = 0x00000000; | |
bafef0ae JN |
407 | |
408 | /* Initialize next time the led can flash */ | |
409 | led_next_time = jiffies; | |
1da177e4 LT |
410 | return 0; |
411 | } | |
a13925a4 | 412 | device_initcall(etrax_ethernet_init) |
1da177e4 LT |
413 | |
414 | /* set MAC address of the interface. called from the core after a | |
415 | * SIOCSIFADDR ioctl, and from the bootup above. | |
416 | */ | |
417 | ||
418 | static int | |
419 | e100_set_mac_address(struct net_device *dev, void *p) | |
420 | { | |
bafef0ae | 421 | struct net_local *np = netdev_priv(dev); |
1da177e4 | 422 | struct sockaddr *addr = p; |
1da177e4 LT |
423 | |
424 | spin_lock(&np->lock); /* preemption protection */ | |
425 | ||
426 | /* remember it */ | |
427 | ||
428 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); | |
429 | ||
430 | /* Write it to the hardware. | |
431 | * Note the way the address is wrapped: | |
432 | * *R_NETWORK_SA_0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24); | |
433 | * *R_NETWORK_SA_1 = a0_4 | (a0_5 << 8); | |
434 | */ | |
435 | ||
436 | *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) | | |
437 | (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24); | |
438 | *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8); | |
439 | *R_NETWORK_SA_2 = 0; | |
440 | ||
441 | /* show it in the log as well */ | |
442 | ||
e174961c | 443 | printk(KERN_INFO "%s: changed MAC to %pM\n", dev->name, dev->dev_addr); |
1da177e4 LT |
444 | |
445 | spin_unlock(&np->lock); | |
446 | ||
447 | return 0; | |
448 | } | |
449 | ||
450 | /* | |
451 | * Open/initialize the board. This is called (in the current kernel) | |
452 | * sometime after booting when the 'ifconfig' program is run. | |
453 | * | |
454 | * This routine should set everything up anew at each open, even | |
455 | * registers that "should" only need to be set once at boot, so that | |
456 | * there is non-reboot way to recover if something goes wrong. | |
457 | */ | |
458 | ||
459 | static int | |
460 | e100_open(struct net_device *dev) | |
461 | { | |
462 | unsigned long flags; | |
463 | ||
464 | /* enable the MDIO output pin */ | |
465 | ||
466 | *R_NETWORK_MGM_CTRL = IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable); | |
467 | ||
468 | *R_IRQ_MASK0_CLR = | |
469 | IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) | | |
470 | IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) | | |
471 | IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr); | |
472 | ||
473 | /* clear dma0 and 1 eop and descr irq masks */ | |
474 | *R_IRQ_MASK2_CLR = | |
475 | IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) | | |
476 | IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) | | |
477 | IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) | | |
478 | IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr); | |
479 | ||
480 | /* Reset and wait for the DMA channels */ | |
481 | ||
482 | RESET_DMA(NETWORK_TX_DMA_NBR); | |
483 | RESET_DMA(NETWORK_RX_DMA_NBR); | |
484 | WAIT_DMA(NETWORK_TX_DMA_NBR); | |
485 | WAIT_DMA(NETWORK_RX_DMA_NBR); | |
486 | ||
487 | /* Initialise the etrax network controller */ | |
488 | ||
489 | /* allocate the irq corresponding to the receiving DMA */ | |
490 | ||
ab392d2d JMC |
491 | if (request_irq(NETWORK_DMA_RX_IRQ_NBR, e100rxtx_interrupt, 0, cardname, |
492 | (void *)dev)) { | |
1da177e4 LT |
493 | goto grace_exit0; |
494 | } | |
495 | ||
496 | /* allocate the irq corresponding to the transmitting DMA */ | |
497 | ||
498 | if (request_irq(NETWORK_DMA_TX_IRQ_NBR, e100rxtx_interrupt, 0, | |
499 | cardname, (void *)dev)) { | |
500 | goto grace_exit1; | |
501 | } | |
502 | ||
503 | /* allocate the irq corresponding to the network errors etc */ | |
504 | ||
505 | if (request_irq(NETWORK_STATUS_IRQ_NBR, e100nw_interrupt, 0, | |
506 | cardname, (void *)dev)) { | |
507 | goto grace_exit2; | |
508 | } | |
509 | ||
bafef0ae JN |
510 | /* |
511 | * Always allocate the DMA channels after the IRQ, | |
512 | * and clean up on failure. | |
513 | */ | |
514 | ||
515 | if (cris_request_dma(NETWORK_TX_DMA_NBR, | |
516 | cardname, | |
517 | DMA_VERBOSE_ON_ERROR, | |
518 | dma_eth)) { | |
519 | goto grace_exit3; | |
520 | } | |
521 | ||
522 | if (cris_request_dma(NETWORK_RX_DMA_NBR, | |
523 | cardname, | |
524 | DMA_VERBOSE_ON_ERROR, | |
525 | dma_eth)) { | |
526 | goto grace_exit4; | |
527 | } | |
528 | ||
1da177e4 LT |
529 | /* give the HW an idea of what MAC address we want */ |
530 | ||
531 | *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) | | |
532 | (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24); | |
533 | *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8); | |
534 | *R_NETWORK_SA_2 = 0; | |
535 | ||
536 | #if 0 | |
537 | /* use promiscuous mode for testing */ | |
538 | *R_NETWORK_GA_0 = 0xffffffff; | |
539 | *R_NETWORK_GA_1 = 0xffffffff; | |
540 | ||
541 | *R_NETWORK_REC_CONFIG = 0xd; /* broadcast rec, individ. rec, ma0 enabled */ | |
542 | #else | |
bafef0ae | 543 | SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, max_size, size1522); |
1da177e4 LT |
544 | SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, broadcast, receive); |
545 | SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, ma0, enable); | |
546 | SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex); | |
547 | *R_NETWORK_REC_CONFIG = network_rec_config_shadow; | |
548 | #endif | |
549 | ||
550 | *R_NETWORK_GEN_CONFIG = | |
551 | IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) | | |
552 | IO_STATE(R_NETWORK_GEN_CONFIG, enable, on); | |
553 | ||
554 | SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr); | |
555 | SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, delay, none); | |
556 | SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cancel, dont); | |
557 | SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cd, enable); | |
558 | SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, retry, enable); | |
559 | SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, pad, enable); | |
560 | SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, crc, enable); | |
561 | *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow; | |
562 | ||
bafef0ae | 563 | local_irq_save(flags); |
1da177e4 LT |
564 | |
565 | /* enable the irq's for ethernet DMA */ | |
566 | ||
567 | *R_IRQ_MASK2_SET = | |
568 | IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) | | |
569 | IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set); | |
570 | ||
571 | *R_IRQ_MASK0_SET = | |
572 | IO_STATE(R_IRQ_MASK0_SET, overrun, set) | | |
573 | IO_STATE(R_IRQ_MASK0_SET, underrun, set) | | |
574 | IO_STATE(R_IRQ_MASK0_SET, excessive_col, set); | |
575 | ||
576 | /* make sure the irqs are cleared */ | |
577 | ||
578 | *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do); | |
579 | *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do); | |
580 | ||
581 | /* make sure the rec and transmit error counters are cleared */ | |
582 | ||
583 | (void)*R_REC_COUNTERS; /* dummy read */ | |
584 | (void)*R_TR_COUNTERS; /* dummy read */ | |
585 | ||
586 | /* start the receiving DMA channel so we can receive packets from now on */ | |
587 | ||
588 | *R_DMA_CH1_FIRST = virt_to_phys(myNextRxDesc); | |
589 | *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, start); | |
590 | ||
591 | /* Set up transmit DMA channel so it can be restarted later */ | |
592 | ||
593 | *R_DMA_CH0_FIRST = 0; | |
594 | *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc); | |
bafef0ae | 595 | netif_start_queue(dev); |
1da177e4 | 596 | |
bafef0ae | 597 | local_irq_restore(flags); |
1da177e4 LT |
598 | |
599 | /* Probe for transceiver */ | |
600 | if (e100_probe_transceiver(dev)) | |
bafef0ae | 601 | goto grace_exit5; |
1da177e4 LT |
602 | |
603 | /* Start duplex/speed timers */ | |
604 | add_timer(&speed_timer); | |
605 | add_timer(&duplex_timer); | |
606 | ||
607 | /* We are now ready to accept transmit requeusts from | |
608 | * the queueing layer of the networking. | |
609 | */ | |
bafef0ae | 610 | netif_carrier_on(dev); |
1da177e4 LT |
611 | |
612 | return 0; | |
613 | ||
bafef0ae JN |
614 | grace_exit5: |
615 | cris_free_dma(NETWORK_RX_DMA_NBR, cardname); | |
616 | grace_exit4: | |
617 | cris_free_dma(NETWORK_TX_DMA_NBR, cardname); | |
1da177e4 LT |
618 | grace_exit3: |
619 | free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev); | |
620 | grace_exit2: | |
621 | free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev); | |
622 | grace_exit1: | |
623 | free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev); | |
624 | grace_exit0: | |
625 | return -EAGAIN; | |
626 | } | |
627 | ||
bafef0ae JN |
628 | #if defined(CONFIG_ETRAX_NO_PHY) |
629 | static void | |
630 | dummy_check_speed(struct net_device* dev) | |
631 | { | |
632 | current_speed = 100; | |
633 | } | |
634 | #else | |
1da177e4 LT |
635 | static void |
636 | generic_check_speed(struct net_device* dev) | |
637 | { | |
638 | unsigned long data; | |
bafef0ae JN |
639 | struct net_local *np = netdev_priv(dev); |
640 | ||
641 | data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE); | |
1da177e4 LT |
642 | if ((data & ADVERTISE_100FULL) || |
643 | (data & ADVERTISE_100HALF)) | |
644 | current_speed = 100; | |
645 | else | |
646 | current_speed = 10; | |
647 | } | |
648 | ||
649 | static void | |
650 | tdk_check_speed(struct net_device* dev) | |
651 | { | |
652 | unsigned long data; | |
bafef0ae JN |
653 | struct net_local *np = netdev_priv(dev); |
654 | ||
655 | data = e100_get_mdio_reg(dev, np->mii_if.phy_id, | |
656 | MDIO_TDK_DIAGNOSTIC_REG); | |
1da177e4 LT |
657 | current_speed = (data & MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10); |
658 | } | |
659 | ||
660 | static void | |
661 | broadcom_check_speed(struct net_device* dev) | |
662 | { | |
663 | unsigned long data; | |
bafef0ae JN |
664 | struct net_local *np = netdev_priv(dev); |
665 | ||
666 | data = e100_get_mdio_reg(dev, np->mii_if.phy_id, | |
667 | MDIO_AUX_CTRL_STATUS_REG); | |
1da177e4 LT |
668 | current_speed = (data & MDIO_BC_SPEED ? 100 : 10); |
669 | } | |
670 | ||
671 | static void | |
672 | intel_check_speed(struct net_device* dev) | |
673 | { | |
674 | unsigned long data; | |
bafef0ae JN |
675 | struct net_local *np = netdev_priv(dev); |
676 | ||
677 | data = e100_get_mdio_reg(dev, np->mii_if.phy_id, | |
678 | MDIO_INT_STATUS_REG_2); | |
1da177e4 LT |
679 | current_speed = (data & MDIO_INT_SPEED ? 100 : 10); |
680 | } | |
bafef0ae | 681 | #endif |
1da177e4 LT |
682 | static void |
683 | e100_check_speed(unsigned long priv) | |
684 | { | |
685 | struct net_device* dev = (struct net_device*)priv; | |
bafef0ae | 686 | struct net_local *np = netdev_priv(dev); |
1da177e4 LT |
687 | static int led_initiated = 0; |
688 | unsigned long data; | |
689 | int old_speed = current_speed; | |
690 | ||
bafef0ae JN |
691 | spin_lock(&np->transceiver_lock); |
692 | ||
693 | data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMSR); | |
1da177e4 LT |
694 | if (!(data & BMSR_LSTATUS)) { |
695 | current_speed = 0; | |
696 | } else { | |
697 | transceiver->check_speed(dev); | |
698 | } | |
699 | ||
bafef0ae | 700 | spin_lock(&np->led_lock); |
1da177e4 LT |
701 | if ((old_speed != current_speed) || !led_initiated) { |
702 | led_initiated = 1; | |
703 | e100_set_network_leds(NO_NETWORK_ACTIVITY); | |
bafef0ae JN |
704 | if (current_speed) |
705 | netif_carrier_on(dev); | |
706 | else | |
707 | netif_carrier_off(dev); | |
1da177e4 | 708 | } |
bafef0ae | 709 | spin_unlock(&np->led_lock); |
1da177e4 LT |
710 | |
711 | /* Reinitialize the timer. */ | |
712 | speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL; | |
713 | add_timer(&speed_timer); | |
bafef0ae JN |
714 | |
715 | spin_unlock(&np->transceiver_lock); | |
1da177e4 LT |
716 | } |
717 | ||
718 | static void | |
719 | e100_negotiate(struct net_device* dev) | |
720 | { | |
bafef0ae JN |
721 | struct net_local *np = netdev_priv(dev); |
722 | unsigned short data = e100_get_mdio_reg(dev, np->mii_if.phy_id, | |
723 | MII_ADVERTISE); | |
1da177e4 LT |
724 | |
725 | /* Discard old speed and duplex settings */ | |
726 | data &= ~(ADVERTISE_100HALF | ADVERTISE_100FULL | | |
727 | ADVERTISE_10HALF | ADVERTISE_10FULL); | |
728 | ||
729 | switch (current_speed_selection) { | |
bafef0ae | 730 | case 10: |
1da177e4 LT |
731 | if (current_duplex == full) |
732 | data |= ADVERTISE_10FULL; | |
733 | else if (current_duplex == half) | |
734 | data |= ADVERTISE_10HALF; | |
735 | else | |
736 | data |= ADVERTISE_10HALF | ADVERTISE_10FULL; | |
737 | break; | |
738 | ||
bafef0ae | 739 | case 100: |
1da177e4 LT |
740 | if (current_duplex == full) |
741 | data |= ADVERTISE_100FULL; | |
742 | else if (current_duplex == half) | |
743 | data |= ADVERTISE_100HALF; | |
744 | else | |
745 | data |= ADVERTISE_100HALF | ADVERTISE_100FULL; | |
746 | break; | |
747 | ||
bafef0ae | 748 | case 0: /* Auto */ |
1da177e4 LT |
749 | if (current_duplex == full) |
750 | data |= ADVERTISE_100FULL | ADVERTISE_10FULL; | |
751 | else if (current_duplex == half) | |
752 | data |= ADVERTISE_100HALF | ADVERTISE_10HALF; | |
753 | else | |
754 | data |= ADVERTISE_10HALF | ADVERTISE_10FULL | | |
755 | ADVERTISE_100HALF | ADVERTISE_100FULL; | |
756 | break; | |
757 | ||
bafef0ae | 758 | default: /* assume autoneg speed and duplex */ |
1da177e4 LT |
759 | data |= ADVERTISE_10HALF | ADVERTISE_10FULL | |
760 | ADVERTISE_100HALF | ADVERTISE_100FULL; | |
bafef0ae | 761 | break; |
1da177e4 LT |
762 | } |
763 | ||
bafef0ae | 764 | e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE, data); |
1da177e4 | 765 | |
e6cd1974 | 766 | data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR); |
bafef0ae | 767 | if (autoneg_normal) { |
e6cd1974 JN |
768 | /* Renegotiate with link partner */ |
769 | data |= BMCR_ANENABLE | BMCR_ANRESTART; | |
770 | } else { | |
771 | /* Don't negotiate speed or duplex */ | |
772 | data &= ~(BMCR_ANENABLE | BMCR_ANRESTART); | |
773 | ||
774 | /* Set speed and duplex static */ | |
775 | if (current_speed_selection == 10) | |
776 | data &= ~BMCR_SPEED100; | |
777 | else | |
778 | data |= BMCR_SPEED100; | |
779 | ||
780 | if (current_duplex != full) | |
781 | data &= ~BMCR_FULLDPLX; | |
782 | else | |
783 | data |= BMCR_FULLDPLX; | |
bafef0ae JN |
784 | } |
785 | e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR, data); | |
1da177e4 LT |
786 | } |
787 | ||
788 | static void | |
789 | e100_set_speed(struct net_device* dev, unsigned long speed) | |
790 | { | |
bafef0ae JN |
791 | struct net_local *np = netdev_priv(dev); |
792 | ||
793 | spin_lock(&np->transceiver_lock); | |
1da177e4 LT |
794 | if (speed != current_speed_selection) { |
795 | current_speed_selection = speed; | |
796 | e100_negotiate(dev); | |
797 | } | |
bafef0ae | 798 | spin_unlock(&np->transceiver_lock); |
1da177e4 LT |
799 | } |
800 | ||
801 | static void | |
802 | e100_check_duplex(unsigned long priv) | |
803 | { | |
804 | struct net_device *dev = (struct net_device *)priv; | |
bafef0ae JN |
805 | struct net_local *np = netdev_priv(dev); |
806 | int old_duplex; | |
807 | ||
808 | spin_lock(&np->transceiver_lock); | |
809 | old_duplex = full_duplex; | |
1da177e4 LT |
810 | transceiver->check_duplex(dev); |
811 | if (old_duplex != full_duplex) { | |
812 | /* Duplex changed */ | |
813 | SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex); | |
814 | *R_NETWORK_REC_CONFIG = network_rec_config_shadow; | |
815 | } | |
816 | ||
817 | /* Reinitialize the timer. */ | |
818 | duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL; | |
819 | add_timer(&duplex_timer); | |
820 | np->mii_if.full_duplex = full_duplex; | |
bafef0ae | 821 | spin_unlock(&np->transceiver_lock); |
1da177e4 | 822 | } |
bafef0ae JN |
823 | #if defined(CONFIG_ETRAX_NO_PHY) |
824 | static void | |
825 | dummy_check_duplex(struct net_device* dev) | |
826 | { | |
827 | full_duplex = 1; | |
828 | } | |
829 | #else | |
1da177e4 LT |
830 | static void |
831 | generic_check_duplex(struct net_device* dev) | |
832 | { | |
833 | unsigned long data; | |
bafef0ae JN |
834 | struct net_local *np = netdev_priv(dev); |
835 | ||
836 | data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE); | |
1da177e4 LT |
837 | if ((data & ADVERTISE_10FULL) || |
838 | (data & ADVERTISE_100FULL)) | |
839 | full_duplex = 1; | |
840 | else | |
841 | full_duplex = 0; | |
842 | } | |
843 | ||
844 | static void | |
845 | tdk_check_duplex(struct net_device* dev) | |
846 | { | |
847 | unsigned long data; | |
bafef0ae JN |
848 | struct net_local *np = netdev_priv(dev); |
849 | ||
850 | data = e100_get_mdio_reg(dev, np->mii_if.phy_id, | |
851 | MDIO_TDK_DIAGNOSTIC_REG); | |
1da177e4 LT |
852 | full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0; |
853 | } | |
854 | ||
855 | static void | |
856 | broadcom_check_duplex(struct net_device* dev) | |
857 | { | |
858 | unsigned long data; | |
bafef0ae JN |
859 | struct net_local *np = netdev_priv(dev); |
860 | ||
861 | data = e100_get_mdio_reg(dev, np->mii_if.phy_id, | |
862 | MDIO_AUX_CTRL_STATUS_REG); | |
1da177e4 LT |
863 | full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0; |
864 | } | |
865 | ||
866 | static void | |
867 | intel_check_duplex(struct net_device* dev) | |
868 | { | |
869 | unsigned long data; | |
bafef0ae JN |
870 | struct net_local *np = netdev_priv(dev); |
871 | ||
872 | data = e100_get_mdio_reg(dev, np->mii_if.phy_id, | |
873 | MDIO_INT_STATUS_REG_2); | |
1da177e4 LT |
874 | full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0; |
875 | } | |
bafef0ae | 876 | #endif |
1da177e4 LT |
877 | static void |
878 | e100_set_duplex(struct net_device* dev, enum duplex new_duplex) | |
879 | { | |
bafef0ae JN |
880 | struct net_local *np = netdev_priv(dev); |
881 | ||
882 | spin_lock(&np->transceiver_lock); | |
1da177e4 LT |
883 | if (new_duplex != current_duplex) { |
884 | current_duplex = new_duplex; | |
885 | e100_negotiate(dev); | |
886 | } | |
bafef0ae | 887 | spin_unlock(&np->transceiver_lock); |
1da177e4 LT |
888 | } |
889 | ||
890 | static int | |
891 | e100_probe_transceiver(struct net_device* dev) | |
892 | { | |
633edf5a AM |
893 | int ret = 0; |
894 | ||
bafef0ae | 895 | #if !defined(CONFIG_ETRAX_NO_PHY) |
1da177e4 LT |
896 | unsigned int phyid_high; |
897 | unsigned int phyid_low; | |
898 | unsigned int oui; | |
899 | struct transceiver_ops* ops = NULL; | |
bafef0ae JN |
900 | struct net_local *np = netdev_priv(dev); |
901 | ||
902 | spin_lock(&np->transceiver_lock); | |
1da177e4 LT |
903 | |
904 | /* Probe MDIO physical address */ | |
bafef0ae JN |
905 | for (np->mii_if.phy_id = 0; np->mii_if.phy_id <= 31; |
906 | np->mii_if.phy_id++) { | |
907 | if (e100_get_mdio_reg(dev, | |
908 | np->mii_if.phy_id, MII_BMSR) != 0xffff) | |
1da177e4 LT |
909 | break; |
910 | } | |
633edf5a AM |
911 | if (np->mii_if.phy_id == 32) { |
912 | ret = -ENODEV; | |
913 | goto out; | |
914 | } | |
1da177e4 LT |
915 | |
916 | /* Get manufacturer */ | |
bafef0ae JN |
917 | phyid_high = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID1); |
918 | phyid_low = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID2); | |
1da177e4 LT |
919 | oui = (phyid_high << 6) | (phyid_low >> 10); |
920 | ||
921 | for (ops = &transceivers[0]; ops->oui; ops++) { | |
922 | if (ops->oui == oui) | |
923 | break; | |
924 | } | |
925 | transceiver = ops; | |
633edf5a | 926 | out: |
bafef0ae JN |
927 | spin_unlock(&np->transceiver_lock); |
928 | #endif | |
633edf5a | 929 | return ret; |
1da177e4 LT |
930 | } |
931 | ||
932 | static int | |
933 | e100_get_mdio_reg(struct net_device *dev, int phy_id, int location) | |
934 | { | |
935 | unsigned short cmd; /* Data to be sent on MDIO port */ | |
936 | int data; /* Data read from MDIO */ | |
937 | int bitCounter; | |
938 | ||
939 | /* Start of frame, OP Code, Physical Address, Register Address */ | |
940 | cmd = (MDIO_START << 14) | (MDIO_READ << 12) | (phy_id << 7) | | |
941 | (location << 2); | |
942 | ||
943 | e100_send_mdio_cmd(cmd, 0); | |
944 | ||
945 | data = 0; | |
946 | ||
947 | /* Data... */ | |
948 | for (bitCounter=15; bitCounter>=0 ; bitCounter--) { | |
949 | data |= (e100_receive_mdio_bit() << bitCounter); | |
950 | } | |
951 | ||
952 | return data; | |
953 | } | |
954 | ||
955 | static void | |
956 | e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value) | |
957 | { | |
958 | int bitCounter; | |
959 | unsigned short cmd; | |
960 | ||
961 | cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (phy_id << 7) | | |
962 | (location << 2); | |
963 | ||
964 | e100_send_mdio_cmd(cmd, 1); | |
965 | ||
966 | /* Data... */ | |
967 | for (bitCounter=15; bitCounter>=0 ; bitCounter--) { | |
968 | e100_send_mdio_bit(GET_BIT(bitCounter, value)); | |
969 | } | |
970 | ||
971 | } | |
972 | ||
973 | static void | |
974 | e100_send_mdio_cmd(unsigned short cmd, int write_cmd) | |
975 | { | |
976 | int bitCounter; | |
977 | unsigned char data = 0x2; | |
978 | ||
979 | /* Preamble */ | |
980 | for (bitCounter = 31; bitCounter>= 0; bitCounter--) | |
981 | e100_send_mdio_bit(GET_BIT(bitCounter, MDIO_PREAMBLE)); | |
982 | ||
983 | for (bitCounter = 15; bitCounter >= 2; bitCounter--) | |
984 | e100_send_mdio_bit(GET_BIT(bitCounter, cmd)); | |
985 | ||
986 | /* Turnaround */ | |
987 | for (bitCounter = 1; bitCounter >= 0 ; bitCounter--) | |
988 | if (write_cmd) | |
989 | e100_send_mdio_bit(GET_BIT(bitCounter, data)); | |
990 | else | |
991 | e100_receive_mdio_bit(); | |
992 | } | |
993 | ||
994 | static void | |
995 | e100_send_mdio_bit(unsigned char bit) | |
996 | { | |
997 | *R_NETWORK_MGM_CTRL = | |
998 | IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) | | |
999 | IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit); | |
1000 | udelay(1); | |
1001 | *R_NETWORK_MGM_CTRL = | |
1002 | IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) | | |
1003 | IO_MASK(R_NETWORK_MGM_CTRL, mdck) | | |
1004 | IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit); | |
1005 | udelay(1); | |
1006 | } | |
1007 | ||
1008 | static unsigned char | |
a55b138b | 1009 | e100_receive_mdio_bit(void) |
1da177e4 LT |
1010 | { |
1011 | unsigned char bit; | |
1012 | *R_NETWORK_MGM_CTRL = 0; | |
1013 | bit = IO_EXTRACT(R_NETWORK_STAT, mdio, *R_NETWORK_STAT); | |
1014 | udelay(1); | |
1015 | *R_NETWORK_MGM_CTRL = IO_MASK(R_NETWORK_MGM_CTRL, mdck); | |
1016 | udelay(1); | |
1017 | return bit; | |
1018 | } | |
1019 | ||
1020 | static void | |
1021 | e100_reset_transceiver(struct net_device* dev) | |
1022 | { | |
bafef0ae | 1023 | struct net_local *np = netdev_priv(dev); |
1da177e4 LT |
1024 | unsigned short cmd; |
1025 | unsigned short data; | |
1026 | int bitCounter; | |
1027 | ||
bafef0ae | 1028 | data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR); |
1da177e4 | 1029 | |
bafef0ae | 1030 | cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (np->mii_if.phy_id << 7) | (MII_BMCR << 2); |
1da177e4 LT |
1031 | |
1032 | e100_send_mdio_cmd(cmd, 1); | |
1033 | ||
1034 | data |= 0x8000; | |
1035 | ||
1036 | for (bitCounter = 15; bitCounter >= 0 ; bitCounter--) { | |
1037 | e100_send_mdio_bit(GET_BIT(bitCounter, data)); | |
1038 | } | |
1039 | } | |
1040 | ||
1041 | /* Called by upper layers if they decide it took too long to complete | |
1042 | * sending a packet - we need to reset and stuff. | |
1043 | */ | |
1044 | ||
1045 | static void | |
1046 | e100_tx_timeout(struct net_device *dev) | |
1047 | { | |
bafef0ae | 1048 | struct net_local *np = netdev_priv(dev); |
1da177e4 LT |
1049 | unsigned long flags; |
1050 | ||
1051 | spin_lock_irqsave(&np->lock, flags); | |
1052 | ||
1053 | printk(KERN_WARNING "%s: transmit timed out, %s?\n", dev->name, | |
1054 | tx_done(dev) ? "IRQ problem" : "network cable problem"); | |
1055 | ||
1056 | /* remember we got an error */ | |
1057 | ||
40fe7d88 | 1058 | dev->stats.tx_errors++; |
1da177e4 LT |
1059 | |
1060 | /* reset the TX DMA in case it has hung on something */ | |
1061 | ||
1062 | RESET_DMA(NETWORK_TX_DMA_NBR); | |
1063 | WAIT_DMA(NETWORK_TX_DMA_NBR); | |
1064 | ||
1065 | /* Reset the transceiver. */ | |
1066 | ||
1067 | e100_reset_transceiver(dev); | |
1068 | ||
1069 | /* and get rid of the packets that never got an interrupt */ | |
bafef0ae | 1070 | while (myFirstTxDesc != myNextTxDesc) { |
1da177e4 LT |
1071 | dev_kfree_skb(myFirstTxDesc->skb); |
1072 | myFirstTxDesc->skb = 0; | |
1073 | myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next); | |
1074 | } | |
1075 | ||
1076 | /* Set up transmit DMA channel so it can be restarted later */ | |
1077 | *R_DMA_CH0_FIRST = 0; | |
1078 | *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc); | |
1079 | ||
1080 | /* tell the upper layers we're ok again */ | |
1081 | ||
1082 | netif_wake_queue(dev); | |
1083 | spin_unlock_irqrestore(&np->lock, flags); | |
1084 | } | |
1085 | ||
1086 | ||
1087 | /* This will only be invoked if the driver is _not_ in XOFF state. | |
1088 | * What this means is that we need not check it, and that this | |
1089 | * invariant will hold if we make sure that the netif_*_queue() | |
1090 | * calls are done at the proper times. | |
1091 | */ | |
1092 | ||
1093 | static int | |
1094 | e100_send_packet(struct sk_buff *skb, struct net_device *dev) | |
1095 | { | |
bafef0ae | 1096 | struct net_local *np = netdev_priv(dev); |
1da177e4 LT |
1097 | unsigned char *buf = skb->data; |
1098 | unsigned long flags; | |
1099 | ||
1100 | #ifdef ETHDEBUG | |
1101 | printk("send packet len %d\n", length); | |
1102 | #endif | |
1103 | spin_lock_irqsave(&np->lock, flags); /* protect from tx_interrupt and ourself */ | |
1104 | ||
1105 | myNextTxDesc->skb = skb; | |
1106 | ||
860e9538 | 1107 | netif_trans_update(dev); /* NETIF_F_LLTX driver :( */ |
1da177e4 | 1108 | |
bafef0ae | 1109 | e100_hardware_send_packet(np, buf, skb->len); |
1da177e4 LT |
1110 | |
1111 | myNextTxDesc = phys_to_virt(myNextTxDesc->descr.next); | |
1112 | ||
1113 | /* Stop queue if full */ | |
1114 | if (myNextTxDesc == myFirstTxDesc) { | |
1115 | netif_stop_queue(dev); | |
1116 | } | |
1117 | ||
1118 | spin_unlock_irqrestore(&np->lock, flags); | |
1119 | ||
6ed10654 | 1120 | return NETDEV_TX_OK; |
1da177e4 LT |
1121 | } |
1122 | ||
1123 | /* | |
1124 | * The typical workload of the driver: | |
1125 | * Handle the network interface interrupts. | |
1126 | */ | |
1127 | ||
1128 | static irqreturn_t | |
7d12e780 | 1129 | e100rxtx_interrupt(int irq, void *dev_id) |
1da177e4 LT |
1130 | { |
1131 | struct net_device *dev = (struct net_device *)dev_id; | |
bafef0ae | 1132 | unsigned long irqbits; |
1da177e4 | 1133 | |
bafef0ae JN |
1134 | /* |
1135 | * Note that both rx and tx interrupts are blocked at this point, | |
1136 | * regardless of which got us here. | |
1137 | */ | |
1138 | ||
1139 | irqbits = *R_IRQ_MASK2_RD; | |
1da177e4 LT |
1140 | |
1141 | /* Handle received packets */ | |
1142 | if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma1_eop, active)) { | |
1143 | /* acknowledge the eop interrupt */ | |
1144 | ||
1145 | *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do); | |
1146 | ||
1147 | /* check if one or more complete packets were indeed received */ | |
1148 | ||
1149 | while ((*R_DMA_CH1_FIRST != virt_to_phys(myNextRxDesc)) && | |
1150 | (myNextRxDesc != myLastRxDesc)) { | |
1151 | /* Take out the buffer and give it to the OS, then | |
1152 | * allocate a new buffer to put a packet in. | |
1153 | */ | |
1154 | e100_rx(dev); | |
40fe7d88 | 1155 | dev->stats.rx_packets++; |
1da177e4 LT |
1156 | /* restart/continue on the channel, for safety */ |
1157 | *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, restart); | |
1158 | /* clear dma channel 1 eop/descr irq bits */ | |
1159 | *R_DMA_CH1_CLR_INTR = | |
1160 | IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do) | | |
1161 | IO_STATE(R_DMA_CH1_CLR_INTR, clr_descr, do); | |
1162 | ||
1163 | /* now, we might have gotten another packet | |
1164 | so we have to loop back and check if so */ | |
1165 | } | |
1166 | } | |
1167 | ||
1168 | /* Report any packets that have been sent */ | |
bafef0ae JN |
1169 | while (virt_to_phys(myFirstTxDesc) != *R_DMA_CH0_FIRST && |
1170 | (netif_queue_stopped(dev) || myFirstTxDesc != myNextTxDesc)) { | |
40fe7d88 TK |
1171 | dev->stats.tx_bytes += myFirstTxDesc->skb->len; |
1172 | dev->stats.tx_packets++; | |
1da177e4 LT |
1173 | |
1174 | /* dma is ready with the transmission of the data in tx_skb, so now | |
1175 | we can release the skb memory */ | |
1176 | dev_kfree_skb_irq(myFirstTxDesc->skb); | |
1177 | myFirstTxDesc->skb = 0; | |
1178 | myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next); | |
bafef0ae JN |
1179 | /* Wake up queue. */ |
1180 | netif_wake_queue(dev); | |
1da177e4 LT |
1181 | } |
1182 | ||
1183 | if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma0_eop, active)) { | |
bafef0ae | 1184 | /* acknowledge the eop interrupt. */ |
1da177e4 | 1185 | *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do); |
1da177e4 LT |
1186 | } |
1187 | ||
1da177e4 LT |
1188 | return IRQ_HANDLED; |
1189 | } | |
1190 | ||
1191 | static irqreturn_t | |
7d12e780 | 1192 | e100nw_interrupt(int irq, void *dev_id) |
1da177e4 LT |
1193 | { |
1194 | struct net_device *dev = (struct net_device *)dev_id; | |
1da177e4 LT |
1195 | unsigned long irqbits = *R_IRQ_MASK0_RD; |
1196 | ||
1197 | /* check for underrun irq */ | |
1198 | if (irqbits & IO_STATE(R_IRQ_MASK0_RD, underrun, active)) { | |
1199 | SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr); | |
1200 | *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow; | |
1201 | SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop); | |
40fe7d88 | 1202 | dev->stats.tx_errors++; |
1da177e4 LT |
1203 | D(printk("ethernet receiver underrun!\n")); |
1204 | } | |
1205 | ||
1206 | /* check for overrun irq */ | |
1207 | if (irqbits & IO_STATE(R_IRQ_MASK0_RD, overrun, active)) { | |
40fe7d88 | 1208 | update_rx_stats(&dev->stats); /* this will ack the irq */ |
1da177e4 LT |
1209 | D(printk("ethernet receiver overrun!\n")); |
1210 | } | |
1211 | /* check for excessive collision irq */ | |
1212 | if (irqbits & IO_STATE(R_IRQ_MASK0_RD, excessive_col, active)) { | |
1213 | SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr); | |
1214 | *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow; | |
1215 | SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop); | |
40fe7d88 | 1216 | dev->stats.tx_errors++; |
1da177e4 LT |
1217 | D(printk("ethernet excessive collisions!\n")); |
1218 | } | |
1219 | return IRQ_HANDLED; | |
1220 | } | |
1221 | ||
1222 | /* We have a good packet(s), get it/them out of the buffers. */ | |
1223 | static void | |
1224 | e100_rx(struct net_device *dev) | |
1225 | { | |
1226 | struct sk_buff *skb; | |
1227 | int length = 0; | |
bafef0ae | 1228 | struct net_local *np = netdev_priv(dev); |
1da177e4 LT |
1229 | unsigned char *skb_data_ptr; |
1230 | #ifdef ETHDEBUG | |
1231 | int i; | |
1232 | #endif | |
bafef0ae JN |
1233 | etrax_eth_descr *prevRxDesc; /* The descriptor right before myNextRxDesc */ |
1234 | spin_lock(&np->led_lock); | |
1da177e4 LT |
1235 | if (!led_active && time_after(jiffies, led_next_time)) { |
1236 | /* light the network leds depending on the current speed. */ | |
1237 | e100_set_network_leds(NETWORK_ACTIVITY); | |
1238 | ||
1239 | /* Set the earliest time we may clear the LED */ | |
1240 | led_next_time = jiffies + NET_FLASH_TIME; | |
1241 | led_active = 1; | |
1242 | mod_timer(&clear_led_timer, jiffies + HZ/10); | |
1243 | } | |
bafef0ae | 1244 | spin_unlock(&np->led_lock); |
1da177e4 LT |
1245 | |
1246 | length = myNextRxDesc->descr.hw_len - 4; | |
40fe7d88 | 1247 | dev->stats.rx_bytes += length; |
1da177e4 LT |
1248 | |
1249 | #ifdef ETHDEBUG | |
1250 | printk("Got a packet of length %d:\n", length); | |
1251 | /* dump the first bytes in the packet */ | |
1252 | skb_data_ptr = (unsigned char *)phys_to_virt(myNextRxDesc->descr.buf); | |
1253 | for (i = 0; i < 8; i++) { | |
1254 | printk("%d: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", i * 8, | |
1255 | skb_data_ptr[0],skb_data_ptr[1],skb_data_ptr[2],skb_data_ptr[3], | |
1256 | skb_data_ptr[4],skb_data_ptr[5],skb_data_ptr[6],skb_data_ptr[7]); | |
1257 | skb_data_ptr += 8; | |
1258 | } | |
1259 | #endif | |
1260 | ||
1261 | if (length < RX_COPYBREAK) { | |
1262 | /* Small packet, copy data */ | |
1263 | skb = dev_alloc_skb(length - ETHER_HEAD_LEN); | |
1264 | if (!skb) { | |
40fe7d88 | 1265 | dev->stats.rx_errors++; |
1da177e4 | 1266 | printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name); |
bafef0ae | 1267 | goto update_nextrxdesc; |
1da177e4 LT |
1268 | } |
1269 | ||
1270 | skb_put(skb, length - ETHER_HEAD_LEN); /* allocate room for the packet body */ | |
1271 | skb_data_ptr = skb_push(skb, ETHER_HEAD_LEN); /* allocate room for the header */ | |
1272 | ||
1273 | #ifdef ETHDEBUG | |
1274 | printk("head = 0x%x, data = 0x%x, tail = 0x%x, end = 0x%x\n", | |
4305b541 ACM |
1275 | skb->head, skb->data, skb_tail_pointer(skb), |
1276 | skb_end_pointer(skb)); | |
1da177e4 LT |
1277 | printk("copying packet to 0x%x.\n", skb_data_ptr); |
1278 | #endif | |
1279 | ||
1280 | memcpy(skb_data_ptr, phys_to_virt(myNextRxDesc->descr.buf), length); | |
1281 | } | |
1282 | else { | |
1283 | /* Large packet, send directly to upper layers and allocate new | |
1284 | * memory (aligned to cache line boundary to avoid bug). | |
bafef0ae JN |
1285 | * Before sending the skb to upper layers we must make sure |
1286 | * that skb->data points to the aligned start of the packet. | |
1da177e4 LT |
1287 | */ |
1288 | int align; | |
1289 | struct sk_buff *new_skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES); | |
1290 | if (!new_skb) { | |
40fe7d88 | 1291 | dev->stats.rx_errors++; |
1da177e4 | 1292 | printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name); |
bafef0ae | 1293 | goto update_nextrxdesc; |
1da177e4 LT |
1294 | } |
1295 | skb = myNextRxDesc->skb; | |
1296 | align = (int)phys_to_virt(myNextRxDesc->descr.buf) - (int)skb->data; | |
1297 | skb_put(skb, length + align); | |
1298 | skb_pull(skb, align); /* Remove alignment bytes */ | |
1299 | myNextRxDesc->skb = new_skb; | |
1300 | myNextRxDesc->descr.buf = L1_CACHE_ALIGN(virt_to_phys(myNextRxDesc->skb->data)); | |
1301 | } | |
1302 | ||
1da177e4 LT |
1303 | skb->protocol = eth_type_trans(skb, dev); |
1304 | ||
1305 | /* Send the packet to the upper layers */ | |
1306 | netif_rx(skb); | |
1307 | ||
bafef0ae | 1308 | update_nextrxdesc: |
1da177e4 LT |
1309 | /* Prepare for next packet */ |
1310 | myNextRxDesc->descr.status = 0; | |
bafef0ae | 1311 | prevRxDesc = myNextRxDesc; |
1da177e4 LT |
1312 | myNextRxDesc = phys_to_virt(myNextRxDesc->descr.next); |
1313 | ||
1314 | rx_queue_len++; | |
1315 | ||
1316 | /* Check if descriptors should be returned */ | |
1317 | if (rx_queue_len == RX_QUEUE_THRESHOLD) { | |
1318 | flush_etrax_cache(); | |
bafef0ae | 1319 | prevRxDesc->descr.ctrl |= d_eol; |
1da177e4 | 1320 | myLastRxDesc->descr.ctrl &= ~d_eol; |
bafef0ae | 1321 | myLastRxDesc = prevRxDesc; |
1da177e4 LT |
1322 | rx_queue_len = 0; |
1323 | } | |
1324 | } | |
1325 | ||
1326 | /* The inverse routine to net_open(). */ | |
1327 | static int | |
1328 | e100_close(struct net_device *dev) | |
1329 | { | |
1da177e4 LT |
1330 | printk(KERN_INFO "Closing %s.\n", dev->name); |
1331 | ||
1332 | netif_stop_queue(dev); | |
1333 | ||
1334 | *R_IRQ_MASK0_CLR = | |
1335 | IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) | | |
1336 | IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) | | |
1337 | IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr); | |
1338 | ||
1339 | *R_IRQ_MASK2_CLR = | |
1340 | IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) | | |
1341 | IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) | | |
1342 | IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) | | |
1343 | IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr); | |
1344 | ||
1345 | /* Stop the receiver and the transmitter */ | |
1346 | ||
1347 | RESET_DMA(NETWORK_TX_DMA_NBR); | |
1348 | RESET_DMA(NETWORK_RX_DMA_NBR); | |
1349 | ||
1350 | /* Flush the Tx and disable Rx here. */ | |
1351 | ||
1352 | free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev); | |
1353 | free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev); | |
1354 | free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev); | |
1355 | ||
bafef0ae JN |
1356 | cris_free_dma(NETWORK_TX_DMA_NBR, cardname); |
1357 | cris_free_dma(NETWORK_RX_DMA_NBR, cardname); | |
1358 | ||
1da177e4 LT |
1359 | /* Update the statistics here. */ |
1360 | ||
40fe7d88 TK |
1361 | update_rx_stats(&dev->stats); |
1362 | update_tx_stats(&dev->stats); | |
1da177e4 LT |
1363 | |
1364 | /* Stop speed/duplex timers */ | |
1365 | del_timer(&speed_timer); | |
1366 | del_timer(&duplex_timer); | |
1367 | ||
1368 | return 0; | |
1369 | } | |
1370 | ||
1371 | static int | |
1372 | e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |
1373 | { | |
1374 | struct mii_ioctl_data *data = if_mii(ifr); | |
1375 | struct net_local *np = netdev_priv(dev); | |
bafef0ae JN |
1376 | int rc = 0; |
1377 | int old_autoneg; | |
1da177e4 LT |
1378 | |
1379 | spin_lock(&np->lock); /* Preempt protection */ | |
1380 | switch (cmd) { | |
1da177e4 | 1381 | /* The ioctls below should be considered obsolete but are */ |
25985edc | 1382 | /* still present for compatibility with old scripts/apps */ |
1da177e4 LT |
1383 | case SET_ETH_SPEED_10: /* 10 Mbps */ |
1384 | e100_set_speed(dev, 10); | |
1385 | break; | |
1386 | case SET_ETH_SPEED_100: /* 100 Mbps */ | |
1387 | e100_set_speed(dev, 100); | |
1388 | break; | |
bafef0ae | 1389 | case SET_ETH_SPEED_AUTO: /* Auto-negotiate speed */ |
1da177e4 LT |
1390 | e100_set_speed(dev, 0); |
1391 | break; | |
bafef0ae | 1392 | case SET_ETH_DUPLEX_HALF: /* Half duplex */ |
1da177e4 LT |
1393 | e100_set_duplex(dev, half); |
1394 | break; | |
bafef0ae | 1395 | case SET_ETH_DUPLEX_FULL: /* Full duplex */ |
1da177e4 LT |
1396 | e100_set_duplex(dev, full); |
1397 | break; | |
bafef0ae | 1398 | case SET_ETH_DUPLEX_AUTO: /* Auto-negotiate duplex */ |
1da177e4 LT |
1399 | e100_set_duplex(dev, autoneg); |
1400 | break; | |
bafef0ae JN |
1401 | case SET_ETH_AUTONEG: |
1402 | old_autoneg = autoneg_normal; | |
1403 | autoneg_normal = *(int*)data; | |
1404 | if (autoneg_normal != old_autoneg) | |
1405 | e100_negotiate(dev); | |
1406 | break; | |
1da177e4 | 1407 | default: |
bafef0ae JN |
1408 | rc = generic_mii_ioctl(&np->mii_if, if_mii(ifr), |
1409 | cmd, NULL); | |
1410 | break; | |
1da177e4 LT |
1411 | } |
1412 | spin_unlock(&np->lock); | |
bafef0ae | 1413 | return rc; |
1da177e4 LT |
1414 | } |
1415 | ||
bb370568 PR |
1416 | static int e100_get_link_ksettings(struct net_device *dev, |
1417 | struct ethtool_link_ksettings *cmd) | |
1da177e4 | 1418 | { |
bafef0ae | 1419 | struct net_local *np = netdev_priv(dev); |
bb370568 | 1420 | u32 supported; |
76f2b4d9 | 1421 | |
bafef0ae | 1422 | spin_lock_irq(&np->lock); |
82c01a84 | 1423 | mii_ethtool_get_link_ksettings(&np->mii_if, cmd); |
bafef0ae | 1424 | spin_unlock_irq(&np->lock); |
76f2b4d9 | 1425 | |
bafef0ae | 1426 | /* The PHY may support 1000baseT, but the Etrax100 does not. */ |
bb370568 PR |
1427 | ethtool_convert_link_mode_to_legacy_u32(&supported, |
1428 | cmd->link_modes.supported); | |
1429 | ||
1430 | supported &= ~(SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full); | |
1431 | ||
1432 | ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, | |
1433 | supported); | |
1434 | ||
82c01a84 | 1435 | return 0; |
76f2b4d9 CH |
1436 | } |
1437 | ||
bb370568 PR |
1438 | static int e100_set_link_ksettings(struct net_device *dev, |
1439 | const struct ethtool_link_ksettings *ecmd) | |
76f2b4d9 | 1440 | { |
bb370568 | 1441 | if (ecmd->base.autoneg == AUTONEG_ENABLE) { |
76f2b4d9 CH |
1442 | e100_set_duplex(dev, autoneg); |
1443 | e100_set_speed(dev, 0); | |
1444 | } else { | |
bb370568 PR |
1445 | e100_set_duplex(dev, ecmd->base.duplex == DUPLEX_HALF ? |
1446 | half : full); | |
1447 | e100_set_speed(dev, ecmd->base.speed == SPEED_10 ? 10 : 100); | |
1da177e4 | 1448 | } |
76f2b4d9 CH |
1449 | |
1450 | return 0; | |
1451 | } | |
1452 | ||
1453 | static void e100_get_drvinfo(struct net_device *dev, | |
1454 | struct ethtool_drvinfo *info) | |
1455 | { | |
7826d43f JP |
1456 | strlcpy(info->driver, "ETRAX 100LX", sizeof(info->driver)); |
1457 | strlcpy(info->version, "$Revision: 1.31 $", sizeof(info->version)); | |
1458 | strlcpy(info->fw_version, "N/A", sizeof(info->fw_version)); | |
1459 | strlcpy(info->bus_info, "N/A", sizeof(info->bus_info)); | |
76f2b4d9 CH |
1460 | } |
1461 | ||
1462 | static int e100_nway_reset(struct net_device *dev) | |
1463 | { | |
1464 | if (current_duplex == autoneg && current_speed_selection == 0) | |
1465 | e100_negotiate(dev); | |
1da177e4 LT |
1466 | return 0; |
1467 | } | |
1468 | ||
7282d491 | 1469 | static const struct ethtool_ops e100_ethtool_ops = { |
76f2b4d9 CH |
1470 | .get_drvinfo = e100_get_drvinfo, |
1471 | .nway_reset = e100_nway_reset, | |
1472 | .get_link = ethtool_op_get_link, | |
bb370568 PR |
1473 | .get_link_ksettings = e100_get_link_ksettings, |
1474 | .set_link_ksettings = e100_set_link_ksettings, | |
76f2b4d9 CH |
1475 | }; |
1476 | ||
1da177e4 LT |
1477 | static int |
1478 | e100_set_config(struct net_device *dev, struct ifmap *map) | |
1479 | { | |
bafef0ae JN |
1480 | struct net_local *np = netdev_priv(dev); |
1481 | ||
1da177e4 LT |
1482 | spin_lock(&np->lock); /* Preempt protection */ |
1483 | ||
1484 | switch(map->port) { | |
1485 | case IF_PORT_UNKNOWN: | |
1486 | /* Use autoneg */ | |
1487 | e100_set_speed(dev, 0); | |
1488 | e100_set_duplex(dev, autoneg); | |
1489 | break; | |
1490 | case IF_PORT_10BASET: | |
1491 | e100_set_speed(dev, 10); | |
1492 | e100_set_duplex(dev, autoneg); | |
1493 | break; | |
1494 | case IF_PORT_100BASET: | |
1495 | case IF_PORT_100BASETX: | |
1496 | e100_set_speed(dev, 100); | |
1497 | e100_set_duplex(dev, autoneg); | |
1498 | break; | |
1499 | case IF_PORT_100BASEFX: | |
1500 | case IF_PORT_10BASE2: | |
1501 | case IF_PORT_AUI: | |
1502 | spin_unlock(&np->lock); | |
1503 | return -EOPNOTSUPP; | |
1da177e4 LT |
1504 | default: |
1505 | printk(KERN_ERR "%s: Invalid media selected", dev->name); | |
1506 | spin_unlock(&np->lock); | |
1507 | return -EINVAL; | |
1508 | } | |
1509 | spin_unlock(&np->lock); | |
1510 | return 0; | |
1511 | } | |
1512 | ||
1513 | static void | |
1514 | update_rx_stats(struct net_device_stats *es) | |
1515 | { | |
1516 | unsigned long r = *R_REC_COUNTERS; | |
1517 | /* update stats relevant to reception errors */ | |
1518 | es->rx_fifo_errors += IO_EXTRACT(R_REC_COUNTERS, congestion, r); | |
1519 | es->rx_crc_errors += IO_EXTRACT(R_REC_COUNTERS, crc_error, r); | |
1520 | es->rx_frame_errors += IO_EXTRACT(R_REC_COUNTERS, alignment_error, r); | |
1521 | es->rx_length_errors += IO_EXTRACT(R_REC_COUNTERS, oversize, r); | |
1522 | } | |
1523 | ||
1524 | static void | |
1525 | update_tx_stats(struct net_device_stats *es) | |
1526 | { | |
1527 | unsigned long r = *R_TR_COUNTERS; | |
1528 | /* update stats relevant to transmission errors */ | |
1529 | es->collisions += | |
1530 | IO_EXTRACT(R_TR_COUNTERS, single_col, r) + | |
1531 | IO_EXTRACT(R_TR_COUNTERS, multiple_col, r); | |
1da177e4 LT |
1532 | } |
1533 | ||
1534 | /* | |
1535 | * Get the current statistics. | |
1536 | * This may be called with the card open or closed. | |
1537 | */ | |
1538 | static struct net_device_stats * | |
1539 | e100_get_stats(struct net_device *dev) | |
1540 | { | |
bafef0ae | 1541 | struct net_local *lp = netdev_priv(dev); |
1da177e4 | 1542 | unsigned long flags; |
bafef0ae | 1543 | |
1da177e4 LT |
1544 | spin_lock_irqsave(&lp->lock, flags); |
1545 | ||
40fe7d88 TK |
1546 | update_rx_stats(&dev->stats); |
1547 | update_tx_stats(&dev->stats); | |
1da177e4 LT |
1548 | |
1549 | spin_unlock_irqrestore(&lp->lock, flags); | |
40fe7d88 | 1550 | return &dev->stats; |
1da177e4 LT |
1551 | } |
1552 | ||
1553 | /* | |
1554 | * Set or clear the multicast filter for this adaptor. | |
1555 | * num_addrs == -1 Promiscuous mode, receive all packets | |
1556 | * num_addrs == 0 Normal mode, clear multicast list | |
1557 | * num_addrs > 0 Multicast mode, receive normal and MC packets, | |
1558 | * and do best-effort filtering. | |
1559 | */ | |
1560 | static void | |
1561 | set_multicast_list(struct net_device *dev) | |
1562 | { | |
bafef0ae | 1563 | struct net_local *lp = netdev_priv(dev); |
4cd24eaf | 1564 | int num_addr = netdev_mc_count(dev); |
1da177e4 LT |
1565 | unsigned long int lo_bits; |
1566 | unsigned long int hi_bits; | |
bafef0ae | 1567 | |
1da177e4 | 1568 | spin_lock(&lp->lock); |
bafef0ae | 1569 | if (dev->flags & IFF_PROMISC) { |
1da177e4 LT |
1570 | /* promiscuous mode */ |
1571 | lo_bits = 0xfffffffful; | |
1572 | hi_bits = 0xfffffffful; | |
1573 | ||
1574 | /* Enable individual receive */ | |
1575 | SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, receive); | |
1576 | *R_NETWORK_REC_CONFIG = network_rec_config_shadow; | |
1577 | } else if (dev->flags & IFF_ALLMULTI) { | |
1578 | /* enable all multicasts */ | |
1579 | lo_bits = 0xfffffffful; | |
1580 | hi_bits = 0xfffffffful; | |
1581 | ||
1582 | /* Disable individual receive */ | |
1583 | SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard); | |
1584 | *R_NETWORK_REC_CONFIG = network_rec_config_shadow; | |
1585 | } else if (num_addr == 0) { | |
1586 | /* Normal, clear the mc list */ | |
1587 | lo_bits = 0x00000000ul; | |
1588 | hi_bits = 0x00000000ul; | |
1589 | ||
1590 | /* Disable individual receive */ | |
1591 | SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard); | |
1592 | *R_NETWORK_REC_CONFIG = network_rec_config_shadow; | |
1593 | } else { | |
1594 | /* MC mode, receive normal and MC packets */ | |
1595 | char hash_ix; | |
22bedad3 | 1596 | struct netdev_hw_addr *ha; |
1da177e4 | 1597 | char *baddr; |
bafef0ae | 1598 | |
1da177e4 LT |
1599 | lo_bits = 0x00000000ul; |
1600 | hi_bits = 0x00000000ul; | |
22bedad3 | 1601 | netdev_for_each_mc_addr(ha, dev) { |
1da177e4 LT |
1602 | /* Calculate the hash index for the GA registers */ |
1603 | ||
1604 | hash_ix = 0; | |
22bedad3 | 1605 | baddr = ha->addr; |
1da177e4 LT |
1606 | hash_ix ^= (*baddr) & 0x3f; |
1607 | hash_ix ^= ((*baddr) >> 6) & 0x03; | |
1608 | ++baddr; | |
1609 | hash_ix ^= ((*baddr) << 2) & 0x03c; | |
1610 | hash_ix ^= ((*baddr) >> 4) & 0xf; | |
1611 | ++baddr; | |
1612 | hash_ix ^= ((*baddr) << 4) & 0x30; | |
1613 | hash_ix ^= ((*baddr) >> 2) & 0x3f; | |
1614 | ++baddr; | |
1615 | hash_ix ^= (*baddr) & 0x3f; | |
1616 | hash_ix ^= ((*baddr) >> 6) & 0x03; | |
1617 | ++baddr; | |
1618 | hash_ix ^= ((*baddr) << 2) & 0x03c; | |
1619 | hash_ix ^= ((*baddr) >> 4) & 0xf; | |
1620 | ++baddr; | |
1621 | hash_ix ^= ((*baddr) << 4) & 0x30; | |
1622 | hash_ix ^= ((*baddr) >> 2) & 0x3f; | |
1623 | ||
1624 | hash_ix &= 0x3f; | |
1625 | ||
1626 | if (hash_ix >= 32) { | |
1627 | hi_bits |= (1 << (hash_ix-32)); | |
bafef0ae | 1628 | } else { |
1da177e4 LT |
1629 | lo_bits |= (1 << hash_ix); |
1630 | } | |
1da177e4 LT |
1631 | } |
1632 | /* Disable individual receive */ | |
1633 | SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard); | |
1634 | *R_NETWORK_REC_CONFIG = network_rec_config_shadow; | |
1635 | } | |
1636 | *R_NETWORK_GA_0 = lo_bits; | |
1637 | *R_NETWORK_GA_1 = hi_bits; | |
1638 | spin_unlock(&lp->lock); | |
1639 | } | |
1640 | ||
1641 | void | |
bafef0ae | 1642 | e100_hardware_send_packet(struct net_local *np, char *buf, int length) |
1da177e4 LT |
1643 | { |
1644 | D(printk("e100 send pack, buf 0x%x len %d\n", buf, length)); | |
1645 | ||
bafef0ae | 1646 | spin_lock(&np->led_lock); |
1da177e4 LT |
1647 | if (!led_active && time_after(jiffies, led_next_time)) { |
1648 | /* light the network leds depending on the current speed. */ | |
1649 | e100_set_network_leds(NETWORK_ACTIVITY); | |
1650 | ||
1651 | /* Set the earliest time we may clear the LED */ | |
1652 | led_next_time = jiffies + NET_FLASH_TIME; | |
1653 | led_active = 1; | |
1654 | mod_timer(&clear_led_timer, jiffies + HZ/10); | |
1655 | } | |
bafef0ae | 1656 | spin_unlock(&np->led_lock); |
1da177e4 LT |
1657 | |
1658 | /* configure the tx dma descriptor */ | |
1659 | myNextTxDesc->descr.sw_len = length; | |
1660 | myNextTxDesc->descr.ctrl = d_eop | d_eol | d_wait; | |
1661 | myNextTxDesc->descr.buf = virt_to_phys(buf); | |
1662 | ||
1663 | /* Move end of list */ | |
1664 | myLastTxDesc->descr.ctrl &= ~d_eol; | |
1665 | myLastTxDesc = myNextTxDesc; | |
1666 | ||
1667 | /* Restart DMA channel */ | |
1668 | *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, restart); | |
1669 | } | |
1670 | ||
1671 | static void | |
1672 | e100_clear_network_leds(unsigned long dummy) | |
1673 | { | |
bafef0ae JN |
1674 | struct net_device *dev = (struct net_device *)dummy; |
1675 | struct net_local *np = netdev_priv(dev); | |
1676 | ||
1677 | spin_lock(&np->led_lock); | |
1678 | ||
1da177e4 LT |
1679 | if (led_active && time_after(jiffies, led_next_time)) { |
1680 | e100_set_network_leds(NO_NETWORK_ACTIVITY); | |
1681 | ||
1682 | /* Set the earliest time we may set the LED */ | |
1683 | led_next_time = jiffies + NET_FLASH_PAUSE; | |
1684 | led_active = 0; | |
1685 | } | |
bafef0ae JN |
1686 | |
1687 | spin_unlock(&np->led_lock); | |
1da177e4 LT |
1688 | } |
1689 | ||
1690 | static void | |
1691 | e100_set_network_leds(int active) | |
1692 | { | |
1693 | #if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK) | |
1694 | int light_leds = (active == NO_NETWORK_ACTIVITY); | |
1695 | #elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY) | |
1696 | int light_leds = (active == NETWORK_ACTIVITY); | |
1697 | #else | |
1698 | #error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY" | |
1699 | #endif | |
1700 | ||
1701 | if (!current_speed) { | |
1702 | /* Make LED red, link is down */ | |
5efa1d1c | 1703 | CRIS_LED_NETWORK_SET(CRIS_LED_OFF); |
bafef0ae | 1704 | } else if (light_leds) { |
1da177e4 | 1705 | if (current_speed == 10) { |
5efa1d1c | 1706 | CRIS_LED_NETWORK_SET(CRIS_LED_ORANGE); |
1da177e4 | 1707 | } else { |
5efa1d1c | 1708 | CRIS_LED_NETWORK_SET(CRIS_LED_GREEN); |
1da177e4 | 1709 | } |
bafef0ae | 1710 | } else { |
5efa1d1c | 1711 | CRIS_LED_NETWORK_SET(CRIS_LED_OFF); |
1da177e4 LT |
1712 | } |
1713 | } | |
1714 | ||
bafef0ae JN |
1715 | #ifdef CONFIG_NET_POLL_CONTROLLER |
1716 | static void | |
1717 | e100_netpoll(struct net_device* netdev) | |
1718 | { | |
ff6e1225 | 1719 | e100rxtx_interrupt(NETWORK_DMA_TX_IRQ_NBR, netdev); |
bafef0ae JN |
1720 | } |
1721 | #endif | |
1722 | ||
1da177e4 LT |
1723 | |
1724 | static int __init | |
1725 | e100_boot_setup(char* str) | |
1726 | { | |
1727 | struct sockaddr sa = {0}; | |
1728 | int i; | |
1729 | ||
1730 | /* Parse the colon separated Ethernet station address */ | |
1731 | for (i = 0; i < ETH_ALEN; i++) { | |
1732 | unsigned int tmp; | |
1733 | if (sscanf(str + 3*i, "%2x", &tmp) != 1) { | |
1734 | printk(KERN_WARNING "Malformed station address"); | |
1735 | return 0; | |
1736 | } | |
1737 | sa.sa_data[i] = (char)tmp; | |
1738 | } | |
1739 | ||
1740 | default_mac = sa; | |
1741 | return 1; | |
1742 | } | |
1743 | ||
1744 | __setup("etrax100_eth=", e100_boot_setup); |