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f524f829 DM |
1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* CAN bus driver for Bosch M_CAN controller | |
3 | * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ | |
4 | */ | |
5 | ||
6 | #ifndef _CAN_M_CAN_H_ | |
7 | #define _CAN_M_CAN_H_ | |
8 | ||
9 | #include <linux/can/core.h> | |
10 | #include <linux/can/led.h> | |
1be37d3b | 11 | #include <linux/can/rx-offload.h> |
f524f829 DM |
12 | #include <linux/completion.h> |
13 | #include <linux/device.h> | |
14 | #include <linux/dma-mapping.h> | |
15 | #include <linux/freezer.h> | |
16 | #include <linux/slab.h> | |
17 | #include <linux/uaccess.h> | |
18 | #include <linux/clk.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/interrupt.h> | |
21 | #include <linux/io.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/module.h> | |
24 | #include <linux/netdevice.h> | |
25 | #include <linux/of.h> | |
26 | #include <linux/of_device.h> | |
27 | #include <linux/pm_runtime.h> | |
28 | #include <linux/iopoll.h> | |
29 | #include <linux/can/dev.h> | |
30 | #include <linux/pinctrl/consumer.h> | |
31 | ||
32 | /* m_can lec values */ | |
33 | enum m_can_lec_type { | |
34 | LEC_NO_ERROR = 0, | |
35 | LEC_STUFF_ERROR, | |
36 | LEC_FORM_ERROR, | |
37 | LEC_ACK_ERROR, | |
38 | LEC_BIT1_ERROR, | |
39 | LEC_BIT0_ERROR, | |
40 | LEC_CRC_ERROR, | |
41 | LEC_UNUSED, | |
42 | }; | |
43 | ||
44 | enum m_can_mram_cfg { | |
45 | MRAM_SIDF = 0, | |
46 | MRAM_XIDF, | |
47 | MRAM_RXF0, | |
48 | MRAM_RXF1, | |
49 | MRAM_RXB, | |
50 | MRAM_TXE, | |
51 | MRAM_TXB, | |
52 | MRAM_CFG_NUM, | |
53 | }; | |
54 | ||
55 | /* address offset and element number for each FIFO/Buffer in the Message RAM */ | |
56 | struct mram_cfg { | |
57 | u16 off; | |
58 | u8 num; | |
59 | }; | |
60 | ||
441ac340 | 61 | struct m_can_classdev; |
f524f829 DM |
62 | struct m_can_ops { |
63 | /* Device specific call backs */ | |
441ac340 DM |
64 | int (*clear_interrupts)(struct m_can_classdev *cdev); |
65 | u32 (*read_reg)(struct m_can_classdev *cdev, int reg); | |
66 | int (*write_reg)(struct m_can_classdev *cdev, int reg, int val); | |
67 | u32 (*read_fifo)(struct m_can_classdev *cdev, int addr_offset); | |
68 | int (*write_fifo)(struct m_can_classdev *cdev, int addr_offset, | |
f524f829 | 69 | int val); |
441ac340 | 70 | int (*init)(struct m_can_classdev *cdev); |
f524f829 DM |
71 | }; |
72 | ||
441ac340 | 73 | struct m_can_classdev { |
f524f829 | 74 | struct can_priv can; |
1be37d3b | 75 | struct can_rx_offload offload; |
f524f829 DM |
76 | struct napi_struct napi; |
77 | struct net_device *net; | |
78 | struct device *dev; | |
79 | struct clk *hclk; | |
80 | struct clk *cclk; | |
81 | ||
82 | struct workqueue_struct *tx_wq; | |
83 | struct work_struct tx_work; | |
84 | struct sk_buff *tx_skb; | |
85 | ||
86 | struct can_bittiming_const *bit_timing; | |
87 | struct can_bittiming_const *data_timing; | |
88 | ||
89 | struct m_can_ops *ops; | |
90 | ||
f524f829 | 91 | int version; |
f524f829 DM |
92 | u32 irqstatus; |
93 | ||
94 | int pm_clock_support; | |
95 | int is_peripheral; | |
96 | ||
97 | struct mram_cfg mcfg[MRAM_CFG_NUM]; | |
98 | }; | |
99 | ||
ac33ffd3 | 100 | struct m_can_classdev *m_can_class_allocate_dev(struct device *dev, int sizeof_priv); |
a8c22f5b | 101 | void m_can_class_free_dev(struct net_device *net); |
441ac340 DM |
102 | int m_can_class_register(struct m_can_classdev *cdev); |
103 | void m_can_class_unregister(struct m_can_classdev *cdev); | |
104 | int m_can_class_get_clocks(struct m_can_classdev *cdev); | |
105 | void m_can_init_ram(struct m_can_classdev *priv); | |
f524f829 DM |
106 | |
107 | int m_can_class_suspend(struct device *dev); | |
108 | int m_can_class_resume(struct device *dev); | |
109 | #endif /* _CAN_M_H_ */ |