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[linux-2.6-block.git] / drivers / net / can / janz-ican3.c
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631eb227
IS		 1/*
2 * Janz MODULbus VMOD-ICAN3 CAN Interface Driver
3 *
4 * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/interrupt.h>
16#include <linux/delay.h>
17#include <linux/platform_device.h>
18
19#include <linux/netdevice.h>
20#include <linux/can.h>
21#include <linux/can/dev.h>
22#include <linux/can/error.h>
23
24#include <linux/mfd/janz.h>
b7f080cf 25#include <asm/io.h>
631eb227
IS		 26
27/* the DPM has 64k of memory, organized into 256x 256 byte pages */
28#define DPM_NUM_PAGES 256
29#define DPM_PAGE_SIZE 256
30#define DPM_PAGE_ADDR(p) ((p) * DPM_PAGE_SIZE)
31
32/* JANZ ICAN3 "old-style" host interface queue page numbers */
33#define QUEUE_OLD_CONTROL 0
34#define QUEUE_OLD_RB0 1
35#define QUEUE_OLD_RB1 2
36#define QUEUE_OLD_WB0 3
37#define QUEUE_OLD_WB1 4
38
39/* Janz ICAN3 "old-style" host interface control registers */
40#define MSYNC_PEER 0x00 /* ICAN only */
41#define MSYNC_LOCL 0x01 /* host only */
42#define TARGET_RUNNING 0x02
43
44#define MSYNC_RB0 0x01
45#define MSYNC_RB1 0x02
46#define MSYNC_RBLW 0x04
47#define MSYNC_RB_MASK (MSYNC_RB0 | MSYNC_RB1)
48
49#define MSYNC_WB0 0x10
50#define MSYNC_WB1 0x20
51#define MSYNC_WBLW 0x40
52#define MSYNC_WB_MASK (MSYNC_WB0 | MSYNC_WB1)
53
54/* Janz ICAN3 "new-style" host interface queue page numbers */
55#define QUEUE_TOHOST 5
56#define QUEUE_FROMHOST_MID 6
57#define QUEUE_FROMHOST_HIGH 7
58#define QUEUE_FROMHOST_LOW 8
59
60/* The first free page in the DPM is #9 */
61#define DPM_FREE_START 9
62
63/* Janz ICAN3 "new-style" and "fast" host interface descriptor flags */
64#define DESC_VALID 0x80
65#define DESC_WRAP 0x40
66#define DESC_INTERRUPT 0x20
67#define DESC_IVALID 0x10
68#define DESC_LEN(len) (len)
69
70/* Janz ICAN3 Firmware Messages */
71#define MSG_CONNECTI 0x02
72#define MSG_DISCONNECT 0x03
73#define MSG_IDVERS 0x04
74#define MSG_MSGLOST 0x05
75#define MSG_NEWHOSTIF 0x08
76#define MSG_INQUIRY 0x0a
77#define MSG_SETAFILMASK 0x10
78#define MSG_INITFDPMQUEUE 0x11
79#define MSG_HWCONF 0x12
80#define MSG_FMSGLOST 0x15
81#define MSG_CEVTIND 0x37
82#define MSG_CBTRREQ 0x41
83#define MSG_COFFREQ 0x42
84#define MSG_CONREQ 0x43
85#define MSG_CCONFREQ 0x47
86
87/*
88 * Janz ICAN3 CAN Inquiry Message Types
89 *
90 * NOTE: there appears to be a firmware bug here. You must send
91 * NOTE: INQUIRY_STATUS and expect to receive an INQUIRY_EXTENDED
92 * NOTE: response. The controller never responds to a message with
93 * NOTE: the INQUIRY_EXTENDED subspec :(
94 */
95#define INQUIRY_STATUS 0x00
96#define INQUIRY_TERMINATION 0x01
97#define INQUIRY_EXTENDED 0x04
98
99/* Janz ICAN3 CAN Set Acceptance Filter Mask Message Types */
100#define SETAFILMASK_REJECT 0x00
101#define SETAFILMASK_FASTIF 0x02
102
103/* Janz ICAN3 CAN Hardware Configuration Message Types */
104#define HWCONF_TERMINATE_ON 0x01
105#define HWCONF_TERMINATE_OFF 0x00
106
107/* Janz ICAN3 CAN Event Indication Message Types */
108#define CEVTIND_EI 0x01
109#define CEVTIND_DOI 0x02
110#define CEVTIND_LOST 0x04
111#define CEVTIND_FULL 0x08
112#define CEVTIND_BEI 0x10
113
114#define CEVTIND_CHIP_SJA1000 0x02
115
116#define ICAN3_BUSERR_QUOTA_MAX 255
117
118/* Janz ICAN3 CAN Frame Conversion */
3b5c6b9e 119#define ICAN3_SNGL 0x02
631eb227
IS		 120#define ICAN3_ECHO 0x10
121#define ICAN3_EFF_RTR 0x40
122#define ICAN3_SFF_RTR 0x10
123#define ICAN3_EFF 0x80
124
125#define ICAN3_CAN_TYPE_MASK 0x0f
126#define ICAN3_CAN_TYPE_SFF 0x00
127#define ICAN3_CAN_TYPE_EFF 0x01
128
129#define ICAN3_CAN_DLC_MASK 0x0f
130
131/*
132 * SJA1000 Status and Error Register Definitions
133 *
134 * Copied from drivers/net/can/sja1000/sja1000.h
135 */
136
137/* status register content */
138#define SR_BS 0x80
139#define SR_ES 0x40
140#define SR_TS 0x20
141#define SR_RS 0x10
142#define SR_TCS 0x08
143#define SR_TBS 0x04
144#define SR_DOS 0x02
145#define SR_RBS 0x01
146
147#define SR_CRIT (SR_BS|SR_ES)
148
149/* ECC register */
150#define ECC_SEG 0x1F
151#define ECC_DIR 0x20
152#define ECC_ERR 6
153#define ECC_BIT 0x00
154#define ECC_FORM 0x40
155#define ECC_STUFF 0x80
156#define ECC_MASK 0xc0
157
158/* Number of buffers for use in the "new-style" host interface */
159#define ICAN3_NEW_BUFFERS 16
160
161/* Number of buffers for use in the "fast" host interface */
162#define ICAN3_TX_BUFFERS 512
163#define ICAN3_RX_BUFFERS 1024
164
165/* SJA1000 Clock Input */
166#define ICAN3_CAN_CLOCK 8000000
167
168/* Driver Name */
169#define DRV_NAME "janz-ican3"
170
171/* DPM Control Registers -- starts at offset 0x100 in the MODULbus registers */
172struct ican3_dpm_control {
173 /* window address register */
174 u8 window_address;
175 u8 unused1;
176
177 /*
178 * Read access: clear interrupt from microcontroller
179 * Write access: send interrupt to microcontroller
180 */
181 u8 interrupt;
182 u8 unused2;
183
184 /* write-only: reset all hardware on the module */
185 u8 hwreset;
186 u8 unused3;
187
188 /* write-only: generate an interrupt to the TPU */
189 u8 tpuinterrupt;
190};
191
192struct ican3_dev {
193
194 /* must be the first member */
195 struct can_priv can;
196
197 /* CAN network device */
198 struct net_device *ndev;
199 struct napi_struct napi;
200
201 /* Device for printing */
202 struct device *dev;
203
204 /* module number */
205 unsigned int num;
206
207 /* base address of registers and IRQ */
208 struct janz_cmodio_onboard_regs __iomem *ctrl;
209 struct ican3_dpm_control __iomem *dpmctrl;
210 void __iomem *dpm;
211 int irq;
212
213 /* CAN bus termination status */
214 struct completion termination_comp;
215 bool termination_enabled;
216
217 /* CAN bus error status registers */
218 struct completion buserror_comp;
219 struct can_berr_counter bec;
220
221 /* old and new style host interface */
222 unsigned int iftype;
223
83702f69
IS		 224 /* queue for echo packets */
225 struct sk_buff_head echoq;
226
631eb227
IS		 227 /*
228 * Any function which changes the current DPM page must hold this
229 * lock while it is performing data accesses. This ensures that the
230 * function will not be preempted and end up reading data from a
231 * different DPM page than it expects.
232 */
233 spinlock_t lock;
234
235 /* new host interface */
236 unsigned int rx_int;
237 unsigned int rx_num;
238 unsigned int tx_num;
239
240 /* fast host interface */
241 unsigned int fastrx_start;
631eb227
IS		 242 unsigned int fastrx_num;
243 unsigned int fasttx_start;
244 unsigned int fasttx_num;
245
246 /* first free DPM page */
247 unsigned int free_page;
248};
249
250struct ican3_msg {
251 u8 control;
252 u8 spec;
253 __le16 len;
254 u8 data[252];
255};
256
257struct ican3_new_desc {
258 u8 control;
259 u8 pointer;
260};
261
262struct ican3_fast_desc {
263 u8 control;
264 u8 command;
265 u8 data[14];
266};
267
268/* write to the window basic address register */
269static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page)
270{
271 BUG_ON(page >= DPM_NUM_PAGES);
272 iowrite8(page, &mod->dpmctrl->window_address);
273}
274
275/*
276 * ICAN3 "old-style" host interface
277 */
278
279/*
25985edc 280 * Receive a message from the ICAN3 "old-style" firmware interface
631eb227
IS		 281 *
282 * LOCKING: must hold mod->lock
283 *
284 * returns 0 on success, -ENOMEM when no message exists
285 */
286static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
287{
288 unsigned int mbox, mbox_page;
289 u8 locl, peer, xord;
290
291 /* get the MSYNC registers */
292 ican3_set_page(mod, QUEUE_OLD_CONTROL);
293 peer = ioread8(mod->dpm + MSYNC_PEER);
294 locl = ioread8(mod->dpm + MSYNC_LOCL);
295 xord = locl ^ peer;
296
297 if ((xord & MSYNC_RB_MASK) == 0x00) {
298 dev_dbg(mod->dev, "no mbox for reading\n");
299 return -ENOMEM;
300 }
301
302 /* find the first free mbox to read */
303 if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK)
304 mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1;
305 else
306 mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1;
307
308 /* copy the message */
309 mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1;
310 ican3_set_page(mod, mbox_page);
311 memcpy_fromio(msg, mod->dpm, sizeof(*msg));
312
313 /*
314 * notify the firmware that the read buffer is available
315 * for it to fill again
316 */
317 locl ^= mbox;
318
319 ican3_set_page(mod, QUEUE_OLD_CONTROL);
320 iowrite8(locl, mod->dpm + MSYNC_LOCL);
321 return 0;
322}
323
324/*
325 * Send a message through the "old-style" firmware interface
326 *
327 * LOCKING: must hold mod->lock
328 *
329 * returns 0 on success, -ENOMEM when no free space exists
330 */
331static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
332{
333 unsigned int mbox, mbox_page;
334 u8 locl, peer, xord;
335
336 /* get the MSYNC registers */
337 ican3_set_page(mod, QUEUE_OLD_CONTROL);
338 peer = ioread8(mod->dpm + MSYNC_PEER);
339 locl = ioread8(mod->dpm + MSYNC_LOCL);
340 xord = locl ^ peer;
341
342 if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) {
343 dev_err(mod->dev, "no mbox for writing\n");
344 return -ENOMEM;
345 }
346
347 /* calculate a free mbox to use */
348 mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0;
349
350 /* copy the message to the DPM */
351 mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1;
352 ican3_set_page(mod, mbox_page);
353 memcpy_toio(mod->dpm, msg, sizeof(*msg));
354
355 locl ^= mbox;
356 if (mbox == MSYNC_WB1)
357 locl |= MSYNC_WBLW;
358
359 ican3_set_page(mod, QUEUE_OLD_CONTROL);
360 iowrite8(locl, mod->dpm + MSYNC_LOCL);
361 return 0;
362}
363
364/*
365 * ICAN3 "new-style" Host Interface Setup
366 */
367
3c8ac0f2 368static void ican3_init_new_host_interface(struct ican3_dev *mod)
631eb227
IS		 369{
370 struct ican3_new_desc desc;
371 unsigned long flags;
372 void __iomem *dst;
373 int i;
374
375 spin_lock_irqsave(&mod->lock, flags);
376
377 /* setup the internal datastructures for RX */
378 mod->rx_num = 0;
379 mod->rx_int = 0;
380
381 /* tohost queue descriptors are in page 5 */
382 ican3_set_page(mod, QUEUE_TOHOST);
383 dst = mod->dpm;
384
385 /* initialize the tohost (rx) queue descriptors: pages 9-24 */
386 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
387 desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */
388 desc.pointer = mod->free_page;
389
390 /* set wrap flag on last buffer */
391 if (i == ICAN3_NEW_BUFFERS - 1)
392 desc.control |= DESC_WRAP;
393
394 memcpy_toio(dst, &desc, sizeof(desc));
395 dst += sizeof(desc);
396 mod->free_page++;
397 }
398
399 /* fromhost (tx) mid queue descriptors are in page 6 */
400 ican3_set_page(mod, QUEUE_FROMHOST_MID);
401 dst = mod->dpm;
402
403 /* setup the internal datastructures for TX */
404 mod->tx_num = 0;
405
406 /* initialize the fromhost mid queue descriptors: pages 25-40 */
407 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
408 desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */
409 desc.pointer = mod->free_page;
410
411 /* set wrap flag on last buffer */
412 if (i == ICAN3_NEW_BUFFERS - 1)
413 desc.control |= DESC_WRAP;
414
415 memcpy_toio(dst, &desc, sizeof(desc));
416 dst += sizeof(desc);
417 mod->free_page++;
418 }
419
420 /* fromhost hi queue descriptors are in page 7 */
421 ican3_set_page(mod, QUEUE_FROMHOST_HIGH);
422 dst = mod->dpm;
423
424 /* initialize only a single buffer in the fromhost hi queue (unused) */
425 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
426 desc.pointer = mod->free_page;
427 memcpy_toio(dst, &desc, sizeof(desc));
428 mod->free_page++;
429
430 /* fromhost low queue descriptors are in page 8 */
431 ican3_set_page(mod, QUEUE_FROMHOST_LOW);
432 dst = mod->dpm;
433
434 /* initialize only a single buffer in the fromhost low queue (unused) */
435 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
436 desc.pointer = mod->free_page;
437 memcpy_toio(dst, &desc, sizeof(desc));
438 mod->free_page++;
439
440 spin_unlock_irqrestore(&mod->lock, flags);
441}
442
443/*
444 * ICAN3 Fast Host Interface Setup
445 */
446
3c8ac0f2 447static void ican3_init_fast_host_interface(struct ican3_dev *mod)
631eb227
IS		 448{
449 struct ican3_fast_desc desc;
450 unsigned long flags;
451 unsigned int addr;
452 void __iomem *dst;
453 int i;
454
455 spin_lock_irqsave(&mod->lock, flags);
456
457 /* save the start recv page */
458 mod->fastrx_start = mod->free_page;
459 mod->fastrx_num = 0;
631eb227
IS		 460
461 /* build a single fast tohost queue descriptor */
462 memset(&desc, 0, sizeof(desc));
463 desc.control = 0x00;
464 desc.command = 1;
465
466 /* build the tohost queue descriptor ring in memory */
467 addr = 0;
468 for (i = 0; i < ICAN3_RX_BUFFERS; i++) {
469
470 /* set the wrap bit on the last buffer */
471 if (i == ICAN3_RX_BUFFERS - 1)
472 desc.control |= DESC_WRAP;
473
474 /* switch to the correct page */
475 ican3_set_page(mod, mod->free_page);
476
477 /* copy the descriptor to the DPM */
478 dst = mod->dpm + addr;
479 memcpy_toio(dst, &desc, sizeof(desc));
480 addr += sizeof(desc);
481
482 /* move to the next page if necessary */
483 if (addr >= DPM_PAGE_SIZE) {
484 addr = 0;
485 mod->free_page++;
486 }
487 }
488
489 /* make sure we page-align the next queue */
490 if (addr != 0)
491 mod->free_page++;
492
493 /* save the start xmit page */
494 mod->fasttx_start = mod->free_page;
495 mod->fasttx_num = 0;
496
497 /* build a single fast fromhost queue descriptor */
498 memset(&desc, 0, sizeof(desc));
499 desc.control = DESC_VALID;
500 desc.command = 1;
501
502 /* build the fromhost queue descriptor ring in memory */
503 addr = 0;
504 for (i = 0; i < ICAN3_TX_BUFFERS; i++) {
505
506 /* set the wrap bit on the last buffer */
507 if (i == ICAN3_TX_BUFFERS - 1)
508 desc.control |= DESC_WRAP;
509
510 /* switch to the correct page */
511 ican3_set_page(mod, mod->free_page);
512
513 /* copy the descriptor to the DPM */
514 dst = mod->dpm + addr;
515 memcpy_toio(dst, &desc, sizeof(desc));
516 addr += sizeof(desc);
517
518 /* move to the next page if necessary */
519 if (addr >= DPM_PAGE_SIZE) {
520 addr = 0;
521 mod->free_page++;
522 }
523 }
524
525 spin_unlock_irqrestore(&mod->lock, flags);
526}
527
528/*
529 * ICAN3 "new-style" Host Interface Message Helpers
530 */
531
532/*
533 * LOCKING: must hold mod->lock
534 */
535static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
536{
537 struct ican3_new_desc desc;
538 void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc));
539
540 /* switch to the fromhost mid queue, and read the buffer descriptor */
541 ican3_set_page(mod, QUEUE_FROMHOST_MID);
542 memcpy_fromio(&desc, desc_addr, sizeof(desc));
543
544 if (!(desc.control & DESC_VALID)) {
545 dev_dbg(mod->dev, "%s: no free buffers\n", __func__);
546 return -ENOMEM;
547 }
548
549 /* switch to the data page, copy the data */
550 ican3_set_page(mod, desc.pointer);
551 memcpy_toio(mod->dpm, msg, sizeof(*msg));
552
553 /* switch back to the descriptor, set the valid bit, write it back */
554 ican3_set_page(mod, QUEUE_FROMHOST_MID);
555 desc.control ^= DESC_VALID;
556 memcpy_toio(desc_addr, &desc, sizeof(desc));
557
558 /* update the tx number */
559 mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1);
560 return 0;
561}
562
563/*
564 * LOCKING: must hold mod->lock
565 */
566static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
567{
568 struct ican3_new_desc desc;
569 void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc));
570
571 /* switch to the tohost queue, and read the buffer descriptor */
572 ican3_set_page(mod, QUEUE_TOHOST);
573 memcpy_fromio(&desc, desc_addr, sizeof(desc));
574
575 if (!(desc.control & DESC_VALID)) {
576 dev_dbg(mod->dev, "%s: no buffers to recv\n", __func__);
577 return -ENOMEM;
578 }
579
580 /* switch to the data page, copy the data */
581 ican3_set_page(mod, desc.pointer);
582 memcpy_fromio(msg, mod->dpm, sizeof(*msg));
583
584 /* switch back to the descriptor, toggle the valid bit, write it back */
585 ican3_set_page(mod, QUEUE_TOHOST);
586 desc.control ^= DESC_VALID;
587 memcpy_toio(desc_addr, &desc, sizeof(desc));
588
589 /* update the rx number */
590 mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1);
591 return 0;
592}
593
594/*
595 * Message Send / Recv Helpers
596 */
597
598static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
599{
600 unsigned long flags;
601 int ret;
602
603 spin_lock_irqsave(&mod->lock, flags);
604
605 if (mod->iftype == 0)
606 ret = ican3_old_send_msg(mod, msg);
607 else
608 ret = ican3_new_send_msg(mod, msg);
609
610 spin_unlock_irqrestore(&mod->lock, flags);
611 return ret;
612}
613
614static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
615{
616 unsigned long flags;
617 int ret;
618
619 spin_lock_irqsave(&mod->lock, flags);
620
621 if (mod->iftype == 0)
622 ret = ican3_old_recv_msg(mod, msg);
623 else
624 ret = ican3_new_recv_msg(mod, msg);
625
626 spin_unlock_irqrestore(&mod->lock, flags);
627 return ret;
628}
629
630/*
631 * Quick Pre-constructed Messages
632 */
633
3c8ac0f2 634static int ican3_msg_connect(struct ican3_dev *mod)
631eb227
IS		 635{
636 struct ican3_msg msg;
637
638 memset(&msg, 0, sizeof(msg));
639 msg.spec = MSG_CONNECTI;
640 msg.len = cpu_to_le16(0);
641
642 return ican3_send_msg(mod, &msg);
643}
644
3c8ac0f2 645static int ican3_msg_disconnect(struct ican3_dev *mod)
631eb227
IS		 646{
647 struct ican3_msg msg;
648
649 memset(&msg, 0, sizeof(msg));
650 msg.spec = MSG_DISCONNECT;
651 msg.len = cpu_to_le16(0);
652
653 return ican3_send_msg(mod, &msg);
654}
655
3c8ac0f2 656static int ican3_msg_newhostif(struct ican3_dev *mod)
631eb227
IS		 657{
658 struct ican3_msg msg;
659 int ret;
660
661 memset(&msg, 0, sizeof(msg));
662 msg.spec = MSG_NEWHOSTIF;
663 msg.len = cpu_to_le16(0);
664
665 /* If we're not using the old interface, switching seems bogus */
666 WARN_ON(mod->iftype != 0);
667
668 ret = ican3_send_msg(mod, &msg);
669 if (ret)
670 return ret;
671
672 /* mark the module as using the new host interface */
673 mod->iftype = 1;
674 return 0;
675}
676
3c8ac0f2 677static int ican3_msg_fasthostif(struct ican3_dev *mod)
631eb227
IS		 678{
679 struct ican3_msg msg;
680 unsigned int addr;
681
682 memset(&msg, 0, sizeof(msg));
683 msg.spec = MSG_INITFDPMQUEUE;
684 msg.len = cpu_to_le16(8);
685
686 /* write the tohost queue start address */
687 addr = DPM_PAGE_ADDR(mod->fastrx_start);
688 msg.data[0] = addr & 0xff;
689 msg.data[1] = (addr >> 8) & 0xff;
690 msg.data[2] = (addr >> 16) & 0xff;
691 msg.data[3] = (addr >> 24) & 0xff;
692
693 /* write the fromhost queue start address */
694 addr = DPM_PAGE_ADDR(mod->fasttx_start);
695 msg.data[4] = addr & 0xff;
696 msg.data[5] = (addr >> 8) & 0xff;
697 msg.data[6] = (addr >> 16) & 0xff;
698 msg.data[7] = (addr >> 24) & 0xff;
699
700 /* If we're not using the new interface yet, we cannot do this */
701 WARN_ON(mod->iftype != 1);
702
703 return ican3_send_msg(mod, &msg);
704}
705
706/*
707 * Setup the CAN filter to either accept or reject all
708 * messages from the CAN bus.
709 */
3c8ac0f2 710static int ican3_set_id_filter(struct ican3_dev *mod, bool accept)
631eb227
IS		 711{
712 struct ican3_msg msg;
713 int ret;
714
715 /* Standard Frame Format */
716 memset(&msg, 0, sizeof(msg));
717 msg.spec = MSG_SETAFILMASK;
718 msg.len = cpu_to_le16(5);
719 msg.data[0] = 0x00; /* IDLo LSB */
720 msg.data[1] = 0x00; /* IDLo MSB */
721 msg.data[2] = 0xff; /* IDHi LSB */
722 msg.data[3] = 0x07; /* IDHi MSB */
723
724 /* accept all frames for fast host if, or reject all frames */
725 msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
726
727 ret = ican3_send_msg(mod, &msg);
728 if (ret)
729 return ret;
730
731 /* Extended Frame Format */
732 memset(&msg, 0, sizeof(msg));
733 msg.spec = MSG_SETAFILMASK;
734 msg.len = cpu_to_le16(13);
735 msg.data[0] = 0; /* MUX = 0 */
736 msg.data[1] = 0x00; /* IDLo LSB */
737 msg.data[2] = 0x00;
738 msg.data[3] = 0x00;
739 msg.data[4] = 0x20; /* IDLo MSB */
740 msg.data[5] = 0xff; /* IDHi LSB */
741 msg.data[6] = 0xff;
742 msg.data[7] = 0xff;
743 msg.data[8] = 0x3f; /* IDHi MSB */
744
745 /* accept all frames for fast host if, or reject all frames */
746 msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
747
748 return ican3_send_msg(mod, &msg);
749}
750
751/*
752 * Bring the CAN bus online or offline
753 */
754static int ican3_set_bus_state(struct ican3_dev *mod, bool on)
755{
756 struct ican3_msg msg;
757
758 memset(&msg, 0, sizeof(msg));
759 msg.spec = on ? MSG_CONREQ : MSG_COFFREQ;
760 msg.len = cpu_to_le16(0);
761
762 return ican3_send_msg(mod, &msg);
763}
764
765static int ican3_set_termination(struct ican3_dev *mod, bool on)
766{
767 struct ican3_msg msg;
768
769 memset(&msg, 0, sizeof(msg));
770 msg.spec = MSG_HWCONF;
771 msg.len = cpu_to_le16(2);
772 msg.data[0] = 0x00;
773 msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF;
774
775 return ican3_send_msg(mod, &msg);
776}
777
778static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec)
779{
780 struct ican3_msg msg;
781
782 memset(&msg, 0, sizeof(msg));
783 msg.spec = MSG_INQUIRY;
784 msg.len = cpu_to_le16(2);
785 msg.data[0] = subspec;
786 msg.data[1] = 0x00;
787
788 return ican3_send_msg(mod, &msg);
789}
790
791static int ican3_set_buserror(struct ican3_dev *mod, u8 quota)
792{
793 struct ican3_msg msg;
794
795 memset(&msg, 0, sizeof(msg));
796 msg.spec = MSG_CCONFREQ;
797 msg.len = cpu_to_le16(2);
798 msg.data[0] = 0x00;
799 msg.data[1] = quota;
800
801 return ican3_send_msg(mod, &msg);
802}
803
804/*
805 * ICAN3 to Linux CAN Frame Conversion
806 */
807
808static void ican3_to_can_frame(struct ican3_dev *mod,
809 struct ican3_fast_desc *desc,
810 struct can_frame *cf)
811{
812 if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) {
813 if (desc->data[1] & ICAN3_SFF_RTR)
814 cf->can_id |= CAN_RTR_FLAG;
815
816 cf->can_id |= desc->data[0] << 3;
817 cf->can_id |= (desc->data[1] & 0xe0) >> 5;
9e4d6909
MKB		 818 cf->can_dlc = get_can_dlc(desc->data[1] & ICAN3_CAN_DLC_MASK);
819 memcpy(cf->data, &desc->data[2], cf->can_dlc);
631eb227 820 } else {
9e4d6909 821 cf->can_dlc = get_can_dlc(desc->data[0] & ICAN3_CAN_DLC_MASK);
631eb227
IS		 822 if (desc->data[0] & ICAN3_EFF_RTR)
823 cf->can_id |= CAN_RTR_FLAG;
824
825 if (desc->data[0] & ICAN3_EFF) {
826 cf->can_id |= CAN_EFF_FLAG;
827 cf->can_id |= desc->data[2] << 21; /* 28-21 */
828 cf->can_id |= desc->data[3] << 13; /* 20-13 */
829 cf->can_id |= desc->data[4] << 5; /* 12-5 */
830 cf->can_id |= (desc->data[5] & 0xf8) >> 3;
831 } else {
832 cf->can_id |= desc->data[2] << 3; /* 10-3 */
833 cf->can_id |= desc->data[3] >> 5; /* 2-0 */
834 }
835
9e4d6909 836 memcpy(cf->data, &desc->data[6], cf->can_dlc);
631eb227
IS		 837 }
838}
839
840static void can_frame_to_ican3(struct ican3_dev *mod,
841 struct can_frame *cf,
842 struct ican3_fast_desc *desc)
843{
844 /* clear out any stale data in the descriptor */
845 memset(desc->data, 0, sizeof(desc->data));
846
847 /* we always use the extended format, with the ECHO flag set */
848 desc->command = ICAN3_CAN_TYPE_EFF;
849 desc->data[0] |= cf->can_dlc;
850 desc->data[1] |= ICAN3_ECHO;
851
3b5c6b9e
IS		 852 /* support single transmission (no retries) mode */
853 if (mod->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT)
854 desc->data[1] |= ICAN3_SNGL;
855
631eb227
IS		 856 if (cf->can_id & CAN_RTR_FLAG)
857 desc->data[0] |= ICAN3_EFF_RTR;
858
859 /* pack the id into the correct places */
860 if (cf->can_id & CAN_EFF_FLAG) {
861 desc->data[0] |= ICAN3_EFF;
862 desc->data[2] = (cf->can_id & 0x1fe00000) >> 21; /* 28-21 */
863 desc->data[3] = (cf->can_id & 0x001fe000) >> 13; /* 20-13 */
864 desc->data[4] = (cf->can_id & 0x00001fe0) >> 5; /* 12-5 */
865 desc->data[5] = (cf->can_id & 0x0000001f) << 3; /* 4-0 */
866 } else {
867 desc->data[2] = (cf->can_id & 0x7F8) >> 3; /* bits 10-3 */
868 desc->data[3] = (cf->can_id & 0x007) << 5; /* bits 2-0 */
869 }
870
871 /* copy the data bits into the descriptor */
9e4d6909 872 memcpy(&desc->data[6], cf->data, cf->can_dlc);
631eb227
IS		 873}
874
875/*
876 * Interrupt Handling
877 */
878
879/*
880 * Handle an ID + Version message response from the firmware. We never generate
881 * this message in production code, but it is very useful when debugging to be
882 * able to display this message.
883 */
884static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg)
885{
886 dev_dbg(mod->dev, "IDVERS response: %s\n", msg->data);
887}
888
889static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg)
890{
891 struct net_device *dev = mod->ndev;
892 struct net_device_stats *stats = &dev->stats;
893 struct can_frame *cf;
894 struct sk_buff *skb;
895
896 /*
897 * Report that communication messages with the microcontroller firmware
898 * are being lost. These are never CAN frames, so we do not generate an
899 * error frame for userspace
900 */
901 if (msg->spec == MSG_MSGLOST) {
902 dev_err(mod->dev, "lost %d control messages\n", msg->data[0]);
903 return;
904 }
905
906 /*
907 * Oops, this indicates that we have lost messages in the fast queue,
908 * which are exclusively CAN messages. Our driver isn't reading CAN
909 * frames fast enough.
910 *
911 * We'll pretend that the SJA1000 told us that it ran out of buffer
912 * space, because there is not a better message for this.
913 */
914 skb = alloc_can_err_skb(dev, &cf);
915 if (skb) {
916 cf->can_id |= CAN_ERR_CRTL;
917 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
88b58703 918 stats->rx_over_errors++;
631eb227 919 stats->rx_errors++;
631eb227
IS		 920 netif_rx(skb);
921 }
922}
923
924/*
925 * Handle CAN Event Indication Messages from the firmware
926 *
927 * The ICAN3 firmware provides the values of some SJA1000 registers when it
928 * generates this message. The code below is largely copied from the
929 * drivers/net/can/sja1000/sja1000.c file, and adapted as necessary
930 */
931static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)
932{
933 struct net_device *dev = mod->ndev;
934 struct net_device_stats *stats = &dev->stats;
935 enum can_state state = mod->can.state;
83702f69 936 u8 isrc, ecc, status, rxerr, txerr;
631eb227
IS		 937 struct can_frame *cf;
938 struct sk_buff *skb;
939
940 /* we can only handle the SJA1000 part */
941 if (msg->data[1] != CEVTIND_CHIP_SJA1000) {
942 dev_err(mod->dev, "unable to handle errors on non-SJA1000\n");
943 return -ENODEV;
944 }
945
946 /* check the message length for sanity */
947 if (le16_to_cpu(msg->len) < 6) {
948 dev_err(mod->dev, "error message too short\n");
949 return -EINVAL;
950 }
951
631eb227 952 isrc = msg->data[0];
83702f69 953 ecc = msg->data[2];
631eb227
IS		 954 status = msg->data[3];
955 rxerr = msg->data[4];
956 txerr = msg->data[5];
957
83702f69
IS		 958 /*
959 * This hardware lacks any support other than bus error messages to
960 * determine if packet transmission has failed.
961 *
962 * When TX errors happen, one echo skb needs to be dropped from the
963 * front of the queue.
964 *
965 * A small bit of code is duplicated here and below, to avoid error
966 * skb allocation when it will just be freed immediately.
967 */
968 if (isrc == CEVTIND_BEI) {
969 int ret;
970 dev_dbg(mod->dev, "bus error interrupt\n");
971
972 /* TX error */
973 if (!(ecc & ECC_DIR)) {
974 kfree_skb(skb_dequeue(&mod->echoq));
975 stats->tx_errors++;
976 } else {
977 stats->rx_errors++;
978 }
979
30df5888
IS		 980 /*
981 * The controller automatically disables bus-error interrupts
982 * and therefore we must re-enable them.
983 */
984 ret = ican3_set_buserror(mod, 1);
985 if (ret) {
986 dev_err(mod->dev, "unable to re-enable bus-error\n");
987 return ret;
988 }
989
83702f69
IS		 990 /* bus error reporting is off, return immediately */
991 if (!(mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
992 return 0;
993 }
994
995 skb = alloc_can_err_skb(dev, &cf);
996 if (skb == NULL)
997 return -ENOMEM;
998
631eb227
IS		 999 /* data overrun interrupt */
1000 if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) {
1001 dev_dbg(mod->dev, "data overrun interrupt\n");
1002 cf->can_id |= CAN_ERR_CRTL;
1003 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
1004 stats->rx_over_errors++;
1005 stats->rx_errors++;
1006 }
1007
1008 /* error warning + passive interrupt */
1009 if (isrc == CEVTIND_EI) {
1010 dev_dbg(mod->dev, "error warning + passive interrupt\n");
1011 if (status & SR_BS) {
1012 state = CAN_STATE_BUS_OFF;
1013 cf->can_id |= CAN_ERR_BUSOFF;
1014 can_bus_off(dev);
1015 } else if (status & SR_ES) {
1016 if (rxerr >= 128 || txerr >= 128)
1017 state = CAN_STATE_ERROR_PASSIVE;
1018 else
1019 state = CAN_STATE_ERROR_WARNING;
1020 } else {
1021 state = CAN_STATE_ERROR_ACTIVE;
1022 }
1023 }
1024
1025 /* bus error interrupt */
1026 if (isrc == CEVTIND_BEI) {
631eb227 1027 mod->can.can_stats.bus_error++;
631eb227
IS		 1028 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
1029
1030 switch (ecc & ECC_MASK) {
1031 case ECC_BIT:
1032 cf->data[2] |= CAN_ERR_PROT_BIT;
1033 break;
1034 case ECC_FORM:
1035 cf->data[2] |= CAN_ERR_PROT_FORM;
1036 break;
1037 case ECC_STUFF:
1038 cf->data[2] |= CAN_ERR_PROT_STUFF;
1039 break;
1040 default:
1041 cf->data[2] |= CAN_ERR_PROT_UNSPEC;
1042 cf->data[3] = ecc & ECC_SEG;
1043 break;
1044 }
1045
83702f69 1046 if (!(ecc & ECC_DIR))
631eb227
IS		 1047 cf->data[2] |= CAN_ERR_PROT_TX;
1048
1049 cf->data[6] = txerr;
1050 cf->data[7] = rxerr;
1051 }
1052
1053 if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING ||
1054 state == CAN_STATE_ERROR_PASSIVE)) {
1055 cf->can_id |= CAN_ERR_CRTL;
1056 if (state == CAN_STATE_ERROR_WARNING) {
1057 mod->can.can_stats.error_warning++;
1058 cf->data[1] = (txerr > rxerr) ?
1059 CAN_ERR_CRTL_TX_WARNING :
1060 CAN_ERR_CRTL_RX_WARNING;
1061 } else {
1062 mod->can.can_stats.error_passive++;
1063 cf->data[1] = (txerr > rxerr) ?
1064 CAN_ERR_CRTL_TX_PASSIVE :
1065 CAN_ERR_CRTL_RX_PASSIVE;
1066 }
1067
1068 cf->data[6] = txerr;
1069 cf->data[7] = rxerr;
1070 }
1071
1072 mod->can.state = state;
631eb227
IS		 1073 netif_rx(skb);
1074 return 0;
1075}
1076
1077static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)
1078{
1079 switch (msg->data[0]) {
1080 case INQUIRY_STATUS:
1081 case INQUIRY_EXTENDED:
1082 mod->bec.rxerr = msg->data[5];
1083 mod->bec.txerr = msg->data[6];
1084 complete(&mod->buserror_comp);
1085 break;
1086 case INQUIRY_TERMINATION:
1087 mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON;
1088 complete(&mod->termination_comp);
1089 break;
1090 default:
25985edc 1091 dev_err(mod->dev, "received an unknown inquiry response\n");
631eb227
IS		 1092 break;
1093 }
1094}
1095
1096static void ican3_handle_unknown_message(struct ican3_dev *mod,
1097 struct ican3_msg *msg)
1098{
25985edc 1099 dev_warn(mod->dev, "received unknown message: spec 0x%.2x length %d\n",
631eb227
IS		 1100 msg->spec, le16_to_cpu(msg->len));
1101}
1102
1103/*
1104 * Handle a control message from the firmware
1105 */
1106static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg)
1107{
1108 dev_dbg(mod->dev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__,
1109 mod->num, msg->spec, le16_to_cpu(msg->len));
1110
1111 switch (msg->spec) {
1112 case MSG_IDVERS:
1113 ican3_handle_idvers(mod, msg);
1114 break;
1115 case MSG_MSGLOST:
1116 case MSG_FMSGLOST:
1117 ican3_handle_msglost(mod, msg);
1118 break;
1119 case MSG_CEVTIND:
1120 ican3_handle_cevtind(mod, msg);
1121 break;
1122 case MSG_INQUIRY:
1123 ican3_handle_inquiry(mod, msg);
1124 break;
1125 default:
1126 ican3_handle_unknown_message(mod, msg);
1127 break;
1128 }
1129}
1130
83702f69
IS		 1131/*
1132 * The ican3 needs to store all echo skbs, and therefore cannot
1133 * use the generic infrastructure for this.
1134 */
1135static void ican3_put_echo_skb(struct ican3_dev *mod, struct sk_buff *skb)
1136{
1137 struct sock *srcsk = skb->sk;
1138
1139 if (atomic_read(&skb->users) != 1) {
1140 struct sk_buff *old_skb = skb;
1141
1142 skb = skb_clone(old_skb, GFP_ATOMIC);
1143 kfree_skb(old_skb);
1144 if (!skb)
1145 return;
1146 } else {
1147 skb_orphan(skb);
1148 }
1149
1150 skb->sk = srcsk;
1151
1152 /* save this skb for tx interrupt echo handling */
1153 skb_queue_tail(&mod->echoq, skb);
1154}
1155
1156static unsigned int ican3_get_echo_skb(struct ican3_dev *mod)
1157{
1158 struct sk_buff *skb = skb_dequeue(&mod->echoq);
1159 struct can_frame *cf;
1160 u8 dlc;
1161
1162 /* this should never trigger unless there is a driver bug */
1163 if (!skb) {
1164 netdev_err(mod->ndev, "BUG: echo skb not occupied\n");
1165 return 0;
1166 }
1167
1168 cf = (struct can_frame *)skb->data;
1169 dlc = cf->can_dlc;
1170
1171 /* check flag whether this packet has to be looped back */
1172 if (skb->pkt_type != PACKET_LOOPBACK) {
1173 kfree_skb(skb);
1174 return dlc;
1175 }
1176
1177 skb->protocol = htons(ETH_P_CAN);
1178 skb->pkt_type = PACKET_BROADCAST;
1179 skb->ip_summed = CHECKSUM_UNNECESSARY;
1180 skb->dev = mod->ndev;
1181 netif_receive_skb(skb);
1182 return dlc;
1183}
1184
1185/*
1186 * Compare an skb with an existing echo skb
1187 *
1188 * This function will be used on devices which have a hardware loopback.
1189 * On these devices, this function can be used to compare a received skb
1190 * with the saved echo skbs so that the hardware echo skb can be dropped.
1191 *
1192 * Returns true if the skb's are identical, false otherwise.
1193 */
1194static bool ican3_echo_skb_matches(struct ican3_dev *mod, struct sk_buff *skb)
1195{
1196 struct can_frame *cf = (struct can_frame *)skb->data;
1197 struct sk_buff *echo_skb = skb_peek(&mod->echoq);
1198 struct can_frame *echo_cf;
1199
1200 if (!echo_skb)
1201 return false;
1202
1203 echo_cf = (struct can_frame *)echo_skb->data;
1204 if (cf->can_id != echo_cf->can_id)
1205 return false;
1206
1207 if (cf->can_dlc != echo_cf->can_dlc)
1208 return false;
1209
1210 return memcmp(cf->data, echo_cf->data, cf->can_dlc) == 0;
1211}
1212
631eb227
IS		 1213/*
1214 * Check that there is room in the TX ring to transmit another skb
1215 *
1216 * LOCKING: must hold mod->lock
1217 */
1218static bool ican3_txok(struct ican3_dev *mod)
1219{
1220 struct ican3_fast_desc __iomem *desc;
1221 u8 control;
1222
83702f69
IS		 1223 /* check that we have echo queue space */
1224 if (skb_queue_len(&mod->echoq) >= ICAN3_TX_BUFFERS)
1225 return false;
1226
631eb227
IS		 1227 /* copy the control bits of the descriptor */
1228 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1229 desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc));
1230 control = ioread8(&desc->control);
1231
1232 /* if the control bits are not valid, then we have no more space */
1233 if (!(control & DESC_VALID))
1234 return false;
1235
1236 return true;
1237}
1238
1239/*
25985edc 1240 * Receive one CAN frame from the hardware
631eb227 1241 *
631eb227
IS		 1242 * CONTEXT: must be called from user context
1243 */
1244static int ican3_recv_skb(struct ican3_dev *mod)
1245{
1246 struct net_device *ndev = mod->ndev;
1247 struct net_device_stats *stats = &ndev->stats;
1248 struct ican3_fast_desc desc;
1249 void __iomem *desc_addr;
1250 struct can_frame *cf;
1251 struct sk_buff *skb;
1252 unsigned long flags;
1253
1254 spin_lock_irqsave(&mod->lock, flags);
1255
1256 /* copy the whole descriptor */
1257 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1258 desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc));
1259 memcpy_fromio(&desc, desc_addr, sizeof(desc));
1260
1261 spin_unlock_irqrestore(&mod->lock, flags);
1262
1263 /* check that we actually have a CAN frame */
1264 if (!(desc.control & DESC_VALID))
1265 return -ENOBUFS;
1266
1267 /* allocate an skb */
1268 skb = alloc_can_skb(ndev, &cf);
1269 if (unlikely(skb == NULL)) {
1270 stats->rx_dropped++;
1271 goto err_noalloc;
1272 }
1273
1274 /* convert the ICAN3 frame into Linux CAN format */
1275 ican3_to_can_frame(mod, &desc, cf);
1276
83702f69
IS		 1277 /*
1278 * If this is an ECHO frame received from the hardware loopback
1279 * feature, use the skb saved in the ECHO stack instead. This allows
1280 * the Linux CAN core to support CAN_RAW_RECV_OWN_MSGS correctly.
1281 *
1282 * Since this is a confirmation of a successfully transmitted packet
1283 * sent from this host, update the transmit statistics.
1284 *
1285 * Also, the netdevice queue needs to be allowed to send packets again.
1286 */
1287 if (ican3_echo_skb_matches(mod, skb)) {
1288 stats->tx_packets++;
1289 stats->tx_bytes += ican3_get_echo_skb(mod);
1290 kfree_skb(skb);
1291 goto err_noalloc;
1292 }
1293
1294 /* update statistics, receive the skb */
631eb227
IS		 1295 stats->rx_packets++;
1296 stats->rx_bytes += cf->can_dlc;
83702f69 1297 netif_receive_skb(skb);
631eb227
IS		 1298
1299err_noalloc:
1300 /* toggle the valid bit and return the descriptor to the ring */
1301 desc.control ^= DESC_VALID;
1302
1303 spin_lock_irqsave(&mod->lock, flags);
1304
1305 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1306 memcpy_toio(desc_addr, &desc, 1);
1307
1308 /* update the next buffer pointer */
1309 mod->fastrx_num = (desc.control & DESC_WRAP) ? 0
1310 : (mod->fastrx_num + 1);
1311
1312 /* there are still more buffers to process */
1313 spin_unlock_irqrestore(&mod->lock, flags);
1314 return 0;
1315}
1316
1317static int ican3_napi(struct napi_struct *napi, int budget)
1318{
1319 struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi);
631eb227
IS		 1320 unsigned long flags;
1321 int received = 0;
1322 int ret;
1323
1324 /* process all communication messages */
1325 while (true) {
83702f69 1326 struct ican3_msg msg;
631eb227
IS		 1327 ret = ican3_recv_msg(mod, &msg);
1328 if (ret)
1329 break;
1330
1331 ican3_handle_message(mod, &msg);
1332 }
1333
1334 /* process all CAN frames from the fast interface */
1335 while (received < budget) {
1336 ret = ican3_recv_skb(mod);
1337 if (ret)
1338 break;
1339
1340 received++;
1341 }
1342
1343 /* We have processed all packets that the adapter had, but it
1344 * was less than our budget, stop polling */
1345 if (received < budget)
1346 napi_complete(napi);
1347
1348 spin_lock_irqsave(&mod->lock, flags);
1349
1350 /* Wake up the transmit queue if necessary */
1351 if (netif_queue_stopped(mod->ndev) && ican3_txok(mod))
1352 netif_wake_queue(mod->ndev);
1353
1354 spin_unlock_irqrestore(&mod->lock, flags);
1355
1356 /* re-enable interrupt generation */
1357 iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1358 return received;
1359}
1360
1361static irqreturn_t ican3_irq(int irq, void *dev_id)
1362{
1363 struct ican3_dev *mod = dev_id;
1364 u8 stat;
1365
1366 /*
1367 * The interrupt status register on this device reports interrupts
1368 * as zeroes instead of using ones like most other devices
1369 */
1370 stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num);
1371 if (stat == (1 << mod->num))
1372 return IRQ_NONE;
1373
1374 /* clear the MODULbus interrupt from the microcontroller */
1375 ioread8(&mod->dpmctrl->interrupt);
1376
1377 /* disable interrupt generation, schedule the NAPI poller */
1378 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1379 napi_schedule(&mod->napi);
1380 return IRQ_HANDLED;
1381}
1382
1383/*
1384 * Firmware reset, startup, and shutdown
1385 */
1386
1387/*
1388 * Reset an ICAN module to its power-on state
1389 *
1390 * CONTEXT: no network device registered
631eb227
IS		 1391 */
1392static int ican3_reset_module(struct ican3_dev *mod)
1393{
631eb227
IS		 1394 unsigned long start;
1395 u8 runold, runnew;
1396
1397 /* disable interrupts so no more work is scheduled */
1398 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1399
631eb227
IS		 1400 /* the first unallocated page in the DPM is #9 */
1401 mod->free_page = DPM_FREE_START;
1402
1403 ican3_set_page(mod, QUEUE_OLD_CONTROL);
1404 runold = ioread8(mod->dpm + TARGET_RUNNING);
1405
1406 /* reset the module */
e21093ef 1407 iowrite8(0x00, &mod->dpmctrl->hwreset);
631eb227
IS		 1408
1409 /* wait until the module has finished resetting and is running */
1410 start = jiffies;
1411 do {
1412 ican3_set_page(mod, QUEUE_OLD_CONTROL);
1413 runnew = ioread8(mod->dpm + TARGET_RUNNING);
1414 if (runnew == (runold ^ 0xff))
1415 return 0;
1416
1417 msleep(10);
1418 } while (time_before(jiffies, start + HZ / 4));
1419
1420 dev_err(mod->dev, "failed to reset CAN module\n");
1421 return -ETIMEDOUT;
1422}
1423
3c8ac0f2 1424static void ican3_shutdown_module(struct ican3_dev *mod)
631eb227
IS		 1425{
1426 ican3_msg_disconnect(mod);
1427 ican3_reset_module(mod);
1428}
1429
1430/*
1431 * Startup an ICAN module, bringing it into fast mode
1432 */
3c8ac0f2 1433static int ican3_startup_module(struct ican3_dev *mod)
631eb227
IS		 1434{
1435 int ret;
1436
1437 ret = ican3_reset_module(mod);
1438 if (ret) {
1439 dev_err(mod->dev, "unable to reset module\n");
1440 return ret;
1441 }
1442
1443 /* re-enable interrupts so we can send messages */
1444 iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1445
1446 ret = ican3_msg_connect(mod);
1447 if (ret) {
1448 dev_err(mod->dev, "unable to connect to module\n");
1449 return ret;
1450 }
1451
1452 ican3_init_new_host_interface(mod);
1453 ret = ican3_msg_newhostif(mod);
1454 if (ret) {
1455 dev_err(mod->dev, "unable to switch to new-style interface\n");
1456 return ret;
1457 }
1458
1459 /* default to "termination on" */
1460 ret = ican3_set_termination(mod, true);
1461 if (ret) {
1462 dev_err(mod->dev, "unable to enable termination\n");
1463 return ret;
1464 }
1465
1466 /* default to "bus errors enabled" */
30df5888 1467 ret = ican3_set_buserror(mod, 1);
631eb227
IS		 1468 if (ret) {
1469 dev_err(mod->dev, "unable to set bus-error\n");
1470 return ret;
1471 }
1472
1473 ican3_init_fast_host_interface(mod);
1474 ret = ican3_msg_fasthostif(mod);
1475 if (ret) {
1476 dev_err(mod->dev, "unable to switch to fast host interface\n");
1477 return ret;
1478 }
1479
1480 ret = ican3_set_id_filter(mod, true);
1481 if (ret) {
1482 dev_err(mod->dev, "unable to set acceptance filter\n");
1483 return ret;
1484 }
1485
1486 return 0;
1487}
1488
1489/*
1490 * CAN Network Device
1491 */
1492
1493static int ican3_open(struct net_device *ndev)
1494{
1495 struct ican3_dev *mod = netdev_priv(ndev);
631eb227
IS		 1496 int ret;
1497
1498 /* open the CAN layer */
1499 ret = open_candev(ndev);
1500 if (ret) {
1501 dev_err(mod->dev, "unable to start CAN layer\n");
1502 return ret;
1503 }
1504
631eb227
IS		 1505 /* bring the bus online */
1506 ret = ican3_set_bus_state(mod, true);
1507 if (ret) {
1508 dev_err(mod->dev, "unable to set bus-on\n");
1509 close_candev(ndev);
1510 return ret;
1511 }
1512
1513 /* start up the network device */
1514 mod->can.state = CAN_STATE_ERROR_ACTIVE;
1515 netif_start_queue(ndev);
1516
1517 return 0;
1518}
1519
1520static int ican3_stop(struct net_device *ndev)
1521{
1522 struct ican3_dev *mod = netdev_priv(ndev);
1523 int ret;
1524
1525 /* stop the network device xmit routine */
1526 netif_stop_queue(ndev);
1527 mod->can.state = CAN_STATE_STOPPED;
1528
1529 /* bring the bus offline, stop receiving packets */
1530 ret = ican3_set_bus_state(mod, false);
1531 if (ret) {
1532 dev_err(mod->dev, "unable to set bus-off\n");
1533 return ret;
1534 }
1535
83702f69
IS		 1536 /* drop all outstanding echo skbs */
1537 skb_queue_purge(&mod->echoq);
1538
631eb227
IS		 1539 /* close the CAN layer */
1540 close_candev(ndev);
1541 return 0;
1542}
1543
1544static int ican3_xmit(struct sk_buff *skb, struct net_device *ndev)
1545{
1546 struct ican3_dev *mod = netdev_priv(ndev);
631eb227
IS		 1547 struct can_frame *cf = (struct can_frame *)skb->data;
1548 struct ican3_fast_desc desc;
1549 void __iomem *desc_addr;
1550 unsigned long flags;
1551
007890d7
IS		 1552 if (can_dropped_invalid_skb(ndev, skb))
1553 return NETDEV_TX_OK;
1554
631eb227
IS		 1555 spin_lock_irqsave(&mod->lock, flags);
1556
1557 /* check that we can actually transmit */
1558 if (!ican3_txok(mod)) {
83702f69 1559 dev_err(mod->dev, "BUG: no free descriptors\n");
631eb227
IS		 1560 spin_unlock_irqrestore(&mod->lock, flags);
1561 return NETDEV_TX_BUSY;
1562 }
1563
1564 /* copy the control bits of the descriptor */
1565 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1566 desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc));
1567 memset(&desc, 0, sizeof(desc));
1568 memcpy_fromio(&desc, desc_addr, 1);
1569
1570 /* convert the Linux CAN frame into ICAN3 format */
1571 can_frame_to_ican3(mod, cf, &desc);
1572
83702f69
IS		 1573 /*
1574 * This hardware doesn't have TX-done notifications, so we'll try and
1575 * emulate it the best we can using ECHO skbs. Add the skb to the ECHO
1576 * stack. Upon packet reception, check if the ECHO skb and received
1577 * skb match, and use that to wake the queue.
1578 */
1579 ican3_put_echo_skb(mod, skb);
1580
631eb227
IS		 1581 /*
1582 * the programming manual says that you must set the IVALID bit, then
1583 * interrupt, then set the valid bit. Quite weird, but it seems to be
1584 * required for this to work
1585 */
1586 desc.control |= DESC_IVALID;
1587 memcpy_toio(desc_addr, &desc, sizeof(desc));
1588
1589 /* generate a MODULbus interrupt to the microcontroller */
1590 iowrite8(0x01, &mod->dpmctrl->interrupt);
1591
1592 desc.control ^= DESC_VALID;
1593 memcpy_toio(desc_addr, &desc, sizeof(desc));
1594
1595 /* update the next buffer pointer */
1596 mod->fasttx_num = (desc.control & DESC_WRAP) ? 0
1597 : (mod->fasttx_num + 1);
1598
83702f69 1599 /* if there is no free descriptor space, stop the transmit queue */
631eb227
IS		 1600 if (!ican3_txok(mod))
1601 netif_stop_queue(ndev);
1602
1603 spin_unlock_irqrestore(&mod->lock, flags);
1604 return NETDEV_TX_OK;
1605}
1606
1607static const struct net_device_ops ican3_netdev_ops = {
1608 .ndo_open = ican3_open,
1609 .ndo_stop = ican3_stop,
1610 .ndo_start_xmit = ican3_xmit,
1611};
1612
1613/*
1614 * Low-level CAN Device
1615 */
1616
1617/* This structure was stolen from drivers/net/can/sja1000/sja1000.c */
194b9a4c 1618static const struct can_bittiming_const ican3_bittiming_const = {
631eb227
IS		 1619 .name = DRV_NAME,
1620 .tseg1_min = 1,
1621 .tseg1_max = 16,
1622 .tseg2_min = 1,
1623 .tseg2_max = 8,
1624 .sjw_max = 4,
1625 .brp_min = 1,
1626 .brp_max = 64,
1627 .brp_inc = 1,
1628};
1629
1630/*
1631 * This routine was stolen from drivers/net/can/sja1000/sja1000.c
1632 *
1633 * The bittiming register command for the ICAN3 just sets the bit timing
1634 * registers on the SJA1000 chip directly
1635 */
1636static int ican3_set_bittiming(struct net_device *ndev)
1637{
1638 struct ican3_dev *mod = netdev_priv(ndev);
1639 struct can_bittiming *bt = &mod->can.bittiming;
1640 struct ican3_msg msg;
1641 u8 btr0, btr1;
1642
1643 btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
1644 btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
1645 (((bt->phase_seg2 - 1) & 0x7) << 4);
1646 if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
1647 btr1 |= 0x80;
1648
1649 memset(&msg, 0, sizeof(msg));
1650 msg.spec = MSG_CBTRREQ;
1651 msg.len = cpu_to_le16(4);
1652 msg.data[0] = 0x00;
1653 msg.data[1] = 0x00;
1654 msg.data[2] = btr0;
1655 msg.data[3] = btr1;
1656
1657 return ican3_send_msg(mod, &msg);
1658}
1659
1660static int ican3_set_mode(struct net_device *ndev, enum can_mode mode)
1661{
1662 struct ican3_dev *mod = netdev_priv(ndev);
1663 int ret;
1664
1665 if (mode != CAN_MODE_START)
1666 return -ENOTSUPP;
1667
1668 /* bring the bus online */
1669 ret = ican3_set_bus_state(mod, true);
1670 if (ret) {
1671 dev_err(mod->dev, "unable to set bus-on\n");
1672 return ret;
1673 }
1674
1675 /* start up the network device */
1676 mod->can.state = CAN_STATE_ERROR_ACTIVE;
1677
1678 if (netif_queue_stopped(ndev))
1679 netif_wake_queue(ndev);
1680
1681 return 0;
1682}
1683
1684static int ican3_get_berr_counter(const struct net_device *ndev,
1685 struct can_berr_counter *bec)
1686{
1687 struct ican3_dev *mod = netdev_priv(ndev);
1688 int ret;
1689
1690 ret = ican3_send_inquiry(mod, INQUIRY_STATUS);
1691 if (ret)
1692 return ret;
1693
1694 ret = wait_for_completion_timeout(&mod->buserror_comp, HZ);
c70edb9e 1695 if (ret == 0) {
631eb227
IS		 1696 dev_info(mod->dev, "%s timed out\n", __func__);
1697 return -ETIMEDOUT;
1698 }
1699
1700 bec->rxerr = mod->bec.rxerr;
1701 bec->txerr = mod->bec.txerr;
1702 return 0;
1703}
1704
1705/*
1706 * Sysfs Attributes
1707 */
1708
1709static ssize_t ican3_sysfs_show_term(struct device *dev,
1710 struct device_attribute *attr,
1711 char *buf)
1712{
1713 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1714 int ret;
1715
1716 ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION);
1717 if (ret)
1718 return ret;
1719
1720 ret = wait_for_completion_timeout(&mod->termination_comp, HZ);
c70edb9e 1721 if (ret == 0) {
631eb227
IS		 1722 dev_info(mod->dev, "%s timed out\n", __func__);
1723 return -ETIMEDOUT;
1724 }
1725
1726 return snprintf(buf, PAGE_SIZE, "%u\n", mod->termination_enabled);
1727}
1728
1729static ssize_t ican3_sysfs_set_term(struct device *dev,
1730 struct device_attribute *attr,
1731 const char *buf, size_t count)
1732{
1733 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1734 unsigned long enable;
1735 int ret;
1736
0672f0ab 1737 if (kstrtoul(buf, 0, &enable))
631eb227
IS		 1738 return -EINVAL;
1739
1740 ret = ican3_set_termination(mod, enable);
1741 if (ret)
1742 return ret;
1743
1744 return count;
1745}
1746
1e6d93e4 1747static DEVICE_ATTR(termination, S_IWUSR | S_IRUGO, ican3_sysfs_show_term,
631eb227
IS		 1748 ican3_sysfs_set_term);
1749
1750static struct attribute *ican3_sysfs_attrs[] = {
1751 &dev_attr_termination.attr,
1752 NULL,
1753};
1754
1755static struct attribute_group ican3_sysfs_attr_group = {
1756 .attrs = ican3_sysfs_attrs,
1757};
1758
1759/*
1760 * PCI Subsystem
1761 */
1762
3c8ac0f2 1763static int ican3_probe(struct platform_device *pdev)
631eb227
IS		 1764{
1765 struct janz_platform_data *pdata;
1766 struct net_device *ndev;
1767 struct ican3_dev *mod;
1768 struct resource *res;
1769 struct device *dev;
1770 int ret;
1771
3d2bdf75 1772 pdata = pdev->dev.platform_data;
631eb227
IS		 1773 if (!pdata)
1774 return -ENXIO;
1775
1776 dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno);
1777
1778 /* save the struct device for printing */
1779 dev = &pdev->dev;
1780
1781 /* allocate the CAN device and private data */
1782 ndev = alloc_candev(sizeof(*mod), 0);
1783 if (!ndev) {
1784 dev_err(dev, "unable to allocate CANdev\n");
1785 ret = -ENOMEM;
1786 goto out_return;
1787 }
1788
1789 platform_set_drvdata(pdev, ndev);
1790 mod = netdev_priv(ndev);
1791 mod->ndev = ndev;
1792 mod->dev = &pdev->dev;
1793 mod->num = pdata->modno;
1794 netif_napi_add(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS);
83702f69 1795 skb_queue_head_init(&mod->echoq);
631eb227
IS		 1796 spin_lock_init(&mod->lock);
1797 init_completion(&mod->termination_comp);
1798 init_completion(&mod->buserror_comp);
1799
1800 /* setup device-specific sysfs attributes */
1801 ndev->sysfs_groups[0] = &ican3_sysfs_attr_group;
1802
1803 /* the first unallocated page in the DPM is 9 */
1804 mod->free_page = DPM_FREE_START;
1805
1806 ndev->netdev_ops = &ican3_netdev_ops;
1807 ndev->flags |= IFF_ECHO;
1808 SET_NETDEV_DEV(ndev, &pdev->dev);
1809
1810 mod->can.clock.freq = ICAN3_CAN_CLOCK;
1811 mod->can.bittiming_const = &ican3_bittiming_const;
1812 mod->can.do_set_bittiming = ican3_set_bittiming;
1813 mod->can.do_set_mode = ican3_set_mode;
1814 mod->can.do_get_berr_counter = ican3_get_berr_counter;
1815 mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES
3b5c6b9e
IS		 1816 | CAN_CTRLMODE_BERR_REPORTING
1817 | CAN_CTRLMODE_ONE_SHOT;
631eb227
IS		 1818
1819 /* find our IRQ number */
1820 mod->irq = platform_get_irq(pdev, 0);
1821 if (mod->irq < 0) {
1822 dev_err(dev, "IRQ line not found\n");
1823 ret = -ENODEV;
1824 goto out_free_ndev;
1825 }
1826
1827 ndev->irq = mod->irq;
1828
1829 /* get access to the MODULbus registers for this module */
1830 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1831 if (!res) {
1832 dev_err(dev, "MODULbus registers not found\n");
1833 ret = -ENODEV;
1834 goto out_free_ndev;
1835 }
1836
1837 mod->dpm = ioremap(res->start, resource_size(res));
1838 if (!mod->dpm) {
1839 dev_err(dev, "MODULbus registers not ioremap\n");
1840 ret = -ENOMEM;
1841 goto out_free_ndev;
1842 }
1843
1844 mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE;
1845
1846 /* get access to the control registers for this module */
1847 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1848 if (!res) {
1849 dev_err(dev, "CONTROL registers not found\n");
1850 ret = -ENODEV;
1851 goto out_iounmap_dpm;
1852 }
1853
1854 mod->ctrl = ioremap(res->start, resource_size(res));
1855 if (!mod->ctrl) {
1856 dev_err(dev, "CONTROL registers not ioremap\n");
1857 ret = -ENOMEM;
1858 goto out_iounmap_dpm;
1859 }
1860
1861 /* disable our IRQ, then hookup the IRQ handler */
1862 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1863 ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod);
1864 if (ret) {
1865 dev_err(dev, "unable to request IRQ\n");
1866 goto out_iounmap_ctrl;
1867 }
1868
1869 /* reset and initialize the CAN controller into fast mode */
1870 napi_enable(&mod->napi);
1871 ret = ican3_startup_module(mod);
1872 if (ret) {
1873 dev_err(dev, "%s: unable to start CANdev\n", __func__);
1874 goto out_free_irq;
1875 }
1876
1877 /* register with the Linux CAN layer */
1878 ret = register_candev(ndev);
1879 if (ret) {
1880 dev_err(dev, "%s: unable to register CANdev\n", __func__);
1881 goto out_free_irq;
1882 }
1883
1884 dev_info(dev, "module %d: registered CAN device\n", pdata->modno);
1885 return 0;
1886
1887out_free_irq:
1888 napi_disable(&mod->napi);
1889 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1890 free_irq(mod->irq, mod);
1891out_iounmap_ctrl:
1892 iounmap(mod->ctrl);
1893out_iounmap_dpm:
1894 iounmap(mod->dpm);
1895out_free_ndev:
1896 free_candev(ndev);
1897out_return:
1898 return ret;
1899}
1900
3c8ac0f2 1901static int ican3_remove(struct platform_device *pdev)
631eb227
IS		 1902{
1903 struct net_device *ndev = platform_get_drvdata(pdev);
1904 struct ican3_dev *mod = netdev_priv(ndev);
1905
1906 /* unregister the netdevice, stop interrupts */
1907 unregister_netdev(ndev);
1908 napi_disable(&mod->napi);
1909 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1910 free_irq(mod->irq, mod);
1911
1912 /* put the module into reset */
1913 ican3_shutdown_module(mod);
1914
1915 /* unmap all registers */
1916 iounmap(mod->ctrl);
1917 iounmap(mod->dpm);
1918
1919 free_candev(ndev);
1920
1921 return 0;
1922}
1923
1924static struct platform_driver ican3_driver = {
1925 .driver = {
1926 .name = DRV_NAME,
1927 .owner = THIS_MODULE,
1928 },
1929 .probe = ican3_probe,
3c8ac0f2 1930 .remove = ican3_remove,
631eb227
IS		 1931};
1932
871d3372 1933module_platform_driver(ican3_driver);
631eb227
IS		 1934
1935MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
1936MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver");
1937MODULE_LICENSE("GPL");
1938MODULE_ALIAS("platform:janz-ican3");
Linux 6.x block layer and io_uring tree(s)