can: janz-ican3: avoid firmware lockup caused by infinite bus error quota
[linux-2.6-block.git] / drivers / net / can / janz-ican3.c
CommitLineData
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1/*
2 * Janz MODULbus VMOD-ICAN3 CAN Interface Driver
3 *
4 * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/interrupt.h>
16#include <linux/delay.h>
17#include <linux/platform_device.h>
18
19#include <linux/netdevice.h>
20#include <linux/can.h>
21#include <linux/can/dev.h>
22#include <linux/can/error.h>
23
24#include <linux/mfd/janz.h>
b7f080cf 25#include <asm/io.h>
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26
27/* the DPM has 64k of memory, organized into 256x 256 byte pages */
28#define DPM_NUM_PAGES 256
29#define DPM_PAGE_SIZE 256
30#define DPM_PAGE_ADDR(p) ((p) * DPM_PAGE_SIZE)
31
32/* JANZ ICAN3 "old-style" host interface queue page numbers */
33#define QUEUE_OLD_CONTROL 0
34#define QUEUE_OLD_RB0 1
35#define QUEUE_OLD_RB1 2
36#define QUEUE_OLD_WB0 3
37#define QUEUE_OLD_WB1 4
38
39/* Janz ICAN3 "old-style" host interface control registers */
40#define MSYNC_PEER 0x00 /* ICAN only */
41#define MSYNC_LOCL 0x01 /* host only */
42#define TARGET_RUNNING 0x02
43
44#define MSYNC_RB0 0x01
45#define MSYNC_RB1 0x02
46#define MSYNC_RBLW 0x04
47#define MSYNC_RB_MASK (MSYNC_RB0 | MSYNC_RB1)
48
49#define MSYNC_WB0 0x10
50#define MSYNC_WB1 0x20
51#define MSYNC_WBLW 0x40
52#define MSYNC_WB_MASK (MSYNC_WB0 | MSYNC_WB1)
53
54/* Janz ICAN3 "new-style" host interface queue page numbers */
55#define QUEUE_TOHOST 5
56#define QUEUE_FROMHOST_MID 6
57#define QUEUE_FROMHOST_HIGH 7
58#define QUEUE_FROMHOST_LOW 8
59
60/* The first free page in the DPM is #9 */
61#define DPM_FREE_START 9
62
63/* Janz ICAN3 "new-style" and "fast" host interface descriptor flags */
64#define DESC_VALID 0x80
65#define DESC_WRAP 0x40
66#define DESC_INTERRUPT 0x20
67#define DESC_IVALID 0x10
68#define DESC_LEN(len) (len)
69
70/* Janz ICAN3 Firmware Messages */
71#define MSG_CONNECTI 0x02
72#define MSG_DISCONNECT 0x03
73#define MSG_IDVERS 0x04
74#define MSG_MSGLOST 0x05
75#define MSG_NEWHOSTIF 0x08
76#define MSG_INQUIRY 0x0a
77#define MSG_SETAFILMASK 0x10
78#define MSG_INITFDPMQUEUE 0x11
79#define MSG_HWCONF 0x12
80#define MSG_FMSGLOST 0x15
81#define MSG_CEVTIND 0x37
82#define MSG_CBTRREQ 0x41
83#define MSG_COFFREQ 0x42
84#define MSG_CONREQ 0x43
85#define MSG_CCONFREQ 0x47
86
87/*
88 * Janz ICAN3 CAN Inquiry Message Types
89 *
90 * NOTE: there appears to be a firmware bug here. You must send
91 * NOTE: INQUIRY_STATUS and expect to receive an INQUIRY_EXTENDED
92 * NOTE: response. The controller never responds to a message with
93 * NOTE: the INQUIRY_EXTENDED subspec :(
94 */
95#define INQUIRY_STATUS 0x00
96#define INQUIRY_TERMINATION 0x01
97#define INQUIRY_EXTENDED 0x04
98
99/* Janz ICAN3 CAN Set Acceptance Filter Mask Message Types */
100#define SETAFILMASK_REJECT 0x00
101#define SETAFILMASK_FASTIF 0x02
102
103/* Janz ICAN3 CAN Hardware Configuration Message Types */
104#define HWCONF_TERMINATE_ON 0x01
105#define HWCONF_TERMINATE_OFF 0x00
106
107/* Janz ICAN3 CAN Event Indication Message Types */
108#define CEVTIND_EI 0x01
109#define CEVTIND_DOI 0x02
110#define CEVTIND_LOST 0x04
111#define CEVTIND_FULL 0x08
112#define CEVTIND_BEI 0x10
113
114#define CEVTIND_CHIP_SJA1000 0x02
115
116#define ICAN3_BUSERR_QUOTA_MAX 255
117
118/* Janz ICAN3 CAN Frame Conversion */
119#define ICAN3_ECHO 0x10
120#define ICAN3_EFF_RTR 0x40
121#define ICAN3_SFF_RTR 0x10
122#define ICAN3_EFF 0x80
123
124#define ICAN3_CAN_TYPE_MASK 0x0f
125#define ICAN3_CAN_TYPE_SFF 0x00
126#define ICAN3_CAN_TYPE_EFF 0x01
127
128#define ICAN3_CAN_DLC_MASK 0x0f
129
130/*
131 * SJA1000 Status and Error Register Definitions
132 *
133 * Copied from drivers/net/can/sja1000/sja1000.h
134 */
135
136/* status register content */
137#define SR_BS 0x80
138#define SR_ES 0x40
139#define SR_TS 0x20
140#define SR_RS 0x10
141#define SR_TCS 0x08
142#define SR_TBS 0x04
143#define SR_DOS 0x02
144#define SR_RBS 0x01
145
146#define SR_CRIT (SR_BS|SR_ES)
147
148/* ECC register */
149#define ECC_SEG 0x1F
150#define ECC_DIR 0x20
151#define ECC_ERR 6
152#define ECC_BIT 0x00
153#define ECC_FORM 0x40
154#define ECC_STUFF 0x80
155#define ECC_MASK 0xc0
156
157/* Number of buffers for use in the "new-style" host interface */
158#define ICAN3_NEW_BUFFERS 16
159
160/* Number of buffers for use in the "fast" host interface */
161#define ICAN3_TX_BUFFERS 512
162#define ICAN3_RX_BUFFERS 1024
163
164/* SJA1000 Clock Input */
165#define ICAN3_CAN_CLOCK 8000000
166
167/* Driver Name */
168#define DRV_NAME "janz-ican3"
169
170/* DPM Control Registers -- starts at offset 0x100 in the MODULbus registers */
171struct ican3_dpm_control {
172 /* window address register */
173 u8 window_address;
174 u8 unused1;
175
176 /*
177 * Read access: clear interrupt from microcontroller
178 * Write access: send interrupt to microcontroller
179 */
180 u8 interrupt;
181 u8 unused2;
182
183 /* write-only: reset all hardware on the module */
184 u8 hwreset;
185 u8 unused3;
186
187 /* write-only: generate an interrupt to the TPU */
188 u8 tpuinterrupt;
189};
190
191struct ican3_dev {
192
193 /* must be the first member */
194 struct can_priv can;
195
196 /* CAN network device */
197 struct net_device *ndev;
198 struct napi_struct napi;
199
200 /* Device for printing */
201 struct device *dev;
202
203 /* module number */
204 unsigned int num;
205
206 /* base address of registers and IRQ */
207 struct janz_cmodio_onboard_regs __iomem *ctrl;
208 struct ican3_dpm_control __iomem *dpmctrl;
209 void __iomem *dpm;
210 int irq;
211
212 /* CAN bus termination status */
213 struct completion termination_comp;
214 bool termination_enabled;
215
216 /* CAN bus error status registers */
217 struct completion buserror_comp;
218 struct can_berr_counter bec;
219
220 /* old and new style host interface */
221 unsigned int iftype;
222
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223 /* queue for echo packets */
224 struct sk_buff_head echoq;
225
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226 /*
227 * Any function which changes the current DPM page must hold this
228 * lock while it is performing data accesses. This ensures that the
229 * function will not be preempted and end up reading data from a
230 * different DPM page than it expects.
231 */
232 spinlock_t lock;
233
234 /* new host interface */
235 unsigned int rx_int;
236 unsigned int rx_num;
237 unsigned int tx_num;
238
239 /* fast host interface */
240 unsigned int fastrx_start;
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241 unsigned int fastrx_num;
242 unsigned int fasttx_start;
243 unsigned int fasttx_num;
244
245 /* first free DPM page */
246 unsigned int free_page;
247};
248
249struct ican3_msg {
250 u8 control;
251 u8 spec;
252 __le16 len;
253 u8 data[252];
254};
255
256struct ican3_new_desc {
257 u8 control;
258 u8 pointer;
259};
260
261struct ican3_fast_desc {
262 u8 control;
263 u8 command;
264 u8 data[14];
265};
266
267/* write to the window basic address register */
268static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page)
269{
270 BUG_ON(page >= DPM_NUM_PAGES);
271 iowrite8(page, &mod->dpmctrl->window_address);
272}
273
274/*
275 * ICAN3 "old-style" host interface
276 */
277
278/*
25985edc 279 * Receive a message from the ICAN3 "old-style" firmware interface
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280 *
281 * LOCKING: must hold mod->lock
282 *
283 * returns 0 on success, -ENOMEM when no message exists
284 */
285static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
286{
287 unsigned int mbox, mbox_page;
288 u8 locl, peer, xord;
289
290 /* get the MSYNC registers */
291 ican3_set_page(mod, QUEUE_OLD_CONTROL);
292 peer = ioread8(mod->dpm + MSYNC_PEER);
293 locl = ioread8(mod->dpm + MSYNC_LOCL);
294 xord = locl ^ peer;
295
296 if ((xord & MSYNC_RB_MASK) == 0x00) {
297 dev_dbg(mod->dev, "no mbox for reading\n");
298 return -ENOMEM;
299 }
300
301 /* find the first free mbox to read */
302 if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK)
303 mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1;
304 else
305 mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1;
306
307 /* copy the message */
308 mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1;
309 ican3_set_page(mod, mbox_page);
310 memcpy_fromio(msg, mod->dpm, sizeof(*msg));
311
312 /*
313 * notify the firmware that the read buffer is available
314 * for it to fill again
315 */
316 locl ^= mbox;
317
318 ican3_set_page(mod, QUEUE_OLD_CONTROL);
319 iowrite8(locl, mod->dpm + MSYNC_LOCL);
320 return 0;
321}
322
323/*
324 * Send a message through the "old-style" firmware interface
325 *
326 * LOCKING: must hold mod->lock
327 *
328 * returns 0 on success, -ENOMEM when no free space exists
329 */
330static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
331{
332 unsigned int mbox, mbox_page;
333 u8 locl, peer, xord;
334
335 /* get the MSYNC registers */
336 ican3_set_page(mod, QUEUE_OLD_CONTROL);
337 peer = ioread8(mod->dpm + MSYNC_PEER);
338 locl = ioread8(mod->dpm + MSYNC_LOCL);
339 xord = locl ^ peer;
340
341 if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) {
342 dev_err(mod->dev, "no mbox for writing\n");
343 return -ENOMEM;
344 }
345
346 /* calculate a free mbox to use */
347 mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0;
348
349 /* copy the message to the DPM */
350 mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1;
351 ican3_set_page(mod, mbox_page);
352 memcpy_toio(mod->dpm, msg, sizeof(*msg));
353
354 locl ^= mbox;
355 if (mbox == MSYNC_WB1)
356 locl |= MSYNC_WBLW;
357
358 ican3_set_page(mod, QUEUE_OLD_CONTROL);
359 iowrite8(locl, mod->dpm + MSYNC_LOCL);
360 return 0;
361}
362
363/*
364 * ICAN3 "new-style" Host Interface Setup
365 */
366
367static void __devinit ican3_init_new_host_interface(struct ican3_dev *mod)
368{
369 struct ican3_new_desc desc;
370 unsigned long flags;
371 void __iomem *dst;
372 int i;
373
374 spin_lock_irqsave(&mod->lock, flags);
375
376 /* setup the internal datastructures for RX */
377 mod->rx_num = 0;
378 mod->rx_int = 0;
379
380 /* tohost queue descriptors are in page 5 */
381 ican3_set_page(mod, QUEUE_TOHOST);
382 dst = mod->dpm;
383
384 /* initialize the tohost (rx) queue descriptors: pages 9-24 */
385 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
386 desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */
387 desc.pointer = mod->free_page;
388
389 /* set wrap flag on last buffer */
390 if (i == ICAN3_NEW_BUFFERS - 1)
391 desc.control |= DESC_WRAP;
392
393 memcpy_toio(dst, &desc, sizeof(desc));
394 dst += sizeof(desc);
395 mod->free_page++;
396 }
397
398 /* fromhost (tx) mid queue descriptors are in page 6 */
399 ican3_set_page(mod, QUEUE_FROMHOST_MID);
400 dst = mod->dpm;
401
402 /* setup the internal datastructures for TX */
403 mod->tx_num = 0;
404
405 /* initialize the fromhost mid queue descriptors: pages 25-40 */
406 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
407 desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */
408 desc.pointer = mod->free_page;
409
410 /* set wrap flag on last buffer */
411 if (i == ICAN3_NEW_BUFFERS - 1)
412 desc.control |= DESC_WRAP;
413
414 memcpy_toio(dst, &desc, sizeof(desc));
415 dst += sizeof(desc);
416 mod->free_page++;
417 }
418
419 /* fromhost hi queue descriptors are in page 7 */
420 ican3_set_page(mod, QUEUE_FROMHOST_HIGH);
421 dst = mod->dpm;
422
423 /* initialize only a single buffer in the fromhost hi queue (unused) */
424 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
425 desc.pointer = mod->free_page;
426 memcpy_toio(dst, &desc, sizeof(desc));
427 mod->free_page++;
428
429 /* fromhost low queue descriptors are in page 8 */
430 ican3_set_page(mod, QUEUE_FROMHOST_LOW);
431 dst = mod->dpm;
432
433 /* initialize only a single buffer in the fromhost low queue (unused) */
434 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
435 desc.pointer = mod->free_page;
436 memcpy_toio(dst, &desc, sizeof(desc));
437 mod->free_page++;
438
439 spin_unlock_irqrestore(&mod->lock, flags);
440}
441
442/*
443 * ICAN3 Fast Host Interface Setup
444 */
445
446static void __devinit ican3_init_fast_host_interface(struct ican3_dev *mod)
447{
448 struct ican3_fast_desc desc;
449 unsigned long flags;
450 unsigned int addr;
451 void __iomem *dst;
452 int i;
453
454 spin_lock_irqsave(&mod->lock, flags);
455
456 /* save the start recv page */
457 mod->fastrx_start = mod->free_page;
458 mod->fastrx_num = 0;
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459
460 /* build a single fast tohost queue descriptor */
461 memset(&desc, 0, sizeof(desc));
462 desc.control = 0x00;
463 desc.command = 1;
464
465 /* build the tohost queue descriptor ring in memory */
466 addr = 0;
467 for (i = 0; i < ICAN3_RX_BUFFERS; i++) {
468
469 /* set the wrap bit on the last buffer */
470 if (i == ICAN3_RX_BUFFERS - 1)
471 desc.control |= DESC_WRAP;
472
473 /* switch to the correct page */
474 ican3_set_page(mod, mod->free_page);
475
476 /* copy the descriptor to the DPM */
477 dst = mod->dpm + addr;
478 memcpy_toio(dst, &desc, sizeof(desc));
479 addr += sizeof(desc);
480
481 /* move to the next page if necessary */
482 if (addr >= DPM_PAGE_SIZE) {
483 addr = 0;
484 mod->free_page++;
485 }
486 }
487
488 /* make sure we page-align the next queue */
489 if (addr != 0)
490 mod->free_page++;
491
492 /* save the start xmit page */
493 mod->fasttx_start = mod->free_page;
494 mod->fasttx_num = 0;
495
496 /* build a single fast fromhost queue descriptor */
497 memset(&desc, 0, sizeof(desc));
498 desc.control = DESC_VALID;
499 desc.command = 1;
500
501 /* build the fromhost queue descriptor ring in memory */
502 addr = 0;
503 for (i = 0; i < ICAN3_TX_BUFFERS; i++) {
504
505 /* set the wrap bit on the last buffer */
506 if (i == ICAN3_TX_BUFFERS - 1)
507 desc.control |= DESC_WRAP;
508
509 /* switch to the correct page */
510 ican3_set_page(mod, mod->free_page);
511
512 /* copy the descriptor to the DPM */
513 dst = mod->dpm + addr;
514 memcpy_toio(dst, &desc, sizeof(desc));
515 addr += sizeof(desc);
516
517 /* move to the next page if necessary */
518 if (addr >= DPM_PAGE_SIZE) {
519 addr = 0;
520 mod->free_page++;
521 }
522 }
523
524 spin_unlock_irqrestore(&mod->lock, flags);
525}
526
527/*
528 * ICAN3 "new-style" Host Interface Message Helpers
529 */
530
531/*
532 * LOCKING: must hold mod->lock
533 */
534static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
535{
536 struct ican3_new_desc desc;
537 void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc));
538
539 /* switch to the fromhost mid queue, and read the buffer descriptor */
540 ican3_set_page(mod, QUEUE_FROMHOST_MID);
541 memcpy_fromio(&desc, desc_addr, sizeof(desc));
542
543 if (!(desc.control & DESC_VALID)) {
544 dev_dbg(mod->dev, "%s: no free buffers\n", __func__);
545 return -ENOMEM;
546 }
547
548 /* switch to the data page, copy the data */
549 ican3_set_page(mod, desc.pointer);
550 memcpy_toio(mod->dpm, msg, sizeof(*msg));
551
552 /* switch back to the descriptor, set the valid bit, write it back */
553 ican3_set_page(mod, QUEUE_FROMHOST_MID);
554 desc.control ^= DESC_VALID;
555 memcpy_toio(desc_addr, &desc, sizeof(desc));
556
557 /* update the tx number */
558 mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1);
559 return 0;
560}
561
562/*
563 * LOCKING: must hold mod->lock
564 */
565static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
566{
567 struct ican3_new_desc desc;
568 void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc));
569
570 /* switch to the tohost queue, and read the buffer descriptor */
571 ican3_set_page(mod, QUEUE_TOHOST);
572 memcpy_fromio(&desc, desc_addr, sizeof(desc));
573
574 if (!(desc.control & DESC_VALID)) {
575 dev_dbg(mod->dev, "%s: no buffers to recv\n", __func__);
576 return -ENOMEM;
577 }
578
579 /* switch to the data page, copy the data */
580 ican3_set_page(mod, desc.pointer);
581 memcpy_fromio(msg, mod->dpm, sizeof(*msg));
582
583 /* switch back to the descriptor, toggle the valid bit, write it back */
584 ican3_set_page(mod, QUEUE_TOHOST);
585 desc.control ^= DESC_VALID;
586 memcpy_toio(desc_addr, &desc, sizeof(desc));
587
588 /* update the rx number */
589 mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1);
590 return 0;
591}
592
593/*
594 * Message Send / Recv Helpers
595 */
596
597static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
598{
599 unsigned long flags;
600 int ret;
601
602 spin_lock_irqsave(&mod->lock, flags);
603
604 if (mod->iftype == 0)
605 ret = ican3_old_send_msg(mod, msg);
606 else
607 ret = ican3_new_send_msg(mod, msg);
608
609 spin_unlock_irqrestore(&mod->lock, flags);
610 return ret;
611}
612
613static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
614{
615 unsigned long flags;
616 int ret;
617
618 spin_lock_irqsave(&mod->lock, flags);
619
620 if (mod->iftype == 0)
621 ret = ican3_old_recv_msg(mod, msg);
622 else
623 ret = ican3_new_recv_msg(mod, msg);
624
625 spin_unlock_irqrestore(&mod->lock, flags);
626 return ret;
627}
628
629/*
630 * Quick Pre-constructed Messages
631 */
632
633static int __devinit ican3_msg_connect(struct ican3_dev *mod)
634{
635 struct ican3_msg msg;
636
637 memset(&msg, 0, sizeof(msg));
638 msg.spec = MSG_CONNECTI;
639 msg.len = cpu_to_le16(0);
640
641 return ican3_send_msg(mod, &msg);
642}
643
644static int __devexit ican3_msg_disconnect(struct ican3_dev *mod)
645{
646 struct ican3_msg msg;
647
648 memset(&msg, 0, sizeof(msg));
649 msg.spec = MSG_DISCONNECT;
650 msg.len = cpu_to_le16(0);
651
652 return ican3_send_msg(mod, &msg);
653}
654
655static int __devinit ican3_msg_newhostif(struct ican3_dev *mod)
656{
657 struct ican3_msg msg;
658 int ret;
659
660 memset(&msg, 0, sizeof(msg));
661 msg.spec = MSG_NEWHOSTIF;
662 msg.len = cpu_to_le16(0);
663
664 /* If we're not using the old interface, switching seems bogus */
665 WARN_ON(mod->iftype != 0);
666
667 ret = ican3_send_msg(mod, &msg);
668 if (ret)
669 return ret;
670
671 /* mark the module as using the new host interface */
672 mod->iftype = 1;
673 return 0;
674}
675
676static int __devinit ican3_msg_fasthostif(struct ican3_dev *mod)
677{
678 struct ican3_msg msg;
679 unsigned int addr;
680
681 memset(&msg, 0, sizeof(msg));
682 msg.spec = MSG_INITFDPMQUEUE;
683 msg.len = cpu_to_le16(8);
684
685 /* write the tohost queue start address */
686 addr = DPM_PAGE_ADDR(mod->fastrx_start);
687 msg.data[0] = addr & 0xff;
688 msg.data[1] = (addr >> 8) & 0xff;
689 msg.data[2] = (addr >> 16) & 0xff;
690 msg.data[3] = (addr >> 24) & 0xff;
691
692 /* write the fromhost queue start address */
693 addr = DPM_PAGE_ADDR(mod->fasttx_start);
694 msg.data[4] = addr & 0xff;
695 msg.data[5] = (addr >> 8) & 0xff;
696 msg.data[6] = (addr >> 16) & 0xff;
697 msg.data[7] = (addr >> 24) & 0xff;
698
699 /* If we're not using the new interface yet, we cannot do this */
700 WARN_ON(mod->iftype != 1);
701
702 return ican3_send_msg(mod, &msg);
703}
704
705/*
706 * Setup the CAN filter to either accept or reject all
707 * messages from the CAN bus.
708 */
709static int __devinit ican3_set_id_filter(struct ican3_dev *mod, bool accept)
710{
711 struct ican3_msg msg;
712 int ret;
713
714 /* Standard Frame Format */
715 memset(&msg, 0, sizeof(msg));
716 msg.spec = MSG_SETAFILMASK;
717 msg.len = cpu_to_le16(5);
718 msg.data[0] = 0x00; /* IDLo LSB */
719 msg.data[1] = 0x00; /* IDLo MSB */
720 msg.data[2] = 0xff; /* IDHi LSB */
721 msg.data[3] = 0x07; /* IDHi MSB */
722
723 /* accept all frames for fast host if, or reject all frames */
724 msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
725
726 ret = ican3_send_msg(mod, &msg);
727 if (ret)
728 return ret;
729
730 /* Extended Frame Format */
731 memset(&msg, 0, sizeof(msg));
732 msg.spec = MSG_SETAFILMASK;
733 msg.len = cpu_to_le16(13);
734 msg.data[0] = 0; /* MUX = 0 */
735 msg.data[1] = 0x00; /* IDLo LSB */
736 msg.data[2] = 0x00;
737 msg.data[3] = 0x00;
738 msg.data[4] = 0x20; /* IDLo MSB */
739 msg.data[5] = 0xff; /* IDHi LSB */
740 msg.data[6] = 0xff;
741 msg.data[7] = 0xff;
742 msg.data[8] = 0x3f; /* IDHi MSB */
743
744 /* accept all frames for fast host if, or reject all frames */
745 msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
746
747 return ican3_send_msg(mod, &msg);
748}
749
750/*
751 * Bring the CAN bus online or offline
752 */
753static int ican3_set_bus_state(struct ican3_dev *mod, bool on)
754{
755 struct ican3_msg msg;
756
757 memset(&msg, 0, sizeof(msg));
758 msg.spec = on ? MSG_CONREQ : MSG_COFFREQ;
759 msg.len = cpu_to_le16(0);
760
761 return ican3_send_msg(mod, &msg);
762}
763
764static int ican3_set_termination(struct ican3_dev *mod, bool on)
765{
766 struct ican3_msg msg;
767
768 memset(&msg, 0, sizeof(msg));
769 msg.spec = MSG_HWCONF;
770 msg.len = cpu_to_le16(2);
771 msg.data[0] = 0x00;
772 msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF;
773
774 return ican3_send_msg(mod, &msg);
775}
776
777static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec)
778{
779 struct ican3_msg msg;
780
781 memset(&msg, 0, sizeof(msg));
782 msg.spec = MSG_INQUIRY;
783 msg.len = cpu_to_le16(2);
784 msg.data[0] = subspec;
785 msg.data[1] = 0x00;
786
787 return ican3_send_msg(mod, &msg);
788}
789
790static int ican3_set_buserror(struct ican3_dev *mod, u8 quota)
791{
792 struct ican3_msg msg;
793
794 memset(&msg, 0, sizeof(msg));
795 msg.spec = MSG_CCONFREQ;
796 msg.len = cpu_to_le16(2);
797 msg.data[0] = 0x00;
798 msg.data[1] = quota;
799
800 return ican3_send_msg(mod, &msg);
801}
802
803/*
804 * ICAN3 to Linux CAN Frame Conversion
805 */
806
807static void ican3_to_can_frame(struct ican3_dev *mod,
808 struct ican3_fast_desc *desc,
809 struct can_frame *cf)
810{
811 if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) {
812 if (desc->data[1] & ICAN3_SFF_RTR)
813 cf->can_id |= CAN_RTR_FLAG;
814
815 cf->can_id |= desc->data[0] << 3;
816 cf->can_id |= (desc->data[1] & 0xe0) >> 5;
9e4d6909
MKB
817 cf->can_dlc = get_can_dlc(desc->data[1] & ICAN3_CAN_DLC_MASK);
818 memcpy(cf->data, &desc->data[2], cf->can_dlc);
631eb227 819 } else {
9e4d6909 820 cf->can_dlc = get_can_dlc(desc->data[0] & ICAN3_CAN_DLC_MASK);
631eb227
IS
821 if (desc->data[0] & ICAN3_EFF_RTR)
822 cf->can_id |= CAN_RTR_FLAG;
823
824 if (desc->data[0] & ICAN3_EFF) {
825 cf->can_id |= CAN_EFF_FLAG;
826 cf->can_id |= desc->data[2] << 21; /* 28-21 */
827 cf->can_id |= desc->data[3] << 13; /* 20-13 */
828 cf->can_id |= desc->data[4] << 5; /* 12-5 */
829 cf->can_id |= (desc->data[5] & 0xf8) >> 3;
830 } else {
831 cf->can_id |= desc->data[2] << 3; /* 10-3 */
832 cf->can_id |= desc->data[3] >> 5; /* 2-0 */
833 }
834
9e4d6909 835 memcpy(cf->data, &desc->data[6], cf->can_dlc);
631eb227
IS
836 }
837}
838
839static void can_frame_to_ican3(struct ican3_dev *mod,
840 struct can_frame *cf,
841 struct ican3_fast_desc *desc)
842{
843 /* clear out any stale data in the descriptor */
844 memset(desc->data, 0, sizeof(desc->data));
845
846 /* we always use the extended format, with the ECHO flag set */
847 desc->command = ICAN3_CAN_TYPE_EFF;
848 desc->data[0] |= cf->can_dlc;
849 desc->data[1] |= ICAN3_ECHO;
850
851 if (cf->can_id & CAN_RTR_FLAG)
852 desc->data[0] |= ICAN3_EFF_RTR;
853
854 /* pack the id into the correct places */
855 if (cf->can_id & CAN_EFF_FLAG) {
856 desc->data[0] |= ICAN3_EFF;
857 desc->data[2] = (cf->can_id & 0x1fe00000) >> 21; /* 28-21 */
858 desc->data[3] = (cf->can_id & 0x001fe000) >> 13; /* 20-13 */
859 desc->data[4] = (cf->can_id & 0x00001fe0) >> 5; /* 12-5 */
860 desc->data[5] = (cf->can_id & 0x0000001f) << 3; /* 4-0 */
861 } else {
862 desc->data[2] = (cf->can_id & 0x7F8) >> 3; /* bits 10-3 */
863 desc->data[3] = (cf->can_id & 0x007) << 5; /* bits 2-0 */
864 }
865
866 /* copy the data bits into the descriptor */
9e4d6909 867 memcpy(&desc->data[6], cf->data, cf->can_dlc);
631eb227
IS
868}
869
870/*
871 * Interrupt Handling
872 */
873
874/*
875 * Handle an ID + Version message response from the firmware. We never generate
876 * this message in production code, but it is very useful when debugging to be
877 * able to display this message.
878 */
879static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg)
880{
881 dev_dbg(mod->dev, "IDVERS response: %s\n", msg->data);
882}
883
884static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg)
885{
886 struct net_device *dev = mod->ndev;
887 struct net_device_stats *stats = &dev->stats;
888 struct can_frame *cf;
889 struct sk_buff *skb;
890
891 /*
892 * Report that communication messages with the microcontroller firmware
893 * are being lost. These are never CAN frames, so we do not generate an
894 * error frame for userspace
895 */
896 if (msg->spec == MSG_MSGLOST) {
897 dev_err(mod->dev, "lost %d control messages\n", msg->data[0]);
898 return;
899 }
900
901 /*
902 * Oops, this indicates that we have lost messages in the fast queue,
903 * which are exclusively CAN messages. Our driver isn't reading CAN
904 * frames fast enough.
905 *
906 * We'll pretend that the SJA1000 told us that it ran out of buffer
907 * space, because there is not a better message for this.
908 */
909 skb = alloc_can_err_skb(dev, &cf);
910 if (skb) {
911 cf->can_id |= CAN_ERR_CRTL;
912 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
88b58703 913 stats->rx_over_errors++;
631eb227 914 stats->rx_errors++;
631eb227
IS
915 netif_rx(skb);
916 }
917}
918
919/*
920 * Handle CAN Event Indication Messages from the firmware
921 *
922 * The ICAN3 firmware provides the values of some SJA1000 registers when it
923 * generates this message. The code below is largely copied from the
924 * drivers/net/can/sja1000/sja1000.c file, and adapted as necessary
925 */
926static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)
927{
928 struct net_device *dev = mod->ndev;
929 struct net_device_stats *stats = &dev->stats;
930 enum can_state state = mod->can.state;
83702f69 931 u8 isrc, ecc, status, rxerr, txerr;
631eb227
IS
932 struct can_frame *cf;
933 struct sk_buff *skb;
934
935 /* we can only handle the SJA1000 part */
936 if (msg->data[1] != CEVTIND_CHIP_SJA1000) {
937 dev_err(mod->dev, "unable to handle errors on non-SJA1000\n");
938 return -ENODEV;
939 }
940
941 /* check the message length for sanity */
942 if (le16_to_cpu(msg->len) < 6) {
943 dev_err(mod->dev, "error message too short\n");
944 return -EINVAL;
945 }
946
631eb227 947 isrc = msg->data[0];
83702f69 948 ecc = msg->data[2];
631eb227
IS
949 status = msg->data[3];
950 rxerr = msg->data[4];
951 txerr = msg->data[5];
952
83702f69
IS
953 /*
954 * This hardware lacks any support other than bus error messages to
955 * determine if packet transmission has failed.
956 *
957 * When TX errors happen, one echo skb needs to be dropped from the
958 * front of the queue.
959 *
960 * A small bit of code is duplicated here and below, to avoid error
961 * skb allocation when it will just be freed immediately.
962 */
963 if (isrc == CEVTIND_BEI) {
964 int ret;
965 dev_dbg(mod->dev, "bus error interrupt\n");
966
967 /* TX error */
968 if (!(ecc & ECC_DIR)) {
969 kfree_skb(skb_dequeue(&mod->echoq));
970 stats->tx_errors++;
971 } else {
972 stats->rx_errors++;
973 }
974
30df5888
IS
975 /*
976 * The controller automatically disables bus-error interrupts
977 * and therefore we must re-enable them.
978 */
979 ret = ican3_set_buserror(mod, 1);
980 if (ret) {
981 dev_err(mod->dev, "unable to re-enable bus-error\n");
982 return ret;
983 }
984
83702f69
IS
985 /* bus error reporting is off, return immediately */
986 if (!(mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
987 return 0;
988 }
989
990 skb = alloc_can_err_skb(dev, &cf);
991 if (skb == NULL)
992 return -ENOMEM;
993
631eb227
IS
994 /* data overrun interrupt */
995 if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) {
996 dev_dbg(mod->dev, "data overrun interrupt\n");
997 cf->can_id |= CAN_ERR_CRTL;
998 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
999 stats->rx_over_errors++;
1000 stats->rx_errors++;
1001 }
1002
1003 /* error warning + passive interrupt */
1004 if (isrc == CEVTIND_EI) {
1005 dev_dbg(mod->dev, "error warning + passive interrupt\n");
1006 if (status & SR_BS) {
1007 state = CAN_STATE_BUS_OFF;
1008 cf->can_id |= CAN_ERR_BUSOFF;
1009 can_bus_off(dev);
1010 } else if (status & SR_ES) {
1011 if (rxerr >= 128 || txerr >= 128)
1012 state = CAN_STATE_ERROR_PASSIVE;
1013 else
1014 state = CAN_STATE_ERROR_WARNING;
1015 } else {
1016 state = CAN_STATE_ERROR_ACTIVE;
1017 }
1018 }
1019
1020 /* bus error interrupt */
1021 if (isrc == CEVTIND_BEI) {
631eb227 1022 mod->can.can_stats.bus_error++;
631eb227
IS
1023 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
1024
1025 switch (ecc & ECC_MASK) {
1026 case ECC_BIT:
1027 cf->data[2] |= CAN_ERR_PROT_BIT;
1028 break;
1029 case ECC_FORM:
1030 cf->data[2] |= CAN_ERR_PROT_FORM;
1031 break;
1032 case ECC_STUFF:
1033 cf->data[2] |= CAN_ERR_PROT_STUFF;
1034 break;
1035 default:
1036 cf->data[2] |= CAN_ERR_PROT_UNSPEC;
1037 cf->data[3] = ecc & ECC_SEG;
1038 break;
1039 }
1040
83702f69 1041 if (!(ecc & ECC_DIR))
631eb227
IS
1042 cf->data[2] |= CAN_ERR_PROT_TX;
1043
1044 cf->data[6] = txerr;
1045 cf->data[7] = rxerr;
1046 }
1047
1048 if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING ||
1049 state == CAN_STATE_ERROR_PASSIVE)) {
1050 cf->can_id |= CAN_ERR_CRTL;
1051 if (state == CAN_STATE_ERROR_WARNING) {
1052 mod->can.can_stats.error_warning++;
1053 cf->data[1] = (txerr > rxerr) ?
1054 CAN_ERR_CRTL_TX_WARNING :
1055 CAN_ERR_CRTL_RX_WARNING;
1056 } else {
1057 mod->can.can_stats.error_passive++;
1058 cf->data[1] = (txerr > rxerr) ?
1059 CAN_ERR_CRTL_TX_PASSIVE :
1060 CAN_ERR_CRTL_RX_PASSIVE;
1061 }
1062
1063 cf->data[6] = txerr;
1064 cf->data[7] = rxerr;
1065 }
1066
1067 mod->can.state = state;
631eb227
IS
1068 netif_rx(skb);
1069 return 0;
1070}
1071
1072static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)
1073{
1074 switch (msg->data[0]) {
1075 case INQUIRY_STATUS:
1076 case INQUIRY_EXTENDED:
1077 mod->bec.rxerr = msg->data[5];
1078 mod->bec.txerr = msg->data[6];
1079 complete(&mod->buserror_comp);
1080 break;
1081 case INQUIRY_TERMINATION:
1082 mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON;
1083 complete(&mod->termination_comp);
1084 break;
1085 default:
25985edc 1086 dev_err(mod->dev, "received an unknown inquiry response\n");
631eb227
IS
1087 break;
1088 }
1089}
1090
1091static void ican3_handle_unknown_message(struct ican3_dev *mod,
1092 struct ican3_msg *msg)
1093{
25985edc 1094 dev_warn(mod->dev, "received unknown message: spec 0x%.2x length %d\n",
631eb227
IS
1095 msg->spec, le16_to_cpu(msg->len));
1096}
1097
1098/*
1099 * Handle a control message from the firmware
1100 */
1101static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg)
1102{
1103 dev_dbg(mod->dev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__,
1104 mod->num, msg->spec, le16_to_cpu(msg->len));
1105
1106 switch (msg->spec) {
1107 case MSG_IDVERS:
1108 ican3_handle_idvers(mod, msg);
1109 break;
1110 case MSG_MSGLOST:
1111 case MSG_FMSGLOST:
1112 ican3_handle_msglost(mod, msg);
1113 break;
1114 case MSG_CEVTIND:
1115 ican3_handle_cevtind(mod, msg);
1116 break;
1117 case MSG_INQUIRY:
1118 ican3_handle_inquiry(mod, msg);
1119 break;
1120 default:
1121 ican3_handle_unknown_message(mod, msg);
1122 break;
1123 }
1124}
1125
83702f69
IS
1126/*
1127 * The ican3 needs to store all echo skbs, and therefore cannot
1128 * use the generic infrastructure for this.
1129 */
1130static void ican3_put_echo_skb(struct ican3_dev *mod, struct sk_buff *skb)
1131{
1132 struct sock *srcsk = skb->sk;
1133
1134 if (atomic_read(&skb->users) != 1) {
1135 struct sk_buff *old_skb = skb;
1136
1137 skb = skb_clone(old_skb, GFP_ATOMIC);
1138 kfree_skb(old_skb);
1139 if (!skb)
1140 return;
1141 } else {
1142 skb_orphan(skb);
1143 }
1144
1145 skb->sk = srcsk;
1146
1147 /* save this skb for tx interrupt echo handling */
1148 skb_queue_tail(&mod->echoq, skb);
1149}
1150
1151static unsigned int ican3_get_echo_skb(struct ican3_dev *mod)
1152{
1153 struct sk_buff *skb = skb_dequeue(&mod->echoq);
1154 struct can_frame *cf;
1155 u8 dlc;
1156
1157 /* this should never trigger unless there is a driver bug */
1158 if (!skb) {
1159 netdev_err(mod->ndev, "BUG: echo skb not occupied\n");
1160 return 0;
1161 }
1162
1163 cf = (struct can_frame *)skb->data;
1164 dlc = cf->can_dlc;
1165
1166 /* check flag whether this packet has to be looped back */
1167 if (skb->pkt_type != PACKET_LOOPBACK) {
1168 kfree_skb(skb);
1169 return dlc;
1170 }
1171
1172 skb->protocol = htons(ETH_P_CAN);
1173 skb->pkt_type = PACKET_BROADCAST;
1174 skb->ip_summed = CHECKSUM_UNNECESSARY;
1175 skb->dev = mod->ndev;
1176 netif_receive_skb(skb);
1177 return dlc;
1178}
1179
1180/*
1181 * Compare an skb with an existing echo skb
1182 *
1183 * This function will be used on devices which have a hardware loopback.
1184 * On these devices, this function can be used to compare a received skb
1185 * with the saved echo skbs so that the hardware echo skb can be dropped.
1186 *
1187 * Returns true if the skb's are identical, false otherwise.
1188 */
1189static bool ican3_echo_skb_matches(struct ican3_dev *mod, struct sk_buff *skb)
1190{
1191 struct can_frame *cf = (struct can_frame *)skb->data;
1192 struct sk_buff *echo_skb = skb_peek(&mod->echoq);
1193 struct can_frame *echo_cf;
1194
1195 if (!echo_skb)
1196 return false;
1197
1198 echo_cf = (struct can_frame *)echo_skb->data;
1199 if (cf->can_id != echo_cf->can_id)
1200 return false;
1201
1202 if (cf->can_dlc != echo_cf->can_dlc)
1203 return false;
1204
1205 return memcmp(cf->data, echo_cf->data, cf->can_dlc) == 0;
1206}
1207
631eb227
IS
1208/*
1209 * Check that there is room in the TX ring to transmit another skb
1210 *
1211 * LOCKING: must hold mod->lock
1212 */
1213static bool ican3_txok(struct ican3_dev *mod)
1214{
1215 struct ican3_fast_desc __iomem *desc;
1216 u8 control;
1217
83702f69
IS
1218 /* check that we have echo queue space */
1219 if (skb_queue_len(&mod->echoq) >= ICAN3_TX_BUFFERS)
1220 return false;
1221
631eb227
IS
1222 /* copy the control bits of the descriptor */
1223 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1224 desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc));
1225 control = ioread8(&desc->control);
1226
1227 /* if the control bits are not valid, then we have no more space */
1228 if (!(control & DESC_VALID))
1229 return false;
1230
1231 return true;
1232}
1233
1234/*
25985edc 1235 * Receive one CAN frame from the hardware
631eb227 1236 *
631eb227
IS
1237 * CONTEXT: must be called from user context
1238 */
1239static int ican3_recv_skb(struct ican3_dev *mod)
1240{
1241 struct net_device *ndev = mod->ndev;
1242 struct net_device_stats *stats = &ndev->stats;
1243 struct ican3_fast_desc desc;
1244 void __iomem *desc_addr;
1245 struct can_frame *cf;
1246 struct sk_buff *skb;
1247 unsigned long flags;
1248
1249 spin_lock_irqsave(&mod->lock, flags);
1250
1251 /* copy the whole descriptor */
1252 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1253 desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc));
1254 memcpy_fromio(&desc, desc_addr, sizeof(desc));
1255
1256 spin_unlock_irqrestore(&mod->lock, flags);
1257
1258 /* check that we actually have a CAN frame */
1259 if (!(desc.control & DESC_VALID))
1260 return -ENOBUFS;
1261
1262 /* allocate an skb */
1263 skb = alloc_can_skb(ndev, &cf);
1264 if (unlikely(skb == NULL)) {
1265 stats->rx_dropped++;
1266 goto err_noalloc;
1267 }
1268
1269 /* convert the ICAN3 frame into Linux CAN format */
1270 ican3_to_can_frame(mod, &desc, cf);
1271
83702f69
IS
1272 /*
1273 * If this is an ECHO frame received from the hardware loopback
1274 * feature, use the skb saved in the ECHO stack instead. This allows
1275 * the Linux CAN core to support CAN_RAW_RECV_OWN_MSGS correctly.
1276 *
1277 * Since this is a confirmation of a successfully transmitted packet
1278 * sent from this host, update the transmit statistics.
1279 *
1280 * Also, the netdevice queue needs to be allowed to send packets again.
1281 */
1282 if (ican3_echo_skb_matches(mod, skb)) {
1283 stats->tx_packets++;
1284 stats->tx_bytes += ican3_get_echo_skb(mod);
1285 kfree_skb(skb);
1286 goto err_noalloc;
1287 }
1288
1289 /* update statistics, receive the skb */
631eb227
IS
1290 stats->rx_packets++;
1291 stats->rx_bytes += cf->can_dlc;
83702f69 1292 netif_receive_skb(skb);
631eb227
IS
1293
1294err_noalloc:
1295 /* toggle the valid bit and return the descriptor to the ring */
1296 desc.control ^= DESC_VALID;
1297
1298 spin_lock_irqsave(&mod->lock, flags);
1299
1300 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1301 memcpy_toio(desc_addr, &desc, 1);
1302
1303 /* update the next buffer pointer */
1304 mod->fastrx_num = (desc.control & DESC_WRAP) ? 0
1305 : (mod->fastrx_num + 1);
1306
1307 /* there are still more buffers to process */
1308 spin_unlock_irqrestore(&mod->lock, flags);
1309 return 0;
1310}
1311
1312static int ican3_napi(struct napi_struct *napi, int budget)
1313{
1314 struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi);
631eb227
IS
1315 unsigned long flags;
1316 int received = 0;
1317 int ret;
1318
1319 /* process all communication messages */
1320 while (true) {
83702f69 1321 struct ican3_msg msg;
631eb227
IS
1322 ret = ican3_recv_msg(mod, &msg);
1323 if (ret)
1324 break;
1325
1326 ican3_handle_message(mod, &msg);
1327 }
1328
1329 /* process all CAN frames from the fast interface */
1330 while (received < budget) {
1331 ret = ican3_recv_skb(mod);
1332 if (ret)
1333 break;
1334
1335 received++;
1336 }
1337
1338 /* We have processed all packets that the adapter had, but it
1339 * was less than our budget, stop polling */
1340 if (received < budget)
1341 napi_complete(napi);
1342
1343 spin_lock_irqsave(&mod->lock, flags);
1344
1345 /* Wake up the transmit queue if necessary */
1346 if (netif_queue_stopped(mod->ndev) && ican3_txok(mod))
1347 netif_wake_queue(mod->ndev);
1348
1349 spin_unlock_irqrestore(&mod->lock, flags);
1350
1351 /* re-enable interrupt generation */
1352 iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1353 return received;
1354}
1355
1356static irqreturn_t ican3_irq(int irq, void *dev_id)
1357{
1358 struct ican3_dev *mod = dev_id;
1359 u8 stat;
1360
1361 /*
1362 * The interrupt status register on this device reports interrupts
1363 * as zeroes instead of using ones like most other devices
1364 */
1365 stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num);
1366 if (stat == (1 << mod->num))
1367 return IRQ_NONE;
1368
1369 /* clear the MODULbus interrupt from the microcontroller */
1370 ioread8(&mod->dpmctrl->interrupt);
1371
1372 /* disable interrupt generation, schedule the NAPI poller */
1373 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1374 napi_schedule(&mod->napi);
1375 return IRQ_HANDLED;
1376}
1377
1378/*
1379 * Firmware reset, startup, and shutdown
1380 */
1381
1382/*
1383 * Reset an ICAN module to its power-on state
1384 *
1385 * CONTEXT: no network device registered
631eb227
IS
1386 */
1387static int ican3_reset_module(struct ican3_dev *mod)
1388{
1389 u8 val = 1 << mod->num;
1390 unsigned long start;
1391 u8 runold, runnew;
1392
1393 /* disable interrupts so no more work is scheduled */
1394 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1395
631eb227
IS
1396 /* the first unallocated page in the DPM is #9 */
1397 mod->free_page = DPM_FREE_START;
1398
1399 ican3_set_page(mod, QUEUE_OLD_CONTROL);
1400 runold = ioread8(mod->dpm + TARGET_RUNNING);
1401
1402 /* reset the module */
1403 iowrite8(val, &mod->ctrl->reset_assert);
1404 iowrite8(val, &mod->ctrl->reset_deassert);
1405
1406 /* wait until the module has finished resetting and is running */
1407 start = jiffies;
1408 do {
1409 ican3_set_page(mod, QUEUE_OLD_CONTROL);
1410 runnew = ioread8(mod->dpm + TARGET_RUNNING);
1411 if (runnew == (runold ^ 0xff))
1412 return 0;
1413
1414 msleep(10);
1415 } while (time_before(jiffies, start + HZ / 4));
1416
1417 dev_err(mod->dev, "failed to reset CAN module\n");
1418 return -ETIMEDOUT;
1419}
1420
1421static void __devexit ican3_shutdown_module(struct ican3_dev *mod)
1422{
1423 ican3_msg_disconnect(mod);
1424 ican3_reset_module(mod);
1425}
1426
1427/*
1428 * Startup an ICAN module, bringing it into fast mode
1429 */
1430static int __devinit ican3_startup_module(struct ican3_dev *mod)
1431{
1432 int ret;
1433
1434 ret = ican3_reset_module(mod);
1435 if (ret) {
1436 dev_err(mod->dev, "unable to reset module\n");
1437 return ret;
1438 }
1439
1440 /* re-enable interrupts so we can send messages */
1441 iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1442
1443 ret = ican3_msg_connect(mod);
1444 if (ret) {
1445 dev_err(mod->dev, "unable to connect to module\n");
1446 return ret;
1447 }
1448
1449 ican3_init_new_host_interface(mod);
1450 ret = ican3_msg_newhostif(mod);
1451 if (ret) {
1452 dev_err(mod->dev, "unable to switch to new-style interface\n");
1453 return ret;
1454 }
1455
1456 /* default to "termination on" */
1457 ret = ican3_set_termination(mod, true);
1458 if (ret) {
1459 dev_err(mod->dev, "unable to enable termination\n");
1460 return ret;
1461 }
1462
1463 /* default to "bus errors enabled" */
30df5888 1464 ret = ican3_set_buserror(mod, 1);
631eb227
IS
1465 if (ret) {
1466 dev_err(mod->dev, "unable to set bus-error\n");
1467 return ret;
1468 }
1469
1470 ican3_init_fast_host_interface(mod);
1471 ret = ican3_msg_fasthostif(mod);
1472 if (ret) {
1473 dev_err(mod->dev, "unable to switch to fast host interface\n");
1474 return ret;
1475 }
1476
1477 ret = ican3_set_id_filter(mod, true);
1478 if (ret) {
1479 dev_err(mod->dev, "unable to set acceptance filter\n");
1480 return ret;
1481 }
1482
1483 return 0;
1484}
1485
1486/*
1487 * CAN Network Device
1488 */
1489
1490static int ican3_open(struct net_device *ndev)
1491{
1492 struct ican3_dev *mod = netdev_priv(ndev);
631eb227
IS
1493 int ret;
1494
1495 /* open the CAN layer */
1496 ret = open_candev(ndev);
1497 if (ret) {
1498 dev_err(mod->dev, "unable to start CAN layer\n");
1499 return ret;
1500 }
1501
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IS
1502 /* bring the bus online */
1503 ret = ican3_set_bus_state(mod, true);
1504 if (ret) {
1505 dev_err(mod->dev, "unable to set bus-on\n");
1506 close_candev(ndev);
1507 return ret;
1508 }
1509
1510 /* start up the network device */
1511 mod->can.state = CAN_STATE_ERROR_ACTIVE;
1512 netif_start_queue(ndev);
1513
1514 return 0;
1515}
1516
1517static int ican3_stop(struct net_device *ndev)
1518{
1519 struct ican3_dev *mod = netdev_priv(ndev);
1520 int ret;
1521
1522 /* stop the network device xmit routine */
1523 netif_stop_queue(ndev);
1524 mod->can.state = CAN_STATE_STOPPED;
1525
1526 /* bring the bus offline, stop receiving packets */
1527 ret = ican3_set_bus_state(mod, false);
1528 if (ret) {
1529 dev_err(mod->dev, "unable to set bus-off\n");
1530 return ret;
1531 }
1532
83702f69
IS
1533 /* drop all outstanding echo skbs */
1534 skb_queue_purge(&mod->echoq);
1535
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IS
1536 /* close the CAN layer */
1537 close_candev(ndev);
1538 return 0;
1539}
1540
1541static int ican3_xmit(struct sk_buff *skb, struct net_device *ndev)
1542{
1543 struct ican3_dev *mod = netdev_priv(ndev);
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IS
1544 struct can_frame *cf = (struct can_frame *)skb->data;
1545 struct ican3_fast_desc desc;
1546 void __iomem *desc_addr;
1547 unsigned long flags;
1548
007890d7
IS
1549 if (can_dropped_invalid_skb(ndev, skb))
1550 return NETDEV_TX_OK;
1551
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IS
1552 spin_lock_irqsave(&mod->lock, flags);
1553
1554 /* check that we can actually transmit */
1555 if (!ican3_txok(mod)) {
83702f69 1556 dev_err(mod->dev, "BUG: no free descriptors\n");
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IS
1557 spin_unlock_irqrestore(&mod->lock, flags);
1558 return NETDEV_TX_BUSY;
1559 }
1560
1561 /* copy the control bits of the descriptor */
1562 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1563 desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc));
1564 memset(&desc, 0, sizeof(desc));
1565 memcpy_fromio(&desc, desc_addr, 1);
1566
1567 /* convert the Linux CAN frame into ICAN3 format */
1568 can_frame_to_ican3(mod, cf, &desc);
1569
83702f69
IS
1570 /*
1571 * This hardware doesn't have TX-done notifications, so we'll try and
1572 * emulate it the best we can using ECHO skbs. Add the skb to the ECHO
1573 * stack. Upon packet reception, check if the ECHO skb and received
1574 * skb match, and use that to wake the queue.
1575 */
1576 ican3_put_echo_skb(mod, skb);
1577
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IS
1578 /*
1579 * the programming manual says that you must set the IVALID bit, then
1580 * interrupt, then set the valid bit. Quite weird, but it seems to be
1581 * required for this to work
1582 */
1583 desc.control |= DESC_IVALID;
1584 memcpy_toio(desc_addr, &desc, sizeof(desc));
1585
1586 /* generate a MODULbus interrupt to the microcontroller */
1587 iowrite8(0x01, &mod->dpmctrl->interrupt);
1588
1589 desc.control ^= DESC_VALID;
1590 memcpy_toio(desc_addr, &desc, sizeof(desc));
1591
1592 /* update the next buffer pointer */
1593 mod->fasttx_num = (desc.control & DESC_WRAP) ? 0
1594 : (mod->fasttx_num + 1);
1595
83702f69 1596 /* if there is no free descriptor space, stop the transmit queue */
631eb227
IS
1597 if (!ican3_txok(mod))
1598 netif_stop_queue(ndev);
1599
1600 spin_unlock_irqrestore(&mod->lock, flags);
1601 return NETDEV_TX_OK;
1602}
1603
1604static const struct net_device_ops ican3_netdev_ops = {
1605 .ndo_open = ican3_open,
1606 .ndo_stop = ican3_stop,
1607 .ndo_start_xmit = ican3_xmit,
1608};
1609
1610/*
1611 * Low-level CAN Device
1612 */
1613
1614/* This structure was stolen from drivers/net/can/sja1000/sja1000.c */
194b9a4c 1615static const struct can_bittiming_const ican3_bittiming_const = {
631eb227
IS
1616 .name = DRV_NAME,
1617 .tseg1_min = 1,
1618 .tseg1_max = 16,
1619 .tseg2_min = 1,
1620 .tseg2_max = 8,
1621 .sjw_max = 4,
1622 .brp_min = 1,
1623 .brp_max = 64,
1624 .brp_inc = 1,
1625};
1626
1627/*
1628 * This routine was stolen from drivers/net/can/sja1000/sja1000.c
1629 *
1630 * The bittiming register command for the ICAN3 just sets the bit timing
1631 * registers on the SJA1000 chip directly
1632 */
1633static int ican3_set_bittiming(struct net_device *ndev)
1634{
1635 struct ican3_dev *mod = netdev_priv(ndev);
1636 struct can_bittiming *bt = &mod->can.bittiming;
1637 struct ican3_msg msg;
1638 u8 btr0, btr1;
1639
1640 btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
1641 btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
1642 (((bt->phase_seg2 - 1) & 0x7) << 4);
1643 if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
1644 btr1 |= 0x80;
1645
1646 memset(&msg, 0, sizeof(msg));
1647 msg.spec = MSG_CBTRREQ;
1648 msg.len = cpu_to_le16(4);
1649 msg.data[0] = 0x00;
1650 msg.data[1] = 0x00;
1651 msg.data[2] = btr0;
1652 msg.data[3] = btr1;
1653
1654 return ican3_send_msg(mod, &msg);
1655}
1656
1657static int ican3_set_mode(struct net_device *ndev, enum can_mode mode)
1658{
1659 struct ican3_dev *mod = netdev_priv(ndev);
1660 int ret;
1661
1662 if (mode != CAN_MODE_START)
1663 return -ENOTSUPP;
1664
1665 /* bring the bus online */
1666 ret = ican3_set_bus_state(mod, true);
1667 if (ret) {
1668 dev_err(mod->dev, "unable to set bus-on\n");
1669 return ret;
1670 }
1671
1672 /* start up the network device */
1673 mod->can.state = CAN_STATE_ERROR_ACTIVE;
1674
1675 if (netif_queue_stopped(ndev))
1676 netif_wake_queue(ndev);
1677
1678 return 0;
1679}
1680
1681static int ican3_get_berr_counter(const struct net_device *ndev,
1682 struct can_berr_counter *bec)
1683{
1684 struct ican3_dev *mod = netdev_priv(ndev);
1685 int ret;
1686
1687 ret = ican3_send_inquiry(mod, INQUIRY_STATUS);
1688 if (ret)
1689 return ret;
1690
1691 ret = wait_for_completion_timeout(&mod->buserror_comp, HZ);
1692 if (ret <= 0) {
1693 dev_info(mod->dev, "%s timed out\n", __func__);
1694 return -ETIMEDOUT;
1695 }
1696
1697 bec->rxerr = mod->bec.rxerr;
1698 bec->txerr = mod->bec.txerr;
1699 return 0;
1700}
1701
1702/*
1703 * Sysfs Attributes
1704 */
1705
1706static ssize_t ican3_sysfs_show_term(struct device *dev,
1707 struct device_attribute *attr,
1708 char *buf)
1709{
1710 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1711 int ret;
1712
1713 ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION);
1714 if (ret)
1715 return ret;
1716
1717 ret = wait_for_completion_timeout(&mod->termination_comp, HZ);
1718 if (ret <= 0) {
1719 dev_info(mod->dev, "%s timed out\n", __func__);
1720 return -ETIMEDOUT;
1721 }
1722
1723 return snprintf(buf, PAGE_SIZE, "%u\n", mod->termination_enabled);
1724}
1725
1726static ssize_t ican3_sysfs_set_term(struct device *dev,
1727 struct device_attribute *attr,
1728 const char *buf, size_t count)
1729{
1730 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1731 unsigned long enable;
1732 int ret;
1733
1734 if (strict_strtoul(buf, 0, &enable))
1735 return -EINVAL;
1736
1737 ret = ican3_set_termination(mod, enable);
1738 if (ret)
1739 return ret;
1740
1741 return count;
1742}
1743
1e6d93e4 1744static DEVICE_ATTR(termination, S_IWUSR | S_IRUGO, ican3_sysfs_show_term,
631eb227
IS
1745 ican3_sysfs_set_term);
1746
1747static struct attribute *ican3_sysfs_attrs[] = {
1748 &dev_attr_termination.attr,
1749 NULL,
1750};
1751
1752static struct attribute_group ican3_sysfs_attr_group = {
1753 .attrs = ican3_sysfs_attrs,
1754};
1755
1756/*
1757 * PCI Subsystem
1758 */
1759
1760static int __devinit ican3_probe(struct platform_device *pdev)
1761{
1762 struct janz_platform_data *pdata;
1763 struct net_device *ndev;
1764 struct ican3_dev *mod;
1765 struct resource *res;
1766 struct device *dev;
1767 int ret;
1768
3d2bdf75 1769 pdata = pdev->dev.platform_data;
631eb227
IS
1770 if (!pdata)
1771 return -ENXIO;
1772
1773 dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno);
1774
1775 /* save the struct device for printing */
1776 dev = &pdev->dev;
1777
1778 /* allocate the CAN device and private data */
1779 ndev = alloc_candev(sizeof(*mod), 0);
1780 if (!ndev) {
1781 dev_err(dev, "unable to allocate CANdev\n");
1782 ret = -ENOMEM;
1783 goto out_return;
1784 }
1785
1786 platform_set_drvdata(pdev, ndev);
1787 mod = netdev_priv(ndev);
1788 mod->ndev = ndev;
1789 mod->dev = &pdev->dev;
1790 mod->num = pdata->modno;
1791 netif_napi_add(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS);
83702f69 1792 skb_queue_head_init(&mod->echoq);
631eb227
IS
1793 spin_lock_init(&mod->lock);
1794 init_completion(&mod->termination_comp);
1795 init_completion(&mod->buserror_comp);
1796
1797 /* setup device-specific sysfs attributes */
1798 ndev->sysfs_groups[0] = &ican3_sysfs_attr_group;
1799
1800 /* the first unallocated page in the DPM is 9 */
1801 mod->free_page = DPM_FREE_START;
1802
1803 ndev->netdev_ops = &ican3_netdev_ops;
1804 ndev->flags |= IFF_ECHO;
1805 SET_NETDEV_DEV(ndev, &pdev->dev);
1806
1807 mod->can.clock.freq = ICAN3_CAN_CLOCK;
1808 mod->can.bittiming_const = &ican3_bittiming_const;
1809 mod->can.do_set_bittiming = ican3_set_bittiming;
1810 mod->can.do_set_mode = ican3_set_mode;
1811 mod->can.do_get_berr_counter = ican3_get_berr_counter;
1812 mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES
1813 | CAN_CTRLMODE_BERR_REPORTING;
1814
1815 /* find our IRQ number */
1816 mod->irq = platform_get_irq(pdev, 0);
1817 if (mod->irq < 0) {
1818 dev_err(dev, "IRQ line not found\n");
1819 ret = -ENODEV;
1820 goto out_free_ndev;
1821 }
1822
1823 ndev->irq = mod->irq;
1824
1825 /* get access to the MODULbus registers for this module */
1826 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1827 if (!res) {
1828 dev_err(dev, "MODULbus registers not found\n");
1829 ret = -ENODEV;
1830 goto out_free_ndev;
1831 }
1832
1833 mod->dpm = ioremap(res->start, resource_size(res));
1834 if (!mod->dpm) {
1835 dev_err(dev, "MODULbus registers not ioremap\n");
1836 ret = -ENOMEM;
1837 goto out_free_ndev;
1838 }
1839
1840 mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE;
1841
1842 /* get access to the control registers for this module */
1843 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1844 if (!res) {
1845 dev_err(dev, "CONTROL registers not found\n");
1846 ret = -ENODEV;
1847 goto out_iounmap_dpm;
1848 }
1849
1850 mod->ctrl = ioremap(res->start, resource_size(res));
1851 if (!mod->ctrl) {
1852 dev_err(dev, "CONTROL registers not ioremap\n");
1853 ret = -ENOMEM;
1854 goto out_iounmap_dpm;
1855 }
1856
1857 /* disable our IRQ, then hookup the IRQ handler */
1858 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1859 ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod);
1860 if (ret) {
1861 dev_err(dev, "unable to request IRQ\n");
1862 goto out_iounmap_ctrl;
1863 }
1864
1865 /* reset and initialize the CAN controller into fast mode */
1866 napi_enable(&mod->napi);
1867 ret = ican3_startup_module(mod);
1868 if (ret) {
1869 dev_err(dev, "%s: unable to start CANdev\n", __func__);
1870 goto out_free_irq;
1871 }
1872
1873 /* register with the Linux CAN layer */
1874 ret = register_candev(ndev);
1875 if (ret) {
1876 dev_err(dev, "%s: unable to register CANdev\n", __func__);
1877 goto out_free_irq;
1878 }
1879
1880 dev_info(dev, "module %d: registered CAN device\n", pdata->modno);
1881 return 0;
1882
1883out_free_irq:
1884 napi_disable(&mod->napi);
1885 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1886 free_irq(mod->irq, mod);
1887out_iounmap_ctrl:
1888 iounmap(mod->ctrl);
1889out_iounmap_dpm:
1890 iounmap(mod->dpm);
1891out_free_ndev:
1892 free_candev(ndev);
1893out_return:
1894 return ret;
1895}
1896
1897static int __devexit ican3_remove(struct platform_device *pdev)
1898{
1899 struct net_device *ndev = platform_get_drvdata(pdev);
1900 struct ican3_dev *mod = netdev_priv(ndev);
1901
1902 /* unregister the netdevice, stop interrupts */
1903 unregister_netdev(ndev);
1904 napi_disable(&mod->napi);
1905 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1906 free_irq(mod->irq, mod);
1907
1908 /* put the module into reset */
1909 ican3_shutdown_module(mod);
1910
1911 /* unmap all registers */
1912 iounmap(mod->ctrl);
1913 iounmap(mod->dpm);
1914
1915 free_candev(ndev);
1916
1917 return 0;
1918}
1919
1920static struct platform_driver ican3_driver = {
1921 .driver = {
1922 .name = DRV_NAME,
1923 .owner = THIS_MODULE,
1924 },
1925 .probe = ican3_probe,
1926 .remove = __devexit_p(ican3_remove),
1927};
1928
871d3372 1929module_platform_driver(ican3_driver);
631eb227
IS
1930
1931MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
1932MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver");
1933MODULE_LICENSE("GPL");
1934MODULE_ALIAS("platform:janz-ican3");