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Merge tag 'mac80211-next-for-davem-2015-01-19' of git://git.kernel.org/pub/scm/linux...
[linux-2.6-block.git] / drivers / net / can / janz-ican3.c
CommitLineData
631eb227
IS		 1/*
2 * Janz MODULbus VMOD-ICAN3 CAN Interface Driver
3 *
4 * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
631eb227
IS		 14#include <linux/interrupt.h>
15#include <linux/delay.h>
16#include <linux/platform_device.h>
17
18#include <linux/netdevice.h>
19#include <linux/can.h>
20#include <linux/can/dev.h>
0ae89beb 21#include <linux/can/skb.h>
631eb227
IS		 22#include <linux/can/error.h>
23
24#include <linux/mfd/janz.h>
b7f080cf 25#include <asm/io.h>
631eb227
IS		 26
27/* the DPM has 64k of memory, organized into 256x 256 byte pages */
28#define DPM_NUM_PAGES 256
29#define DPM_PAGE_SIZE 256
30#define DPM_PAGE_ADDR(p) ((p) * DPM_PAGE_SIZE)
31
32/* JANZ ICAN3 "old-style" host interface queue page numbers */
33#define QUEUE_OLD_CONTROL 0
34#define QUEUE_OLD_RB0 1
35#define QUEUE_OLD_RB1 2
36#define QUEUE_OLD_WB0 3
37#define QUEUE_OLD_WB1 4
38
39/* Janz ICAN3 "old-style" host interface control registers */
40#define MSYNC_PEER 0x00 /* ICAN only */
41#define MSYNC_LOCL 0x01 /* host only */
42#define TARGET_RUNNING 0x02
43
44#define MSYNC_RB0 0x01
45#define MSYNC_RB1 0x02
46#define MSYNC_RBLW 0x04
47#define MSYNC_RB_MASK (MSYNC_RB0 | MSYNC_RB1)
48
49#define MSYNC_WB0 0x10
50#define MSYNC_WB1 0x20
51#define MSYNC_WBLW 0x40
52#define MSYNC_WB_MASK (MSYNC_WB0 | MSYNC_WB1)
53
54/* Janz ICAN3 "new-style" host interface queue page numbers */
55#define QUEUE_TOHOST 5
56#define QUEUE_FROMHOST_MID 6
57#define QUEUE_FROMHOST_HIGH 7
58#define QUEUE_FROMHOST_LOW 8
59
60/* The first free page in the DPM is #9 */
61#define DPM_FREE_START 9
62
63/* Janz ICAN3 "new-style" and "fast" host interface descriptor flags */
64#define DESC_VALID 0x80
65#define DESC_WRAP 0x40
66#define DESC_INTERRUPT 0x20
67#define DESC_IVALID 0x10
68#define DESC_LEN(len) (len)
69
70/* Janz ICAN3 Firmware Messages */
71#define MSG_CONNECTI 0x02
72#define MSG_DISCONNECT 0x03
73#define MSG_IDVERS 0x04
74#define MSG_MSGLOST 0x05
75#define MSG_NEWHOSTIF 0x08
76#define MSG_INQUIRY 0x0a
77#define MSG_SETAFILMASK 0x10
78#define MSG_INITFDPMQUEUE 0x11
79#define MSG_HWCONF 0x12
80#define MSG_FMSGLOST 0x15
81#define MSG_CEVTIND 0x37
82#define MSG_CBTRREQ 0x41
83#define MSG_COFFREQ 0x42
84#define MSG_CONREQ 0x43
85#define MSG_CCONFREQ 0x47
86
87/*
88 * Janz ICAN3 CAN Inquiry Message Types
89 *
90 * NOTE: there appears to be a firmware bug here. You must send
91 * NOTE: INQUIRY_STATUS and expect to receive an INQUIRY_EXTENDED
92 * NOTE: response. The controller never responds to a message with
93 * NOTE: the INQUIRY_EXTENDED subspec :(
94 */
95#define INQUIRY_STATUS 0x00
96#define INQUIRY_TERMINATION 0x01
97#define INQUIRY_EXTENDED 0x04
98
99/* Janz ICAN3 CAN Set Acceptance Filter Mask Message Types */
100#define SETAFILMASK_REJECT 0x00
101#define SETAFILMASK_FASTIF 0x02
102
103/* Janz ICAN3 CAN Hardware Configuration Message Types */
104#define HWCONF_TERMINATE_ON 0x01
105#define HWCONF_TERMINATE_OFF 0x00
106
107/* Janz ICAN3 CAN Event Indication Message Types */
108#define CEVTIND_EI 0x01
109#define CEVTIND_DOI 0x02
110#define CEVTIND_LOST 0x04
111#define CEVTIND_FULL 0x08
112#define CEVTIND_BEI 0x10
113
114#define CEVTIND_CHIP_SJA1000 0x02
115
116#define ICAN3_BUSERR_QUOTA_MAX 255
117
118/* Janz ICAN3 CAN Frame Conversion */
3b5c6b9e 119#define ICAN3_SNGL 0x02
631eb227
IS		 120#define ICAN3_ECHO 0x10
121#define ICAN3_EFF_RTR 0x40
122#define ICAN3_SFF_RTR 0x10
123#define ICAN3_EFF 0x80
124
125#define ICAN3_CAN_TYPE_MASK 0x0f
126#define ICAN3_CAN_TYPE_SFF 0x00
127#define ICAN3_CAN_TYPE_EFF 0x01
128
129#define ICAN3_CAN_DLC_MASK 0x0f
130
131/*
132 * SJA1000 Status and Error Register Definitions
133 *
134 * Copied from drivers/net/can/sja1000/sja1000.h
135 */
136
137/* status register content */
138#define SR_BS 0x80
139#define SR_ES 0x40
140#define SR_TS 0x20
141#define SR_RS 0x10
142#define SR_TCS 0x08
143#define SR_TBS 0x04
144#define SR_DOS 0x02
145#define SR_RBS 0x01
146
147#define SR_CRIT (SR_BS|SR_ES)
148
149/* ECC register */
150#define ECC_SEG 0x1F
151#define ECC_DIR 0x20
152#define ECC_ERR 6
153#define ECC_BIT 0x00
154#define ECC_FORM 0x40
155#define ECC_STUFF 0x80
156#define ECC_MASK 0xc0
157
158/* Number of buffers for use in the "new-style" host interface */
159#define ICAN3_NEW_BUFFERS 16
160
161/* Number of buffers for use in the "fast" host interface */
162#define ICAN3_TX_BUFFERS 512
163#define ICAN3_RX_BUFFERS 1024
164
165/* SJA1000 Clock Input */
166#define ICAN3_CAN_CLOCK 8000000
167
168/* Driver Name */
169#define DRV_NAME "janz-ican3"
170
171/* DPM Control Registers -- starts at offset 0x100 in the MODULbus registers */
172struct ican3_dpm_control {
173 /* window address register */
174 u8 window_address;
175 u8 unused1;
176
177 /*
178 * Read access: clear interrupt from microcontroller
179 * Write access: send interrupt to microcontroller
180 */
181 u8 interrupt;
182 u8 unused2;
183
184 /* write-only: reset all hardware on the module */
185 u8 hwreset;
186 u8 unused3;
187
188 /* write-only: generate an interrupt to the TPU */
189 u8 tpuinterrupt;
190};
191
192struct ican3_dev {
193
194 /* must be the first member */
195 struct can_priv can;
196
197 /* CAN network device */
198 struct net_device *ndev;
199 struct napi_struct napi;
200
631eb227
IS		 201 /* module number */
202 unsigned int num;
203
204 /* base address of registers and IRQ */
205 struct janz_cmodio_onboard_regs __iomem *ctrl;
206 struct ican3_dpm_control __iomem *dpmctrl;
207 void __iomem *dpm;
208 int irq;
209
210 /* CAN bus termination status */
211 struct completion termination_comp;
212 bool termination_enabled;
213
214 /* CAN bus error status registers */
215 struct completion buserror_comp;
216 struct can_berr_counter bec;
217
218 /* old and new style host interface */
219 unsigned int iftype;
220
83702f69
IS		 221 /* queue for echo packets */
222 struct sk_buff_head echoq;
223
631eb227
IS		 224 /*
225 * Any function which changes the current DPM page must hold this
226 * lock while it is performing data accesses. This ensures that the
227 * function will not be preempted and end up reading data from a
228 * different DPM page than it expects.
229 */
230 spinlock_t lock;
231
232 /* new host interface */
233 unsigned int rx_int;
234 unsigned int rx_num;
235 unsigned int tx_num;
236
237 /* fast host interface */
238 unsigned int fastrx_start;
631eb227
IS		 239 unsigned int fastrx_num;
240 unsigned int fasttx_start;
241 unsigned int fasttx_num;
242
243 /* first free DPM page */
244 unsigned int free_page;
245};
246
247struct ican3_msg {
248 u8 control;
249 u8 spec;
250 __le16 len;
251 u8 data[252];
252};
253
254struct ican3_new_desc {
255 u8 control;
256 u8 pointer;
257};
258
259struct ican3_fast_desc {
260 u8 control;
261 u8 command;
262 u8 data[14];
263};
264
265/* write to the window basic address register */
266static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page)
267{
268 BUG_ON(page >= DPM_NUM_PAGES);
269 iowrite8(page, &mod->dpmctrl->window_address);
270}
271
272/*
273 * ICAN3 "old-style" host interface
274 */
275
276/*
25985edc 277 * Receive a message from the ICAN3 "old-style" firmware interface
631eb227
IS		 278 *
279 * LOCKING: must hold mod->lock
280 *
281 * returns 0 on success, -ENOMEM when no message exists
282 */
283static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
284{
285 unsigned int mbox, mbox_page;
286 u8 locl, peer, xord;
287
288 /* get the MSYNC registers */
289 ican3_set_page(mod, QUEUE_OLD_CONTROL);
290 peer = ioread8(mod->dpm + MSYNC_PEER);
291 locl = ioread8(mod->dpm + MSYNC_LOCL);
292 xord = locl ^ peer;
293
294 if ((xord & MSYNC_RB_MASK) == 0x00) {
a8ca2efc 295 netdev_dbg(mod->ndev, "no mbox for reading\n");
631eb227
IS		 296 return -ENOMEM;
297 }
298
299 /* find the first free mbox to read */
300 if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK)
301 mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1;
302 else
303 mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1;
304
305 /* copy the message */
306 mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1;
307 ican3_set_page(mod, mbox_page);
308 memcpy_fromio(msg, mod->dpm, sizeof(*msg));
309
310 /*
311 * notify the firmware that the read buffer is available
312 * for it to fill again
313 */
314 locl ^= mbox;
315
316 ican3_set_page(mod, QUEUE_OLD_CONTROL);
317 iowrite8(locl, mod->dpm + MSYNC_LOCL);
318 return 0;
319}
320
321/*
322 * Send a message through the "old-style" firmware interface
323 *
324 * LOCKING: must hold mod->lock
325 *
326 * returns 0 on success, -ENOMEM when no free space exists
327 */
328static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
329{
330 unsigned int mbox, mbox_page;
331 u8 locl, peer, xord;
332
333 /* get the MSYNC registers */
334 ican3_set_page(mod, QUEUE_OLD_CONTROL);
335 peer = ioread8(mod->dpm + MSYNC_PEER);
336 locl = ioread8(mod->dpm + MSYNC_LOCL);
337 xord = locl ^ peer;
338
339 if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) {
a8ca2efc 340 netdev_err(mod->ndev, "no mbox for writing\n");
631eb227
IS		 341 return -ENOMEM;
342 }
343
344 /* calculate a free mbox to use */
345 mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0;
346
347 /* copy the message to the DPM */
348 mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1;
349 ican3_set_page(mod, mbox_page);
350 memcpy_toio(mod->dpm, msg, sizeof(*msg));
351
352 locl ^= mbox;
353 if (mbox == MSYNC_WB1)
354 locl |= MSYNC_WBLW;
355
356 ican3_set_page(mod, QUEUE_OLD_CONTROL);
357 iowrite8(locl, mod->dpm + MSYNC_LOCL);
358 return 0;
359}
360
361/*
362 * ICAN3 "new-style" Host Interface Setup
363 */
364
3c8ac0f2 365static void ican3_init_new_host_interface(struct ican3_dev *mod)
631eb227
IS		 366{
367 struct ican3_new_desc desc;
368 unsigned long flags;
369 void __iomem *dst;
370 int i;
371
372 spin_lock_irqsave(&mod->lock, flags);
373
374 /* setup the internal datastructures for RX */
375 mod->rx_num = 0;
376 mod->rx_int = 0;
377
378 /* tohost queue descriptors are in page 5 */
379 ican3_set_page(mod, QUEUE_TOHOST);
380 dst = mod->dpm;
381
382 /* initialize the tohost (rx) queue descriptors: pages 9-24 */
383 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
384 desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */
385 desc.pointer = mod->free_page;
386
387 /* set wrap flag on last buffer */
388 if (i == ICAN3_NEW_BUFFERS - 1)
389 desc.control |= DESC_WRAP;
390
391 memcpy_toio(dst, &desc, sizeof(desc));
392 dst += sizeof(desc);
393 mod->free_page++;
394 }
395
396 /* fromhost (tx) mid queue descriptors are in page 6 */
397 ican3_set_page(mod, QUEUE_FROMHOST_MID);
398 dst = mod->dpm;
399
400 /* setup the internal datastructures for TX */
401 mod->tx_num = 0;
402
403 /* initialize the fromhost mid queue descriptors: pages 25-40 */
404 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
405 desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */
406 desc.pointer = mod->free_page;
407
408 /* set wrap flag on last buffer */
409 if (i == ICAN3_NEW_BUFFERS - 1)
410 desc.control |= DESC_WRAP;
411
412 memcpy_toio(dst, &desc, sizeof(desc));
413 dst += sizeof(desc);
414 mod->free_page++;
415 }
416
417 /* fromhost hi queue descriptors are in page 7 */
418 ican3_set_page(mod, QUEUE_FROMHOST_HIGH);
419 dst = mod->dpm;
420
421 /* initialize only a single buffer in the fromhost hi queue (unused) */
422 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
423 desc.pointer = mod->free_page;
424 memcpy_toio(dst, &desc, sizeof(desc));
425 mod->free_page++;
426
427 /* fromhost low queue descriptors are in page 8 */
428 ican3_set_page(mod, QUEUE_FROMHOST_LOW);
429 dst = mod->dpm;
430
431 /* initialize only a single buffer in the fromhost low queue (unused) */
432 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
433 desc.pointer = mod->free_page;
434 memcpy_toio(dst, &desc, sizeof(desc));
435 mod->free_page++;
436
437 spin_unlock_irqrestore(&mod->lock, flags);
438}
439
440/*
441 * ICAN3 Fast Host Interface Setup
442 */
443
3c8ac0f2 444static void ican3_init_fast_host_interface(struct ican3_dev *mod)
631eb227
IS		 445{
446 struct ican3_fast_desc desc;
447 unsigned long flags;
448 unsigned int addr;
449 void __iomem *dst;
450 int i;
451
452 spin_lock_irqsave(&mod->lock, flags);
453
454 /* save the start recv page */
455 mod->fastrx_start = mod->free_page;
456 mod->fastrx_num = 0;
631eb227
IS		 457
458 /* build a single fast tohost queue descriptor */
459 memset(&desc, 0, sizeof(desc));
460 desc.control = 0x00;
461 desc.command = 1;
462
463 /* build the tohost queue descriptor ring in memory */
464 addr = 0;
465 for (i = 0; i < ICAN3_RX_BUFFERS; i++) {
466
467 /* set the wrap bit on the last buffer */
468 if (i == ICAN3_RX_BUFFERS - 1)
469 desc.control |= DESC_WRAP;
470
471 /* switch to the correct page */
472 ican3_set_page(mod, mod->free_page);
473
474 /* copy the descriptor to the DPM */
475 dst = mod->dpm + addr;
476 memcpy_toio(dst, &desc, sizeof(desc));
477 addr += sizeof(desc);
478
479 /* move to the next page if necessary */
480 if (addr >= DPM_PAGE_SIZE) {
481 addr = 0;
482 mod->free_page++;
483 }
484 }
485
486 /* make sure we page-align the next queue */
487 if (addr != 0)
488 mod->free_page++;
489
490 /* save the start xmit page */
491 mod->fasttx_start = mod->free_page;
492 mod->fasttx_num = 0;
493
494 /* build a single fast fromhost queue descriptor */
495 memset(&desc, 0, sizeof(desc));
496 desc.control = DESC_VALID;
497 desc.command = 1;
498
499 /* build the fromhost queue descriptor ring in memory */
500 addr = 0;
501 for (i = 0; i < ICAN3_TX_BUFFERS; i++) {
502
503 /* set the wrap bit on the last buffer */
504 if (i == ICAN3_TX_BUFFERS - 1)
505 desc.control |= DESC_WRAP;
506
507 /* switch to the correct page */
508 ican3_set_page(mod, mod->free_page);
509
510 /* copy the descriptor to the DPM */
511 dst = mod->dpm + addr;
512 memcpy_toio(dst, &desc, sizeof(desc));
513 addr += sizeof(desc);
514
515 /* move to the next page if necessary */
516 if (addr >= DPM_PAGE_SIZE) {
517 addr = 0;
518 mod->free_page++;
519 }
520 }
521
522 spin_unlock_irqrestore(&mod->lock, flags);
523}
524
525/*
526 * ICAN3 "new-style" Host Interface Message Helpers
527 */
528
529/*
530 * LOCKING: must hold mod->lock
531 */
532static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
533{
534 struct ican3_new_desc desc;
535 void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc));
536
537 /* switch to the fromhost mid queue, and read the buffer descriptor */
538 ican3_set_page(mod, QUEUE_FROMHOST_MID);
539 memcpy_fromio(&desc, desc_addr, sizeof(desc));
540
541 if (!(desc.control & DESC_VALID)) {
a8ca2efc 542 netdev_dbg(mod->ndev, "%s: no free buffers\n", __func__);
631eb227
IS		 543 return -ENOMEM;
544 }
545
546 /* switch to the data page, copy the data */
547 ican3_set_page(mod, desc.pointer);
548 memcpy_toio(mod->dpm, msg, sizeof(*msg));
549
550 /* switch back to the descriptor, set the valid bit, write it back */
551 ican3_set_page(mod, QUEUE_FROMHOST_MID);
552 desc.control ^= DESC_VALID;
553 memcpy_toio(desc_addr, &desc, sizeof(desc));
554
555 /* update the tx number */
556 mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1);
557 return 0;
558}
559
560/*
561 * LOCKING: must hold mod->lock
562 */
563static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
564{
565 struct ican3_new_desc desc;
566 void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc));
567
568 /* switch to the tohost queue, and read the buffer descriptor */
569 ican3_set_page(mod, QUEUE_TOHOST);
570 memcpy_fromio(&desc, desc_addr, sizeof(desc));
571
572 if (!(desc.control & DESC_VALID)) {
a8ca2efc 573 netdev_dbg(mod->ndev, "%s: no buffers to recv\n", __func__);
631eb227
IS		 574 return -ENOMEM;
575 }
576
577 /* switch to the data page, copy the data */
578 ican3_set_page(mod, desc.pointer);
579 memcpy_fromio(msg, mod->dpm, sizeof(*msg));
580
581 /* switch back to the descriptor, toggle the valid bit, write it back */
582 ican3_set_page(mod, QUEUE_TOHOST);
583 desc.control ^= DESC_VALID;
584 memcpy_toio(desc_addr, &desc, sizeof(desc));
585
586 /* update the rx number */
587 mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1);
588 return 0;
589}
590
591/*
592 * Message Send / Recv Helpers
593 */
594
595static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
596{
597 unsigned long flags;
598 int ret;
599
600 spin_lock_irqsave(&mod->lock, flags);
601
602 if (mod->iftype == 0)
603 ret = ican3_old_send_msg(mod, msg);
604 else
605 ret = ican3_new_send_msg(mod, msg);
606
607 spin_unlock_irqrestore(&mod->lock, flags);
608 return ret;
609}
610
611static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
612{
613 unsigned long flags;
614 int ret;
615
616 spin_lock_irqsave(&mod->lock, flags);
617
618 if (mod->iftype == 0)
619 ret = ican3_old_recv_msg(mod, msg);
620 else
621 ret = ican3_new_recv_msg(mod, msg);
622
623 spin_unlock_irqrestore(&mod->lock, flags);
624 return ret;
625}
626
627/*
628 * Quick Pre-constructed Messages
629 */
630
3c8ac0f2 631static int ican3_msg_connect(struct ican3_dev *mod)
631eb227
IS		 632{
633 struct ican3_msg msg;
634
635 memset(&msg, 0, sizeof(msg));
636 msg.spec = MSG_CONNECTI;
637 msg.len = cpu_to_le16(0);
638
639 return ican3_send_msg(mod, &msg);
640}
641
3c8ac0f2 642static int ican3_msg_disconnect(struct ican3_dev *mod)
631eb227
IS		 643{
644 struct ican3_msg msg;
645
646 memset(&msg, 0, sizeof(msg));
647 msg.spec = MSG_DISCONNECT;
648 msg.len = cpu_to_le16(0);
649
650 return ican3_send_msg(mod, &msg);
651}
652
3c8ac0f2 653static int ican3_msg_newhostif(struct ican3_dev *mod)
631eb227
IS		 654{
655 struct ican3_msg msg;
656 int ret;
657
658 memset(&msg, 0, sizeof(msg));
659 msg.spec = MSG_NEWHOSTIF;
660 msg.len = cpu_to_le16(0);
661
662 /* If we're not using the old interface, switching seems bogus */
663 WARN_ON(mod->iftype != 0);
664
665 ret = ican3_send_msg(mod, &msg);
666 if (ret)
667 return ret;
668
669 /* mark the module as using the new host interface */
670 mod->iftype = 1;
671 return 0;
672}
673
3c8ac0f2 674static int ican3_msg_fasthostif(struct ican3_dev *mod)
631eb227
IS		 675{
676 struct ican3_msg msg;
677 unsigned int addr;
678
679 memset(&msg, 0, sizeof(msg));
680 msg.spec = MSG_INITFDPMQUEUE;
681 msg.len = cpu_to_le16(8);
682
683 /* write the tohost queue start address */
684 addr = DPM_PAGE_ADDR(mod->fastrx_start);
685 msg.data[0] = addr & 0xff;
686 msg.data[1] = (addr >> 8) & 0xff;
687 msg.data[2] = (addr >> 16) & 0xff;
688 msg.data[3] = (addr >> 24) & 0xff;
689
690 /* write the fromhost queue start address */
691 addr = DPM_PAGE_ADDR(mod->fasttx_start);
692 msg.data[4] = addr & 0xff;
693 msg.data[5] = (addr >> 8) & 0xff;
694 msg.data[6] = (addr >> 16) & 0xff;
695 msg.data[7] = (addr >> 24) & 0xff;
696
697 /* If we're not using the new interface yet, we cannot do this */
698 WARN_ON(mod->iftype != 1);
699
700 return ican3_send_msg(mod, &msg);
701}
702
703/*
704 * Setup the CAN filter to either accept or reject all
705 * messages from the CAN bus.
706 */
3c8ac0f2 707static int ican3_set_id_filter(struct ican3_dev *mod, bool accept)
631eb227
IS		 708{
709 struct ican3_msg msg;
710 int ret;
711
712 /* Standard Frame Format */
713 memset(&msg, 0, sizeof(msg));
714 msg.spec = MSG_SETAFILMASK;
715 msg.len = cpu_to_le16(5);
716 msg.data[0] = 0x00; /* IDLo LSB */
717 msg.data[1] = 0x00; /* IDLo MSB */
718 msg.data[2] = 0xff; /* IDHi LSB */
719 msg.data[3] = 0x07; /* IDHi MSB */
720
721 /* accept all frames for fast host if, or reject all frames */
722 msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
723
724 ret = ican3_send_msg(mod, &msg);
725 if (ret)
726 return ret;
727
728 /* Extended Frame Format */
729 memset(&msg, 0, sizeof(msg));
730 msg.spec = MSG_SETAFILMASK;
731 msg.len = cpu_to_le16(13);
732 msg.data[0] = 0; /* MUX = 0 */
733 msg.data[1] = 0x00; /* IDLo LSB */
734 msg.data[2] = 0x00;
735 msg.data[3] = 0x00;
736 msg.data[4] = 0x20; /* IDLo MSB */
737 msg.data[5] = 0xff; /* IDHi LSB */
738 msg.data[6] = 0xff;
739 msg.data[7] = 0xff;
740 msg.data[8] = 0x3f; /* IDHi MSB */
741
742 /* accept all frames for fast host if, or reject all frames */
743 msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
744
745 return ican3_send_msg(mod, &msg);
746}
747
748/*
749 * Bring the CAN bus online or offline
750 */
751static int ican3_set_bus_state(struct ican3_dev *mod, bool on)
752{
753 struct ican3_msg msg;
754
755 memset(&msg, 0, sizeof(msg));
756 msg.spec = on ? MSG_CONREQ : MSG_COFFREQ;
757 msg.len = cpu_to_le16(0);
758
759 return ican3_send_msg(mod, &msg);
760}
761
762static int ican3_set_termination(struct ican3_dev *mod, bool on)
763{
764 struct ican3_msg msg;
765
766 memset(&msg, 0, sizeof(msg));
767 msg.spec = MSG_HWCONF;
768 msg.len = cpu_to_le16(2);
769 msg.data[0] = 0x00;
770 msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF;
771
772 return ican3_send_msg(mod, &msg);
773}
774
775static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec)
776{
777 struct ican3_msg msg;
778
779 memset(&msg, 0, sizeof(msg));
780 msg.spec = MSG_INQUIRY;
781 msg.len = cpu_to_le16(2);
782 msg.data[0] = subspec;
783 msg.data[1] = 0x00;
784
785 return ican3_send_msg(mod, &msg);
786}
787
788static int ican3_set_buserror(struct ican3_dev *mod, u8 quota)
789{
790 struct ican3_msg msg;
791
792 memset(&msg, 0, sizeof(msg));
793 msg.spec = MSG_CCONFREQ;
794 msg.len = cpu_to_le16(2);
795 msg.data[0] = 0x00;
796 msg.data[1] = quota;
797
798 return ican3_send_msg(mod, &msg);
799}
800
801/*
802 * ICAN3 to Linux CAN Frame Conversion
803 */
804
805static void ican3_to_can_frame(struct ican3_dev *mod,
806 struct ican3_fast_desc *desc,
807 struct can_frame *cf)
808{
809 if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) {
810 if (desc->data[1] & ICAN3_SFF_RTR)
811 cf->can_id |= CAN_RTR_FLAG;
812
813 cf->can_id |= desc->data[0] << 3;
814 cf->can_id |= (desc->data[1] & 0xe0) >> 5;
9e4d6909
MKB		 815 cf->can_dlc = get_can_dlc(desc->data[1] & ICAN3_CAN_DLC_MASK);
816 memcpy(cf->data, &desc->data[2], cf->can_dlc);
631eb227 817 } else {
9e4d6909 818 cf->can_dlc = get_can_dlc(desc->data[0] & ICAN3_CAN_DLC_MASK);
631eb227
IS		 819 if (desc->data[0] & ICAN3_EFF_RTR)
820 cf->can_id |= CAN_RTR_FLAG;
821
822 if (desc->data[0] & ICAN3_EFF) {
823 cf->can_id |= CAN_EFF_FLAG;
824 cf->can_id |= desc->data[2] << 21; /* 28-21 */
825 cf->can_id |= desc->data[3] << 13; /* 20-13 */
826 cf->can_id |= desc->data[4] << 5; /* 12-5 */
827 cf->can_id |= (desc->data[5] & 0xf8) >> 3;
828 } else {
829 cf->can_id |= desc->data[2] << 3; /* 10-3 */
830 cf->can_id |= desc->data[3] >> 5; /* 2-0 */
831 }
832
9e4d6909 833 memcpy(cf->data, &desc->data[6], cf->can_dlc);
631eb227
IS		 834 }
835}
836
837static void can_frame_to_ican3(struct ican3_dev *mod,
838 struct can_frame *cf,
839 struct ican3_fast_desc *desc)
840{
841 /* clear out any stale data in the descriptor */
842 memset(desc->data, 0, sizeof(desc->data));
843
844 /* we always use the extended format, with the ECHO flag set */
845 desc->command = ICAN3_CAN_TYPE_EFF;
846 desc->data[0] |= cf->can_dlc;
847 desc->data[1] |= ICAN3_ECHO;
848
3b5c6b9e
IS		 849 /* support single transmission (no retries) mode */
850 if (mod->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT)
851 desc->data[1] |= ICAN3_SNGL;
852
631eb227
IS		 853 if (cf->can_id & CAN_RTR_FLAG)
854 desc->data[0] |= ICAN3_EFF_RTR;
855
856 /* pack the id into the correct places */
857 if (cf->can_id & CAN_EFF_FLAG) {
858 desc->data[0] |= ICAN3_EFF;
859 desc->data[2] = (cf->can_id & 0x1fe00000) >> 21; /* 28-21 */
860 desc->data[3] = (cf->can_id & 0x001fe000) >> 13; /* 20-13 */
861 desc->data[4] = (cf->can_id & 0x00001fe0) >> 5; /* 12-5 */
862 desc->data[5] = (cf->can_id & 0x0000001f) << 3; /* 4-0 */
863 } else {
864 desc->data[2] = (cf->can_id & 0x7F8) >> 3; /* bits 10-3 */
865 desc->data[3] = (cf->can_id & 0x007) << 5; /* bits 2-0 */
866 }
867
868 /* copy the data bits into the descriptor */
9e4d6909 869 memcpy(&desc->data[6], cf->data, cf->can_dlc);
631eb227
IS		 870}
871
872/*
873 * Interrupt Handling
874 */
875
876/*
877 * Handle an ID + Version message response from the firmware. We never generate
878 * this message in production code, but it is very useful when debugging to be
879 * able to display this message.
880 */
881static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg)
882{
a8ca2efc 883 netdev_dbg(mod->ndev, "IDVERS response: %s\n", msg->data);
631eb227
IS		 884}
885
886static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg)
887{
888 struct net_device *dev = mod->ndev;
889 struct net_device_stats *stats = &dev->stats;
890 struct can_frame *cf;
891 struct sk_buff *skb;
892
893 /*
894 * Report that communication messages with the microcontroller firmware
895 * are being lost. These are never CAN frames, so we do not generate an
896 * error frame for userspace
897 */
898 if (msg->spec == MSG_MSGLOST) {
a8ca2efc 899 netdev_err(mod->ndev, "lost %d control messages\n", msg->data[0]);
631eb227
IS		 900 return;
901 }
902
903 /*
904 * Oops, this indicates that we have lost messages in the fast queue,
905 * which are exclusively CAN messages. Our driver isn't reading CAN
906 * frames fast enough.
907 *
908 * We'll pretend that the SJA1000 told us that it ran out of buffer
909 * space, because there is not a better message for this.
910 */
911 skb = alloc_can_err_skb(dev, &cf);
912 if (skb) {
913 cf->can_id |= CAN_ERR_CRTL;
914 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
88b58703 915 stats->rx_over_errors++;
631eb227 916 stats->rx_errors++;
631eb227
IS		 917 netif_rx(skb);
918 }
919}
920
921/*
922 * Handle CAN Event Indication Messages from the firmware
923 *
924 * The ICAN3 firmware provides the values of some SJA1000 registers when it
925 * generates this message. The code below is largely copied from the
926 * drivers/net/can/sja1000/sja1000.c file, and adapted as necessary
927 */
928static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)
929{
930 struct net_device *dev = mod->ndev;
931 struct net_device_stats *stats = &dev->stats;
932 enum can_state state = mod->can.state;
83702f69 933 u8 isrc, ecc, status, rxerr, txerr;
631eb227
IS		 934 struct can_frame *cf;
935 struct sk_buff *skb;
936
937 /* we can only handle the SJA1000 part */
938 if (msg->data[1] != CEVTIND_CHIP_SJA1000) {
a8ca2efc 939 netdev_err(mod->ndev, "unable to handle errors on non-SJA1000\n");
631eb227
IS		 940 return -ENODEV;
941 }
942
943 /* check the message length for sanity */
944 if (le16_to_cpu(msg->len) < 6) {
a8ca2efc 945 netdev_err(mod->ndev, "error message too short\n");
631eb227
IS		 946 return -EINVAL;
947 }
948
631eb227 949 isrc = msg->data[0];
83702f69 950 ecc = msg->data[2];
631eb227
IS		 951 status = msg->data[3];
952 rxerr = msg->data[4];
953 txerr = msg->data[5];
954
83702f69
IS		 955 /*
956 * This hardware lacks any support other than bus error messages to
957 * determine if packet transmission has failed.
958 *
959 * When TX errors happen, one echo skb needs to be dropped from the
960 * front of the queue.
961 *
962 * A small bit of code is duplicated here and below, to avoid error
963 * skb allocation when it will just be freed immediately.
964 */
965 if (isrc == CEVTIND_BEI) {
966 int ret;
a8ca2efc 967 netdev_dbg(mod->ndev, "bus error interrupt\n");
83702f69
IS		 968
969 /* TX error */
970 if (!(ecc & ECC_DIR)) {
971 kfree_skb(skb_dequeue(&mod->echoq));
972 stats->tx_errors++;
973 } else {
974 stats->rx_errors++;
975 }
976
30df5888
IS		 977 /*
978 * The controller automatically disables bus-error interrupts
979 * and therefore we must re-enable them.
980 */
981 ret = ican3_set_buserror(mod, 1);
982 if (ret) {
a8ca2efc 983 netdev_err(mod->ndev, "unable to re-enable bus-error\n");
30df5888
IS		 984 return ret;
985 }
986
83702f69
IS		 987 /* bus error reporting is off, return immediately */
988 if (!(mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
989 return 0;
990 }
991
992 skb = alloc_can_err_skb(dev, &cf);
993 if (skb == NULL)
994 return -ENOMEM;
995
631eb227
IS		 996 /* data overrun interrupt */
997 if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) {
a8ca2efc 998 netdev_dbg(mod->ndev, "data overrun interrupt\n");
631eb227
IS		 999 cf->can_id |= CAN_ERR_CRTL;
1000 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
1001 stats->rx_over_errors++;
1002 stats->rx_errors++;
1003 }
1004
1005 /* error warning + passive interrupt */
1006 if (isrc == CEVTIND_EI) {
a8ca2efc 1007 netdev_dbg(mod->ndev, "error warning + passive interrupt\n");
631eb227
IS		 1008 if (status & SR_BS) {
1009 state = CAN_STATE_BUS_OFF;
1010 cf->can_id |= CAN_ERR_BUSOFF;
1011 can_bus_off(dev);
1012 } else if (status & SR_ES) {
1013 if (rxerr >= 128 || txerr >= 128)
1014 state = CAN_STATE_ERROR_PASSIVE;
1015 else
1016 state = CAN_STATE_ERROR_WARNING;
1017 } else {
1018 state = CAN_STATE_ERROR_ACTIVE;
1019 }
1020 }
1021
1022 /* bus error interrupt */
1023 if (isrc == CEVTIND_BEI) {
631eb227 1024 mod->can.can_stats.bus_error++;
631eb227
IS		 1025 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
1026
1027 switch (ecc & ECC_MASK) {
1028 case ECC_BIT:
1029 cf->data[2] |= CAN_ERR_PROT_BIT;
1030 break;
1031 case ECC_FORM:
1032 cf->data[2] |= CAN_ERR_PROT_FORM;
1033 break;
1034 case ECC_STUFF:
1035 cf->data[2] |= CAN_ERR_PROT_STUFF;
1036 break;
1037 default:
1038 cf->data[2] |= CAN_ERR_PROT_UNSPEC;
1039 cf->data[3] = ecc & ECC_SEG;
1040 break;
1041 }
1042
83702f69 1043 if (!(ecc & ECC_DIR))
631eb227
IS		 1044 cf->data[2] |= CAN_ERR_PROT_TX;
1045
1046 cf->data[6] = txerr;
1047 cf->data[7] = rxerr;
1048 }
1049
1050 if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING ||
1051 state == CAN_STATE_ERROR_PASSIVE)) {
1052 cf->can_id |= CAN_ERR_CRTL;
1053 if (state == CAN_STATE_ERROR_WARNING) {
1054 mod->can.can_stats.error_warning++;
1055 cf->data[1] = (txerr > rxerr) ?
1056 CAN_ERR_CRTL_TX_WARNING :
1057 CAN_ERR_CRTL_RX_WARNING;
1058 } else {
1059 mod->can.can_stats.error_passive++;
1060 cf->data[1] = (txerr > rxerr) ?
1061 CAN_ERR_CRTL_TX_PASSIVE :
1062 CAN_ERR_CRTL_RX_PASSIVE;
1063 }
1064
1065 cf->data[6] = txerr;
1066 cf->data[7] = rxerr;
1067 }
1068
1069 mod->can.state = state;
631eb227
IS		 1070 netif_rx(skb);
1071 return 0;
1072}
1073
1074static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)
1075{
1076 switch (msg->data[0]) {
1077 case INQUIRY_STATUS:
1078 case INQUIRY_EXTENDED:
1079 mod->bec.rxerr = msg->data[5];
1080 mod->bec.txerr = msg->data[6];
1081 complete(&mod->buserror_comp);
1082 break;
1083 case INQUIRY_TERMINATION:
1084 mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON;
1085 complete(&mod->termination_comp);
1086 break;
1087 default:
a8ca2efc 1088 netdev_err(mod->ndev, "received an unknown inquiry response\n");
631eb227
IS		 1089 break;
1090 }
1091}
1092
1093static void ican3_handle_unknown_message(struct ican3_dev *mod,
1094 struct ican3_msg *msg)
1095{
a8ca2efc 1096 netdev_warn(mod->ndev, "received unknown message: spec 0x%.2x length %d\n",
631eb227
IS		 1097 msg->spec, le16_to_cpu(msg->len));
1098}
1099
1100/*
1101 * Handle a control message from the firmware
1102 */
1103static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg)
1104{
a8ca2efc 1105 netdev_dbg(mod->ndev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__,
631eb227
IS		 1106 mod->num, msg->spec, le16_to_cpu(msg->len));
1107
1108 switch (msg->spec) {
1109 case MSG_IDVERS:
1110 ican3_handle_idvers(mod, msg);
1111 break;
1112 case MSG_MSGLOST:
1113 case MSG_FMSGLOST:
1114 ican3_handle_msglost(mod, msg);
1115 break;
1116 case MSG_CEVTIND:
1117 ican3_handle_cevtind(mod, msg);
1118 break;
1119 case MSG_INQUIRY:
1120 ican3_handle_inquiry(mod, msg);
1121 break;
1122 default:
1123 ican3_handle_unknown_message(mod, msg);
1124 break;
1125 }
1126}
1127
83702f69
IS		 1128/*
1129 * The ican3 needs to store all echo skbs, and therefore cannot
1130 * use the generic infrastructure for this.
1131 */
1132static void ican3_put_echo_skb(struct ican3_dev *mod, struct sk_buff *skb)
1133{
0ae89beb
OH		 1134 skb = can_create_echo_skb(skb);
1135 if (!skb)
1136 return;
83702f69
IS		 1137
1138 /* save this skb for tx interrupt echo handling */
1139 skb_queue_tail(&mod->echoq, skb);
1140}
1141
1142static unsigned int ican3_get_echo_skb(struct ican3_dev *mod)
1143{
1144 struct sk_buff *skb = skb_dequeue(&mod->echoq);
1145 struct can_frame *cf;
1146 u8 dlc;
1147
1148 /* this should never trigger unless there is a driver bug */
1149 if (!skb) {
1150 netdev_err(mod->ndev, "BUG: echo skb not occupied\n");
1151 return 0;
1152 }
1153
1154 cf = (struct can_frame *)skb->data;
1155 dlc = cf->can_dlc;
1156
1157 /* check flag whether this packet has to be looped back */
1158 if (skb->pkt_type != PACKET_LOOPBACK) {
1159 kfree_skb(skb);
1160 return dlc;
1161 }
1162
1163 skb->protocol = htons(ETH_P_CAN);
1164 skb->pkt_type = PACKET_BROADCAST;
1165 skb->ip_summed = CHECKSUM_UNNECESSARY;
1166 skb->dev = mod->ndev;
1167 netif_receive_skb(skb);
1168 return dlc;
1169}
1170
1171/*
1172 * Compare an skb with an existing echo skb
1173 *
1174 * This function will be used on devices which have a hardware loopback.
1175 * On these devices, this function can be used to compare a received skb
1176 * with the saved echo skbs so that the hardware echo skb can be dropped.
1177 *
1178 * Returns true if the skb's are identical, false otherwise.
1179 */
1180static bool ican3_echo_skb_matches(struct ican3_dev *mod, struct sk_buff *skb)
1181{
1182 struct can_frame *cf = (struct can_frame *)skb->data;
1183 struct sk_buff *echo_skb = skb_peek(&mod->echoq);
1184 struct can_frame *echo_cf;
1185
1186 if (!echo_skb)
1187 return false;
1188
1189 echo_cf = (struct can_frame *)echo_skb->data;
1190 if (cf->can_id != echo_cf->can_id)
1191 return false;
1192
1193 if (cf->can_dlc != echo_cf->can_dlc)
1194 return false;
1195
1196 return memcmp(cf->data, echo_cf->data, cf->can_dlc) == 0;
1197}
1198
631eb227
IS		 1199/*
1200 * Check that there is room in the TX ring to transmit another skb
1201 *
1202 * LOCKING: must hold mod->lock
1203 */
1204static bool ican3_txok(struct ican3_dev *mod)
1205{
1206 struct ican3_fast_desc __iomem *desc;
1207 u8 control;
1208
83702f69
IS		 1209 /* check that we have echo queue space */
1210 if (skb_queue_len(&mod->echoq) >= ICAN3_TX_BUFFERS)
1211 return false;
1212
631eb227
IS		 1213 /* copy the control bits of the descriptor */
1214 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1215 desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc));
1216 control = ioread8(&desc->control);
1217
1218 /* if the control bits are not valid, then we have no more space */
1219 if (!(control & DESC_VALID))
1220 return false;
1221
1222 return true;
1223}
1224
1225/*
25985edc 1226 * Receive one CAN frame from the hardware
631eb227 1227 *
631eb227
IS		 1228 * CONTEXT: must be called from user context
1229 */
1230static int ican3_recv_skb(struct ican3_dev *mod)
1231{
1232 struct net_device *ndev = mod->ndev;
1233 struct net_device_stats *stats = &ndev->stats;
1234 struct ican3_fast_desc desc;
1235 void __iomem *desc_addr;
1236 struct can_frame *cf;
1237 struct sk_buff *skb;
1238 unsigned long flags;
1239
1240 spin_lock_irqsave(&mod->lock, flags);
1241
1242 /* copy the whole descriptor */
1243 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1244 desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc));
1245 memcpy_fromio(&desc, desc_addr, sizeof(desc));
1246
1247 spin_unlock_irqrestore(&mod->lock, flags);
1248
1249 /* check that we actually have a CAN frame */
1250 if (!(desc.control & DESC_VALID))
1251 return -ENOBUFS;
1252
1253 /* allocate an skb */
1254 skb = alloc_can_skb(ndev, &cf);
1255 if (unlikely(skb == NULL)) {
1256 stats->rx_dropped++;
1257 goto err_noalloc;
1258 }
1259
1260 /* convert the ICAN3 frame into Linux CAN format */
1261 ican3_to_can_frame(mod, &desc, cf);
1262
83702f69
IS		 1263 /*
1264 * If this is an ECHO frame received from the hardware loopback
1265 * feature, use the skb saved in the ECHO stack instead. This allows
1266 * the Linux CAN core to support CAN_RAW_RECV_OWN_MSGS correctly.
1267 *
1268 * Since this is a confirmation of a successfully transmitted packet
1269 * sent from this host, update the transmit statistics.
1270 *
1271 * Also, the netdevice queue needs to be allowed to send packets again.
1272 */
1273 if (ican3_echo_skb_matches(mod, skb)) {
1274 stats->tx_packets++;
1275 stats->tx_bytes += ican3_get_echo_skb(mod);
1276 kfree_skb(skb);
1277 goto err_noalloc;
1278 }
1279
1280 /* update statistics, receive the skb */
631eb227
IS		 1281 stats->rx_packets++;
1282 stats->rx_bytes += cf->can_dlc;
83702f69 1283 netif_receive_skb(skb);
631eb227
IS		 1284
1285err_noalloc:
1286 /* toggle the valid bit and return the descriptor to the ring */
1287 desc.control ^= DESC_VALID;
1288
1289 spin_lock_irqsave(&mod->lock, flags);
1290
1291 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1292 memcpy_toio(desc_addr, &desc, 1);
1293
1294 /* update the next buffer pointer */
1295 mod->fastrx_num = (desc.control & DESC_WRAP) ? 0
1296 : (mod->fastrx_num + 1);
1297
1298 /* there are still more buffers to process */
1299 spin_unlock_irqrestore(&mod->lock, flags);
1300 return 0;
1301}
1302
1303static int ican3_napi(struct napi_struct *napi, int budget)
1304{
1305 struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi);
631eb227
IS		 1306 unsigned long flags;
1307 int received = 0;
1308 int ret;
1309
1310 /* process all communication messages */
1311 while (true) {
73615c86 1312 struct ican3_msg uninitialized_var(msg);
631eb227
IS		 1313 ret = ican3_recv_msg(mod, &msg);
1314 if (ret)
1315 break;
1316
1317 ican3_handle_message(mod, &msg);
1318 }
1319
1320 /* process all CAN frames from the fast interface */
1321 while (received < budget) {
1322 ret = ican3_recv_skb(mod);
1323 if (ret)
1324 break;
1325
1326 received++;
1327 }
1328
1329 /* We have processed all packets that the adapter had, but it
1330 * was less than our budget, stop polling */
1331 if (received < budget)
1332 napi_complete(napi);
1333
1334 spin_lock_irqsave(&mod->lock, flags);
1335
1336 /* Wake up the transmit queue if necessary */
1337 if (netif_queue_stopped(mod->ndev) && ican3_txok(mod))
1338 netif_wake_queue(mod->ndev);
1339
1340 spin_unlock_irqrestore(&mod->lock, flags);
1341
1342 /* re-enable interrupt generation */
1343 iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1344 return received;
1345}
1346
1347static irqreturn_t ican3_irq(int irq, void *dev_id)
1348{
1349 struct ican3_dev *mod = dev_id;
1350 u8 stat;
1351
1352 /*
1353 * The interrupt status register on this device reports interrupts
1354 * as zeroes instead of using ones like most other devices
1355 */
1356 stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num);
1357 if (stat == (1 << mod->num))
1358 return IRQ_NONE;
1359
1360 /* clear the MODULbus interrupt from the microcontroller */
1361 ioread8(&mod->dpmctrl->interrupt);
1362
1363 /* disable interrupt generation, schedule the NAPI poller */
1364 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1365 napi_schedule(&mod->napi);
1366 return IRQ_HANDLED;
1367}
1368
1369/*
1370 * Firmware reset, startup, and shutdown
1371 */
1372
1373/*
1374 * Reset an ICAN module to its power-on state
1375 *
1376 * CONTEXT: no network device registered
631eb227
IS		 1377 */
1378static int ican3_reset_module(struct ican3_dev *mod)
1379{
631eb227
IS		 1380 unsigned long start;
1381 u8 runold, runnew;
1382
1383 /* disable interrupts so no more work is scheduled */
1384 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1385
631eb227
IS		 1386 /* the first unallocated page in the DPM is #9 */
1387 mod->free_page = DPM_FREE_START;
1388
1389 ican3_set_page(mod, QUEUE_OLD_CONTROL);
1390 runold = ioread8(mod->dpm + TARGET_RUNNING);
1391
1392 /* reset the module */
e21093ef 1393 iowrite8(0x00, &mod->dpmctrl->hwreset);
631eb227
IS		 1394
1395 /* wait until the module has finished resetting and is running */
1396 start = jiffies;
1397 do {
1398 ican3_set_page(mod, QUEUE_OLD_CONTROL);
1399 runnew = ioread8(mod->dpm + TARGET_RUNNING);
1400 if (runnew == (runold ^ 0xff))
1401 return 0;
1402
1403 msleep(10);
1404 } while (time_before(jiffies, start + HZ / 4));
1405
a8ca2efc 1406 netdev_err(mod->ndev, "failed to reset CAN module\n");
631eb227
IS		 1407 return -ETIMEDOUT;
1408}
1409
3c8ac0f2 1410static void ican3_shutdown_module(struct ican3_dev *mod)
631eb227
IS		 1411{
1412 ican3_msg_disconnect(mod);
1413 ican3_reset_module(mod);
1414}
1415
1416/*
1417 * Startup an ICAN module, bringing it into fast mode
1418 */
3c8ac0f2 1419static int ican3_startup_module(struct ican3_dev *mod)
631eb227
IS		 1420{
1421 int ret;
1422
1423 ret = ican3_reset_module(mod);
1424 if (ret) {
a8ca2efc 1425 netdev_err(mod->ndev, "unable to reset module\n");
631eb227
IS		 1426 return ret;
1427 }
1428
1429 /* re-enable interrupts so we can send messages */
1430 iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1431
1432 ret = ican3_msg_connect(mod);
1433 if (ret) {
a8ca2efc 1434 netdev_err(mod->ndev, "unable to connect to module\n");
631eb227
IS		 1435 return ret;
1436 }
1437
1438 ican3_init_new_host_interface(mod);
1439 ret = ican3_msg_newhostif(mod);
1440 if (ret) {
a8ca2efc 1441 netdev_err(mod->ndev, "unable to switch to new-style interface\n");
631eb227
IS		 1442 return ret;
1443 }
1444
1445 /* default to "termination on" */
1446 ret = ican3_set_termination(mod, true);
1447 if (ret) {
a8ca2efc 1448 netdev_err(mod->ndev, "unable to enable termination\n");
631eb227
IS		 1449 return ret;
1450 }
1451
1452 /* default to "bus errors enabled" */
30df5888 1453 ret = ican3_set_buserror(mod, 1);
631eb227 1454 if (ret) {
a8ca2efc 1455 netdev_err(mod->ndev, "unable to set bus-error\n");
631eb227
IS		 1456 return ret;
1457 }
1458
1459 ican3_init_fast_host_interface(mod);
1460 ret = ican3_msg_fasthostif(mod);
1461 if (ret) {
a8ca2efc 1462 netdev_err(mod->ndev, "unable to switch to fast host interface\n");
631eb227
IS		 1463 return ret;
1464 }
1465
1466 ret = ican3_set_id_filter(mod, true);
1467 if (ret) {
a8ca2efc 1468 netdev_err(mod->ndev, "unable to set acceptance filter\n");
631eb227
IS		 1469 return ret;
1470 }
1471
1472 return 0;
1473}
1474
1475/*
1476 * CAN Network Device
1477 */
1478
1479static int ican3_open(struct net_device *ndev)
1480{
1481 struct ican3_dev *mod = netdev_priv(ndev);
631eb227
IS		 1482 int ret;
1483
1484 /* open the CAN layer */
1485 ret = open_candev(ndev);
1486 if (ret) {
a8ca2efc 1487 netdev_err(mod->ndev, "unable to start CAN layer\n");
631eb227
IS		 1488 return ret;
1489 }
1490
631eb227
IS		 1491 /* bring the bus online */
1492 ret = ican3_set_bus_state(mod, true);
1493 if (ret) {
a8ca2efc 1494 netdev_err(mod->ndev, "unable to set bus-on\n");
631eb227
IS		 1495 close_candev(ndev);
1496 return ret;
1497 }
1498
1499 /* start up the network device */
1500 mod->can.state = CAN_STATE_ERROR_ACTIVE;
1501 netif_start_queue(ndev);
1502
1503 return 0;
1504}
1505
1506static int ican3_stop(struct net_device *ndev)
1507{
1508 struct ican3_dev *mod = netdev_priv(ndev);
1509 int ret;
1510
1511 /* stop the network device xmit routine */
1512 netif_stop_queue(ndev);
1513 mod->can.state = CAN_STATE_STOPPED;
1514
1515 /* bring the bus offline, stop receiving packets */
1516 ret = ican3_set_bus_state(mod, false);
1517 if (ret) {
a8ca2efc 1518 netdev_err(mod->ndev, "unable to set bus-off\n");
631eb227
IS		 1519 return ret;
1520 }
1521
83702f69
IS		 1522 /* drop all outstanding echo skbs */
1523 skb_queue_purge(&mod->echoq);
1524
631eb227
IS		 1525 /* close the CAN layer */
1526 close_candev(ndev);
1527 return 0;
1528}
1529
1530static int ican3_xmit(struct sk_buff *skb, struct net_device *ndev)
1531{
1532 struct ican3_dev *mod = netdev_priv(ndev);
631eb227
IS		 1533 struct can_frame *cf = (struct can_frame *)skb->data;
1534 struct ican3_fast_desc desc;
1535 void __iomem *desc_addr;
1536 unsigned long flags;
1537
007890d7
IS		 1538 if (can_dropped_invalid_skb(ndev, skb))
1539 return NETDEV_TX_OK;
1540
631eb227
IS		 1541 spin_lock_irqsave(&mod->lock, flags);
1542
1543 /* check that we can actually transmit */
1544 if (!ican3_txok(mod)) {
a8ca2efc 1545 netdev_err(mod->ndev, "BUG: no free descriptors\n");
631eb227
IS		 1546 spin_unlock_irqrestore(&mod->lock, flags);
1547 return NETDEV_TX_BUSY;
1548 }
1549
1550 /* copy the control bits of the descriptor */
1551 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1552 desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc));
1553 memset(&desc, 0, sizeof(desc));
1554 memcpy_fromio(&desc, desc_addr, 1);
1555
1556 /* convert the Linux CAN frame into ICAN3 format */
1557 can_frame_to_ican3(mod, cf, &desc);
1558
83702f69
IS		 1559 /*
1560 * This hardware doesn't have TX-done notifications, so we'll try and
1561 * emulate it the best we can using ECHO skbs. Add the skb to the ECHO
1562 * stack. Upon packet reception, check if the ECHO skb and received
1563 * skb match, and use that to wake the queue.
1564 */
1565 ican3_put_echo_skb(mod, skb);
1566
631eb227
IS		 1567 /*
1568 * the programming manual says that you must set the IVALID bit, then
1569 * interrupt, then set the valid bit. Quite weird, but it seems to be
1570 * required for this to work
1571 */
1572 desc.control |= DESC_IVALID;
1573 memcpy_toio(desc_addr, &desc, sizeof(desc));
1574
1575 /* generate a MODULbus interrupt to the microcontroller */
1576 iowrite8(0x01, &mod->dpmctrl->interrupt);
1577
1578 desc.control ^= DESC_VALID;
1579 memcpy_toio(desc_addr, &desc, sizeof(desc));
1580
1581 /* update the next buffer pointer */
1582 mod->fasttx_num = (desc.control & DESC_WRAP) ? 0
1583 : (mod->fasttx_num + 1);
1584
83702f69 1585 /* if there is no free descriptor space, stop the transmit queue */
631eb227
IS		 1586 if (!ican3_txok(mod))
1587 netif_stop_queue(ndev);
1588
1589 spin_unlock_irqrestore(&mod->lock, flags);
1590 return NETDEV_TX_OK;
1591}
1592
1593static const struct net_device_ops ican3_netdev_ops = {
1594 .ndo_open = ican3_open,
1595 .ndo_stop = ican3_stop,
1596 .ndo_start_xmit = ican3_xmit,
c971fa2a 1597 .ndo_change_mtu = can_change_mtu,
631eb227
IS		 1598};
1599
1600/*
1601 * Low-level CAN Device
1602 */
1603
1604/* This structure was stolen from drivers/net/can/sja1000/sja1000.c */
194b9a4c 1605static const struct can_bittiming_const ican3_bittiming_const = {
631eb227
IS		 1606 .name = DRV_NAME,
1607 .tseg1_min = 1,
1608 .tseg1_max = 16,
1609 .tseg2_min = 1,
1610 .tseg2_max = 8,
1611 .sjw_max = 4,
1612 .brp_min = 1,
1613 .brp_max = 64,
1614 .brp_inc = 1,
1615};
1616
1617/*
1618 * This routine was stolen from drivers/net/can/sja1000/sja1000.c
1619 *
1620 * The bittiming register command for the ICAN3 just sets the bit timing
1621 * registers on the SJA1000 chip directly
1622 */
1623static int ican3_set_bittiming(struct net_device *ndev)
1624{
1625 struct ican3_dev *mod = netdev_priv(ndev);
1626 struct can_bittiming *bt = &mod->can.bittiming;
1627 struct ican3_msg msg;
1628 u8 btr0, btr1;
1629
1630 btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
1631 btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
1632 (((bt->phase_seg2 - 1) & 0x7) << 4);
1633 if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
1634 btr1 |= 0x80;
1635
1636 memset(&msg, 0, sizeof(msg));
1637 msg.spec = MSG_CBTRREQ;
1638 msg.len = cpu_to_le16(4);
1639 msg.data[0] = 0x00;
1640 msg.data[1] = 0x00;
1641 msg.data[2] = btr0;
1642 msg.data[3] = btr1;
1643
1644 return ican3_send_msg(mod, &msg);
1645}
1646
1647static int ican3_set_mode(struct net_device *ndev, enum can_mode mode)
1648{
1649 struct ican3_dev *mod = netdev_priv(ndev);
1650 int ret;
1651
1652 if (mode != CAN_MODE_START)
1653 return -ENOTSUPP;
1654
1655 /* bring the bus online */
1656 ret = ican3_set_bus_state(mod, true);
1657 if (ret) {
a8ca2efc 1658 netdev_err(ndev, "unable to set bus-on\n");
631eb227
IS		 1659 return ret;
1660 }
1661
1662 /* start up the network device */
1663 mod->can.state = CAN_STATE_ERROR_ACTIVE;
1664
1665 if (netif_queue_stopped(ndev))
1666 netif_wake_queue(ndev);
1667
1668 return 0;
1669}
1670
1671static int ican3_get_berr_counter(const struct net_device *ndev,
1672 struct can_berr_counter *bec)
1673{
1674 struct ican3_dev *mod = netdev_priv(ndev);
1675 int ret;
1676
1677 ret = ican3_send_inquiry(mod, INQUIRY_STATUS);
1678 if (ret)
1679 return ret;
1680
1681 ret = wait_for_completion_timeout(&mod->buserror_comp, HZ);
c70edb9e 1682 if (ret == 0) {
a8ca2efc 1683 netdev_info(mod->ndev, "%s timed out\n", __func__);
631eb227
IS		 1684 return -ETIMEDOUT;
1685 }
1686
1687 bec->rxerr = mod->bec.rxerr;
1688 bec->txerr = mod->bec.txerr;
1689 return 0;
1690}
1691
1692/*
1693 * Sysfs Attributes
1694 */
1695
1696static ssize_t ican3_sysfs_show_term(struct device *dev,
1697 struct device_attribute *attr,
1698 char *buf)
1699{
1700 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1701 int ret;
1702
1703 ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION);
1704 if (ret)
1705 return ret;
1706
1707 ret = wait_for_completion_timeout(&mod->termination_comp, HZ);
c70edb9e 1708 if (ret == 0) {
a8ca2efc 1709 netdev_info(mod->ndev, "%s timed out\n", __func__);
631eb227
IS		 1710 return -ETIMEDOUT;
1711 }
1712
1713 return snprintf(buf, PAGE_SIZE, "%u\n", mod->termination_enabled);
1714}
1715
1716static ssize_t ican3_sysfs_set_term(struct device *dev,
1717 struct device_attribute *attr,
1718 const char *buf, size_t count)
1719{
1720 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1721 unsigned long enable;
1722 int ret;
1723
0672f0ab 1724 if (kstrtoul(buf, 0, &enable))
631eb227
IS		 1725 return -EINVAL;
1726
1727 ret = ican3_set_termination(mod, enable);
1728 if (ret)
1729 return ret;
1730
1731 return count;
1732}
1733
1e6d93e4 1734static DEVICE_ATTR(termination, S_IWUSR | S_IRUGO, ican3_sysfs_show_term,
631eb227
IS		 1735 ican3_sysfs_set_term);
1736
1737static struct attribute *ican3_sysfs_attrs[] = {
1738 &dev_attr_termination.attr,
1739 NULL,
1740};
1741
1742static struct attribute_group ican3_sysfs_attr_group = {
1743 .attrs = ican3_sysfs_attrs,
1744};
1745
1746/*
1747 * PCI Subsystem
1748 */
1749
3c8ac0f2 1750static int ican3_probe(struct platform_device *pdev)
631eb227
IS		 1751{
1752 struct janz_platform_data *pdata;
1753 struct net_device *ndev;
1754 struct ican3_dev *mod;
1755 struct resource *res;
1756 struct device *dev;
1757 int ret;
1758
c91a319c 1759 pdata = dev_get_platdata(&pdev->dev);
631eb227
IS		 1760 if (!pdata)
1761 return -ENXIO;
1762
1763 dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno);
1764
1765 /* save the struct device for printing */
1766 dev = &pdev->dev;
1767
1768 /* allocate the CAN device and private data */
1769 ndev = alloc_candev(sizeof(*mod), 0);
1770 if (!ndev) {
1771 dev_err(dev, "unable to allocate CANdev\n");
1772 ret = -ENOMEM;
1773 goto out_return;
1774 }
1775
1776 platform_set_drvdata(pdev, ndev);
1777 mod = netdev_priv(ndev);
1778 mod->ndev = ndev;
631eb227
IS		 1779 mod->num = pdata->modno;
1780 netif_napi_add(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS);
83702f69 1781 skb_queue_head_init(&mod->echoq);
631eb227
IS		 1782 spin_lock_init(&mod->lock);
1783 init_completion(&mod->termination_comp);
1784 init_completion(&mod->buserror_comp);
1785
1786 /* setup device-specific sysfs attributes */
1787 ndev->sysfs_groups[0] = &ican3_sysfs_attr_group;
1788
1789 /* the first unallocated page in the DPM is 9 */
1790 mod->free_page = DPM_FREE_START;
1791
1792 ndev->netdev_ops = &ican3_netdev_ops;
1793 ndev->flags |= IFF_ECHO;
1794 SET_NETDEV_DEV(ndev, &pdev->dev);
1795
1796 mod->can.clock.freq = ICAN3_CAN_CLOCK;
1797 mod->can.bittiming_const = &ican3_bittiming_const;
1798 mod->can.do_set_bittiming = ican3_set_bittiming;
1799 mod->can.do_set_mode = ican3_set_mode;
1800 mod->can.do_get_berr_counter = ican3_get_berr_counter;
1801 mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES
3b5c6b9e
IS		 1802 | CAN_CTRLMODE_BERR_REPORTING
1803 | CAN_CTRLMODE_ONE_SHOT;
631eb227
IS		 1804
1805 /* find our IRQ number */
1806 mod->irq = platform_get_irq(pdev, 0);
1807 if (mod->irq < 0) {
1808 dev_err(dev, "IRQ line not found\n");
1809 ret = -ENODEV;
1810 goto out_free_ndev;
1811 }
1812
1813 ndev->irq = mod->irq;
1814
1815 /* get access to the MODULbus registers for this module */
1816 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1817 if (!res) {
1818 dev_err(dev, "MODULbus registers not found\n");
1819 ret = -ENODEV;
1820 goto out_free_ndev;
1821 }
1822
1823 mod->dpm = ioremap(res->start, resource_size(res));
1824 if (!mod->dpm) {
1825 dev_err(dev, "MODULbus registers not ioremap\n");
1826 ret = -ENOMEM;
1827 goto out_free_ndev;
1828 }
1829
1830 mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE;
1831
1832 /* get access to the control registers for this module */
1833 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1834 if (!res) {
1835 dev_err(dev, "CONTROL registers not found\n");
1836 ret = -ENODEV;
1837 goto out_iounmap_dpm;
1838 }
1839
1840 mod->ctrl = ioremap(res->start, resource_size(res));
1841 if (!mod->ctrl) {
1842 dev_err(dev, "CONTROL registers not ioremap\n");
1843 ret = -ENOMEM;
1844 goto out_iounmap_dpm;
1845 }
1846
1847 /* disable our IRQ, then hookup the IRQ handler */
1848 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1849 ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod);
1850 if (ret) {
1851 dev_err(dev, "unable to request IRQ\n");
1852 goto out_iounmap_ctrl;
1853 }
1854
1855 /* reset and initialize the CAN controller into fast mode */
1856 napi_enable(&mod->napi);
1857 ret = ican3_startup_module(mod);
1858 if (ret) {
1859 dev_err(dev, "%s: unable to start CANdev\n", __func__);
1860 goto out_free_irq;
1861 }
1862
1863 /* register with the Linux CAN layer */
1864 ret = register_candev(ndev);
1865 if (ret) {
1866 dev_err(dev, "%s: unable to register CANdev\n", __func__);
1867 goto out_free_irq;
1868 }
1869
1870 dev_info(dev, "module %d: registered CAN device\n", pdata->modno);
1871 return 0;
1872
1873out_free_irq:
1874 napi_disable(&mod->napi);
1875 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1876 free_irq(mod->irq, mod);
1877out_iounmap_ctrl:
1878 iounmap(mod->ctrl);
1879out_iounmap_dpm:
1880 iounmap(mod->dpm);
1881out_free_ndev:
1882 free_candev(ndev);
1883out_return:
1884 return ret;
1885}
1886
3c8ac0f2 1887static int ican3_remove(struct platform_device *pdev)
631eb227
IS		 1888{
1889 struct net_device *ndev = platform_get_drvdata(pdev);
1890 struct ican3_dev *mod = netdev_priv(ndev);
1891
1892 /* unregister the netdevice, stop interrupts */
1893 unregister_netdev(ndev);
1894 napi_disable(&mod->napi);
1895 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1896 free_irq(mod->irq, mod);
1897
1898 /* put the module into reset */
1899 ican3_shutdown_module(mod);
1900
1901 /* unmap all registers */
1902 iounmap(mod->ctrl);
1903 iounmap(mod->dpm);
1904
1905 free_candev(ndev);
1906
1907 return 0;
1908}
1909
1910static struct platform_driver ican3_driver = {
1911 .driver = {
1912 .name = DRV_NAME,
631eb227
IS		 1913 },
1914 .probe = ican3_probe,
3c8ac0f2 1915 .remove = ican3_remove,
631eb227
IS		 1916};
1917
871d3372 1918module_platform_driver(ican3_driver);
631eb227
IS		 1919
1920MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
1921MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver");
1922MODULE_LICENSE("GPL");
1923MODULE_ALIAS("platform:janz-ican3");
Linux 6.x block layer and io_uring tree(s)