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8b230ed8 RM |
1 | /* |
2 | * Linux network driver for Brocade Converged Network Adapter. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms of the GNU General Public License (GPL) Version 2 as | |
6 | * published by the Free Software Foundation | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | /* | |
14 | * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. | |
15 | * All rights reserved | |
16 | * www.brocade.com | |
17 | */ | |
18 | #ifndef __BNA_TYPES_H__ | |
19 | #define __BNA_TYPES_H__ | |
20 | ||
21 | #include "cna.h" | |
22 | #include "bna_hw.h" | |
23 | #include "bfa_cee.h" | |
24 | ||
25 | /** | |
26 | * | |
27 | * Forward declarations | |
28 | * | |
29 | */ | |
30 | ||
31 | struct bna_txq; | |
32 | struct bna_tx; | |
33 | struct bna_rxq; | |
34 | struct bna_cq; | |
35 | struct bna_rx; | |
36 | struct bna_rxf; | |
37 | struct bna_port; | |
38 | struct bna; | |
39 | struct bnad; | |
40 | ||
41 | /** | |
42 | * | |
43 | * Enums, primitive data types | |
44 | * | |
45 | */ | |
46 | ||
47 | enum bna_status { | |
48 | BNA_STATUS_T_DISABLED = 0, | |
49 | BNA_STATUS_T_ENABLED = 1 | |
50 | }; | |
51 | ||
52 | enum bna_cleanup_type { | |
0120b99c RM |
53 | BNA_HARD_CLEANUP = 0, |
54 | BNA_SOFT_CLEANUP = 1 | |
8b230ed8 RM |
55 | }; |
56 | ||
57 | enum bna_cb_status { | |
0120b99c | 58 | BNA_CB_SUCCESS = 0, |
8b230ed8 RM |
59 | BNA_CB_FAIL = 1, |
60 | BNA_CB_INTERRUPT = 2, | |
61 | BNA_CB_BUSY = 3, | |
62 | BNA_CB_INVALID_MAC = 4, | |
63 | BNA_CB_MCAST_LIST_FULL = 5, | |
64 | BNA_CB_UCAST_CAM_FULL = 6, | |
65 | BNA_CB_WAITING = 7, | |
66 | BNA_CB_NOT_EXEC = 8 | |
67 | }; | |
68 | ||
69 | enum bna_res_type { | |
70 | BNA_RES_T_MEM = 1, | |
71 | BNA_RES_T_INTR = 2 | |
72 | }; | |
73 | ||
74 | enum bna_mem_type { | |
0120b99c RM |
75 | BNA_MEM_T_KVA = 1, |
76 | BNA_MEM_T_DMA = 2 | |
8b230ed8 RM |
77 | }; |
78 | ||
79 | enum bna_intr_type { | |
80 | BNA_INTR_T_INTX = 1, | |
81 | BNA_INTR_T_MSIX = 2 | |
82 | }; | |
83 | ||
84 | enum bna_res_req_type { | |
0120b99c RM |
85 | BNA_RES_MEM_T_COM = 0, |
86 | BNA_RES_MEM_T_ATTR = 1, | |
87 | BNA_RES_MEM_T_FWTRC = 2, | |
88 | BNA_RES_MEM_T_STATS = 3, | |
8b230ed8 RM |
89 | BNA_RES_MEM_T_SWSTATS = 4, |
90 | BNA_RES_MEM_T_IBIDX = 5, | |
91 | BNA_RES_MEM_T_IB_ARRAY = 6, | |
92 | BNA_RES_MEM_T_INTR_ARRAY = 7, | |
93 | BNA_RES_MEM_T_IDXSEG_ARRAY = 8, | |
94 | BNA_RES_MEM_T_TX_ARRAY = 9, | |
95 | BNA_RES_MEM_T_TXQ_ARRAY = 10, | |
96 | BNA_RES_MEM_T_RX_ARRAY = 11, | |
97 | BNA_RES_MEM_T_RXP_ARRAY = 12, | |
98 | BNA_RES_MEM_T_RXQ_ARRAY = 13, | |
99 | BNA_RES_MEM_T_UCMAC_ARRAY = 14, | |
100 | BNA_RES_MEM_T_MCMAC_ARRAY = 15, | |
101 | BNA_RES_MEM_T_RIT_ENTRY = 16, | |
102 | BNA_RES_MEM_T_RIT_SEGMENT = 17, | |
103 | BNA_RES_INTR_T_MBOX = 18, | |
104 | BNA_RES_T_MAX | |
105 | }; | |
106 | ||
107 | enum bna_tx_res_req_type { | |
108 | BNA_TX_RES_MEM_T_TCB = 0, | |
109 | BNA_TX_RES_MEM_T_UNMAPQ = 1, | |
0120b99c | 110 | BNA_TX_RES_MEM_T_QPT = 2, |
8b230ed8 | 111 | BNA_TX_RES_MEM_T_SWQPT = 3, |
0120b99c | 112 | BNA_TX_RES_MEM_T_PAGE = 4, |
8b230ed8 RM |
113 | BNA_TX_RES_INTR_T_TXCMPL = 5, |
114 | BNA_TX_RES_T_MAX, | |
115 | }; | |
116 | ||
117 | enum bna_rx_mem_type { | |
118 | BNA_RX_RES_MEM_T_CCB = 0, /* CQ context */ | |
119 | BNA_RX_RES_MEM_T_RCB = 1, /* CQ context */ | |
120 | BNA_RX_RES_MEM_T_UNMAPQ = 2, /* UnmapQ for RxQs */ | |
121 | BNA_RX_RES_MEM_T_CQPT = 3, /* CQ QPT */ | |
122 | BNA_RX_RES_MEM_T_CSWQPT = 4, /* S/W QPT */ | |
123 | BNA_RX_RES_MEM_T_CQPT_PAGE = 5, /* CQPT page */ | |
124 | BNA_RX_RES_MEM_T_HQPT = 6, /* RX QPT */ | |
125 | BNA_RX_RES_MEM_T_DQPT = 7, /* RX QPT */ | |
126 | BNA_RX_RES_MEM_T_HSWQPT = 8, /* RX s/w QPT */ | |
127 | BNA_RX_RES_MEM_T_DSWQPT = 9, /* RX s/w QPT */ | |
128 | BNA_RX_RES_MEM_T_DPAGE = 10, /* RX s/w QPT */ | |
129 | BNA_RX_RES_MEM_T_HPAGE = 11, /* RX s/w QPT */ | |
130 | BNA_RX_RES_T_INTR = 12, /* Rx interrupts */ | |
131 | BNA_RX_RES_T_MAX = 13 | |
132 | }; | |
133 | ||
134 | enum bna_mbox_state { | |
135 | BNA_MBOX_FREE = 0, | |
136 | BNA_MBOX_POSTED = 1 | |
137 | }; | |
138 | ||
139 | enum bna_tx_type { | |
140 | BNA_TX_T_REGULAR = 0, | |
141 | BNA_TX_T_LOOPBACK = 1, | |
142 | }; | |
143 | ||
144 | enum bna_tx_flags { | |
145 | BNA_TX_F_PORT_STARTED = 1, | |
146 | BNA_TX_F_ENABLED = 2, | |
147 | BNA_TX_F_PRIO_LOCK = 4, | |
148 | }; | |
149 | ||
150 | enum bna_tx_mod_flags { | |
151 | BNA_TX_MOD_F_PORT_STARTED = 1, | |
152 | BNA_TX_MOD_F_PORT_LOOPBACK = 2, | |
153 | }; | |
154 | ||
155 | enum bna_rx_type { | |
156 | BNA_RX_T_REGULAR = 0, | |
157 | BNA_RX_T_LOOPBACK = 1, | |
158 | }; | |
159 | ||
160 | enum bna_rxp_type { | |
0120b99c RM |
161 | BNA_RXP_SINGLE = 1, |
162 | BNA_RXP_SLR = 2, | |
163 | BNA_RXP_HDS = 3 | |
8b230ed8 RM |
164 | }; |
165 | ||
166 | enum bna_rxmode { | |
0120b99c RM |
167 | BNA_RXMODE_PROMISC = 1, |
168 | BNA_RXMODE_ALLMULTI = 2 | |
8b230ed8 RM |
169 | }; |
170 | ||
171 | enum bna_rx_event { | |
172 | RX_E_START = 1, | |
173 | RX_E_STOP = 2, | |
174 | RX_E_FAIL = 3, | |
175 | RX_E_RXF_STARTED = 4, | |
176 | RX_E_RXF_STOPPED = 5, | |
177 | RX_E_RXQ_STOPPED = 6, | |
178 | }; | |
179 | ||
180 | enum bna_rx_state { | |
181 | BNA_RX_STOPPED = 1, | |
182 | BNA_RX_RXF_START_WAIT = 2, | |
183 | BNA_RX_STARTED = 3, | |
184 | BNA_RX_RXF_STOP_WAIT = 4, | |
185 | BNA_RX_RXQ_STOP_WAIT = 5, | |
186 | }; | |
187 | ||
188 | enum bna_rx_flags { | |
189 | BNA_RX_F_ENABLE = 0x01, /* bnad enabled rxf */ | |
190 | BNA_RX_F_PORT_ENABLED = 0x02, /* Port object is enabled */ | |
191 | BNA_RX_F_PORT_FAILED = 0x04, /* Port in failed state */ | |
192 | }; | |
193 | ||
194 | enum bna_rx_mod_flags { | |
195 | BNA_RX_MOD_F_PORT_STARTED = 1, | |
196 | BNA_RX_MOD_F_PORT_LOOPBACK = 2, | |
197 | }; | |
198 | ||
199 | enum bna_rxf_oper_state { | |
200 | BNA_RXF_OPER_STATE_RUNNING = 0x01, /* rxf operational */ | |
201 | BNA_RXF_OPER_STATE_PAUSED = 0x02, /* rxf in PAUSED state */ | |
202 | }; | |
203 | ||
204 | enum bna_rxf_flags { | |
0120b99c | 205 | BNA_RXF_FL_STOP_PENDING = 0x01, |
8b230ed8 RM |
206 | BNA_RXF_FL_FAILED = 0x02, |
207 | BNA_RXF_FL_RSS_CONFIG_PENDING = 0x04, | |
208 | BNA_RXF_FL_OPERSTATE_CHANGED = 0x08, | |
209 | BNA_RXF_FL_RXF_ENABLED = 0x10, | |
210 | BNA_RXF_FL_VLAN_CONFIG_PENDING = 0x20, | |
211 | }; | |
212 | ||
213 | enum bna_rxf_event { | |
214 | RXF_E_START = 1, | |
215 | RXF_E_STOP = 2, | |
216 | RXF_E_FAIL = 3, | |
217 | RXF_E_CAM_FLTR_MOD = 4, | |
218 | RXF_E_STARTED = 5, | |
219 | RXF_E_STOPPED = 6, | |
220 | RXF_E_CAM_FLTR_RESP = 7, | |
221 | RXF_E_PAUSE = 8, | |
222 | RXF_E_RESUME = 9, | |
223 | RXF_E_STAT_CLEARED = 10, | |
224 | }; | |
225 | ||
226 | enum bna_rxf_state { | |
227 | BNA_RXF_STOPPED = 1, | |
228 | BNA_RXF_START_WAIT = 2, | |
229 | BNA_RXF_CAM_FLTR_MOD_WAIT = 3, | |
230 | BNA_RXF_STARTED = 4, | |
231 | BNA_RXF_CAM_FLTR_CLR_WAIT = 5, | |
232 | BNA_RXF_STOP_WAIT = 6, | |
233 | BNA_RXF_PAUSE_WAIT = 7, | |
234 | BNA_RXF_RESUME_WAIT = 8, | |
235 | BNA_RXF_STAT_CLR_WAIT = 9, | |
236 | }; | |
237 | ||
238 | enum bna_port_type { | |
239 | BNA_PORT_T_REGULAR = 0, | |
240 | BNA_PORT_T_LOOPBACK_INTERNAL = 1, | |
241 | BNA_PORT_T_LOOPBACK_EXTERNAL = 2, | |
242 | }; | |
243 | ||
244 | enum bna_link_status { | |
245 | BNA_LINK_DOWN = 0, | |
246 | BNA_LINK_UP = 1, | |
0120b99c | 247 | BNA_CEE_UP = 2 |
8b230ed8 RM |
248 | }; |
249 | ||
250 | enum bna_llport_flags { | |
0120b99c | 251 | BNA_LLPORT_F_ADMIN_UP = 1, |
0613ecfc RM |
252 | BNA_LLPORT_F_PORT_ENABLED = 2, |
253 | BNA_LLPORT_F_RX_STARTED = 4 | |
8b230ed8 RM |
254 | }; |
255 | ||
256 | enum bna_port_flags { | |
257 | BNA_PORT_F_DEVICE_READY = 1, | |
258 | BNA_PORT_F_ENABLED = 2, | |
259 | BNA_PORT_F_PAUSE_CHANGED = 4, | |
260 | BNA_PORT_F_MTU_CHANGED = 8 | |
261 | }; | |
262 | ||
263 | enum bna_pkt_rates { | |
264 | BNA_PKT_RATE_10K = 10000, | |
265 | BNA_PKT_RATE_20K = 20000, | |
266 | BNA_PKT_RATE_30K = 30000, | |
267 | BNA_PKT_RATE_40K = 40000, | |
268 | BNA_PKT_RATE_50K = 50000, | |
269 | BNA_PKT_RATE_60K = 60000, | |
270 | BNA_PKT_RATE_70K = 70000, | |
271 | BNA_PKT_RATE_80K = 80000, | |
272 | }; | |
273 | ||
274 | enum bna_dim_load_types { | |
275 | BNA_LOAD_T_HIGH_4 = 0, /* 80K <= r */ | |
276 | BNA_LOAD_T_HIGH_3 = 1, /* 60K <= r < 80K */ | |
277 | BNA_LOAD_T_HIGH_2 = 2, /* 50K <= r < 60K */ | |
278 | BNA_LOAD_T_HIGH_1 = 3, /* 40K <= r < 50K */ | |
279 | BNA_LOAD_T_LOW_1 = 4, /* 30K <= r < 40K */ | |
280 | BNA_LOAD_T_LOW_2 = 5, /* 20K <= r < 30K */ | |
281 | BNA_LOAD_T_LOW_3 = 6, /* 10K <= r < 20K */ | |
282 | BNA_LOAD_T_LOW_4 = 7, /* r < 10K */ | |
283 | BNA_LOAD_T_MAX = 8 | |
284 | }; | |
285 | ||
286 | enum bna_dim_bias_types { | |
287 | BNA_BIAS_T_SMALL = 0, /* small pkts > (large pkts * 2) */ | |
288 | BNA_BIAS_T_LARGE = 1, /* Not BNA_BIAS_T_SMALL */ | |
289 | BNA_BIAS_T_MAX = 2 | |
290 | }; | |
291 | ||
292 | struct bna_mac { | |
293 | /* This should be the first one */ | |
294 | struct list_head qe; | |
295 | u8 addr[ETH_ALEN]; | |
296 | }; | |
297 | ||
298 | struct bna_mem_descr { | |
299 | u32 len; | |
300 | void *kva; | |
301 | struct bna_dma_addr dma; | |
302 | }; | |
303 | ||
304 | struct bna_mem_info { | |
305 | enum bna_mem_type mem_type; | |
306 | u32 len; | |
0120b99c | 307 | u32 num; |
8b230ed8 RM |
308 | u32 align_sz; /* 0/1 = no alignment */ |
309 | struct bna_mem_descr *mdl; | |
310 | void *cookie; /* For bnad to unmap dma later */ | |
311 | }; | |
312 | ||
313 | struct bna_intr_descr { | |
314 | int vector; | |
315 | }; | |
316 | ||
317 | struct bna_intr_info { | |
318 | enum bna_intr_type intr_type; | |
319 | int num; | |
320 | struct bna_intr_descr *idl; | |
321 | }; | |
322 | ||
323 | union bna_res_u { | |
324 | struct bna_mem_info mem_info; | |
325 | struct bna_intr_info intr_info; | |
326 | }; | |
327 | ||
328 | struct bna_res_info { | |
329 | enum bna_res_type res_type; | |
330 | union bna_res_u res_u; | |
331 | }; | |
332 | ||
333 | /* HW QPT */ | |
334 | struct bna_qpt { | |
335 | struct bna_dma_addr hw_qpt_ptr; | |
336 | void *kv_qpt_ptr; | |
337 | u32 page_count; | |
338 | u32 page_size; | |
339 | }; | |
340 | ||
341 | /** | |
342 | * | |
343 | * Device | |
344 | * | |
345 | */ | |
346 | ||
347 | struct bna_device { | |
348 | bfa_fsm_t fsm; | |
349 | struct bfa_ioc ioc; | |
350 | ||
351 | enum bna_intr_type intr_type; | |
352 | int vector; | |
353 | ||
354 | void (*ready_cbfn)(struct bnad *bnad, enum bna_cb_status status); | |
355 | struct bnad *ready_cbarg; | |
356 | ||
357 | void (*stop_cbfn)(struct bnad *bnad, enum bna_cb_status status); | |
358 | struct bnad *stop_cbarg; | |
359 | ||
360 | struct bna *bna; | |
361 | }; | |
362 | ||
363 | /** | |
364 | * | |
365 | * Mail box | |
366 | * | |
367 | */ | |
368 | ||
369 | struct bna_mbox_qe { | |
370 | /* This should be the first one */ | |
371 | struct list_head qe; | |
372 | ||
373 | struct bfa_mbox_cmd cmd; | |
0120b99c | 374 | u32 cmd_len; |
8b230ed8 RM |
375 | /* Callback for port, tx, rx, rxf */ |
376 | void (*cbfn)(void *arg, int status); | |
0120b99c | 377 | void *cbarg; |
8b230ed8 RM |
378 | }; |
379 | ||
380 | struct bna_mbox_mod { | |
381 | enum bna_mbox_state state; | |
382 | struct list_head posted_q; | |
383 | u32 msg_pending; | |
384 | u32 msg_ctr; | |
385 | struct bna *bna; | |
386 | }; | |
387 | ||
388 | /** | |
389 | * | |
390 | * Port | |
391 | * | |
392 | */ | |
393 | ||
394 | /* Pause configuration */ | |
395 | struct bna_pause_config { | |
396 | enum bna_status tx_pause; | |
397 | enum bna_status rx_pause; | |
398 | }; | |
399 | ||
400 | struct bna_llport { | |
401 | bfa_fsm_t fsm; | |
402 | enum bna_llport_flags flags; | |
403 | ||
404 | enum bna_port_type type; | |
405 | ||
406 | enum bna_link_status link_status; | |
407 | ||
0613ecfc | 408 | int rx_started_count; |
8b230ed8 RM |
409 | |
410 | void (*stop_cbfn)(struct bna_port *, enum bna_cb_status); | |
411 | ||
412 | struct bna_mbox_qe mbox_qe; | |
413 | ||
414 | struct bna *bna; | |
415 | }; | |
416 | ||
417 | struct bna_port { | |
418 | bfa_fsm_t fsm; | |
419 | enum bna_port_flags flags; | |
420 | ||
421 | enum bna_port_type type; | |
422 | ||
423 | struct bna_llport llport; | |
424 | ||
425 | struct bna_pause_config pause_config; | |
426 | u8 priority; | |
427 | int mtu; | |
428 | ||
429 | /* Callback for bna_port_disable(), port_stop() */ | |
430 | void (*stop_cbfn)(void *, enum bna_cb_status); | |
431 | void *stop_cbarg; | |
432 | ||
433 | /* Callback for bna_port_pause_config() */ | |
434 | void (*pause_cbfn)(struct bnad *, enum bna_cb_status); | |
435 | ||
436 | /* Callback for bna_port_mtu_set() */ | |
437 | void (*mtu_cbfn)(struct bnad *, enum bna_cb_status); | |
438 | ||
439 | void (*link_cbfn)(struct bnad *, enum bna_link_status); | |
440 | ||
441 | struct bfa_wc chld_stop_wc; | |
442 | ||
443 | struct bna_mbox_qe mbox_qe; | |
444 | ||
445 | struct bna *bna; | |
446 | }; | |
447 | ||
448 | /** | |
449 | * | |
450 | * Interrupt Block | |
451 | * | |
452 | */ | |
453 | ||
454 | /* IB index segment structure */ | |
455 | struct bna_ibidx_seg { | |
456 | /* This should be the first one */ | |
457 | struct list_head qe; | |
458 | ||
459 | u8 ib_seg_size; | |
460 | u8 ib_idx_tbl_offset; | |
461 | }; | |
462 | ||
463 | /* Interrupt structure */ | |
464 | struct bna_intr { | |
465 | /* This should be the first one */ | |
466 | struct list_head qe; | |
467 | int ref_count; | |
468 | ||
469 | enum bna_intr_type intr_type; | |
470 | int vector; | |
471 | ||
472 | struct bna_ib *ib; | |
473 | }; | |
474 | ||
475 | /* Doorbell structure */ | |
476 | struct bna_ib_dbell { | |
477 | void *__iomem doorbell_addr; | |
478 | u32 doorbell_ack; | |
479 | }; | |
480 | ||
481 | /* Interrupt timer configuration */ | |
482 | struct bna_ib_config { | |
0120b99c | 483 | u8 coalescing_timeo; /* Unit is 5usec. */ |
8b230ed8 RM |
484 | |
485 | int interpkt_count; | |
486 | int interpkt_timeo; | |
487 | ||
488 | enum ib_flags ctrl_flags; | |
489 | }; | |
490 | ||
491 | /* IB structure */ | |
492 | struct bna_ib { | |
493 | /* This should be the first one */ | |
494 | struct list_head qe; | |
495 | ||
496 | int ib_id; | |
497 | ||
498 | int ref_count; | |
499 | int start_count; | |
500 | ||
501 | struct bna_dma_addr ib_seg_host_addr; | |
502 | void *ib_seg_host_addr_kva; | |
503 | u32 idx_mask; /* Size >= BNA_IBIDX_MAX_SEGSIZE */ | |
504 | ||
505 | struct bna_ibidx_seg *idx_seg; | |
506 | ||
507 | struct bna_ib_dbell door_bell; | |
508 | ||
509 | struct bna_intr *intr; | |
510 | ||
511 | struct bna_ib_config ib_config; | |
512 | ||
513 | struct bna *bna; | |
514 | }; | |
515 | ||
516 | /* IB module - keeps track of IBs and interrupts */ | |
517 | struct bna_ib_mod { | |
518 | struct bna_ib *ib; /* BFI_MAX_IB entries */ | |
519 | struct bna_intr *intr; /* BFI_MAX_IB entries */ | |
520 | struct bna_ibidx_seg *idx_seg; /* BNA_IBIDX_TOTAL_SEGS */ | |
521 | ||
522 | struct list_head ib_free_q; | |
523 | ||
524 | struct list_head ibidx_seg_pool[BFI_IBIDX_TOTAL_POOLS]; | |
525 | ||
526 | struct list_head intr_free_q; | |
527 | struct list_head intr_active_q; | |
528 | ||
529 | struct bna *bna; | |
530 | }; | |
531 | ||
532 | /** | |
533 | * | |
534 | * Tx object | |
535 | * | |
536 | */ | |
537 | ||
538 | /* Tx datapath control structure */ | |
539 | #define BNA_Q_NAME_SIZE 16 | |
540 | struct bna_tcb { | |
541 | /* Fast path */ | |
542 | void **sw_qpt; | |
543 | void *unmap_q; | |
544 | u32 producer_index; | |
545 | u32 consumer_index; | |
546 | volatile u32 *hw_consumer_index; | |
547 | u32 q_depth; | |
548 | void *__iomem q_dbell; | |
549 | struct bna_ib_dbell *i_dbell; | |
550 | int page_idx; | |
551 | int page_count; | |
552 | /* Control path */ | |
553 | struct bna_txq *txq; | |
554 | struct bnad *bnad; | |
555 | enum bna_intr_type intr_type; | |
556 | int intr_vector; | |
557 | u8 priority; /* Current priority */ | |
558 | unsigned long flags; /* Used by bnad as required */ | |
559 | int id; | |
560 | char name[BNA_Q_NAME_SIZE]; | |
561 | }; | |
562 | ||
563 | /* TxQ QPT and configuration */ | |
564 | struct bna_txq { | |
565 | /* This should be the first one */ | |
566 | struct list_head qe; | |
567 | ||
568 | int txq_id; | |
569 | ||
570 | u8 priority; | |
571 | ||
572 | struct bna_qpt qpt; | |
573 | struct bna_tcb *tcb; | |
574 | struct bna_ib *ib; | |
575 | int ib_seg_offset; | |
576 | ||
577 | struct bna_tx *tx; | |
578 | ||
0120b99c RM |
579 | u64 tx_packets; |
580 | u64 tx_bytes; | |
8b230ed8 RM |
581 | }; |
582 | ||
583 | /* TxF structure (hardware Tx Function) */ | |
584 | struct bna_txf { | |
585 | int txf_id; | |
586 | enum txf_flags ctrl_flags; | |
587 | u16 vlan; | |
588 | }; | |
589 | ||
590 | /* Tx object */ | |
591 | struct bna_tx { | |
592 | /* This should be the first one */ | |
593 | struct list_head qe; | |
594 | ||
595 | bfa_fsm_t fsm; | |
596 | enum bna_tx_flags flags; | |
597 | ||
598 | enum bna_tx_type type; | |
599 | ||
600 | struct list_head txq_q; | |
601 | struct bna_txf txf; | |
602 | ||
603 | /* Tx event handlers */ | |
604 | void (*tcb_setup_cbfn)(struct bnad *, struct bna_tcb *); | |
605 | void (*tcb_destroy_cbfn)(struct bnad *, struct bna_tcb *); | |
606 | void (*tx_stall_cbfn)(struct bnad *, struct bna_tcb *); | |
607 | void (*tx_resume_cbfn)(struct bnad *, struct bna_tcb *); | |
608 | void (*tx_cleanup_cbfn)(struct bnad *, struct bna_tcb *); | |
609 | ||
610 | /* callback for bna_tx_disable(), bna_tx_stop() */ | |
611 | void (*stop_cbfn)(void *arg, struct bna_tx *tx, | |
612 | enum bna_cb_status status); | |
613 | void *stop_cbarg; | |
614 | ||
615 | /* callback for bna_tx_prio_set() */ | |
616 | void (*prio_change_cbfn)(struct bnad *bnad, struct bna_tx *tx, | |
617 | enum bna_cb_status status); | |
618 | ||
619 | struct bfa_wc txq_stop_wc; | |
620 | ||
621 | struct bna_mbox_qe mbox_qe; | |
622 | ||
623 | struct bna *bna; | |
624 | void *priv; /* bnad's cookie */ | |
625 | }; | |
626 | ||
627 | struct bna_tx_config { | |
628 | int num_txq; | |
629 | int txq_depth; | |
630 | enum bna_tx_type tx_type; | |
631 | }; | |
632 | ||
633 | struct bna_tx_event_cbfn { | |
634 | /* Optional */ | |
635 | void (*tcb_setup_cbfn)(struct bnad *, struct bna_tcb *); | |
636 | void (*tcb_destroy_cbfn)(struct bnad *, struct bna_tcb *); | |
637 | /* Mandatory */ | |
638 | void (*tx_stall_cbfn)(struct bnad *, struct bna_tcb *); | |
639 | void (*tx_resume_cbfn)(struct bnad *, struct bna_tcb *); | |
640 | void (*tx_cleanup_cbfn)(struct bnad *, struct bna_tcb *); | |
641 | }; | |
642 | ||
643 | /* Tx module - keeps track of free, active tx objects */ | |
644 | struct bna_tx_mod { | |
645 | struct bna_tx *tx; /* BFI_MAX_TXQ entries */ | |
646 | struct bna_txq *txq; /* BFI_MAX_TXQ entries */ | |
647 | ||
648 | struct list_head tx_free_q; | |
649 | struct list_head tx_active_q; | |
650 | ||
651 | struct list_head txq_free_q; | |
652 | ||
653 | /* callback for bna_tx_mod_stop() */ | |
654 | void (*stop_cbfn)(struct bna_port *port, | |
655 | enum bna_cb_status status); | |
656 | ||
657 | struct bfa_wc tx_stop_wc; | |
658 | ||
659 | enum bna_tx_mod_flags flags; | |
660 | ||
661 | int priority; | |
662 | int cee_link; | |
663 | ||
664 | u32 txf_bmap[2]; | |
665 | ||
666 | struct bna *bna; | |
667 | }; | |
668 | ||
669 | /** | |
670 | * | |
671 | * Receive Indirection Table | |
672 | * | |
673 | */ | |
674 | ||
675 | /* One row of RIT table */ | |
676 | struct bna_rit_entry { | |
677 | u8 large_rxq_id; /* used for either large or data buffers */ | |
678 | u8 small_rxq_id; /* used for either small or header buffers */ | |
679 | }; | |
680 | ||
681 | /* RIT segment */ | |
682 | struct bna_rit_segment { | |
683 | struct list_head qe; | |
684 | ||
685 | u32 rit_offset; | |
686 | u32 rit_size; | |
687 | /** | |
688 | * max_rit_size: Varies per RIT segment depending on how RIT is | |
689 | * partitioned | |
690 | */ | |
691 | u32 max_rit_size; | |
692 | ||
693 | struct bna_rit_entry *rit; | |
694 | }; | |
695 | ||
696 | struct bna_rit_mod { | |
697 | struct bna_rit_entry *rit; | |
698 | struct bna_rit_segment *rit_segment; | |
699 | ||
700 | struct list_head rit_seg_pool[BFI_RIT_SEG_TOTAL_POOLS]; | |
701 | }; | |
702 | ||
703 | /** | |
704 | * | |
705 | * Rx object | |
706 | * | |
707 | */ | |
708 | ||
709 | /* Rx datapath control structure */ | |
710 | struct bna_rcb { | |
711 | /* Fast path */ | |
712 | void **sw_qpt; | |
713 | void *unmap_q; | |
714 | u32 producer_index; | |
715 | u32 consumer_index; | |
716 | u32 q_depth; | |
717 | void *__iomem q_dbell; | |
718 | int page_idx; | |
719 | int page_count; | |
720 | /* Control path */ | |
721 | struct bna_rxq *rxq; | |
722 | struct bna_cq *cq; | |
723 | struct bnad *bnad; | |
724 | unsigned long flags; | |
725 | int id; | |
726 | }; | |
727 | ||
728 | /* RxQ structure - QPT, configuration */ | |
729 | struct bna_rxq { | |
730 | struct list_head qe; | |
731 | int rxq_id; | |
732 | ||
733 | int buffer_size; | |
734 | int q_depth; | |
735 | ||
736 | struct bna_qpt qpt; | |
737 | struct bna_rcb *rcb; | |
738 | ||
739 | struct bna_rxp *rxp; | |
740 | struct bna_rx *rx; | |
741 | ||
0120b99c | 742 | u64 rx_packets; |
8b230ed8 | 743 | u64 rx_bytes; |
0120b99c RM |
744 | u64 rx_packets_with_error; |
745 | u64 rxbuf_alloc_failed; | |
8b230ed8 RM |
746 | }; |
747 | ||
748 | /* RxQ pair */ | |
749 | union bna_rxq_u { | |
750 | struct { | |
751 | struct bna_rxq *hdr; | |
752 | struct bna_rxq *data; | |
753 | } hds; | |
754 | struct { | |
755 | struct bna_rxq *small; | |
756 | struct bna_rxq *large; | |
757 | } slr; | |
758 | struct { | |
759 | struct bna_rxq *only; | |
760 | struct bna_rxq *reserved; | |
761 | } single; | |
762 | }; | |
763 | ||
764 | /* Packet rate for Dynamic Interrupt Moderation */ | |
765 | struct bna_pkt_rate { | |
766 | u32 small_pkt_cnt; | |
767 | u32 large_pkt_cnt; | |
768 | }; | |
769 | ||
770 | /* Completion control structure */ | |
771 | struct bna_ccb { | |
772 | /* Fast path */ | |
773 | void **sw_qpt; | |
774 | u32 producer_index; | |
775 | volatile u32 *hw_producer_index; | |
776 | u32 q_depth; | |
777 | struct bna_ib_dbell *i_dbell; | |
778 | struct bna_rcb *rcb[2]; | |
779 | void *ctrl; /* For bnad */ | |
780 | struct bna_pkt_rate pkt_rate; | |
781 | int page_idx; | |
782 | int page_count; | |
783 | ||
784 | /* Control path */ | |
785 | struct bna_cq *cq; | |
786 | struct bnad *bnad; | |
787 | enum bna_intr_type intr_type; | |
788 | int intr_vector; | |
789 | u8 rx_coalescing_timeo; /* For NAPI */ | |
790 | int id; | |
791 | char name[BNA_Q_NAME_SIZE]; | |
792 | }; | |
793 | ||
794 | /* CQ QPT, configuration */ | |
795 | struct bna_cq { | |
796 | int cq_id; | |
797 | ||
798 | struct bna_qpt qpt; | |
799 | struct bna_ccb *ccb; | |
800 | ||
801 | struct bna_ib *ib; | |
802 | u8 ib_seg_offset; | |
803 | ||
804 | struct bna_rx *rx; | |
805 | }; | |
806 | ||
807 | struct bna_rss_config { | |
808 | enum rss_hash_type hash_type; | |
809 | u8 hash_mask; | |
810 | u32 toeplitz_hash_key[BFI_RSS_HASH_KEY_LEN]; | |
811 | }; | |
812 | ||
813 | struct bna_hds_config { | |
814 | enum hds_header_type hdr_type; | |
815 | int header_size; | |
816 | }; | |
817 | ||
818 | /* This structure is used during RX creation */ | |
819 | struct bna_rx_config { | |
820 | enum bna_rx_type rx_type; | |
821 | int num_paths; | |
822 | enum bna_rxp_type rxp_type; | |
823 | int paused; | |
824 | int q_depth; | |
825 | /* | |
826 | * Small/Large (or Header/Data) buffer size to be configured | |
827 | * for SLR and HDS queue type. Large buffer size comes from | |
828 | * port->mtu. | |
829 | */ | |
830 | int small_buff_size; | |
831 | ||
832 | enum bna_status rss_status; | |
833 | struct bna_rss_config rss_config; | |
834 | ||
835 | enum bna_status hds_status; | |
836 | struct bna_hds_config hds_config; | |
837 | ||
838 | enum bna_status vlan_strip_status; | |
839 | }; | |
840 | ||
841 | /* Rx Path structure - one per MSIX vector/CPU */ | |
842 | struct bna_rxp { | |
843 | /* This should be the first one */ | |
844 | struct list_head qe; | |
845 | ||
846 | enum bna_rxp_type type; | |
847 | union bna_rxq_u rxq; | |
848 | struct bna_cq cq; | |
849 | ||
850 | struct bna_rx *rx; | |
851 | ||
852 | /* MSI-x vector number for configuring RSS */ | |
853 | int vector; | |
854 | ||
855 | struct bna_mbox_qe mbox_qe; | |
856 | }; | |
857 | ||
858 | /* HDS configuration structure */ | |
859 | struct bna_rxf_hds { | |
860 | enum hds_header_type hdr_type; | |
861 | int header_size; | |
862 | }; | |
863 | ||
864 | /* RSS configuration structure */ | |
865 | struct bna_rxf_rss { | |
866 | enum rss_hash_type hash_type; | |
867 | u8 hash_mask; | |
868 | u32 toeplitz_hash_key[BFI_RSS_HASH_KEY_LEN]; | |
869 | }; | |
870 | ||
871 | /* RxF structure (hardware Rx Function) */ | |
872 | struct bna_rxf { | |
873 | bfa_fsm_t fsm; | |
874 | int rxf_id; | |
875 | enum rxf_flags ctrl_flags; | |
876 | u16 default_vlan_tag; | |
877 | enum bna_rxf_oper_state rxf_oper_state; | |
878 | enum bna_status hds_status; | |
879 | struct bna_rxf_hds hds_cfg; | |
880 | enum bna_status rss_status; | |
881 | struct bna_rxf_rss rss_cfg; | |
882 | struct bna_rit_segment *rit_segment; | |
883 | struct bna_rx *rx; | |
884 | u32 forced_offset; | |
885 | struct bna_mbox_qe mbox_qe; | |
886 | int mcast_rxq_id; | |
887 | ||
888 | /* callback for bna_rxf_start() */ | |
889 | void (*start_cbfn) (struct bna_rx *rx, enum bna_cb_status status); | |
890 | struct bna_rx *start_cbarg; | |
891 | ||
892 | /* callback for bna_rxf_stop() */ | |
893 | void (*stop_cbfn) (struct bna_rx *rx, enum bna_cb_status status); | |
894 | struct bna_rx *stop_cbarg; | |
895 | ||
896 | /* callback for bna_rxf_receive_enable() / bna_rxf_receive_disable() */ | |
897 | void (*oper_state_cbfn) (struct bnad *bnad, struct bna_rx *rx, | |
898 | enum bna_cb_status status); | |
899 | struct bnad *oper_state_cbarg; | |
900 | ||
901 | /** | |
902 | * callback for: | |
903 | * bna_rxf_ucast_set() | |
904 | * bna_rxf_{ucast/mcast}_add(), | |
0120b99c | 905 | * bna_rxf_{ucast/mcast}_del(), |
8b230ed8 RM |
906 | * bna_rxf_mode_set() |
907 | */ | |
908 | void (*cam_fltr_cbfn)(struct bnad *bnad, struct bna_rx *rx, | |
909 | enum bna_cb_status status); | |
910 | struct bnad *cam_fltr_cbarg; | |
911 | ||
912 | enum bna_rxf_flags rxf_flags; | |
913 | ||
914 | /* List of unicast addresses yet to be applied to h/w */ | |
915 | struct list_head ucast_pending_add_q; | |
916 | struct list_head ucast_pending_del_q; | |
917 | int ucast_pending_set; | |
918 | /* ucast addresses applied to the h/w */ | |
919 | struct list_head ucast_active_q; | |
920 | struct bna_mac *ucast_active_mac; | |
921 | ||
922 | /* List of multicast addresses yet to be applied to h/w */ | |
923 | struct list_head mcast_pending_add_q; | |
924 | struct list_head mcast_pending_del_q; | |
925 | /* multicast addresses applied to the h/w */ | |
926 | struct list_head mcast_active_q; | |
927 | ||
928 | /* Rx modes yet to be applied to h/w */ | |
929 | enum bna_rxmode rxmode_pending; | |
930 | enum bna_rxmode rxmode_pending_bitmask; | |
931 | /* Rx modes applied to h/w */ | |
932 | enum bna_rxmode rxmode_active; | |
933 | ||
934 | enum bna_status vlan_filter_status; | |
935 | u32 vlan_filter_table[(BFI_MAX_VLAN + 1) / 32]; | |
936 | }; | |
937 | ||
938 | /* Rx object */ | |
939 | struct bna_rx { | |
940 | /* This should be the first one */ | |
941 | struct list_head qe; | |
942 | ||
943 | bfa_fsm_t fsm; | |
944 | ||
945 | enum bna_rx_type type; | |
946 | ||
947 | /* list-head for RX path objects */ | |
948 | struct list_head rxp_q; | |
949 | ||
950 | struct bna_rxf rxf; | |
951 | ||
952 | enum bna_rx_flags rx_flags; | |
953 | ||
954 | struct bna_mbox_qe mbox_qe; | |
955 | ||
956 | struct bfa_wc rxq_stop_wc; | |
957 | ||
958 | /* Rx event handlers */ | |
959 | void (*rcb_setup_cbfn)(struct bnad *, struct bna_rcb *); | |
960 | void (*rcb_destroy_cbfn)(struct bnad *, struct bna_rcb *); | |
961 | void (*ccb_setup_cbfn)(struct bnad *, struct bna_ccb *); | |
962 | void (*ccb_destroy_cbfn)(struct bnad *, struct bna_ccb *); | |
963 | void (*rx_cleanup_cbfn)(struct bnad *, struct bna_ccb *); | |
964 | void (*rx_post_cbfn)(struct bnad *, struct bna_rcb *); | |
965 | ||
966 | /* callback for bna_rx_disable(), bna_rx_stop() */ | |
967 | void (*stop_cbfn)(void *arg, struct bna_rx *rx, | |
968 | enum bna_cb_status status); | |
969 | void *stop_cbarg; | |
970 | ||
971 | struct bna *bna; | |
972 | void *priv; /* bnad's cookie */ | |
973 | }; | |
974 | ||
975 | struct bna_rx_event_cbfn { | |
976 | /* Optional */ | |
977 | void (*rcb_setup_cbfn)(struct bnad *, struct bna_rcb *); | |
978 | void (*rcb_destroy_cbfn)(struct bnad *, struct bna_rcb *); | |
979 | void (*ccb_setup_cbfn)(struct bnad *, struct bna_ccb *); | |
980 | void (*ccb_destroy_cbfn)(struct bnad *, struct bna_ccb *); | |
981 | /* Mandatory */ | |
982 | void (*rx_cleanup_cbfn)(struct bnad *, struct bna_ccb *); | |
983 | void (*rx_post_cbfn)(struct bnad *, struct bna_rcb *); | |
984 | }; | |
985 | ||
986 | /* Rx module - keeps track of free, active rx objects */ | |
987 | struct bna_rx_mod { | |
988 | struct bna *bna; /* back pointer to parent */ | |
989 | struct bna_rx *rx; /* BFI_MAX_RXQ entries */ | |
990 | struct bna_rxp *rxp; /* BFI_MAX_RXQ entries */ | |
991 | struct bna_rxq *rxq; /* BFI_MAX_RXQ entries */ | |
992 | ||
993 | struct list_head rx_free_q; | |
994 | struct list_head rx_active_q; | |
995 | int rx_free_count; | |
996 | ||
997 | struct list_head rxp_free_q; | |
998 | int rxp_free_count; | |
999 | ||
1000 | struct list_head rxq_free_q; | |
1001 | int rxq_free_count; | |
1002 | ||
1003 | enum bna_rx_mod_flags flags; | |
1004 | ||
1005 | /* callback for bna_rx_mod_stop() */ | |
1006 | void (*stop_cbfn)(struct bna_port *port, | |
1007 | enum bna_cb_status status); | |
1008 | ||
1009 | struct bfa_wc rx_stop_wc; | |
1010 | u32 dim_vector[BNA_LOAD_T_MAX][BNA_BIAS_T_MAX]; | |
1011 | u32 rxf_bmap[2]; | |
1012 | }; | |
1013 | ||
1014 | /** | |
1015 | * | |
1016 | * CAM | |
1017 | * | |
1018 | */ | |
1019 | ||
1020 | struct bna_ucam_mod { | |
1021 | struct bna_mac *ucmac; /* BFI_MAX_UCMAC entries */ | |
1022 | struct list_head free_q; | |
1023 | ||
1024 | struct bna *bna; | |
1025 | }; | |
1026 | ||
1027 | struct bna_mcam_mod { | |
1028 | struct bna_mac *mcmac; /* BFI_MAX_MCMAC entries */ | |
1029 | struct list_head free_q; | |
1030 | ||
1031 | struct bna *bna; | |
1032 | }; | |
1033 | ||
1034 | /** | |
1035 | * | |
1036 | * Statistics | |
1037 | * | |
1038 | */ | |
1039 | ||
1040 | struct bna_tx_stats { | |
1041 | int tx_state; | |
1042 | int tx_flags; | |
1043 | int num_txqs; | |
1044 | u32 txq_bmap[2]; | |
1045 | int txf_id; | |
1046 | }; | |
1047 | ||
1048 | struct bna_rx_stats { | |
1049 | int rx_state; | |
1050 | int rx_flags; | |
1051 | int num_rxps; | |
1052 | int num_rxqs; | |
1053 | u32 rxq_bmap[2]; | |
1054 | u32 cq_bmap[2]; | |
1055 | int rxf_id; | |
1056 | int rxf_state; | |
1057 | int rxf_oper_state; | |
1058 | int num_active_ucast; | |
1059 | int num_active_mcast; | |
1060 | int rxmode_active; | |
1061 | int vlan_filter_status; | |
1062 | u32 vlan_filter_table[(BFI_MAX_VLAN + 1) / 32]; | |
1063 | int rss_status; | |
1064 | int hds_status; | |
1065 | }; | |
1066 | ||
1067 | struct bna_sw_stats { | |
1068 | int device_state; | |
1069 | int port_state; | |
1070 | int port_flags; | |
1071 | int llport_state; | |
1072 | int priority; | |
1073 | int num_active_tx; | |
1074 | int num_active_rx; | |
1075 | struct bna_tx_stats tx_stats[BFI_MAX_TXQ]; | |
1076 | struct bna_rx_stats rx_stats[BFI_MAX_RXQ]; | |
1077 | }; | |
1078 | ||
1079 | struct bna_stats { | |
1080 | u32 txf_bmap[2]; | |
1081 | u32 rxf_bmap[2]; | |
1082 | struct bfi_ll_stats *hw_stats; | |
1083 | struct bna_sw_stats *sw_stats; | |
1084 | }; | |
1085 | ||
1086 | /** | |
1087 | * | |
1088 | * BNA | |
1089 | * | |
1090 | */ | |
1091 | ||
1092 | struct bna { | |
1093 | struct bfa_pcidev pcidev; | |
1094 | ||
1095 | int port_num; | |
1096 | ||
1097 | struct bna_chip_regs regs; | |
1098 | ||
1099 | struct bna_dma_addr hw_stats_dma; | |
1100 | struct bna_stats stats; | |
1101 | ||
1102 | struct bna_device device; | |
1103 | struct bfa_cee cee; | |
1104 | ||
1105 | struct bna_mbox_mod mbox_mod; | |
1106 | ||
1107 | struct bna_port port; | |
1108 | ||
1109 | struct bna_tx_mod tx_mod; | |
1110 | ||
1111 | struct bna_rx_mod rx_mod; | |
1112 | ||
1113 | struct bna_ib_mod ib_mod; | |
1114 | ||
1115 | struct bna_ucam_mod ucam_mod; | |
1116 | struct bna_mcam_mod mcam_mod; | |
1117 | ||
1118 | struct bna_rit_mod rit_mod; | |
1119 | ||
8b230ed8 RM |
1120 | int rxf_promisc_id; |
1121 | ||
1122 | struct bna_mbox_qe mbox_qe; | |
1123 | ||
1124 | struct bnad *bnad; | |
1125 | }; | |
1126 | ||
1127 | #endif /* __BNA_TYPES_H__ */ |