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net: use netdev_mc_count and netdev_mc_empty when appropriate
[linux-block.git] / drivers / net / benet / be_main.c
CommitLineData
6b7c5b94
SP		 1/*
2 * Copyright (C) 2005 - 2009 ServerEngines
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@serverengines.com
12 *
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
16 */
17
18#include "be.h"
8788fdc2 19#include "be_cmds.h"
65f71b8b 20#include <asm/div64.h>
6b7c5b94
SP		 21
22MODULE_VERSION(DRV_VER);
23MODULE_DEVICE_TABLE(pci, be_dev_ids);
24MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25MODULE_AUTHOR("ServerEngines Corporation");
26MODULE_LICENSE("GPL");
27
28static unsigned int rx_frag_size = 2048;
29module_param(rx_frag_size, uint, S_IRUGO);
30MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
31
6b7c5b94 32static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
c4ca2374 33 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
59fd5d87 34 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
c4ca2374
AK		 35 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
36 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
59fd5d87 37 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
6b7c5b94
SP		 38 { 0 }
39};
40MODULE_DEVICE_TABLE(pci, be_dev_ids);
41
42static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
43{
44 struct be_dma_mem *mem = &q->dma_mem;
45 if (mem->va)
46 pci_free_consistent(adapter->pdev, mem->size,
47 mem->va, mem->dma);
48}
49
50static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
51 u16 len, u16 entry_size)
52{
53 struct be_dma_mem *mem = &q->dma_mem;
54
55 memset(q, 0, sizeof(*q));
56 q->len = len;
57 q->entry_size = entry_size;
58 mem->size = len * entry_size;
59 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
60 if (!mem->va)
61 return -1;
62 memset(mem->va, 0, mem->size);
63 return 0;
64}
65
8788fdc2 66static void be_intr_set(struct be_adapter *adapter, bool enable)
6b7c5b94 67{
8788fdc2 68 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
6b7c5b94
SP		 69 u32 reg = ioread32(addr);
70 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e
SP		 71
72 if (!enabled && enable)
6b7c5b94 73 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 74 else if (enabled && !enable)
6b7c5b94 75 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
5f0b849e 76 else
6b7c5b94 77 return;
5f0b849e 78
6b7c5b94
SP		 79 iowrite32(reg, addr);
80}
81
8788fdc2 82static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 83{
84 u32 val = 0;
85 val |= qid & DB_RQ_RING_ID_MASK;
86 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
8788fdc2 87 iowrite32(val, adapter->db + DB_RQ_OFFSET);
6b7c5b94
SP		 88}
89
8788fdc2 90static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
6b7c5b94
SP		 91{
92 u32 val = 0;
93 val |= qid & DB_TXULP_RING_ID_MASK;
94 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
8788fdc2 95 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
6b7c5b94
SP		 96}
97
8788fdc2 98static void be_eq_notify(struct be_adapter *adapter, u16 qid,
6b7c5b94
SP		 99 bool arm, bool clear_int, u16 num_popped)
100{
101 u32 val = 0;
102 val |= qid & DB_EQ_RING_ID_MASK;
103 if (arm)
104 val |= 1 << DB_EQ_REARM_SHIFT;
105 if (clear_int)
106 val |= 1 << DB_EQ_CLR_SHIFT;
107 val |= 1 << DB_EQ_EVNT_SHIFT;
108 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
8788fdc2 109 iowrite32(val, adapter->db + DB_EQ_OFFSET);
6b7c5b94
SP		 110}
111
8788fdc2 112void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
6b7c5b94
SP		 113{
114 u32 val = 0;
115 val |= qid & DB_CQ_RING_ID_MASK;
116 if (arm)
117 val |= 1 << DB_CQ_REARM_SHIFT;
118 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
8788fdc2 119 iowrite32(val, adapter->db + DB_CQ_OFFSET);
6b7c5b94
SP		 120}
121
6b7c5b94
SP		 122static int be_mac_addr_set(struct net_device *netdev, void *p)
123{
124 struct be_adapter *adapter = netdev_priv(netdev);
125 struct sockaddr *addr = p;
126 int status = 0;
127
ca9e4988
AK		 128 if (!is_valid_ether_addr(addr->sa_data))
129 return -EADDRNOTAVAIL;
130
a65027e4
SP		 131 status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
132 if (status)
133 return status;
6b7c5b94 134
a65027e4
SP		 135 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
136 adapter->if_handle, &adapter->pmac_id);
6b7c5b94
SP		 137 if (!status)
138 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
139
140 return status;
141}
142
b31c50a7 143void netdev_stats_update(struct be_adapter *adapter)
6b7c5b94
SP		 144{
145 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
146 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
147 struct be_port_rxf_stats *port_stats =
148 &rxf_stats->port[adapter->port_num];
78122a52 149 struct net_device_stats *dev_stats = &adapter->netdev->stats;
68110868 150 struct be_erx_stats *erx_stats = &hw_stats->erx;
6b7c5b94
SP		 151
152 dev_stats->rx_packets = port_stats->rx_total_frames;
153 dev_stats->tx_packets = port_stats->tx_unicastframes +
154 port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
155 dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
156 (u64) port_stats->rx_bytes_lsd;
157 dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
158 (u64) port_stats->tx_bytes_lsd;
159
160 /* bad pkts received */
161 dev_stats->rx_errors = port_stats->rx_crc_errors +
162 port_stats->rx_alignment_symbol_errors +
163 port_stats->rx_in_range_errors +
68110868
SP		 164 port_stats->rx_out_range_errors +
165 port_stats->rx_frame_too_long +
166 port_stats->rx_dropped_too_small +
167 port_stats->rx_dropped_too_short +
168 port_stats->rx_dropped_header_too_small +
169 port_stats->rx_dropped_tcp_length +
170 port_stats->rx_dropped_runt +
171 port_stats->rx_tcp_checksum_errs +
172 port_stats->rx_ip_checksum_errs +
173 port_stats->rx_udp_checksum_errs;
174
175 /* no space in linux buffers: best possible approximation */
01ed30da
SP		 176 dev_stats->rx_dropped =
177 erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
6b7c5b94
SP		 178
179 /* detailed rx errors */
180 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
68110868
SP		 181 port_stats->rx_out_range_errors +
182 port_stats->rx_frame_too_long;
183
6b7c5b94
SP		 184 /* receive ring buffer overflow */
185 dev_stats->rx_over_errors = 0;
68110868 186
6b7c5b94
SP		 187 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
188
189 /* frame alignment errors */
190 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
68110868 191
6b7c5b94
SP		 192 /* receiver fifo overrun */
193 /* drops_no_pbuf is no per i/f, it's per BE card */
194 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
195 port_stats->rx_input_fifo_overflow +
196 rxf_stats->rx_drops_no_pbuf;
197 /* receiver missed packetd */
198 dev_stats->rx_missed_errors = 0;
68110868
SP		 199
200 /* packet transmit problems */
201 dev_stats->tx_errors = 0;
202
203 /* no space available in linux */
204 dev_stats->tx_dropped = 0;
205
c5b9b92e 206 dev_stats->multicast = port_stats->rx_multicast_frames;
68110868
SP		 207 dev_stats->collisions = 0;
208
6b7c5b94
SP		 209 /* detailed tx_errors */
210 dev_stats->tx_aborted_errors = 0;
211 dev_stats->tx_carrier_errors = 0;
212 dev_stats->tx_fifo_errors = 0;
213 dev_stats->tx_heartbeat_errors = 0;
214 dev_stats->tx_window_errors = 0;
215}
216
8788fdc2 217void be_link_status_update(struct be_adapter *adapter, bool link_up)
6b7c5b94 218{
6b7c5b94
SP		 219 struct net_device *netdev = adapter->netdev;
220
6b7c5b94 221 /* If link came up or went down */
a8f447bd 222 if (adapter->link_up != link_up) {
0dffc83e 223 adapter->link_speed = -1;
a8f447bd 224 if (link_up) {
6b7c5b94
SP		 225 netif_start_queue(netdev);
226 netif_carrier_on(netdev);
227 printk(KERN_INFO "%s: Link up\n", netdev->name);
a8f447bd
SP		 228 } else {
229 netif_stop_queue(netdev);
230 netif_carrier_off(netdev);
231 printk(KERN_INFO "%s: Link down\n", netdev->name);
6b7c5b94 232 }
a8f447bd 233 adapter->link_up = link_up;
6b7c5b94 234 }
6b7c5b94
SP		 235}
236
237/* Update the EQ delay n BE based on the RX frags consumed / sec */
238static void be_rx_eqd_update(struct be_adapter *adapter)
239{
6b7c5b94
SP		 240 struct be_eq_obj *rx_eq = &adapter->rx_eq;
241 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
4097f663
SP		 242 ulong now = jiffies;
243 u32 eqd;
244
245 if (!rx_eq->enable_aic)
246 return;
247
248 /* Wrapped around */
249 if (time_before(now, stats->rx_fps_jiffies)) {
250 stats->rx_fps_jiffies = now;
251 return;
252 }
6b7c5b94
SP		 253
254 /* Update once a second */
4097f663 255 if ((now - stats->rx_fps_jiffies) < HZ)
6b7c5b94
SP		 256 return;
257
258 stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
4097f663 259 ((now - stats->rx_fps_jiffies) / HZ);
6b7c5b94 260
4097f663 261 stats->rx_fps_jiffies = now;
6b7c5b94
SP		 262 stats->be_prev_rx_frags = stats->be_rx_frags;
263 eqd = stats->be_rx_fps / 110000;
264 eqd = eqd << 3;
265 if (eqd > rx_eq->max_eqd)
266 eqd = rx_eq->max_eqd;
267 if (eqd < rx_eq->min_eqd)
268 eqd = rx_eq->min_eqd;
269 if (eqd < 10)
270 eqd = 0;
271 if (eqd != rx_eq->cur_eqd)
8788fdc2 272 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
6b7c5b94
SP		 273
274 rx_eq->cur_eqd = eqd;
275}
276
6b7c5b94
SP		 277static struct net_device_stats *be_get_stats(struct net_device *dev)
278{
78122a52 279 return &dev->stats;
6b7c5b94
SP		 280}
281
65f71b8b
SH		 282static u32 be_calc_rate(u64 bytes, unsigned long ticks)
283{
284 u64 rate = bytes;
285
286 do_div(rate, ticks / HZ);
287 rate <<= 3; /* bytes/sec -> bits/sec */
288 do_div(rate, 1000000ul); /* MB/Sec */
289
290 return rate;
291}
292
4097f663
SP		 293static void be_tx_rate_update(struct be_adapter *adapter)
294{
295 struct be_drvr_stats *stats = drvr_stats(adapter);
296 ulong now = jiffies;
297
298 /* Wrapped around? */
299 if (time_before(now, stats->be_tx_jiffies)) {
300 stats->be_tx_jiffies = now;
301 return;
302 }
303
304 /* Update tx rate once in two seconds */
305 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
65f71b8b
SH		 306 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
307 - stats->be_tx_bytes_prev,
308 now - stats->be_tx_jiffies);
4097f663
SP		 309 stats->be_tx_jiffies = now;
310 stats->be_tx_bytes_prev = stats->be_tx_bytes;
311 }
312}
313
6b7c5b94
SP		 314static void be_tx_stats_update(struct be_adapter *adapter,
315 u32 wrb_cnt, u32 copied, bool stopped)
316{
4097f663 317 struct be_drvr_stats *stats = drvr_stats(adapter);
6b7c5b94
SP		 318 stats->be_tx_reqs++;
319 stats->be_tx_wrbs += wrb_cnt;
320 stats->be_tx_bytes += copied;
321 if (stopped)
322 stats->be_tx_stops++;
6b7c5b94
SP		 323}
324
325/* Determine number of WRB entries needed to xmit data in an skb */
326static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
327{
ebc8d2ab
DM		 328 int cnt = (skb->len > skb->data_len);
329
330 cnt += skb_shinfo(skb)->nr_frags;
331
6b7c5b94
SP		 332 /* to account for hdr wrb */
333 cnt++;
334 if (cnt & 1) {
335 /* add a dummy to make it an even num */
336 cnt++;
337 *dummy = true;
338 } else
339 *dummy = false;
340 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
341 return cnt;
342}
343
344static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
345{
346 wrb->frag_pa_hi = upper_32_bits(addr);
347 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
348 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
349}
350
351static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
352 bool vlan, u32 wrb_cnt, u32 len)
353{
354 memset(hdr, 0, sizeof(*hdr));
355
356 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
357
358 if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
359 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
360 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
361 hdr, skb_shinfo(skb)->gso_size);
362 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
363 if (is_tcp_pkt(skb))
364 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
365 else if (is_udp_pkt(skb))
366 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
367 }
368
369 if (vlan && vlan_tx_tag_present(skb)) {
370 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
371 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
372 hdr, vlan_tx_tag_get(skb));
373 }
374
375 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
376 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
377 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
378 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
379}
380
381
382static int make_tx_wrbs(struct be_adapter *adapter,
383 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
384{
385 u64 busaddr;
386 u32 i, copied = 0;
387 struct pci_dev *pdev = adapter->pdev;
388 struct sk_buff *first_skb = skb;
389 struct be_queue_info *txq = &adapter->tx_obj.q;
390 struct be_eth_wrb *wrb;
391 struct be_eth_hdr_wrb *hdr;
392
6b7c5b94 393 hdr = queue_head_node(txq);
c190e3c8 394 atomic_add(wrb_cnt, &txq->used);
6b7c5b94
SP		 395 queue_head_inc(txq);
396
ebc8d2ab
DM		 397 if (skb->len > skb->data_len) {
398 int len = skb->len - skb->data_len;
a73b796e
AD		 399 busaddr = pci_map_single(pdev, skb->data, len,
400 PCI_DMA_TODEVICE);
ebc8d2ab
DM		 401 wrb = queue_head_node(txq);
402 wrb_fill(wrb, busaddr, len);
403 be_dws_cpu_to_le(wrb, sizeof(*wrb));
404 queue_head_inc(txq);
405 copied += len;
406 }
6b7c5b94 407
ebc8d2ab
DM		 408 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
409 struct skb_frag_struct *frag =
410 &skb_shinfo(skb)->frags[i];
a73b796e
AD		 411 busaddr = pci_map_page(pdev, frag->page,
412 frag->page_offset,
413 frag->size, PCI_DMA_TODEVICE);
ebc8d2ab
DM		 414 wrb = queue_head_node(txq);
415 wrb_fill(wrb, busaddr, frag->size);
416 be_dws_cpu_to_le(wrb, sizeof(*wrb));
417 queue_head_inc(txq);
418 copied += frag->size;
6b7c5b94
SP		 419 }
420
421 if (dummy_wrb) {
422 wrb = queue_head_node(txq);
423 wrb_fill(wrb, 0, 0);
424 be_dws_cpu_to_le(wrb, sizeof(*wrb));
425 queue_head_inc(txq);
426 }
427
428 wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
429 wrb_cnt, copied);
430 be_dws_cpu_to_le(hdr, sizeof(*hdr));
431
432 return copied;
433}
434
61357325 435static netdev_tx_t be_xmit(struct sk_buff *skb,
b31c50a7 436 struct net_device *netdev)
6b7c5b94
SP		 437{
438 struct be_adapter *adapter = netdev_priv(netdev);
439 struct be_tx_obj *tx_obj = &adapter->tx_obj;
440 struct be_queue_info *txq = &tx_obj->q;
441 u32 wrb_cnt = 0, copied = 0;
442 u32 start = txq->head;
443 bool dummy_wrb, stopped = false;
444
445 wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
446
447 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
c190e3c8
AK		 448 if (copied) {
449 /* record the sent skb in the sent_skb table */
450 BUG_ON(tx_obj->sent_skb_list[start]);
451 tx_obj->sent_skb_list[start] = skb;
452
453 /* Ensure txq has space for the next skb; Else stop the queue
454 * *BEFORE* ringing the tx doorbell, so that we serialze the
455 * tx compls of the current transmit which'll wake up the queue
456 */
457 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
458 txq->len) {
459 netif_stop_queue(netdev);
460 stopped = true;
461 }
6b7c5b94 462
c190e3c8 463 be_txq_notify(adapter, txq->id, wrb_cnt);
6b7c5b94 464
c190e3c8
AK		 465 be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
466 } else {
467 txq->head = start;
468 dev_kfree_skb_any(skb);
6b7c5b94 469 }
6b7c5b94
SP		 470 return NETDEV_TX_OK;
471}
472
473static int be_change_mtu(struct net_device *netdev, int new_mtu)
474{
475 struct be_adapter *adapter = netdev_priv(netdev);
476 if (new_mtu < BE_MIN_MTU ||
477 new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
478 dev_info(&adapter->pdev->dev,
479 "MTU must be between %d and %d bytes\n",
480 BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
481 return -EINVAL;
482 }
483 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
484 netdev->mtu, new_mtu);
485 netdev->mtu = new_mtu;
486 return 0;
487}
488
489/*
490 * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
491 * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
492 * set the BE in promiscuous VLAN mode.
493 */
b31c50a7 494static int be_vid_config(struct be_adapter *adapter)
6b7c5b94 495{
6b7c5b94
SP		 496 u16 vtag[BE_NUM_VLANS_SUPPORTED];
497 u16 ntags = 0, i;
b31c50a7 498 int status;
6b7c5b94
SP		 499
500 if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
501 /* Construct VLAN Table to give to HW */
502 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
503 if (adapter->vlan_tag[i]) {
504 vtag[ntags] = cpu_to_le16(i);
505 ntags++;
506 }
507 }
b31c50a7
SP		 508 status = be_cmd_vlan_config(adapter, adapter->if_handle,
509 vtag, ntags, 1, 0);
6b7c5b94 510 } else {
b31c50a7
SP		 511 status = be_cmd_vlan_config(adapter, adapter->if_handle,
512 NULL, 0, 1, 1);
6b7c5b94 513 }
b31c50a7 514 return status;
6b7c5b94
SP		 515}
516
517static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
518{
519 struct be_adapter *adapter = netdev_priv(netdev);
520 struct be_eq_obj *rx_eq = &adapter->rx_eq;
521 struct be_eq_obj *tx_eq = &adapter->tx_eq;
6b7c5b94 522
8788fdc2
SP		 523 be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
524 be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
6b7c5b94 525 adapter->vlan_grp = grp;
8788fdc2
SP		 526 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
527 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
6b7c5b94
SP		 528}
529
530static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
531{
532 struct be_adapter *adapter = netdev_priv(netdev);
533
534 adapter->num_vlans++;
535 adapter->vlan_tag[vid] = 1;
536
b31c50a7 537 be_vid_config(adapter);
6b7c5b94
SP		 538}
539
540static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
541{
542 struct be_adapter *adapter = netdev_priv(netdev);
543
544 adapter->num_vlans--;
545 adapter->vlan_tag[vid] = 0;
546
547 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
b31c50a7 548 be_vid_config(adapter);
6b7c5b94
SP		 549}
550
24307eef 551static void be_set_multicast_list(struct net_device *netdev)
6b7c5b94
SP		 552{
553 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94 554
24307eef 555 if (netdev->flags & IFF_PROMISC) {
8788fdc2 556 be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
24307eef
SP		 557 adapter->promiscuous = true;
558 goto done;
6b7c5b94
SP		 559 }
560
24307eef
SP		 561 /* BE was previously in promiscous mode; disable it */
562 if (adapter->promiscuous) {
563 adapter->promiscuous = false;
8788fdc2 564 be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
6b7c5b94
SP		 565 }
566
e7b909a6 567 /* Enable multicast promisc if num configured exceeds what we support */
4cd24eaf
JP		 568 if (netdev->flags & IFF_ALLMULTI ||
569 netdev_mc_count(netdev) > BE_MAX_MC) {
e7b909a6
SP		 570 be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0,
571 &adapter->mc_cmd_mem);
24307eef 572 goto done;
6b7c5b94 573 }
6b7c5b94 574
8788fdc2 575 be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
4cd24eaf 576 netdev_mc_count(netdev), &adapter->mc_cmd_mem);
24307eef
SP		 577done:
578 return;
6b7c5b94
SP		 579}
580
4097f663 581static void be_rx_rate_update(struct be_adapter *adapter)
6b7c5b94 582{
4097f663
SP		 583 struct be_drvr_stats *stats = drvr_stats(adapter);
584 ulong now = jiffies;
6b7c5b94 585
4097f663
SP		 586 /* Wrapped around */
587 if (time_before(now, stats->be_rx_jiffies)) {
588 stats->be_rx_jiffies = now;
589 return;
590 }
6b7c5b94
SP		 591
592 /* Update the rate once in two seconds */
4097f663 593 if ((now - stats->be_rx_jiffies) < 2 * HZ)
6b7c5b94
SP		 594 return;
595
65f71b8b
SH		 596 stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
597 - stats->be_rx_bytes_prev,
598 now - stats->be_rx_jiffies);
4097f663 599 stats->be_rx_jiffies = now;
6b7c5b94
SP		 600 stats->be_rx_bytes_prev = stats->be_rx_bytes;
601}
602
4097f663
SP		 603static void be_rx_stats_update(struct be_adapter *adapter,
604 u32 pktsize, u16 numfrags)
605{
606 struct be_drvr_stats *stats = drvr_stats(adapter);
607
608 stats->be_rx_compl++;
609 stats->be_rx_frags += numfrags;
610 stats->be_rx_bytes += pktsize;
611}
612
728a9972
AK		 613static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
614{
615 u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
616
617 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
618 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
619 ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
620 if (ip_version) {
621 tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
622 udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
623 }
624 ipv6_chk = (ip_version && (tcpf || udpf));
625
626 return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
627}
628
6b7c5b94
SP		 629static struct be_rx_page_info *
630get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
631{
632 struct be_rx_page_info *rx_page_info;
633 struct be_queue_info *rxq = &adapter->rx_obj.q;
634
635 rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
636 BUG_ON(!rx_page_info->page);
637
638 if (rx_page_info->last_page_user)
639 pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
640 adapter->big_page_size, PCI_DMA_FROMDEVICE);
641
642 atomic_dec(&rxq->used);
643 return rx_page_info;
644}
645
646/* Throwaway the data in the Rx completion */
647static void be_rx_compl_discard(struct be_adapter *adapter,
648 struct be_eth_rx_compl *rxcp)
649{
650 struct be_queue_info *rxq = &adapter->rx_obj.q;
651 struct be_rx_page_info *page_info;
652 u16 rxq_idx, i, num_rcvd;
653
654 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
655 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
656
657 for (i = 0; i < num_rcvd; i++) {
658 page_info = get_rx_page_info(adapter, rxq_idx);
659 put_page(page_info->page);
660 memset(page_info, 0, sizeof(*page_info));
661 index_inc(&rxq_idx, rxq->len);
662 }
663}
664
665/*
666 * skb_fill_rx_data forms a complete skb for an ether frame
667 * indicated by rxcp.
668 */
669static void skb_fill_rx_data(struct be_adapter *adapter,
670 struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
671{
672 struct be_queue_info *rxq = &adapter->rx_obj.q;
673 struct be_rx_page_info *page_info;
bd46cb6c 674 u16 rxq_idx, i, num_rcvd, j;
fa77406a 675 u32 pktsize, hdr_len, curr_frag_len, size;
6b7c5b94
SP		 676 u8 *start;
677
678 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
679 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
680 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
681
682 page_info = get_rx_page_info(adapter, rxq_idx);
683
684 start = page_address(page_info->page) + page_info->page_offset;
685 prefetch(start);
686
687 /* Copy data in the first descriptor of this completion */
688 curr_frag_len = min(pktsize, rx_frag_size);
689
690 /* Copy the header portion into skb_data */
691 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
692 memcpy(skb->data, start, hdr_len);
693 skb->len = curr_frag_len;
694 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
695 /* Complete packet has now been moved to data */
696 put_page(page_info->page);
697 skb->data_len = 0;
698 skb->tail += curr_frag_len;
699 } else {
700 skb_shinfo(skb)->nr_frags = 1;
701 skb_shinfo(skb)->frags[0].page = page_info->page;
702 skb_shinfo(skb)->frags[0].page_offset =
703 page_info->page_offset + hdr_len;
704 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
705 skb->data_len = curr_frag_len - hdr_len;
706 skb->tail += hdr_len;
707 }
708 memset(page_info, 0, sizeof(*page_info));
709
710 if (pktsize <= rx_frag_size) {
711 BUG_ON(num_rcvd != 1);
76fbb429 712 goto done;
6b7c5b94
SP		 713 }
714
715 /* More frags present for this completion */
fa77406a 716 size = pktsize;
bd46cb6c 717 for (i = 1, j = 0; i < num_rcvd; i++) {
fa77406a 718 size -= curr_frag_len;
6b7c5b94
SP		 719 index_inc(&rxq_idx, rxq->len);
720 page_info = get_rx_page_info(adapter, rxq_idx);
721
fa77406a 722 curr_frag_len = min(size, rx_frag_size);
6b7c5b94 723
bd46cb6c
AK		 724 /* Coalesce all frags from the same physical page in one slot */
725 if (page_info->page_offset == 0) {
726 /* Fresh page */
727 j++;
728 skb_shinfo(skb)->frags[j].page = page_info->page;
729 skb_shinfo(skb)->frags[j].page_offset =
730 page_info->page_offset;
731 skb_shinfo(skb)->frags[j].size = 0;
732 skb_shinfo(skb)->nr_frags++;
733 } else {
734 put_page(page_info->page);
735 }
736
737 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94
SP		 738 skb->len += curr_frag_len;
739 skb->data_len += curr_frag_len;
6b7c5b94
SP		 740
741 memset(page_info, 0, sizeof(*page_info));
742 }
bd46cb6c 743 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 744
76fbb429 745done:
4097f663 746 be_rx_stats_update(adapter, pktsize, num_rcvd);
6b7c5b94
SP		 747 return;
748}
749
5be93b9a 750/* Process the RX completion indicated by rxcp when GRO is disabled */
6b7c5b94
SP		 751static void be_rx_compl_process(struct be_adapter *adapter,
752 struct be_eth_rx_compl *rxcp)
753{
754 struct sk_buff *skb;
dcb9b564
AK		 755 u32 vlanf, vid;
756 u8 vtm;
6b7c5b94 757
dcb9b564
AK		 758 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
759 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
760
761 /* vlanf could be wrongly set in some cards.
762 * ignore if vtm is not set */
e1187b3b 763 if ((adapter->cap & 0x400) && !vtm)
dcb9b564 764 vlanf = 0;
6b7c5b94 765
89d71a66 766 skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
6b7c5b94
SP		 767 if (!skb) {
768 if (net_ratelimit())
769 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
770 be_rx_compl_discard(adapter, rxcp);
771 return;
772 }
773
6b7c5b94
SP		 774 skb_fill_rx_data(adapter, skb, rxcp);
775
728a9972 776 if (do_pkt_csum(rxcp, adapter->rx_csum))
6b7c5b94 777 skb->ip_summed = CHECKSUM_NONE;
728a9972
AK		 778 else
779 skb->ip_summed = CHECKSUM_UNNECESSARY;
6b7c5b94
SP		 780
781 skb->truesize = skb->len + sizeof(struct sk_buff);
782 skb->protocol = eth_type_trans(skb, adapter->netdev);
783 skb->dev = adapter->netdev;
784
dcb9b564 785 if (vlanf) {
6b7c5b94
SP		 786 if (!adapter->vlan_grp || adapter->num_vlans == 0) {
787 kfree_skb(skb);
788 return;
789 }
790 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
791 vid = be16_to_cpu(vid);
792 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
793 } else {
794 netif_receive_skb(skb);
795 }
796
6b7c5b94
SP		 797 return;
798}
799
5be93b9a
AK		 800/* Process the RX completion indicated by rxcp when GRO is enabled */
801static void be_rx_compl_process_gro(struct be_adapter *adapter,
6b7c5b94
SP		 802 struct be_eth_rx_compl *rxcp)
803{
804 struct be_rx_page_info *page_info;
5be93b9a 805 struct sk_buff *skb = NULL;
6b7c5b94 806 struct be_queue_info *rxq = &adapter->rx_obj.q;
5be93b9a 807 struct be_eq_obj *eq_obj = &adapter->rx_eq;
6b7c5b94 808 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
bd46cb6c 809 u16 i, rxq_idx = 0, vid, j;
dcb9b564 810 u8 vtm;
6b7c5b94
SP		 811
812 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
813 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
814 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
815 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
dcb9b564
AK		 816 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
817
818 /* vlanf could be wrongly set in some cards.
819 * ignore if vtm is not set */
e1187b3b 820 if ((adapter->cap & 0x400) && !vtm)
dcb9b564 821 vlanf = 0;
6b7c5b94 822
5be93b9a
AK		 823 skb = napi_get_frags(&eq_obj->napi);
824 if (!skb) {
825 be_rx_compl_discard(adapter, rxcp);
826 return;
827 }
828
6b7c5b94 829 remaining = pkt_size;
bd46cb6c 830 for (i = 0, j = -1; i < num_rcvd; i++) {
6b7c5b94
SP		 831 page_info = get_rx_page_info(adapter, rxq_idx);
832
833 curr_frag_len = min(remaining, rx_frag_size);
834
bd46cb6c
AK		 835 /* Coalesce all frags from the same physical page in one slot */
836 if (i == 0 || page_info->page_offset == 0) {
837 /* First frag or Fresh page */
838 j++;
5be93b9a
AK		 839 skb_shinfo(skb)->frags[j].page = page_info->page;
840 skb_shinfo(skb)->frags[j].page_offset =
841 page_info->page_offset;
842 skb_shinfo(skb)->frags[j].size = 0;
bd46cb6c
AK		 843 } else {
844 put_page(page_info->page);
845 }
5be93b9a 846 skb_shinfo(skb)->frags[j].size += curr_frag_len;
6b7c5b94 847
bd46cb6c 848 remaining -= curr_frag_len;
6b7c5b94 849 index_inc(&rxq_idx, rxq->len);
6b7c5b94
SP		 850 memset(page_info, 0, sizeof(*page_info));
851 }
bd46cb6c 852 BUG_ON(j > MAX_SKB_FRAGS);
6b7c5b94 853
5be93b9a
AK		 854 skb_shinfo(skb)->nr_frags = j + 1;
855 skb->len = pkt_size;
856 skb->data_len = pkt_size;
857 skb->truesize += pkt_size;
858 skb->ip_summed = CHECKSUM_UNNECESSARY;
859
6b7c5b94 860 if (likely(!vlanf)) {
5be93b9a 861 napi_gro_frags(&eq_obj->napi);
6b7c5b94
SP		 862 } else {
863 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
864 vid = be16_to_cpu(vid);
865
866 if (!adapter->vlan_grp || adapter->num_vlans == 0)
867 return;
868
5be93b9a 869 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
6b7c5b94
SP		 870 }
871
4097f663 872 be_rx_stats_update(adapter, pkt_size, num_rcvd);
6b7c5b94
SP		 873 return;
874}
875
876static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
877{
878 struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
879
880 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
881 return NULL;
882
883 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
884
6b7c5b94
SP		 885 queue_tail_inc(&adapter->rx_obj.cq);
886 return rxcp;
887}
888
a7a0ef31
SP		 889/* To reset the valid bit, we need to reset the whole word as
890 * when walking the queue the valid entries are little-endian
891 * and invalid entries are host endian
892 */
893static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
894{
895 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
896}
897
6b7c5b94
SP		 898static inline struct page *be_alloc_pages(u32 size)
899{
900 gfp_t alloc_flags = GFP_ATOMIC;
901 u32 order = get_order(size);
902 if (order > 0)
903 alloc_flags |= __GFP_COMP;
904 return alloc_pages(alloc_flags, order);
905}
906
907/*
908 * Allocate a page, split it to fragments of size rx_frag_size and post as
909 * receive buffers to BE
910 */
911static void be_post_rx_frags(struct be_adapter *adapter)
912{
913 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
26d92f92 914 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
6b7c5b94
SP		 915 struct be_queue_info *rxq = &adapter->rx_obj.q;
916 struct page *pagep = NULL;
917 struct be_eth_rx_d *rxd;
918 u64 page_dmaaddr = 0, frag_dmaaddr;
919 u32 posted, page_offset = 0;
920
6b7c5b94
SP		 921 page_info = &page_info_tbl[rxq->head];
922 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
923 if (!pagep) {
924 pagep = be_alloc_pages(adapter->big_page_size);
925 if (unlikely(!pagep)) {
926 drvr_stats(adapter)->be_ethrx_post_fail++;
927 break;
928 }
929 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
930 adapter->big_page_size,
931 PCI_DMA_FROMDEVICE);
932 page_info->page_offset = 0;
933 } else {
934 get_page(pagep);
935 page_info->page_offset = page_offset + rx_frag_size;
936 }
937 page_offset = page_info->page_offset;
938 page_info->page = pagep;
939 pci_unmap_addr_set(page_info, bus, page_dmaaddr);
940 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
941
942 rxd = queue_head_node(rxq);
943 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
944 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
6b7c5b94
SP		 945
946 /* Any space left in the current big page for another frag? */
947 if ((page_offset + rx_frag_size + rx_frag_size) >
948 adapter->big_page_size) {
949 pagep = NULL;
950 page_info->last_page_user = true;
951 }
26d92f92
SP		 952
953 prev_page_info = page_info;
954 queue_head_inc(rxq);
6b7c5b94
SP		 955 page_info = &page_info_tbl[rxq->head];
956 }
957 if (pagep)
26d92f92 958 prev_page_info->last_page_user = true;
6b7c5b94
SP		 959
960 if (posted) {
6b7c5b94 961 atomic_add(posted, &rxq->used);
8788fdc2 962 be_rxq_notify(adapter, rxq->id, posted);
ea1dae11
SP		 963 } else if (atomic_read(&rxq->used) == 0) {
964 /* Let be_worker replenish when memory is available */
965 adapter->rx_post_starved = true;
6b7c5b94
SP		 966 }
967
968 return;
969}
970
5fb379ee 971static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
6b7c5b94 972{
6b7c5b94
SP		 973 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
974
975 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
976 return NULL;
977
978 be_dws_le_to_cpu(txcp, sizeof(*txcp));
979
980 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
981
982 queue_tail_inc(tx_cq);
983 return txcp;
984}
985
986static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
987{
988 struct be_queue_info *txq = &adapter->tx_obj.q;
a73b796e 989 struct be_eth_wrb *wrb;
6b7c5b94
SP		 990 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
991 struct sk_buff *sent_skb;
a73b796e 992 u64 busaddr;
6b7c5b94
SP		 993 u16 cur_index, num_wrbs = 0;
994
995 cur_index = txq->tail;
996 sent_skb = sent_skbs[cur_index];
997 BUG_ON(!sent_skb);
998 sent_skbs[cur_index] = NULL;
a73b796e
AD		 999 wrb = queue_tail_node(txq);
1000 be_dws_le_to_cpu(wrb, sizeof(*wrb));
1001 busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
1002 if (busaddr != 0) {
1003 pci_unmap_single(adapter->pdev, busaddr,
1004 wrb->frag_len, PCI_DMA_TODEVICE);
1005 }
1006 num_wrbs++;
1007 queue_tail_inc(txq);
6b7c5b94 1008
a73b796e 1009 while (cur_index != last_index) {
6b7c5b94 1010 cur_index = txq->tail;
a73b796e
AD		 1011 wrb = queue_tail_node(txq);
1012 be_dws_le_to_cpu(wrb, sizeof(*wrb));
1013 busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
1014 if (busaddr != 0) {
1015 pci_unmap_page(adapter->pdev, busaddr,
1016 wrb->frag_len, PCI_DMA_TODEVICE);
1017 }
6b7c5b94
SP		 1018 num_wrbs++;
1019 queue_tail_inc(txq);
a73b796e 1020 }
6b7c5b94
SP		 1021
1022 atomic_sub(num_wrbs, &txq->used);
a73b796e 1023
6b7c5b94
SP		 1024 kfree_skb(sent_skb);
1025}
1026
859b1e4e
SP		 1027static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1028{
1029 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1030
1031 if (!eqe->evt)
1032 return NULL;
1033
1034 eqe->evt = le32_to_cpu(eqe->evt);
1035 queue_tail_inc(&eq_obj->q);
1036 return eqe;
1037}
1038
1039static int event_handle(struct be_adapter *adapter,
1040 struct be_eq_obj *eq_obj)
1041{
1042 struct be_eq_entry *eqe;
1043 u16 num = 0;
1044
1045 while ((eqe = event_get(eq_obj)) != NULL) {
1046 eqe->evt = 0;
1047 num++;
1048 }
1049
1050 /* Deal with any spurious interrupts that come
1051 * without events
1052 */
1053 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1054 if (num)
1055 napi_schedule(&eq_obj->napi);
1056
1057 return num;
1058}
1059
1060/* Just read and notify events without processing them.
1061 * Used at the time of destroying event queues */
1062static void be_eq_clean(struct be_adapter *adapter,
1063 struct be_eq_obj *eq_obj)
1064{
1065 struct be_eq_entry *eqe;
1066 u16 num = 0;
1067
1068 while ((eqe = event_get(eq_obj)) != NULL) {
1069 eqe->evt = 0;
1070 num++;
1071 }
1072
1073 if (num)
1074 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1075}
1076
6b7c5b94
SP		 1077static void be_rx_q_clean(struct be_adapter *adapter)
1078{
1079 struct be_rx_page_info *page_info;
1080 struct be_queue_info *rxq = &adapter->rx_obj.q;
1081 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1082 struct be_eth_rx_compl *rxcp;
1083 u16 tail;
1084
1085 /* First cleanup pending rx completions */
1086 while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
1087 be_rx_compl_discard(adapter, rxcp);
a7a0ef31 1088 be_rx_compl_reset(rxcp);
8788fdc2 1089 be_cq_notify(adapter, rx_cq->id, true, 1);
6b7c5b94
SP		 1090 }
1091
1092 /* Then free posted rx buffer that were not used */
1093 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
cdab23b7 1094 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
6b7c5b94
SP		 1095 page_info = get_rx_page_info(adapter, tail);
1096 put_page(page_info->page);
1097 memset(page_info, 0, sizeof(*page_info));
1098 }
1099 BUG_ON(atomic_read(&rxq->used));
1100}
1101
a8e9179a 1102static void be_tx_compl_clean(struct be_adapter *adapter)
6b7c5b94 1103{
a8e9179a 1104 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94 1105 struct be_queue_info *txq = &adapter->tx_obj.q;
a8e9179a
SP		 1106 struct be_eth_tx_compl *txcp;
1107 u16 end_idx, cmpl = 0, timeo = 0;
1108
1109 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1110 do {
1111 while ((txcp = be_tx_compl_get(tx_cq))) {
1112 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1113 wrb_index, txcp);
1114 be_tx_compl_process(adapter, end_idx);
1115 cmpl++;
1116 }
1117 if (cmpl) {
1118 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1119 cmpl = 0;
1120 }
1121
1122 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1123 break;
1124
1125 mdelay(1);
1126 } while (true);
1127
1128 if (atomic_read(&txq->used))
1129 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1130 atomic_read(&txq->used));
6b7c5b94
SP		 1131}
1132
5fb379ee
SP		 1133static void be_mcc_queues_destroy(struct be_adapter *adapter)
1134{
1135 struct be_queue_info *q;
5fb379ee 1136
8788fdc2 1137 q = &adapter->mcc_obj.q;
5fb379ee 1138 if (q->created)
8788fdc2 1139 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
5fb379ee
SP		 1140 be_queue_free(adapter, q);
1141
8788fdc2 1142 q = &adapter->mcc_obj.cq;
5fb379ee 1143 if (q->created)
8788fdc2 1144 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
5fb379ee
SP		 1145 be_queue_free(adapter, q);
1146}
1147
1148/* Must be called only after TX qs are created as MCC shares TX EQ */
1149static int be_mcc_queues_create(struct be_adapter *adapter)
1150{
1151 struct be_queue_info *q, *cq;
5fb379ee
SP		 1152
1153 /* Alloc MCC compl queue */
8788fdc2 1154 cq = &adapter->mcc_obj.cq;
5fb379ee 1155 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
efd2e40a 1156 sizeof(struct be_mcc_compl)))
5fb379ee
SP		 1157 goto err;
1158
1159 /* Ask BE to create MCC compl queue; share TX's eq */
8788fdc2 1160 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
5fb379ee
SP		 1161 goto mcc_cq_free;
1162
1163 /* Alloc MCC queue */
8788fdc2 1164 q = &adapter->mcc_obj.q;
5fb379ee
SP		 1165 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1166 goto mcc_cq_destroy;
1167
1168 /* Ask BE to create MCC queue */
8788fdc2 1169 if (be_cmd_mccq_create(adapter, q, cq))
5fb379ee
SP		 1170 goto mcc_q_free;
1171
1172 return 0;
1173
1174mcc_q_free:
1175 be_queue_free(adapter, q);
1176mcc_cq_destroy:
8788fdc2 1177 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
5fb379ee
SP		 1178mcc_cq_free:
1179 be_queue_free(adapter, cq);
1180err:
1181 return -1;
1182}
1183
6b7c5b94
SP		 1184static void be_tx_queues_destroy(struct be_adapter *adapter)
1185{
1186 struct be_queue_info *q;
1187
1188 q = &adapter->tx_obj.q;
a8e9179a 1189 if (q->created)
8788fdc2 1190 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
6b7c5b94
SP		 1191 be_queue_free(adapter, q);
1192
1193 q = &adapter->tx_obj.cq;
1194 if (q->created)
8788fdc2 1195 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1196 be_queue_free(adapter, q);
1197
859b1e4e
SP		 1198 /* Clear any residual events */
1199 be_eq_clean(adapter, &adapter->tx_eq);
1200
6b7c5b94
SP		 1201 q = &adapter->tx_eq.q;
1202 if (q->created)
8788fdc2 1203 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1204 be_queue_free(adapter, q);
1205}
1206
1207static int be_tx_queues_create(struct be_adapter *adapter)
1208{
1209 struct be_queue_info *eq, *q, *cq;
1210
1211 adapter->tx_eq.max_eqd = 0;
1212 adapter->tx_eq.min_eqd = 0;
1213 adapter->tx_eq.cur_eqd = 96;
1214 adapter->tx_eq.enable_aic = false;
1215 /* Alloc Tx Event queue */
1216 eq = &adapter->tx_eq.q;
1217 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1218 return -1;
1219
1220 /* Ask BE to create Tx Event queue */
8788fdc2 1221 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
6b7c5b94
SP		 1222 goto tx_eq_free;
1223 /* Alloc TX eth compl queue */
1224 cq = &adapter->tx_obj.cq;
1225 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1226 sizeof(struct be_eth_tx_compl)))
1227 goto tx_eq_destroy;
1228
1229 /* Ask BE to create Tx eth compl queue */
8788fdc2 1230 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
6b7c5b94
SP		 1231 goto tx_cq_free;
1232
1233 /* Alloc TX eth queue */
1234 q = &adapter->tx_obj.q;
1235 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1236 goto tx_cq_destroy;
1237
1238 /* Ask BE to create Tx eth queue */
8788fdc2 1239 if (be_cmd_txq_create(adapter, q, cq))
6b7c5b94
SP		 1240 goto tx_q_free;
1241 return 0;
1242
1243tx_q_free:
1244 be_queue_free(adapter, q);
1245tx_cq_destroy:
8788fdc2 1246 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1247tx_cq_free:
1248 be_queue_free(adapter, cq);
1249tx_eq_destroy:
8788fdc2 1250 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1251tx_eq_free:
1252 be_queue_free(adapter, eq);
1253 return -1;
1254}
1255
1256static void be_rx_queues_destroy(struct be_adapter *adapter)
1257{
1258 struct be_queue_info *q;
1259
1260 q = &adapter->rx_obj.q;
1261 if (q->created) {
8788fdc2 1262 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
6b7c5b94
SP		 1263 be_rx_q_clean(adapter);
1264 }
1265 be_queue_free(adapter, q);
1266
1267 q = &adapter->rx_obj.cq;
1268 if (q->created)
8788fdc2 1269 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
6b7c5b94
SP		 1270 be_queue_free(adapter, q);
1271
859b1e4e
SP		 1272 /* Clear any residual events */
1273 be_eq_clean(adapter, &adapter->rx_eq);
1274
6b7c5b94
SP		 1275 q = &adapter->rx_eq.q;
1276 if (q->created)
8788fdc2 1277 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
6b7c5b94
SP		 1278 be_queue_free(adapter, q);
1279}
1280
1281static int be_rx_queues_create(struct be_adapter *adapter)
1282{
1283 struct be_queue_info *eq, *q, *cq;
1284 int rc;
1285
6b7c5b94
SP		 1286 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1287 adapter->rx_eq.max_eqd = BE_MAX_EQD;
1288 adapter->rx_eq.min_eqd = 0;
1289 adapter->rx_eq.cur_eqd = 0;
1290 adapter->rx_eq.enable_aic = true;
1291
1292 /* Alloc Rx Event queue */
1293 eq = &adapter->rx_eq.q;
1294 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1295 sizeof(struct be_eq_entry));
1296 if (rc)
1297 return rc;
1298
1299 /* Ask BE to create Rx Event queue */
8788fdc2 1300 rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
6b7c5b94
SP		 1301 if (rc)
1302 goto rx_eq_free;
1303
1304 /* Alloc RX eth compl queue */
1305 cq = &adapter->rx_obj.cq;
1306 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1307 sizeof(struct be_eth_rx_compl));
1308 if (rc)
1309 goto rx_eq_destroy;
1310
1311 /* Ask BE to create Rx eth compl queue */
8788fdc2 1312 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
6b7c5b94
SP		 1313 if (rc)
1314 goto rx_cq_free;
1315
1316 /* Alloc RX eth queue */
1317 q = &adapter->rx_obj.q;
1318 rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
1319 if (rc)
1320 goto rx_cq_destroy;
1321
1322 /* Ask BE to create Rx eth queue */
8788fdc2 1323 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
6b7c5b94
SP		 1324 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
1325 if (rc)
1326 goto rx_q_free;
1327
1328 return 0;
1329rx_q_free:
1330 be_queue_free(adapter, q);
1331rx_cq_destroy:
8788fdc2 1332 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
6b7c5b94
SP		 1333rx_cq_free:
1334 be_queue_free(adapter, cq);
1335rx_eq_destroy:
8788fdc2 1336 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
6b7c5b94
SP		 1337rx_eq_free:
1338 be_queue_free(adapter, eq);
1339 return rc;
1340}
6b7c5b94 1341
b628bde2
SP		 1342/* There are 8 evt ids per func. Retruns the evt id's bit number */
1343static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
1344{
1345 return eq_id - 8 * be_pci_func(adapter);
1346}
1347
6b7c5b94
SP		 1348static irqreturn_t be_intx(int irq, void *dev)
1349{
1350 struct be_adapter *adapter = dev;
8788fdc2 1351 int isr;
6b7c5b94 1352
8788fdc2 1353 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
55bdeed9 1354 (adapter->tx_eq.q.id/ 8) * CEV_ISR_SIZE);
c001c213 1355 if (!isr)
8788fdc2 1356 return IRQ_NONE;
6b7c5b94 1357
8788fdc2
SP		 1358 event_handle(adapter, &adapter->tx_eq);
1359 event_handle(adapter, &adapter->rx_eq);
c001c213 1360
8788fdc2 1361 return IRQ_HANDLED;
6b7c5b94
SP		 1362}
1363
1364static irqreturn_t be_msix_rx(int irq, void *dev)
1365{
1366 struct be_adapter *adapter = dev;
1367
8788fdc2 1368 event_handle(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1369
1370 return IRQ_HANDLED;
1371}
1372
5fb379ee 1373static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
6b7c5b94
SP		 1374{
1375 struct be_adapter *adapter = dev;
1376
8788fdc2 1377 event_handle(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1378
1379 return IRQ_HANDLED;
1380}
1381
5be93b9a 1382static inline bool do_gro(struct be_adapter *adapter,
6b7c5b94
SP		 1383 struct be_eth_rx_compl *rxcp)
1384{
1385 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1386 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1387
1388 if (err)
1389 drvr_stats(adapter)->be_rxcp_err++;
1390
5be93b9a 1391 return (tcp_frame && !err) ? true : false;
6b7c5b94
SP		 1392}
1393
1394int be_poll_rx(struct napi_struct *napi, int budget)
1395{
1396 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1397 struct be_adapter *adapter =
1398 container_of(rx_eq, struct be_adapter, rx_eq);
1399 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1400 struct be_eth_rx_compl *rxcp;
1401 u32 work_done;
1402
b7b83ac3 1403 adapter->stats.drvr_stats.be_rx_polls++;
6b7c5b94
SP		 1404 for (work_done = 0; work_done < budget; work_done++) {
1405 rxcp = be_rx_compl_get(adapter);
1406 if (!rxcp)
1407 break;
1408
5be93b9a
AK		 1409 if (do_gro(adapter, rxcp))
1410 be_rx_compl_process_gro(adapter, rxcp);
6b7c5b94
SP		 1411 else
1412 be_rx_compl_process(adapter, rxcp);
a7a0ef31
SP		 1413
1414 be_rx_compl_reset(rxcp);
6b7c5b94
SP		 1415 }
1416
6b7c5b94
SP		 1417 /* Refill the queue */
1418 if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
1419 be_post_rx_frags(adapter);
1420
1421 /* All consumed */
1422 if (work_done < budget) {
1423 napi_complete(napi);
8788fdc2 1424 be_cq_notify(adapter, rx_cq->id, true, work_done);
6b7c5b94
SP		 1425 } else {
1426 /* More to be consumed; continue with interrupts disabled */
8788fdc2 1427 be_cq_notify(adapter, rx_cq->id, false, work_done);
6b7c5b94
SP		 1428 }
1429 return work_done;
1430}
1431
5fb379ee 1432void be_process_tx(struct be_adapter *adapter)
6b7c5b94 1433{
5fb379ee
SP		 1434 struct be_queue_info *txq = &adapter->tx_obj.q;
1435 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
6b7c5b94
SP		 1436 struct be_eth_tx_compl *txcp;
1437 u32 num_cmpl = 0;
1438 u16 end_idx;
1439
5fb379ee 1440 while ((txcp = be_tx_compl_get(tx_cq))) {
6b7c5b94
SP		 1441 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1442 wrb_index, txcp);
1443 be_tx_compl_process(adapter, end_idx);
1444 num_cmpl++;
1445 }
1446
5fb379ee 1447 if (num_cmpl) {
8788fdc2 1448 be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
5fb379ee
SP		 1449
1450 /* As Tx wrbs have been freed up, wake up netdev queue if
1451 * it was stopped due to lack of tx wrbs.
1452 */
1453 if (netif_queue_stopped(adapter->netdev) &&
6b7c5b94 1454 atomic_read(&txq->used) < txq->len / 2) {
5fb379ee
SP		 1455 netif_wake_queue(adapter->netdev);
1456 }
1457
1458 drvr_stats(adapter)->be_tx_events++;
1459 drvr_stats(adapter)->be_tx_compl += num_cmpl;
6b7c5b94 1460 }
5fb379ee
SP		 1461}
1462
1463/* As TX and MCC share the same EQ check for both TX and MCC completions.
1464 * For TX/MCC we don't honour budget; consume everything
1465 */
1466static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
1467{
1468 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1469 struct be_adapter *adapter =
1470 container_of(tx_eq, struct be_adapter, tx_eq);
6b7c5b94
SP		 1471
1472 napi_complete(napi);
1473
5fb379ee 1474 be_process_tx(adapter);
6b7c5b94 1475
8788fdc2 1476 be_process_mcc(adapter);
6b7c5b94
SP		 1477
1478 return 1;
1479}
1480
ea1dae11
SP		 1481static void be_worker(struct work_struct *work)
1482{
1483 struct be_adapter *adapter =
1484 container_of(work, struct be_adapter, work.work);
ea1dae11 1485
b31c50a7 1486 be_cmd_get_stats(adapter, &adapter->stats.cmd);
ea1dae11
SP		 1487
1488 /* Set EQ delay */
1489 be_rx_eqd_update(adapter);
1490
4097f663
SP		 1491 be_tx_rate_update(adapter);
1492 be_rx_rate_update(adapter);
1493
ea1dae11
SP		 1494 if (adapter->rx_post_starved) {
1495 adapter->rx_post_starved = false;
1496 be_post_rx_frags(adapter);
1497 }
1498
1499 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
1500}
1501
8d56ff11
SP		 1502static void be_msix_disable(struct be_adapter *adapter)
1503{
1504 if (adapter->msix_enabled) {
1505 pci_disable_msix(adapter->pdev);
1506 adapter->msix_enabled = false;
1507 }
1508}
1509
6b7c5b94
SP		 1510static void be_msix_enable(struct be_adapter *adapter)
1511{
1512 int i, status;
1513
1514 for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
1515 adapter->msix_entries[i].entry = i;
1516
1517 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1518 BE_NUM_MSIX_VECTORS);
1519 if (status == 0)
1520 adapter->msix_enabled = true;
1521 return;
1522}
1523
1524static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
1525{
b628bde2
SP		 1526 return adapter->msix_entries[
1527 be_evt_bit_get(adapter, eq_id)].vector;
6b7c5b94
SP		 1528}
1529
b628bde2
SP		 1530static int be_request_irq(struct be_adapter *adapter,
1531 struct be_eq_obj *eq_obj,
1532 void *handler, char *desc)
6b7c5b94
SP		 1533{
1534 struct net_device *netdev = adapter->netdev;
b628bde2
SP		 1535 int vec;
1536
1537 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
1538 vec = be_msix_vec_get(adapter, eq_obj->q.id);
1539 return request_irq(vec, handler, 0, eq_obj->desc, adapter);
1540}
1541
1542static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
1543{
1544 int vec = be_msix_vec_get(adapter, eq_obj->q.id);
1545 free_irq(vec, adapter);
1546}
6b7c5b94 1547
b628bde2
SP		 1548static int be_msix_register(struct be_adapter *adapter)
1549{
1550 int status;
1551
1552 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
6b7c5b94
SP		 1553 if (status)
1554 goto err;
1555
b628bde2
SP		 1556 status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
1557 if (status)
1558 goto free_tx_irq;
1559
6b7c5b94 1560 return 0;
b628bde2
SP		 1561
1562free_tx_irq:
1563 be_free_irq(adapter, &adapter->tx_eq);
6b7c5b94
SP		 1564err:
1565 dev_warn(&adapter->pdev->dev,
1566 "MSIX Request IRQ failed - err %d\n", status);
1567 pci_disable_msix(adapter->pdev);
1568 adapter->msix_enabled = false;
1569 return status;
1570}
1571
1572static int be_irq_register(struct be_adapter *adapter)
1573{
1574 struct net_device *netdev = adapter->netdev;
1575 int status;
1576
1577 if (adapter->msix_enabled) {
1578 status = be_msix_register(adapter);
1579 if (status == 0)
1580 goto done;
1581 }
1582
1583 /* INTx */
1584 netdev->irq = adapter->pdev->irq;
1585 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
1586 adapter);
1587 if (status) {
1588 dev_err(&adapter->pdev->dev,
1589 "INTx request IRQ failed - err %d\n", status);
1590 return status;
1591 }
1592done:
1593 adapter->isr_registered = true;
1594 return 0;
1595}
1596
1597static void be_irq_unregister(struct be_adapter *adapter)
1598{
1599 struct net_device *netdev = adapter->netdev;
6b7c5b94
SP		 1600
1601 if (!adapter->isr_registered)
1602 return;
1603
1604 /* INTx */
1605 if (!adapter->msix_enabled) {
1606 free_irq(netdev->irq, adapter);
1607 goto done;
1608 }
1609
1610 /* MSIx */
b628bde2
SP		 1611 be_free_irq(adapter, &adapter->tx_eq);
1612 be_free_irq(adapter, &adapter->rx_eq);
6b7c5b94
SP		 1613done:
1614 adapter->isr_registered = false;
1615 return;
1616}
1617
1618static int be_open(struct net_device *netdev)
1619{
1620 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94
SP		 1621 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1622 struct be_eq_obj *tx_eq = &adapter->tx_eq;
a8f447bd
SP		 1623 bool link_up;
1624 int status;
0388f251
SB		 1625 u8 mac_speed;
1626 u16 link_speed;
5fb379ee
SP		 1627
1628 /* First time posting */
1629 be_post_rx_frags(adapter);
1630
1631 napi_enable(&rx_eq->napi);
1632 napi_enable(&tx_eq->napi);
1633
1634 be_irq_register(adapter);
1635
8788fdc2 1636 be_intr_set(adapter, true);
5fb379ee
SP		 1637
1638 /* The evt queues are created in unarmed state; arm them */
8788fdc2
SP		 1639 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
1640 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
5fb379ee
SP		 1641
1642 /* Rx compl queue may be in unarmed state; rearm it */
8788fdc2 1643 be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
5fb379ee 1644
0388f251
SB		 1645 status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
1646 &link_speed);
a8f447bd 1647 if (status)
4f2aa89c 1648 goto ret_sts;
a8f447bd 1649 be_link_status_update(adapter, link_up);
5fb379ee 1650
4f2aa89c
AK		 1651 status = be_vid_config(adapter);
1652 if (status)
1653 goto ret_sts;
1654
1655 status = be_cmd_set_flow_control(adapter,
1656 adapter->tx_fc, adapter->rx_fc);
1657 if (status)
1658 goto ret_sts;
1659
5fb379ee 1660 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
4f2aa89c
AK		 1661ret_sts:
1662 return status;
5fb379ee
SP		 1663}
1664
71d8d1b5
AK		 1665static int be_setup_wol(struct be_adapter *adapter, bool enable)
1666{
1667 struct be_dma_mem cmd;
1668 int status = 0;
1669 u8 mac[ETH_ALEN];
1670
1671 memset(mac, 0, ETH_ALEN);
1672
1673 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
1674 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
1675 if (cmd.va == NULL)
1676 return -1;
1677 memset(cmd.va, 0, cmd.size);
1678
1679 if (enable) {
1680 status = pci_write_config_dword(adapter->pdev,
1681 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
1682 if (status) {
1683 dev_err(&adapter->pdev->dev,
1684 "Could not enable Wake-on-lan \n");
1685 pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
1686 cmd.dma);
1687 return status;
1688 }
1689 status = be_cmd_enable_magic_wol(adapter,
1690 adapter->netdev->dev_addr, &cmd);
1691 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
1692 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
1693 } else {
1694 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
1695 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
1696 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
1697 }
1698
1699 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
1700 return status;
1701}
1702
5fb379ee
SP		 1703static int be_setup(struct be_adapter *adapter)
1704{
5fb379ee 1705 struct net_device *netdev = adapter->netdev;
73d540f2 1706 u32 cap_flags, en_flags;
6b7c5b94
SP		 1707 int status;
1708
73d540f2
SP		 1709 cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1710 BE_IF_FLAGS_MCAST_PROMISCUOUS |
1711 BE_IF_FLAGS_PROMISCUOUS |
1712 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1713 en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1714 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1715
1716 status = be_cmd_if_create(adapter, cap_flags, en_flags,
1717 netdev->dev_addr, false/* pmac_invalid */,
1718 &adapter->if_handle, &adapter->pmac_id);
6b7c5b94
SP		 1719 if (status != 0)
1720 goto do_none;
1721
6b7c5b94
SP		 1722 status = be_tx_queues_create(adapter);
1723 if (status != 0)
1724 goto if_destroy;
1725
1726 status = be_rx_queues_create(adapter);
1727 if (status != 0)
1728 goto tx_qs_destroy;
1729
5fb379ee
SP		 1730 status = be_mcc_queues_create(adapter);
1731 if (status != 0)
1732 goto rx_qs_destroy;
6b7c5b94 1733
0dffc83e
AK		 1734 adapter->link_speed = -1;
1735
6b7c5b94
SP		 1736 return 0;
1737
5fb379ee
SP		 1738rx_qs_destroy:
1739 be_rx_queues_destroy(adapter);
6b7c5b94
SP		 1740tx_qs_destroy:
1741 be_tx_queues_destroy(adapter);
1742if_destroy:
8788fdc2 1743 be_cmd_if_destroy(adapter, adapter->if_handle);
6b7c5b94
SP		 1744do_none:
1745 return status;
1746}
1747
5fb379ee
SP		 1748static int be_clear(struct be_adapter *adapter)
1749{
1a8887d8 1750 be_mcc_queues_destroy(adapter);
5fb379ee
SP		 1751 be_rx_queues_destroy(adapter);
1752 be_tx_queues_destroy(adapter);
1753
8788fdc2 1754 be_cmd_if_destroy(adapter, adapter->if_handle);
5fb379ee 1755
2243e2e9
SP		 1756 /* tell fw we're done with firing cmds */
1757 be_cmd_fw_clean(adapter);
5fb379ee
SP		 1758 return 0;
1759}
1760
6b7c5b94
SP		 1761static int be_close(struct net_device *netdev)
1762{
1763 struct be_adapter *adapter = netdev_priv(netdev);
6b7c5b94
SP		 1764 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1765 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1766 int vec;
1767
b305be78 1768 cancel_delayed_work_sync(&adapter->work);
6b7c5b94
SP		 1769
1770 netif_stop_queue(netdev);
1771 netif_carrier_off(netdev);
a8f447bd 1772 adapter->link_up = false;
6b7c5b94 1773
8788fdc2 1774 be_intr_set(adapter, false);
6b7c5b94
SP		 1775
1776 if (adapter->msix_enabled) {
1777 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1778 synchronize_irq(vec);
1779 vec = be_msix_vec_get(adapter, rx_eq->q.id);
1780 synchronize_irq(vec);
1781 } else {
1782 synchronize_irq(netdev->irq);
1783 }
1784 be_irq_unregister(adapter);
1785
1786 napi_disable(&rx_eq->napi);
1787 napi_disable(&tx_eq->napi);
1788
a8e9179a
SP		 1789 /* Wait for all pending tx completions to arrive so that
1790 * all tx skbs are freed.
1791 */
1792 be_tx_compl_clean(adapter);
1793
6b7c5b94
SP		 1794 return 0;
1795}
1796
84517482
AK		 1797#define FW_FILE_HDR_SIGN "ServerEngines Corp. "
1798char flash_cookie[2][16] = {"*** SE FLAS",
1799 "H DIRECTORY *** "};
fa9a6fed
SB		 1800
1801static bool be_flash_redboot(struct be_adapter *adapter,
1802 const u8 *p)
1803{
1804 u32 crc_offset;
1805 u8 flashed_crc[4];
1806 int status;
1807 crc_offset = FLASH_REDBOOT_START + FLASH_REDBOOT_IMAGE_MAX_SIZE - 4
1808 + sizeof(struct flash_file_hdr) - 32*1024;
1809 p += crc_offset;
1810 status = be_cmd_get_flash_crc(adapter, flashed_crc);
1811 if (status) {
1812 dev_err(&adapter->pdev->dev,
1813 "could not get crc from flash, not flashing redboot\n");
1814 return false;
1815 }
1816
1817 /*update redboot only if crc does not match*/
1818 if (!memcmp(flashed_crc, p, 4))
1819 return false;
1820 else
1821 return true;
1822
1823}
1824
84517482
AK		 1825static int be_flash_image(struct be_adapter *adapter,
1826 const struct firmware *fw,
1827 struct be_dma_mem *flash_cmd, u32 flash_type)
1828{
1829 int status;
1830 u32 flash_op, image_offset = 0, total_bytes, image_size = 0;
1831 int num_bytes;
1832 const u8 *p = fw->data;
1833 struct be_cmd_write_flashrom *req = flash_cmd->va;
1834
1835 switch (flash_type) {
1836 case FLASHROM_TYPE_ISCSI_ACTIVE:
1837 image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START;
1838 image_size = FLASH_IMAGE_MAX_SIZE;
1839 break;
1840 case FLASHROM_TYPE_ISCSI_BACKUP:
1841 image_offset = FLASH_iSCSI_BACKUP_IMAGE_START;
1842 image_size = FLASH_IMAGE_MAX_SIZE;
1843 break;
1844 case FLASHROM_TYPE_FCOE_FW_ACTIVE:
1845 image_offset = FLASH_FCoE_PRIMARY_IMAGE_START;
1846 image_size = FLASH_IMAGE_MAX_SIZE;
1847 break;
1848 case FLASHROM_TYPE_FCOE_FW_BACKUP:
1849 image_offset = FLASH_FCoE_BACKUP_IMAGE_START;
1850 image_size = FLASH_IMAGE_MAX_SIZE;
1851 break;
1852 case FLASHROM_TYPE_BIOS:
1853 image_offset = FLASH_iSCSI_BIOS_START;
1854 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1855 break;
1856 case FLASHROM_TYPE_FCOE_BIOS:
1857 image_offset = FLASH_FCoE_BIOS_START;
1858 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1859 break;
1860 case FLASHROM_TYPE_PXE_BIOS:
1861 image_offset = FLASH_PXE_BIOS_START;
1862 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1863 break;
fa9a6fed
SB		 1864 case FLASHROM_TYPE_REDBOOT:
1865 if (!be_flash_redboot(adapter, fw->data))
1866 return 0;
1867 image_offset = FLASH_REDBOOT_ISM_START;
1868 image_size = FLASH_REDBOOT_IMAGE_MAX_SIZE;
1869 break;
84517482
AK		 1870 default:
1871 return 0;
1872 }
1873
1874 p += sizeof(struct flash_file_hdr) + image_offset;
1875 if (p + image_size > fw->data + fw->size)
1876 return -1;
1877
1878 total_bytes = image_size;
1879
1880 while (total_bytes) {
1881 if (total_bytes > 32*1024)
1882 num_bytes = 32*1024;
1883 else
1884 num_bytes = total_bytes;
1885 total_bytes -= num_bytes;
1886
1887 if (!total_bytes)
1888 flash_op = FLASHROM_OPER_FLASH;
1889 else
1890 flash_op = FLASHROM_OPER_SAVE;
1891 memcpy(req->params.data_buf, p, num_bytes);
1892 p += num_bytes;
1893 status = be_cmd_write_flashrom(adapter, flash_cmd,
1894 flash_type, flash_op, num_bytes);
1895 if (status) {
1896 dev_err(&adapter->pdev->dev,
1897 "cmd to write to flash rom failed. type/op %d/%d\n",
1898 flash_type, flash_op);
1899 return -1;
1900 }
1901 yield();
1902 }
1903
1904 return 0;
1905}
1906
1907int be_load_fw(struct be_adapter *adapter, u8 *func)
1908{
1909 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
1910 const struct firmware *fw;
1911 struct flash_file_hdr *fhdr;
1912 struct flash_section_info *fsec = NULL;
1913 struct be_dma_mem flash_cmd;
1914 int status;
1915 const u8 *p;
1916 bool entry_found = false;
1917 int flash_type;
1918 char fw_ver[FW_VER_LEN];
1919 char fw_cfg;
1920
1921 status = be_cmd_get_fw_ver(adapter, fw_ver);
1922 if (status)
1923 return status;
1924
1925 fw_cfg = *(fw_ver + 2);
1926 if (fw_cfg == '0')
1927 fw_cfg = '1';
1928 strcpy(fw_file, func);
1929
1930 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
1931 if (status)
1932 goto fw_exit;
1933
1934 p = fw->data;
1935 fhdr = (struct flash_file_hdr *) p;
1936 if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) {
1937 dev_err(&adapter->pdev->dev,
1938 "Firmware(%s) load error (signature did not match)\n",
1939 fw_file);
1940 status = -1;
1941 goto fw_exit;
1942 }
1943
1944 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
1945
1946 p += sizeof(struct flash_file_hdr);
1947 while (p < (fw->data + fw->size)) {
1948 fsec = (struct flash_section_info *)p;
1949 if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) {
1950 entry_found = true;
1951 break;
1952 }
1953 p += 32;
1954 }
1955
1956 if (!entry_found) {
1957 status = -1;
1958 dev_err(&adapter->pdev->dev,
1959 "Flash cookie not found in firmware image\n");
1960 goto fw_exit;
1961 }
1962
1963 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
1964 flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
1965 &flash_cmd.dma);
1966 if (!flash_cmd.va) {
1967 status = -ENOMEM;
1968 dev_err(&adapter->pdev->dev,
1969 "Memory allocation failure while flashing\n");
1970 goto fw_exit;
1971 }
1972
1973 for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE;
1974 flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) {
1975 status = be_flash_image(adapter, fw, &flash_cmd,
1976 flash_type);
1977 if (status)
1978 break;
1979 }
1980
1981 pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
1982 flash_cmd.dma);
1983 if (status) {
1984 dev_err(&adapter->pdev->dev, "Firmware load error\n");
1985 goto fw_exit;
1986 }
1987
af901ca1 1988 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
84517482
AK		 1989
1990fw_exit:
1991 release_firmware(fw);
1992 return status;
1993}
1994
6b7c5b94
SP		 1995static struct net_device_ops be_netdev_ops = {
1996 .ndo_open = be_open,
1997 .ndo_stop = be_close,
1998 .ndo_start_xmit = be_xmit,
1999 .ndo_get_stats = be_get_stats,
2000 .ndo_set_rx_mode = be_set_multicast_list,
2001 .ndo_set_mac_address = be_mac_addr_set,
2002 .ndo_change_mtu = be_change_mtu,
2003 .ndo_validate_addr = eth_validate_addr,
2004 .ndo_vlan_rx_register = be_vlan_register,
2005 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
2006 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
2007};
2008
2009static void be_netdev_init(struct net_device *netdev)
2010{
2011 struct be_adapter *adapter = netdev_priv(netdev);
2012
2013 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
583e3f34
AK		 2014 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
2015 NETIF_F_GRO;
6b7c5b94 2016
51c59870
AK		 2017 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
2018
6b7c5b94
SP		 2019 netdev->flags |= IFF_MULTICAST;
2020
728a9972
AK		 2021 adapter->rx_csum = true;
2022
9e90c961
AK		 2023 /* Default settings for Rx and Tx flow control */
2024 adapter->rx_fc = true;
2025 adapter->tx_fc = true;
2026
c190e3c8
AK		 2027 netif_set_gso_max_size(netdev, 65535);
2028
6b7c5b94
SP		 2029 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
2030
2031 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
2032
6b7c5b94
SP		 2033 netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
2034 BE_NAPI_WEIGHT);
5fb379ee 2035 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
6b7c5b94
SP		 2036 BE_NAPI_WEIGHT);
2037
2038 netif_carrier_off(netdev);
2039 netif_stop_queue(netdev);
2040}
2041
2042static void be_unmap_pci_bars(struct be_adapter *adapter)
2043{
8788fdc2
SP		 2044 if (adapter->csr)
2045 iounmap(adapter->csr);
2046 if (adapter->db)
2047 iounmap(adapter->db);
2048 if (adapter->pcicfg)
2049 iounmap(adapter->pcicfg);
6b7c5b94
SP		 2050}
2051
2052static int be_map_pci_bars(struct be_adapter *adapter)
2053{
2054 u8 __iomem *addr;
7b139c83 2055 int pcicfg_reg;
6b7c5b94
SP		 2056
2057 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
2058 pci_resource_len(adapter->pdev, 2));
2059 if (addr == NULL)
2060 return -ENOMEM;
8788fdc2 2061 adapter->csr = addr;
6b7c5b94
SP		 2062
2063 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
2064 128 * 1024);
2065 if (addr == NULL)
2066 goto pci_map_err;
8788fdc2 2067 adapter->db = addr;
6b7c5b94 2068
7b139c83
AK		 2069 if (adapter->generation == BE_GEN2)
2070 pcicfg_reg = 1;
2071 else
2072 pcicfg_reg = 0;
2073
2074 addr = ioremap_nocache(pci_resource_start(adapter->pdev, pcicfg_reg),
2075 pci_resource_len(adapter->pdev, pcicfg_reg));
6b7c5b94
SP		 2076 if (addr == NULL)
2077 goto pci_map_err;
8788fdc2 2078 adapter->pcicfg = addr;
6b7c5b94
SP		 2079
2080 return 0;
2081pci_map_err:
2082 be_unmap_pci_bars(adapter);
2083 return -ENOMEM;
2084}
2085
2086
2087static void be_ctrl_cleanup(struct be_adapter *adapter)
2088{
8788fdc2 2089 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
6b7c5b94
SP		 2090
2091 be_unmap_pci_bars(adapter);
2092
2093 if (mem->va)
2094 pci_free_consistent(adapter->pdev, mem->size,
2095 mem->va, mem->dma);
e7b909a6
SP		 2096
2097 mem = &adapter->mc_cmd_mem;
2098 if (mem->va)
2099 pci_free_consistent(adapter->pdev, mem->size,
2100 mem->va, mem->dma);
6b7c5b94
SP		 2101}
2102
6b7c5b94
SP		 2103static int be_ctrl_init(struct be_adapter *adapter)
2104{
8788fdc2
SP		 2105 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
2106 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
e7b909a6 2107 struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
6b7c5b94 2108 int status;
6b7c5b94
SP		 2109
2110 status = be_map_pci_bars(adapter);
2111 if (status)
e7b909a6 2112 goto done;
6b7c5b94
SP		 2113
2114 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
2115 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
2116 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
2117 if (!mbox_mem_alloc->va) {
e7b909a6
SP		 2118 status = -ENOMEM;
2119 goto unmap_pci_bars;
6b7c5b94 2120 }
e7b909a6 2121
6b7c5b94
SP		 2122 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
2123 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
2124 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
2125 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
e7b909a6
SP		 2126
2127 mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
2128 mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
2129 &mc_cmd_mem->dma);
2130 if (mc_cmd_mem->va == NULL) {
2131 status = -ENOMEM;
2132 goto free_mbox;
2133 }
2134 memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
2135
8788fdc2
SP		 2136 spin_lock_init(&adapter->mbox_lock);
2137 spin_lock_init(&adapter->mcc_lock);
2138 spin_lock_init(&adapter->mcc_cq_lock);
a8f447bd 2139
6b7c5b94 2140 return 0;
e7b909a6
SP		 2141
2142free_mbox:
2143 pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
2144 mbox_mem_alloc->va, mbox_mem_alloc->dma);
2145
2146unmap_pci_bars:
2147 be_unmap_pci_bars(adapter);
2148
2149done:
2150 return status;
6b7c5b94
SP		 2151}
2152
2153static void be_stats_cleanup(struct be_adapter *adapter)
2154{
2155 struct be_stats_obj *stats = &adapter->stats;
2156 struct be_dma_mem *cmd = &stats->cmd;
2157
2158 if (cmd->va)
2159 pci_free_consistent(adapter->pdev, cmd->size,
2160 cmd->va, cmd->dma);
2161}
2162
2163static int be_stats_init(struct be_adapter *adapter)
2164{
2165 struct be_stats_obj *stats = &adapter->stats;
2166 struct be_dma_mem *cmd = &stats->cmd;
2167
2168 cmd->size = sizeof(struct be_cmd_req_get_stats);
2169 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2170 if (cmd->va == NULL)
2171 return -1;
d291b9af 2172 memset(cmd->va, 0, cmd->size);
6b7c5b94
SP		 2173 return 0;
2174}
2175
2176static void __devexit be_remove(struct pci_dev *pdev)
2177{
2178 struct be_adapter *adapter = pci_get_drvdata(pdev);
8d56ff11 2179
6b7c5b94
SP		 2180 if (!adapter)
2181 return;
2182
2183 unregister_netdev(adapter->netdev);
2184
5fb379ee
SP		 2185 be_clear(adapter);
2186
6b7c5b94
SP		 2187 be_stats_cleanup(adapter);
2188
2189 be_ctrl_cleanup(adapter);
2190
8d56ff11 2191 be_msix_disable(adapter);
6b7c5b94
SP		 2192
2193 pci_set_drvdata(pdev, NULL);
2194 pci_release_regions(pdev);
2195 pci_disable_device(pdev);
2196
2197 free_netdev(adapter->netdev);
2198}
2199
2243e2e9 2200static int be_get_config(struct be_adapter *adapter)
6b7c5b94 2201{
6b7c5b94 2202 int status;
2243e2e9 2203 u8 mac[ETH_ALEN];
6b7c5b94 2204
2243e2e9 2205 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
6b7c5b94
SP		 2206 if (status)
2207 return status;
2208
2243e2e9
SP		 2209 status = be_cmd_query_fw_cfg(adapter,
2210 &adapter->port_num, &adapter->cap);
43a04fdc
SP		 2211 if (status)
2212 return status;
2213
2243e2e9
SP		 2214 memset(mac, 0, ETH_ALEN);
2215 status = be_cmd_mac_addr_query(adapter, mac,
2216 MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
6b7c5b94
SP		 2217 if (status)
2218 return status;
ca9e4988
AK		 2219
2220 if (!is_valid_ether_addr(mac))
2221 return -EADDRNOTAVAIL;
2222
2243e2e9 2223 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
35a65285 2224 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
6b7c5b94 2225
2243e2e9 2226 return 0;
6b7c5b94
SP		 2227}
2228
2229static int __devinit be_probe(struct pci_dev *pdev,
2230 const struct pci_device_id *pdev_id)
2231{
2232 int status = 0;
2233 struct be_adapter *adapter;
2234 struct net_device *netdev;
6b7c5b94
SP		 2235
2236 status = pci_enable_device(pdev);
2237 if (status)
2238 goto do_none;
2239
2240 status = pci_request_regions(pdev, DRV_NAME);
2241 if (status)
2242 goto disable_dev;
2243 pci_set_master(pdev);
2244
2245 netdev = alloc_etherdev(sizeof(struct be_adapter));
2246 if (netdev == NULL) {
2247 status = -ENOMEM;
2248 goto rel_reg;
2249 }
2250 adapter = netdev_priv(netdev);
7b139c83
AK		 2251
2252 switch (pdev->device) {
2253 case BE_DEVICE_ID1:
2254 case OC_DEVICE_ID1:
2255 adapter->generation = BE_GEN2;
2256 break;
2257 case BE_DEVICE_ID2:
2258 case OC_DEVICE_ID2:
2259 adapter->generation = BE_GEN3;
2260 break;
2261 default:
2262 adapter->generation = 0;
2263 }
2264
6b7c5b94
SP		 2265 adapter->pdev = pdev;
2266 pci_set_drvdata(pdev, adapter);
2267 adapter->netdev = netdev;
2243e2e9
SP		 2268 be_netdev_init(netdev);
2269 SET_NETDEV_DEV(netdev, &pdev->dev);
6b7c5b94
SP		 2270
2271 be_msix_enable(adapter);
2272
e930438c 2273 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
6b7c5b94
SP		 2274 if (!status) {
2275 netdev->features |= NETIF_F_HIGHDMA;
2276 } else {
e930438c 2277 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
6b7c5b94
SP		 2278 if (status) {
2279 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
2280 goto free_netdev;
2281 }
2282 }
2283
6b7c5b94
SP		 2284 status = be_ctrl_init(adapter);
2285 if (status)
2286 goto free_netdev;
2287
2243e2e9
SP		 2288 /* sync up with fw's ready state */
2289 status = be_cmd_POST(adapter);
6b7c5b94
SP		 2290 if (status)
2291 goto ctrl_clean;
2292
2243e2e9
SP		 2293 /* tell fw we're ready to fire cmds */
2294 status = be_cmd_fw_init(adapter);
6b7c5b94 2295 if (status)
2243e2e9
SP		 2296 goto ctrl_clean;
2297
2298 status = be_cmd_reset_function(adapter);
2299 if (status)
2300 goto ctrl_clean;
6b7c5b94 2301
2243e2e9
SP		 2302 status = be_stats_init(adapter);
2303 if (status)
2304 goto ctrl_clean;
2305
2306 status = be_get_config(adapter);
6b7c5b94
SP		 2307 if (status)
2308 goto stats_clean;
6b7c5b94
SP		 2309
2310 INIT_DELAYED_WORK(&adapter->work, be_worker);
6b7c5b94 2311
5fb379ee
SP		 2312 status = be_setup(adapter);
2313 if (status)
2314 goto stats_clean;
2243e2e9 2315
6b7c5b94
SP		 2316 status = register_netdev(netdev);
2317 if (status != 0)
5fb379ee 2318 goto unsetup;
6b7c5b94 2319
c4ca2374 2320 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
6b7c5b94
SP		 2321 return 0;
2322
5fb379ee
SP		 2323unsetup:
2324 be_clear(adapter);
6b7c5b94
SP		 2325stats_clean:
2326 be_stats_cleanup(adapter);
2327ctrl_clean:
2328 be_ctrl_cleanup(adapter);
2329free_netdev:
8d56ff11 2330 be_msix_disable(adapter);
6b7c5b94 2331 free_netdev(adapter->netdev);
8d56ff11 2332 pci_set_drvdata(pdev, NULL);
6b7c5b94
SP		 2333rel_reg:
2334 pci_release_regions(pdev);
2335disable_dev:
2336 pci_disable_device(pdev);
2337do_none:
c4ca2374 2338 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
6b7c5b94
SP		 2339 return status;
2340}
2341
2342static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2343{
2344 struct be_adapter *adapter = pci_get_drvdata(pdev);
2345 struct net_device *netdev = adapter->netdev;
2346
71d8d1b5
AK		 2347 if (adapter->wol)
2348 be_setup_wol(adapter, true);
2349
6b7c5b94
SP		 2350 netif_device_detach(netdev);
2351 if (netif_running(netdev)) {
2352 rtnl_lock();
2353 be_close(netdev);
2354 rtnl_unlock();
2355 }
9e90c961 2356 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
9b0365f1 2357 be_clear(adapter);
6b7c5b94
SP		 2358
2359 pci_save_state(pdev);
2360 pci_disable_device(pdev);
2361 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2362 return 0;
2363}
2364
2365static int be_resume(struct pci_dev *pdev)
2366{
2367 int status = 0;
2368 struct be_adapter *adapter = pci_get_drvdata(pdev);
2369 struct net_device *netdev = adapter->netdev;
2370
2371 netif_device_detach(netdev);
2372
2373 status = pci_enable_device(pdev);
2374 if (status)
2375 return status;
2376
2377 pci_set_power_state(pdev, 0);
2378 pci_restore_state(pdev);
2379
2243e2e9
SP		 2380 /* tell fw we're ready to fire cmds */
2381 status = be_cmd_fw_init(adapter);
2382 if (status)
2383 return status;
2384
9b0365f1 2385 be_setup(adapter);
6b7c5b94
SP		 2386 if (netif_running(netdev)) {
2387 rtnl_lock();
2388 be_open(netdev);
2389 rtnl_unlock();
2390 }
2391 netif_device_attach(netdev);
71d8d1b5
AK		 2392
2393 if (adapter->wol)
2394 be_setup_wol(adapter, false);
6b7c5b94
SP		 2395 return 0;
2396}
2397
2398static struct pci_driver be_driver = {
2399 .name = DRV_NAME,
2400 .id_table = be_dev_ids,
2401 .probe = be_probe,
2402 .remove = be_remove,
2403 .suspend = be_suspend,
2404 .resume = be_resume
2405};
2406
2407static int __init be_init_module(void)
2408{
8e95a202
JP		 2409 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
2410 rx_frag_size != 2048) {
6b7c5b94
SP		 2411 printk(KERN_WARNING DRV_NAME
2412 " : Module param rx_frag_size must be 2048/4096/8192."
2413 " Using 2048\n");
2414 rx_frag_size = 2048;
2415 }
6b7c5b94
SP		 2416
2417 return pci_register_driver(&be_driver);
2418}
2419module_init(be_init_module);
2420
2421static void __exit be_exit_module(void)
2422{
2423 pci_unregister_driver(&be_driver);
2424}
2425module_exit(be_exit_module);
Linux 6.x block layer and io_uring tree(s)