[MTD] sharpsl_nand: move io addr to struct sharpsl_nand
[linux-2.6-block.git] / drivers / mtd / nand / sharpsl.c
CommitLineData
1da177e4
LT
1/*
2 * drivers/mtd/nand/sharpsl.c
3 *
4 * Copyright (C) 2004 Richard Purdie
5 *
1da177e4
LT
6 * Based on Sharp's NAND driver sharp_sl.c
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/genhd.h>
15#include <linux/slab.h>
16#include <linux/module.h>
17#include <linux/delay.h>
18#include <linux/mtd/mtd.h>
19#include <linux/mtd/nand.h>
20#include <linux/mtd/nand_ecc.h>
21#include <linux/mtd/partitions.h>
22#include <linux/interrupt.h>
26615249
DB
23#include <linux/platform_device.h>
24
1da177e4 25#include <asm/io.h>
a09e64fb 26#include <mach/hardware.h>
1da177e4
LT
27#include <asm/mach-types.h>
28
2206ef1c
DB
29struct sharpsl_nand {
30 struct mtd_info mtd;
31 struct nand_chip chip;
a4e4f29c
DB
32
33 void __iomem *io;
2206ef1c
DB
34};
35
a4e4f29c 36#define mtd_to_sharpsl(_mtd) container_of(_mtd, struct sharpsl_nand, mtd)
1da177e4
LT
37
38/* register offset */
a4e4f29c
DB
39#define ECCLPLB 0x00 /* line parity 7 - 0 bit */
40#define ECCLPUB 0x04 /* line parity 15 - 8 bit */
41#define ECCCP 0x08 /* column parity 5 - 0 bit */
42#define ECCCNTR 0x0C /* ECC byte counter */
43#define ECCCLRR 0x10 /* cleare ECC */
44#define FLASHIO 0x14 /* Flash I/O */
45#define FLASHCTL 0x18 /* Flash Control */
1da177e4
LT
46
47/* Flash control bit */
48#define FLRYBY (1 << 5)
49#define FLCE1 (1 << 4)
50#define FLWP (1 << 3)
51#define FLALE (1 << 2)
52#define FLCLE (1 << 1)
53#define FLCE0 (1 << 0)
54
1da177e4
LT
55/*
56 * Define partitions for flash device
57 */
58#define DEFAULT_NUM_PARTITIONS 3
59
60static int nr_partitions;
61static struct mtd_partition sharpsl_nand_default_partition_info[] = {
62 {
e0c7d767
DW
63 .name = "System Area",
64 .offset = 0,
65 .size = 7 * 1024 * 1024,
66 },
1da177e4 67 {
e0c7d767
DW
68 .name = "Root Filesystem",
69 .offset = 7 * 1024 * 1024,
70 .size = 30 * 1024 * 1024,
71 },
1da177e4 72 {
e0c7d767
DW
73 .name = "Home Filesystem",
74 .offset = MTDPART_OFS_APPEND,
75 .size = MTDPART_SIZ_FULL,
76 },
1da177e4
LT
77};
78
61b03bd7 79/*
1da177e4 80 * hardware specific access to control-lines
7abd3ef9 81 * ctrl:
6a5a297c 82 * NAND_CNE: bit 0 -> ! bit 0 & 4
7abd3ef9
TG
83 * NAND_CLE: bit 1 -> bit 1
84 * NAND_ALE: bit 2 -> bit 2
85 *
1da177e4 86 */
7abd3ef9
TG
87static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd,
88 unsigned int ctrl)
1da177e4 89{
a4e4f29c 90 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
7abd3ef9
TG
91 struct nand_chip *chip = mtd->priv;
92
93 if (ctrl & NAND_CTRL_CHANGE) {
94 unsigned char bits = ctrl & 0x07;
95
96 bits |= (ctrl & 0x01) << 4;
6a5a297c
RP
97
98 bits ^= 0x11;
99
a4e4f29c 100 writeb((readb(sharpsl->io + FLASHCTL) & ~0x17) | bits, sharpsl->io + FLASHCTL);
1da177e4 101 }
7abd3ef9
TG
102
103 if (cmd != NAND_CMD_NONE)
104 writeb(cmd, chip->IO_ADDR_W);
1da177e4
LT
105}
106
107static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
108
109static struct nand_bbt_descr sharpsl_bbt = {
110 .options = 0,
111 .offs = 4,
112 .len = 2,
113 .pattern = scan_ff_pattern
114};
115
87c146dc
RP
116static struct nand_bbt_descr sharpsl_akita_bbt = {
117 .options = 0,
118 .offs = 4,
119 .len = 1,
120 .pattern = scan_ff_pattern
121};
122
5bd34c09 123static struct nand_ecclayout akita_oobinfo = {
87c146dc
RP
124 .eccbytes = 24,
125 .eccpos = {
e0c7d767
DW
126 0x5, 0x1, 0x2, 0x3, 0x6, 0x7, 0x15, 0x11,
127 0x12, 0x13, 0x16, 0x17, 0x25, 0x21, 0x22, 0x23,
128 0x26, 0x27, 0x35, 0x31, 0x32, 0x33, 0x36, 0x37},
129 .oobfree = {{0x08, 0x09}}
87c146dc
RP
130};
131
e0c7d767 132static int sharpsl_nand_dev_ready(struct mtd_info *mtd)
1da177e4 133{
a4e4f29c
DB
134 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
135 return !((readb(sharpsl->io + FLASHCTL) & FLRYBY) == 0);
1da177e4
LT
136}
137
e0c7d767 138static void sharpsl_nand_enable_hwecc(struct mtd_info *mtd, int mode)
1da177e4 139{
a4e4f29c
DB
140 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
141 writeb(0, sharpsl->io + ECCCLRR);
1da177e4
LT
142}
143
e0c7d767 144static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, u_char * ecc_code)
1da177e4 145{
a4e4f29c
DB
146 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
147 ecc_code[0] = ~readb(sharpsl->io + ECCLPUB);
148 ecc_code[1] = ~readb(sharpsl->io + ECCLPLB);
149 ecc_code[2] = (~readb(sharpsl->io + ECCCP) << 2) | 0x03;
150 return readb(sharpsl->io + ECCCNTR) != 0;
1da177e4
LT
151}
152
1da177e4
LT
153#ifdef CONFIG_MTD_PARTITIONS
154const char *part_probes[] = { "cmdlinepart", NULL };
155#endif
156
1da177e4
LT
157/*
158 * Main initialization routine
159 */
26615249 160static int __devinit sharpsl_nand_probe(struct platform_device *pdev)
1da177e4
LT
161{
162 struct nand_chip *this;
e0c7d767 163 struct mtd_partition *sharpsl_partition_info;
26615249 164 struct resource *r;
1da177e4 165 int err = 0;
2206ef1c 166 struct sharpsl_nand *sharpsl;
1da177e4
LT
167
168 /* Allocate memory for MTD device structure and private data */
2206ef1c
DB
169 sharpsl = kzalloc(sizeof(struct sharpsl_nand), GFP_KERNEL);
170 if (!sharpsl) {
e0c7d767 171 printk("Unable to allocate SharpSL NAND MTD device structure.\n");
1da177e4
LT
172 return -ENOMEM;
173 }
61b03bd7 174
26615249
DB
175 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
176 if (!r) {
177 dev_err(&pdev->dev, "no io memory resource defined!\n");
178 err = -ENODEV;
179 goto err_get_res;
180 }
181
8e87d782 182 /* map physical address */
a4e4f29c
DB
183 sharpsl->io = ioremap(r->start, resource_size(r));
184 if (!sharpsl->io) {
1da177e4 185 printk("ioremap to access Sharp SL NAND chip failed\n");
2206ef1c
DB
186 err = -EIO;
187 goto err_ioremap;
1da177e4 188 }
61b03bd7 189
1da177e4 190 /* Get pointer to private data */
2206ef1c 191 this = (struct nand_chip *)(&sharpsl->chip);
1da177e4
LT
192
193 /* Link the private data with the MTD structure */
2206ef1c
DB
194 sharpsl->mtd.priv = this;
195 sharpsl->mtd.owner = THIS_MODULE;
196
197 platform_set_drvdata(pdev, sharpsl);
1da177e4
LT
198
199 /*
200 * PXA initialize
201 */
a4e4f29c 202 writeb(readb(sharpsl->io + FLASHCTL) | FLWP, sharpsl->io + FLASHCTL);
1da177e4
LT
203
204 /* Set address of NAND IO lines */
a4e4f29c
DB
205 this->IO_ADDR_R = sharpsl->io + FLASHIO;
206 this->IO_ADDR_W = sharpsl->io + FLASHIO;
1da177e4 207 /* Set address of hardware control function */
7abd3ef9 208 this->cmd_ctrl = sharpsl_nand_hwcontrol;
1da177e4
LT
209 this->dev_ready = sharpsl_nand_dev_ready;
210 /* 15 us command delay time */
211 this->chip_delay = 15;
212 /* set eccmode using hardware ECC */
6dfc6d25
TG
213 this->ecc.mode = NAND_ECC_HW;
214 this->ecc.size = 256;
215 this->ecc.bytes = 3;
61b03bd7 216 this->badblock_pattern = &sharpsl_bbt;
87c146dc
RP
217 if (machine_is_akita() || machine_is_borzoi()) {
218 this->badblock_pattern = &sharpsl_akita_bbt;
5bd34c09 219 this->ecc.layout = &akita_oobinfo;
87c146dc 220 }
6dfc6d25
TG
221 this->ecc.hwctl = sharpsl_nand_enable_hwecc;
222 this->ecc.calculate = sharpsl_nand_calculate_ecc;
223 this->ecc.correct = nand_correct_data;
1da177e4
LT
224
225 /* Scan to find existence of the device */
2206ef1c 226 err = nand_scan(&sharpsl->mtd, 1);
a4e4f29c
DB
227 if (err)
228 goto err_scan;
1da177e4
LT
229
230 /* Register the partitions */
2206ef1c
DB
231 sharpsl->mtd.name = "sharpsl-nand";
232 nr_partitions = parse_mtd_partitions(&sharpsl->mtd, part_probes, &sharpsl_partition_info, 0);
61b03bd7 233
1da177e4
LT
234 if (nr_partitions <= 0) {
235 nr_partitions = DEFAULT_NUM_PARTITIONS;
236 sharpsl_partition_info = sharpsl_nand_default_partition_info;
237 if (machine_is_poodle()) {
e0c7d767 238 sharpsl_partition_info[1].size = 22 * 1024 * 1024;
1da177e4 239 } else if (machine_is_corgi() || machine_is_shepherd()) {
e0c7d767 240 sharpsl_partition_info[1].size = 25 * 1024 * 1024;
1da177e4 241 } else if (machine_is_husky()) {
e0c7d767 242 sharpsl_partition_info[1].size = 53 * 1024 * 1024;
62052d42 243 } else if (machine_is_spitz()) {
e0c7d767 244 sharpsl_partition_info[1].size = 5 * 1024 * 1024;
62052d42 245 } else if (machine_is_akita()) {
e0c7d767 246 sharpsl_partition_info[1].size = 58 * 1024 * 1024;
62052d42 247 } else if (machine_is_borzoi()) {
e0c7d767 248 sharpsl_partition_info[1].size = 32 * 1024 * 1024;
62052d42 249 }
1da177e4
LT
250 }
251
2206ef1c 252 add_mtd_partitions(&sharpsl->mtd, sharpsl_partition_info, nr_partitions);
1da177e4
LT
253
254 /* Return happy */
255 return 0;
e0c7d767 256
a4e4f29c
DB
257err_scan:
258 platform_set_drvdata(pdev, NULL);
259 iounmap(sharpsl->io);
2206ef1c 260err_ioremap:
26615249 261err_get_res:
2206ef1c 262 kfree(sharpsl);
26615249
DB
263 return err;
264}
1da177e4
LT
265
266/*
267 * Clean up routine
268 */
26615249 269static int __devexit sharpsl_nand_remove(struct platform_device *pdev)
1da177e4 270{
2206ef1c
DB
271 struct sharpsl_nand *sharpsl = platform_get_drvdata(pdev);
272
1da177e4 273 /* Release resources, unregister device */
2206ef1c
DB
274 nand_release(&sharpsl->mtd);
275
276 platform_set_drvdata(pdev, NULL);
1da177e4 277
a4e4f29c 278 iounmap(sharpsl->io);
1da177e4
LT
279
280 /* Free the MTD device structure */
2206ef1c 281 kfree(sharpsl);
26615249
DB
282
283 return 0;
284}
285
286static struct platform_driver sharpsl_nand_driver = {
287 .driver = {
288 .name = "sharpsl-nand",
289 .owner = THIS_MODULE,
290 },
291 .probe = sharpsl_nand_probe,
292 .remove = __devexit_p(sharpsl_nand_remove),
293};
294
295static struct resource sharpsl_nand_resources[] = {
296 {
297 .start = 0x0C000000,
298 .end = 0x0C000FFF,
299 .flags = IORESOURCE_MEM,
300 },
301};
302
303static struct platform_device sharpsl_nand_device = {
304 .name = "sharpsl-nand",
305 .id = -1,
306 .resource = sharpsl_nand_resources,
307 .num_resources = ARRAY_SIZE(sharpsl_nand_resources),
308};
309
310static int __init sharpsl_nand_init(void)
311{
312 platform_device_register(&sharpsl_nand_device);
313 return platform_driver_register(&sharpsl_nand_driver);
1da177e4 314}
26615249 315module_init(sharpsl_nand_init);
e0c7d767 316
26615249
DB
317static void __exit sharpsl_nand_exit(void)
318{
319 platform_driver_unregister(&sharpsl_nand_driver);
320 platform_device_unregister(&sharpsl_nand_device);
321}
322module_exit(sharpsl_nand_exit);
1da177e4
LT
323
324MODULE_LICENSE("GPL");
325MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
326MODULE_DESCRIPTION("Device specific logic for NAND flash on Sharp SL-C7xx Series");