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d2912cb1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1b578193 | 2 | /* |
1b578193 | 3 | * Copyright © 2008 Ilya Yanok, Emcraft Systems |
1b578193 WG |
4 | */ |
5 | ||
6 | #include <linux/slab.h> | |
7 | #include <linux/module.h> | |
8 | #include <linux/mtd/mtd.h> | |
d4092d76 | 9 | #include <linux/mtd/rawnand.h> |
1b578193 | 10 | #include <linux/mtd/partitions.h> |
c11eede6 | 11 | #include <linux/of_address.h> |
1b578193 WG |
12 | #include <linux/of_platform.h> |
13 | #include <linux/io.h> | |
14 | ||
15 | #define FPGA_NAND_CMD_MASK (0x7 << 28) | |
16 | #define FPGA_NAND_CMD_COMMAND (0x0 << 28) | |
17 | #define FPGA_NAND_CMD_ADDR (0x1 << 28) | |
18 | #define FPGA_NAND_CMD_READ (0x2 << 28) | |
19 | #define FPGA_NAND_CMD_WRITE (0x3 << 28) | |
20 | #define FPGA_NAND_BUSY (0x1 << 15) | |
21 | #define FPGA_NAND_ENABLE (0x1 << 31) | |
22 | #define FPGA_NAND_DATA_SHIFT 16 | |
23 | ||
24 | struct socrates_nand_host { | |
25 | struct nand_chip nand_chip; | |
1b578193 WG |
26 | void __iomem *io_base; |
27 | struct device *dev; | |
28 | }; | |
29 | ||
30 | /** | |
31 | * socrates_nand_write_buf - write buffer to chip | |
c0739d85 | 32 | * @this: NAND chip object |
1b578193 WG |
33 | * @buf: data buffer |
34 | * @len: number of bytes to write | |
35 | */ | |
c0739d85 BB |
36 | static void socrates_nand_write_buf(struct nand_chip *this, const uint8_t *buf, |
37 | int len) | |
1b578193 WG |
38 | { |
39 | int i; | |
d699ed25 | 40 | struct socrates_nand_host *host = nand_get_controller_data(this); |
1b578193 WG |
41 | |
42 | for (i = 0; i < len; i++) { | |
43 | out_be32(host->io_base, FPGA_NAND_ENABLE | | |
44 | FPGA_NAND_CMD_WRITE | | |
45 | (buf[i] << FPGA_NAND_DATA_SHIFT)); | |
46 | } | |
47 | } | |
48 | ||
49 | /** | |
50 | * socrates_nand_read_buf - read chip data into buffer | |
7e534323 | 51 | * @this: NAND chip object |
1b578193 WG |
52 | * @buf: buffer to store date |
53 | * @len: number of bytes to read | |
54 | */ | |
7e534323 BB |
55 | static void socrates_nand_read_buf(struct nand_chip *this, uint8_t *buf, |
56 | int len) | |
1b578193 WG |
57 | { |
58 | int i; | |
d699ed25 | 59 | struct socrates_nand_host *host = nand_get_controller_data(this); |
1b578193 WG |
60 | uint32_t val; |
61 | ||
62 | val = FPGA_NAND_ENABLE | FPGA_NAND_CMD_READ; | |
63 | ||
64 | out_be32(host->io_base, val); | |
65 | for (i = 0; i < len; i++) { | |
66 | buf[i] = (in_be32(host->io_base) >> | |
67 | FPGA_NAND_DATA_SHIFT) & 0xff; | |
68 | } | |
69 | } | |
70 | ||
71 | /** | |
72 | * socrates_nand_read_byte - read one byte from the chip | |
73 | * @mtd: MTD device structure | |
74 | */ | |
7e534323 | 75 | static uint8_t socrates_nand_read_byte(struct nand_chip *this) |
1b578193 WG |
76 | { |
77 | uint8_t byte; | |
7e534323 | 78 | socrates_nand_read_buf(this, &byte, sizeof(byte)); |
1b578193 WG |
79 | return byte; |
80 | } | |
81 | ||
1b578193 WG |
82 | /* |
83 | * Hardware specific access to control-lines | |
84 | */ | |
0f808c16 BB |
85 | static void socrates_nand_cmd_ctrl(struct nand_chip *nand_chip, int cmd, |
86 | unsigned int ctrl) | |
1b578193 | 87 | { |
d699ed25 | 88 | struct socrates_nand_host *host = nand_get_controller_data(nand_chip); |
1b578193 WG |
89 | uint32_t val; |
90 | ||
91 | if (cmd == NAND_CMD_NONE) | |
92 | return; | |
93 | ||
94 | if (ctrl & NAND_CLE) | |
95 | val = FPGA_NAND_CMD_COMMAND; | |
96 | else | |
97 | val = FPGA_NAND_CMD_ADDR; | |
98 | ||
99 | if (ctrl & NAND_NCE) | |
100 | val |= FPGA_NAND_ENABLE; | |
101 | ||
102 | val |= (cmd & 0xff) << FPGA_NAND_DATA_SHIFT; | |
103 | ||
104 | out_be32(host->io_base, val); | |
105 | } | |
106 | ||
107 | /* | |
108 | * Read the Device Ready pin. | |
109 | */ | |
50a487e7 | 110 | static int socrates_nand_device_ready(struct nand_chip *nand_chip) |
1b578193 | 111 | { |
d699ed25 | 112 | struct socrates_nand_host *host = nand_get_controller_data(nand_chip); |
1b578193 WG |
113 | |
114 | if (in_be32(host->io_base) & FPGA_NAND_BUSY) | |
115 | return 0; /* busy */ | |
116 | return 1; | |
117 | } | |
118 | ||
1b578193 WG |
119 | /* |
120 | * Probe for the NAND device. | |
121 | */ | |
06f25510 | 122 | static int socrates_nand_probe(struct platform_device *ofdev) |
1b578193 WG |
123 | { |
124 | struct socrates_nand_host *host; | |
125 | struct mtd_info *mtd; | |
126 | struct nand_chip *nand_chip; | |
127 | int res; | |
1b578193 WG |
128 | |
129 | /* Allocate memory for the device structure (and zero it) */ | |
cf3a9b56 SK |
130 | host = devm_kzalloc(&ofdev->dev, sizeof(*host), GFP_KERNEL); |
131 | if (!host) | |
1b578193 | 132 | return -ENOMEM; |
1b578193 | 133 | |
c8a4d0fd | 134 | host->io_base = of_iomap(ofdev->dev.of_node, 0); |
1b578193 | 135 | if (host->io_base == NULL) { |
5422933d | 136 | dev_err(&ofdev->dev, "ioremap failed\n"); |
1b578193 WG |
137 | return -EIO; |
138 | } | |
139 | ||
1b578193 | 140 | nand_chip = &host->nand_chip; |
a723bf6a | 141 | mtd = nand_to_mtd(nand_chip); |
1b578193 WG |
142 | host->dev = &ofdev->dev; |
143 | ||
d699ed25 BB |
144 | /* link the private data structures */ |
145 | nand_set_controller_data(nand_chip, host); | |
a61ae81a | 146 | nand_set_flash_node(nand_chip, ofdev->dev.of_node); |
1b578193 | 147 | mtd->name = "socrates_nand"; |
1b578193 WG |
148 | mtd->dev.parent = &ofdev->dev; |
149 | ||
bf6065c6 | 150 | nand_chip->legacy.cmd_ctrl = socrates_nand_cmd_ctrl; |
716bbbab BB |
151 | nand_chip->legacy.read_byte = socrates_nand_read_byte; |
152 | nand_chip->legacy.write_buf = socrates_nand_write_buf; | |
153 | nand_chip->legacy.read_buf = socrates_nand_read_buf; | |
8395b753 | 154 | nand_chip->legacy.dev_ready = socrates_nand_device_ready; |
1b578193 WG |
155 | |
156 | nand_chip->ecc.mode = NAND_ECC_SOFT; /* enable ECC */ | |
ce111afd | 157 | nand_chip->ecc.algo = NAND_ECC_HAMMING; |
1b578193 WG |
158 | |
159 | /* TODO: I have no idea what real delay is. */ | |
3cece3ab | 160 | nand_chip->legacy.chip_delay = 20; /* 20us command delay time */ |
1b578193 WG |
161 | |
162 | dev_set_drvdata(&ofdev->dev, host); | |
163 | ||
00ad378f | 164 | res = nand_scan(nand_chip, 1); |
83f48f80 | 165 | if (res) |
1b578193 | 166 | goto out; |
1b578193 | 167 | |
a61ae81a | 168 | res = mtd_device_register(mtd, NULL, 0); |
1b578193 WG |
169 | if (!res) |
170 | return res; | |
171 | ||
59ac276f | 172 | nand_release(nand_chip); |
1b578193 WG |
173 | |
174 | out: | |
1b578193 | 175 | iounmap(host->io_base); |
1b578193 WG |
176 | return res; |
177 | } | |
178 | ||
179 | /* | |
180 | * Remove a NAND device. | |
181 | */ | |
810b7e06 | 182 | static int socrates_nand_remove(struct platform_device *ofdev) |
1b578193 WG |
183 | { |
184 | struct socrates_nand_host *host = dev_get_drvdata(&ofdev->dev); | |
1b578193 | 185 | |
59ac276f | 186 | nand_release(&host->nand_chip); |
1b578193 | 187 | |
1b578193 | 188 | iounmap(host->io_base); |
1b578193 WG |
189 | |
190 | return 0; | |
191 | } | |
192 | ||
b2d4fbab | 193 | static const struct of_device_id socrates_nand_match[] = |
1b578193 WG |
194 | { |
195 | { | |
196 | .compatible = "abb,socrates-nand", | |
197 | }, | |
198 | {}, | |
199 | }; | |
200 | ||
201 | MODULE_DEVICE_TABLE(of, socrates_nand_match); | |
202 | ||
1c48a5c9 | 203 | static struct platform_driver socrates_nand_driver = { |
4018294b GL |
204 | .driver = { |
205 | .name = "socrates_nand", | |
4018294b GL |
206 | .of_match_table = socrates_nand_match, |
207 | }, | |
1b578193 | 208 | .probe = socrates_nand_probe, |
5153b88c | 209 | .remove = socrates_nand_remove, |
1b578193 WG |
210 | }; |
211 | ||
f99640de | 212 | module_platform_driver(socrates_nand_driver); |
1b578193 WG |
213 | |
214 | MODULE_LICENSE("GPL"); | |
215 | MODULE_AUTHOR("Ilya Yanok"); | |
216 | MODULE_DESCRIPTION("NAND driver for Socrates board"); |