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Merge tag 'powerpc-4.6-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc...
[linux-2.6-block.git] / drivers / mtd / nand / r852.c
CommitLineData
67e054e9
ML		 1/*
2 * Copyright © 2009 - Maxim Levitsky
3 * driver for Ricoh xD readers
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/jiffies.h>
13#include <linux/workqueue.h>
14#include <linux/interrupt.h>
f696aa43 15#include <linux/pci.h>
67e054e9 16#include <linux/pci_ids.h>
ada49657 17#include <linux/delay.h>
05d71b46 18#include <linux/slab.h>
67e054e9
ML		 19#include <asm/byteorder.h>
20#include <linux/sched.h>
21#include "sm_common.h"
22#include "r852.h"
23
24
90ab5ee9 25static bool r852_enable_dma = 1;
ada49657
SR		 26module_param(r852_enable_dma, bool, S_IRUGO);
27MODULE_PARM_DESC(r852_enable_dma, "Enable usage of the DMA (default)");
67e054e9
ML		 28
29static int debug;
30module_param(debug, int, S_IRUGO | S_IWUSR);
31MODULE_PARM_DESC(debug, "Debug level (0-2)");
32
33/* read register */
34static inline uint8_t r852_read_reg(struct r852_device *dev, int address)
35{
36 uint8_t reg = readb(dev->mmio + address);
37 return reg;
38}
39
40/* write register */
41static inline void r852_write_reg(struct r852_device *dev,
42 int address, uint8_t value)
43{
44 writeb(value, dev->mmio + address);
45 mmiowb();
46}
47
48
49/* read dword sized register */
50static inline uint32_t r852_read_reg_dword(struct r852_device *dev, int address)
51{
52 uint32_t reg = le32_to_cpu(readl(dev->mmio + address));
53 return reg;
54}
55
56/* write dword sized register */
57static inline void r852_write_reg_dword(struct r852_device *dev,
58 int address, uint32_t value)
59{
60 writel(cpu_to_le32(value), dev->mmio + address);
61 mmiowb();
62}
63
64/* returns pointer to our private structure */
65static inline struct r852_device *r852_get_dev(struct mtd_info *mtd)
66{
4bd4ebcc 67 struct nand_chip *chip = mtd_to_nand(mtd);
d699ed25 68 return nand_get_controller_data(chip);
67e054e9
ML		 69}
70
71
72/* check if controller supports dma */
73static void r852_dma_test(struct r852_device *dev)
74{
75 dev->dma_usable = (r852_read_reg(dev, R852_DMA_CAP) &
76 (R852_DMA1 | R852_DMA2)) == (R852_DMA1 | R852_DMA2);
77
78 if (!dev->dma_usable)
79 message("Non dma capable device detected, dma disabled");
80
ada49657 81 if (!r852_enable_dma) {
67e054e9
ML		 82 message("disabling dma on user request");
83 dev->dma_usable = 0;
84 }
85}
86
87/*
88 * Enable dma. Enables ether first or second stage of the DMA,
89 * Expects dev->dma_dir and dev->dma_state be set
90 */
91static void r852_dma_enable(struct r852_device *dev)
92{
93 uint8_t dma_reg, dma_irq_reg;
94
95 /* Set up dma settings */
96 dma_reg = r852_read_reg_dword(dev, R852_DMA_SETTINGS);
97 dma_reg &= ~(R852_DMA_READ | R852_DMA_INTERNAL | R852_DMA_MEMORY);
98
99 if (dev->dma_dir)
100 dma_reg |= R852_DMA_READ;
101
fb45d323 102 if (dev->dma_state == DMA_INTERNAL) {
67e054e9 103 dma_reg |= R852_DMA_INTERNAL;
fb45d323
ML		 104 /* Precaution to make sure HW doesn't write */
105 /* to random kernel memory */
106 r852_write_reg_dword(dev, R852_DMA_ADDR,
107 cpu_to_le32(dev->phys_bounce_buffer));
108 } else {
67e054e9
ML		 109 dma_reg |= R852_DMA_MEMORY;
110 r852_write_reg_dword(dev, R852_DMA_ADDR,
111 cpu_to_le32(dev->phys_dma_addr));
112 }
113
fb45d323
ML		 114 /* Precaution: make sure write reached the device */
115 r852_read_reg_dword(dev, R852_DMA_ADDR);
116
67e054e9
ML		 117 r852_write_reg_dword(dev, R852_DMA_SETTINGS, dma_reg);
118
119 /* Set dma irq */
120 dma_irq_reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
121 r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
122 dma_irq_reg |
123 R852_DMA_IRQ_INTERNAL |
124 R852_DMA_IRQ_ERROR |
125 R852_DMA_IRQ_MEMORY);
126}
127
128/*
129 * Disable dma, called from the interrupt handler, which specifies
130 * success of the operation via 'error' argument
131 */
132static void r852_dma_done(struct r852_device *dev, int error)
133{
134 WARN_ON(dev->dma_stage == 0);
135
136 r852_write_reg_dword(dev, R852_DMA_IRQ_STA,
137 r852_read_reg_dword(dev, R852_DMA_IRQ_STA));
138
139 r852_write_reg_dword(dev, R852_DMA_SETTINGS, 0);
140 r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, 0);
141
fb45d323
ML		 142 /* Precaution to make sure HW doesn't write to random kernel memory */
143 r852_write_reg_dword(dev, R852_DMA_ADDR,
144 cpu_to_le32(dev->phys_bounce_buffer));
145 r852_read_reg_dword(dev, R852_DMA_ADDR);
146
67e054e9
ML		 147 dev->dma_error = error;
148 dev->dma_stage = 0;
149
150 if (dev->phys_dma_addr && dev->phys_dma_addr != dev->phys_bounce_buffer)
151 pci_unmap_single(dev->pci_dev, dev->phys_dma_addr, R852_DMA_LEN,
152 dev->dma_dir ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
67e054e9
ML		 153}
154
155/*
156 * Wait, till dma is done, which includes both phases of it
157 */
158static int r852_dma_wait(struct r852_device *dev)
159{
160 long timeout = wait_for_completion_timeout(&dev->dma_done,
161 msecs_to_jiffies(1000));
162 if (!timeout) {
163 dbg("timeout waiting for DMA interrupt");
164 return -ETIMEDOUT;
165 }
166
167 return 0;
168}
169
170/*
171 * Read/Write one page using dma. Only pages can be read (512 bytes)
172*/
173static void r852_do_dma(struct r852_device *dev, uint8_t *buf, int do_read)
174{
175 int bounce = 0;
176 unsigned long flags;
177 int error;
178
179 dev->dma_error = 0;
180
181 /* Set dma direction */
182 dev->dma_dir = do_read;
183 dev->dma_stage = 1;
16735d02 184 reinit_completion(&dev->dma_done);
67e054e9
ML		 185
186 dbg_verbose("doing dma %s ", do_read ? "read" : "write");
187
25985edc 188 /* Set initial dma state: for reading first fill on board buffer,
67e054e9
ML		 189 from device, for writes first fill the buffer from memory*/
190 dev->dma_state = do_read ? DMA_INTERNAL : DMA_MEMORY;
191
192 /* if incoming buffer is not page aligned, we should do bounce */
193 if ((unsigned long)buf & (R852_DMA_LEN-1))
194 bounce = 1;
195
196 if (!bounce) {
197 dev->phys_dma_addr = pci_map_single(dev->pci_dev, (void *)buf,
198 R852_DMA_LEN,
199 (do_read ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE));
200
0c82d3ce 201 if (pci_dma_mapping_error(dev->pci_dev, dev->phys_dma_addr))
67e054e9
ML		 202 bounce = 1;
203 }
204
205 if (bounce) {
206 dbg_verbose("dma: using bounce buffer");
207 dev->phys_dma_addr = dev->phys_bounce_buffer;
208 if (!do_read)
209 memcpy(dev->bounce_buffer, buf, R852_DMA_LEN);
210 }
211
212 /* Enable DMA */
213 spin_lock_irqsave(&dev->irqlock, flags);
214 r852_dma_enable(dev);
215 spin_unlock_irqrestore(&dev->irqlock, flags);
216
217 /* Wait till complete */
218 error = r852_dma_wait(dev);
219
220 if (error) {
221 r852_dma_done(dev, error);
222 return;
223 }
224
225 if (do_read && bounce)
226 memcpy((void *)buf, dev->bounce_buffer, R852_DMA_LEN);
227}
228
229/*
230 * Program data lines of the nand chip to send data to it
231 */
2fffc798 232static void r852_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
67e054e9
ML		 233{
234 struct r852_device *dev = r852_get_dev(mtd);
235 uint32_t reg;
236
237 /* Don't allow any access to hardware if we suspect card removal */
238 if (dev->card_unstable)
239 return;
240
241 /* Special case for whole sector read */
242 if (len == R852_DMA_LEN && dev->dma_usable) {
243 r852_do_dma(dev, (uint8_t *)buf, 0);
244 return;
245 }
246
247 /* write DWORD chinks - faster */
ab7f6fce 248 while (len >= 4) {
67e054e9
ML		 249 reg = buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24;
250 r852_write_reg_dword(dev, R852_DATALINE, reg);
251 buf += 4;
252 len -= 4;
253
254 }
255
256 /* write rest */
ab7f6fce 257 while (len > 0) {
67e054e9 258 r852_write_reg(dev, R852_DATALINE, *buf++);
ab7f6fce
BN		 259 len--;
260 }
67e054e9
ML		 261}
262
263/*
264 * Read data lines of the nand chip to retrieve data
265 */
2fffc798 266static void r852_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
67e054e9
ML		 267{
268 struct r852_device *dev = r852_get_dev(mtd);
269 uint32_t reg;
270
271 if (dev->card_unstable) {
272 /* since we can't signal error here, at least, return
273 predictable buffer */
274 memset(buf, 0, len);
275 return;
276 }
277
278 /* special case for whole sector read */
279 if (len == R852_DMA_LEN && dev->dma_usable) {
280 r852_do_dma(dev, buf, 1);
281 return;
282 }
283
284 /* read in dword sized chunks */
285 while (len >= 4) {
286
287 reg = r852_read_reg_dword(dev, R852_DATALINE);
288 *buf++ = reg & 0xFF;
289 *buf++ = (reg >> 8) & 0xFF;
290 *buf++ = (reg >> 16) & 0xFF;
291 *buf++ = (reg >> 24) & 0xFF;
292 len -= 4;
293 }
294
295 /* read the reset by bytes */
296 while (len--)
297 *buf++ = r852_read_reg(dev, R852_DATALINE);
298}
299
300/*
301 * Read one byte from nand chip
302 */
303static uint8_t r852_read_byte(struct mtd_info *mtd)
304{
305 struct r852_device *dev = r852_get_dev(mtd);
306
307 /* Same problem as in r852_read_buf.... */
308 if (dev->card_unstable)
309 return 0;
310
311 return r852_read_reg(dev, R852_DATALINE);
312}
313
67e054e9
ML		 314/*
315 * Control several chip lines & send commands
316 */
2fffc798 317static void r852_cmdctl(struct mtd_info *mtd, int dat, unsigned int ctrl)
67e054e9
ML		 318{
319 struct r852_device *dev = r852_get_dev(mtd);
320
321 if (dev->card_unstable)
322 return;
323
324 if (ctrl & NAND_CTRL_CHANGE) {
325
326 dev->ctlreg &= ~(R852_CTL_DATA | R852_CTL_COMMAND |
327 R852_CTL_ON | R852_CTL_CARDENABLE);
328
329 if (ctrl & NAND_ALE)
330 dev->ctlreg |= R852_CTL_DATA;
331
332 if (ctrl & NAND_CLE)
333 dev->ctlreg |= R852_CTL_COMMAND;
334
335 if (ctrl & NAND_NCE)
336 dev->ctlreg |= (R852_CTL_CARDENABLE | R852_CTL_ON);
337 else
338 dev->ctlreg &= ~R852_CTL_WRITE;
339
340 /* when write is stareted, enable write access */
341 if (dat == NAND_CMD_ERASE1)
342 dev->ctlreg |= R852_CTL_WRITE;
343
344 r852_write_reg(dev, R852_CTL, dev->ctlreg);
345 }
346
347 /* HACK: NAND_CMD_SEQIN is called without NAND_CTRL_CHANGE, but we need
348 to set write mode */
349 if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) {
350 dev->ctlreg |= R852_CTL_WRITE;
351 r852_write_reg(dev, R852_CTL, dev->ctlreg);
352 }
353
354 if (dat != NAND_CMD_NONE)
355 r852_write_reg(dev, R852_DATALINE, dat);
356}
357
358/*
359 * Wait till card is ready.
360 * based on nand_wait, but returns errors on DMA error
361 */
2fffc798 362static int r852_wait(struct mtd_info *mtd, struct nand_chip *chip)
67e054e9 363{
d699ed25 364 struct r852_device *dev = nand_get_controller_data(chip);
67e054e9
ML		 365
366 unsigned long timeout;
367 int status;
368
369 timeout = jiffies + (chip->state == FL_ERASING ?
370 msecs_to_jiffies(400) : msecs_to_jiffies(20));
371
372 while (time_before(jiffies, timeout))
373 if (chip->dev_ready(mtd))
374 break;
375
376 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
377 status = (int)chip->read_byte(mtd);
378
379 /* Unfortunelly, no way to send detailed error status... */
380 if (dev->dma_error) {
381 status |= NAND_STATUS_FAIL;
382 dev->dma_error = 0;
383 }
384 return status;
385}
386
387/*
388 * Check if card is ready
389 */
390
2fffc798 391static int r852_ready(struct mtd_info *mtd)
67e054e9
ML		 392{
393 struct r852_device *dev = r852_get_dev(mtd);
394 return !(r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_BUSY);
395}
396
397
398/*
399 * Set ECC engine mode
400*/
401
2fffc798 402static void r852_ecc_hwctl(struct mtd_info *mtd, int mode)
67e054e9
ML		 403{
404 struct r852_device *dev = r852_get_dev(mtd);
405
406 if (dev->card_unstable)
407 return;
408
409 switch (mode) {
410 case NAND_ECC_READ:
411 case NAND_ECC_WRITE:
412 /* enable ecc generation/check*/
413 dev->ctlreg |= R852_CTL_ECC_ENABLE;
414
415 /* flush ecc buffer */
416 r852_write_reg(dev, R852_CTL,
417 dev->ctlreg | R852_CTL_ECC_ACCESS);
418
419 r852_read_reg_dword(dev, R852_DATALINE);
420 r852_write_reg(dev, R852_CTL, dev->ctlreg);
421 return;
422
423 case NAND_ECC_READSYN:
424 /* disable ecc generation */
425 dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
426 r852_write_reg(dev, R852_CTL, dev->ctlreg);
427 }
428}
429
430/*
431 * Calculate ECC, only used for writes
432 */
433
2fffc798 434static int r852_ecc_calculate(struct mtd_info *mtd, const uint8_t *dat,
67e054e9
ML		 435 uint8_t *ecc_code)
436{
437 struct r852_device *dev = r852_get_dev(mtd);
438 struct sm_oob *oob = (struct sm_oob *)ecc_code;
439 uint32_t ecc1, ecc2;
440
441 if (dev->card_unstable)
442 return 0;
443
444 dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
445 r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
446
447 ecc1 = r852_read_reg_dword(dev, R852_DATALINE);
448 ecc2 = r852_read_reg_dword(dev, R852_DATALINE);
449
450 oob->ecc1[0] = (ecc1) & 0xFF;
451 oob->ecc1[1] = (ecc1 >> 8) & 0xFF;
452 oob->ecc1[2] = (ecc1 >> 16) & 0xFF;
453
454 oob->ecc2[0] = (ecc2) & 0xFF;
455 oob->ecc2[1] = (ecc2 >> 8) & 0xFF;
456 oob->ecc2[2] = (ecc2 >> 16) & 0xFF;
457
458 r852_write_reg(dev, R852_CTL, dev->ctlreg);
459 return 0;
460}
461
462/*
463 * Correct the data using ECC, hw did almost everything for us
464 */
465
2fffc798 466static int r852_ecc_correct(struct mtd_info *mtd, uint8_t *dat,
67e054e9
ML		 467 uint8_t *read_ecc, uint8_t *calc_ecc)
468{
cef1ed9c 469 uint32_t ecc_reg;
67e054e9
ML		 470 uint8_t ecc_status, err_byte;
471 int i, error = 0;
472
473 struct r852_device *dev = r852_get_dev(mtd);
474
475 if (dev->card_unstable)
476 return 0;
477
9489be8c
ML		 478 if (dev->dma_error) {
479 dev->dma_error = 0;
6e941192 480 return -EIO;
9489be8c
ML		 481 }
482
67e054e9
ML		 483 r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
484 ecc_reg = r852_read_reg_dword(dev, R852_DATALINE);
485 r852_write_reg(dev, R852_CTL, dev->ctlreg);
486
487 for (i = 0 ; i <= 1 ; i++) {
488
489 ecc_status = (ecc_reg >> 8) & 0xFF;
490
491 /* ecc uncorrectable error */
492 if (ecc_status & R852_ECC_FAIL) {
493 dbg("ecc: unrecoverable error, in half %d", i);
6e941192 494 error = -EBADMSG;
67e054e9
ML		 495 goto exit;
496 }
497
498 /* correctable error */
499 if (ecc_status & R852_ECC_CORRECTABLE) {
500
501 err_byte = ecc_reg & 0xFF;
502 dbg("ecc: recoverable error, "
503 "in half %d, byte %d, bit %d", i,
504 err_byte, ecc_status & R852_ECC_ERR_BIT_MSK);
505
506 dat[err_byte] ^=
507 1 << (ecc_status & R852_ECC_ERR_BIT_MSK);
508 error++;
509 }
510
511 dat += 256;
512 ecc_reg >>= 16;
513 }
514exit:
515 return error;
516}
517
518/*
519 * This is copy of nand_read_oob_std
520 * nand_read_oob_syndrome assumes we can send column address - we can't
521 */
522static int r852_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
5c2ffb11 523 int page)
67e054e9 524{
5c2ffb11 525 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
67e054e9 526 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
5c2ffb11 527 return 0;
67e054e9
ML		 528}
529
530/*
531 * Start the nand engine
532 */
533
2fffc798 534static void r852_engine_enable(struct r852_device *dev)
67e054e9
ML		 535{
536 if (r852_read_reg_dword(dev, R852_HW) & R852_HW_UNKNOWN) {
537 r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
538 r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
539 } else {
540 r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
541 r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
542 }
543 msleep(300);
544 r852_write_reg(dev, R852_CTL, 0);
545}
546
547
548/*
549 * Stop the nand engine
550 */
551
2fffc798 552static void r852_engine_disable(struct r852_device *dev)
67e054e9
ML		 553{
554 r852_write_reg_dword(dev, R852_HW, 0);
555 r852_write_reg(dev, R852_CTL, R852_CTL_RESET);
556}
557
558/*
559 * Test if card is present
560 */
561
2fffc798 562static void r852_card_update_present(struct r852_device *dev)
67e054e9
ML		 563{
564 unsigned long flags;
565 uint8_t reg;
566
567 spin_lock_irqsave(&dev->irqlock, flags);
568 reg = r852_read_reg(dev, R852_CARD_STA);
569 dev->card_detected = !!(reg & R852_CARD_STA_PRESENT);
570 spin_unlock_irqrestore(&dev->irqlock, flags);
571}
572
573/*
574 * Update card detection IRQ state according to current card state
575 * which is read in r852_card_update_present
576 */
2fffc798 577static void r852_update_card_detect(struct r852_device *dev)
67e054e9
ML		 578{
579 int card_detect_reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
fb45d323 580 dev->card_unstable = 0;
67e054e9
ML		 581
582 card_detect_reg &= ~(R852_CARD_IRQ_REMOVE | R852_CARD_IRQ_INSERT);
583 card_detect_reg |= R852_CARD_IRQ_GENABLE;
584
585 card_detect_reg |= dev->card_detected ?
586 R852_CARD_IRQ_REMOVE : R852_CARD_IRQ_INSERT;
587
588 r852_write_reg(dev, R852_CARD_IRQ_ENABLE, card_detect_reg);
589}
590
2fffc798
JH		 591static ssize_t r852_media_type_show(struct device *sys_dev,
592 struct device_attribute *attr, char *buf)
67e054e9
ML		 593{
594 struct mtd_info *mtd = container_of(sys_dev, struct mtd_info, dev);
595 struct r852_device *dev = r852_get_dev(mtd);
596 char *data = dev->sm ? "smartmedia" : "xd";
597
598 strcpy(buf, data);
599 return strlen(data);
600}
601
2fffc798 602static DEVICE_ATTR(media_type, S_IRUGO, r852_media_type_show, NULL);
67e054e9
ML		 603
604
605/* Detect properties of card in slot */
2fffc798 606static void r852_update_media_status(struct r852_device *dev)
67e054e9
ML		 607{
608 uint8_t reg;
609 unsigned long flags;
610 int readonly;
611
612 spin_lock_irqsave(&dev->irqlock, flags);
613 if (!dev->card_detected) {
614 message("card removed");
615 spin_unlock_irqrestore(&dev->irqlock, flags);
616 return ;
617 }
618
619 readonly = r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_RO;
620 reg = r852_read_reg(dev, R852_DMA_CAP);
621 dev->sm = (reg & (R852_DMA1 | R852_DMA2)) && (reg & R852_SMBIT);
622
623 message("detected %s %s card in slot",
624 dev->sm ? "SmartMedia" : "xD",
625 readonly ? "readonly" : "writeable");
626
627 dev->readonly = readonly;
628 spin_unlock_irqrestore(&dev->irqlock, flags);
629}
630
631/*
632 * Register the nand device
633 * Called when the card is detected
634 */
2fffc798 635static int r852_register_nand_device(struct r852_device *dev)
67e054e9 636{
de9f56f9 637 struct mtd_info *mtd = nand_to_mtd(dev->chip);
67e054e9
ML		 638
639 WARN_ON(dev->card_registred);
640
de9f56f9 641 mtd->dev.parent = &dev->pci_dev->dev;
67e054e9
ML		 642
643 if (dev->readonly)
644 dev->chip->options |= NAND_ROM;
645
646 r852_engine_enable(dev);
647
de9f56f9
BB		 648 if (sm_register_device(mtd, dev->sm))
649 goto error1;
67e054e9 650
de9f56f9 651 if (device_create_file(&mtd->dev, &dev_attr_media_type)) {
133fa8c7 652 message("can't create media type sysfs attribute");
905cce7f
RW		 653 goto error3;
654 }
133fa8c7 655
67e054e9
ML		 656 dev->card_registred = 1;
657 return 0;
905cce7f 658error3:
de9f56f9 659 nand_release(mtd);
67e054e9
ML		 660error1:
661 /* Force card redetect */
662 dev->card_detected = 0;
663 return -1;
664}
665
666/*
667 * Unregister the card
668 */
669
2fffc798 670static void r852_unregister_nand_device(struct r852_device *dev)
67e054e9 671{
de9f56f9
BB		 672 struct mtd_info *mtd = nand_to_mtd(dev->chip);
673
67e054e9
ML		 674 if (!dev->card_registred)
675 return;
676
de9f56f9
BB		 677 device_remove_file(&mtd->dev, &dev_attr_media_type);
678 nand_release(mtd);
67e054e9
ML		 679 r852_engine_disable(dev);
680 dev->card_registred = 0;
67e054e9
ML		 681}
682
683/* Card state updater */
2fffc798 684static void r852_card_detect_work(struct work_struct *work)
67e054e9
ML		 685{
686 struct r852_device *dev =
687 container_of(work, struct r852_device, card_detect_work.work);
688
fb45d323 689 r852_card_update_present(dev);
ac373f7e 690 r852_update_card_detect(dev);
67e054e9
ML		 691 dev->card_unstable = 0;
692
fb45d323 693 /* False alarm */
67e054e9
ML		 694 if (dev->card_detected == dev->card_registred)
695 goto exit;
696
697 /* Read media properties */
698 r852_update_media_status(dev);
699
700 /* Register the card */
701 if (dev->card_detected)
702 r852_register_nand_device(dev);
703 else
704 r852_unregister_nand_device(dev);
705exit:
67e054e9
ML		 706 r852_update_card_detect(dev);
707}
708
709/* Ack + disable IRQ generation */
710static void r852_disable_irqs(struct r852_device *dev)
711{
712 uint8_t reg;
713 reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
714 r852_write_reg(dev, R852_CARD_IRQ_ENABLE, reg & ~R852_CARD_IRQ_MASK);
715
716 reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
717 r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
718 reg & ~R852_DMA_IRQ_MASK);
719
720 r852_write_reg(dev, R852_CARD_IRQ_STA, R852_CARD_IRQ_MASK);
721 r852_write_reg_dword(dev, R852_DMA_IRQ_STA, R852_DMA_IRQ_MASK);
722}
723
724/* Interrupt handler */
725static irqreturn_t r852_irq(int irq, void *data)
726{
727 struct r852_device *dev = (struct r852_device *)data;
728
729 uint8_t card_status, dma_status;
730 unsigned long flags;
731 irqreturn_t ret = IRQ_NONE;
732
733 spin_lock_irqsave(&dev->irqlock, flags);
734
67e054e9
ML		 735 /* handle card detection interrupts first */
736 card_status = r852_read_reg(dev, R852_CARD_IRQ_STA);
737 r852_write_reg(dev, R852_CARD_IRQ_STA, card_status);
738
739 if (card_status & (R852_CARD_IRQ_INSERT|R852_CARD_IRQ_REMOVE)) {
740
741 ret = IRQ_HANDLED;
742 dev->card_detected = !!(card_status & R852_CARD_IRQ_INSERT);
743
25985edc 744 /* we shouldn't receive any interrupts if we wait for card
67e054e9
ML		 745 to settle */
746 WARN_ON(dev->card_unstable);
747
748 /* disable irqs while card is unstable */
749 /* this will timeout DMA if active, but better that garbage */
750 r852_disable_irqs(dev);
751
752 if (dev->card_unstable)
753 goto out;
754
755 /* let, card state to settle a bit, and then do the work */
756 dev->card_unstable = 1;
757 queue_delayed_work(dev->card_workqueue,
758 &dev->card_detect_work, msecs_to_jiffies(100));
759 goto out;
760 }
761
762
763 /* Handle dma interrupts */
764 dma_status = r852_read_reg_dword(dev, R852_DMA_IRQ_STA);
765 r852_write_reg_dword(dev, R852_DMA_IRQ_STA, dma_status);
766
767 if (dma_status & R852_DMA_IRQ_MASK) {
768
769 ret = IRQ_HANDLED;
770
771 if (dma_status & R852_DMA_IRQ_ERROR) {
25985edc 772 dbg("received dma error IRQ");
67e054e9 773 r852_dma_done(dev, -EIO);
9489be8c 774 complete(&dev->dma_done);
67e054e9
ML		 775 goto out;
776 }
777
25985edc 778 /* received DMA interrupt out of nowhere? */
67e054e9
ML		 779 WARN_ON_ONCE(dev->dma_stage == 0);
780
781 if (dev->dma_stage == 0)
782 goto out;
783
784 /* done device access */
785 if (dev->dma_state == DMA_INTERNAL &&
786 (dma_status & R852_DMA_IRQ_INTERNAL)) {
787
788 dev->dma_state = DMA_MEMORY;
789 dev->dma_stage++;
790 }
791
792 /* done memory DMA */
793 if (dev->dma_state == DMA_MEMORY &&
794 (dma_status & R852_DMA_IRQ_MEMORY)) {
795 dev->dma_state = DMA_INTERNAL;
796 dev->dma_stage++;
797 }
798
799 /* Enable 2nd half of dma dance */
800 if (dev->dma_stage == 2)
801 r852_dma_enable(dev);
802
803 /* Operation done */
9489be8c 804 if (dev->dma_stage == 3) {
67e054e9 805 r852_dma_done(dev, 0);
9489be8c
ML		 806 complete(&dev->dma_done);
807 }
67e054e9
ML		 808 goto out;
809 }
810
811 /* Handle unknown interrupts */
812 if (dma_status)
813 dbg("bad dma IRQ status = %x", dma_status);
814
815 if (card_status & ~R852_CARD_STA_CD)
816 dbg("strange card status = %x", card_status);
817
818out:
819 spin_unlock_irqrestore(&dev->irqlock, flags);
820 return ret;
821}
822
2fffc798 823static int r852_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
67e054e9
ML		 824{
825 int error;
826 struct nand_chip *chip;
827 struct r852_device *dev;
828
829 /* pci initialization */
830 error = pci_enable_device(pci_dev);
831
832 if (error)
833 goto error1;
834
835 pci_set_master(pci_dev);
836
133fa8c7 837 error = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
67e054e9
ML		 838 if (error)
839 goto error2;
840
841 error = pci_request_regions(pci_dev, DRV_NAME);
842
843 if (error)
844 goto error3;
845
846 error = -ENOMEM;
847
848 /* init nand chip, but register it only on card insert */
849 chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
850
851 if (!chip)
852 goto error4;
853
854 /* commands */
855 chip->cmd_ctrl = r852_cmdctl;
856 chip->waitfunc = r852_wait;
857 chip->dev_ready = r852_ready;
858
859 /* I/O */
860 chip->read_byte = r852_read_byte;
861 chip->read_buf = r852_read_buf;
862 chip->write_buf = r852_write_buf;
67e054e9
ML		 863
864 /* ecc */
865 chip->ecc.mode = NAND_ECC_HW_SYNDROME;
866 chip->ecc.size = R852_DMA_LEN;
867 chip->ecc.bytes = SM_OOB_SIZE;
6a918bad 868 chip->ecc.strength = 2;
67e054e9
ML		 869 chip->ecc.hwctl = r852_ecc_hwctl;
870 chip->ecc.calculate = r852_ecc_calculate;
871 chip->ecc.correct = r852_ecc_correct;
872
873 /* TODO: hack */
874 chip->ecc.read_oob = r852_read_oob;
875
876 /* init our device structure */
877 dev = kzalloc(sizeof(struct r852_device), GFP_KERNEL);
878
879 if (!dev)
880 goto error5;
881
d699ed25 882 nand_set_controller_data(chip, dev);
67e054e9
ML		 883 dev->chip = chip;
884 dev->pci_dev = pci_dev;
885 pci_set_drvdata(pci_dev, dev);
886
887 dev->bounce_buffer = pci_alloc_consistent(pci_dev, R852_DMA_LEN,
888 &dev->phys_bounce_buffer);
889
890 if (!dev->bounce_buffer)
891 goto error6;
892
893
894 error = -ENODEV;
895 dev->mmio = pci_ioremap_bar(pci_dev, 0);
896
897 if (!dev->mmio)
898 goto error7;
899
900 error = -ENOMEM;
901 dev->tmp_buffer = kzalloc(SM_SECTOR_SIZE, GFP_KERNEL);
902
903 if (!dev->tmp_buffer)
904 goto error8;
905
906 init_completion(&dev->dma_done);
907
58a69cb4 908 dev->card_workqueue = create_freezable_workqueue(DRV_NAME);
67e054e9
ML		 909
910 if (!dev->card_workqueue)
911 goto error9;
912
913 INIT_DELAYED_WORK(&dev->card_detect_work, r852_card_detect_work);
914
915 /* shutdown everything - precation */
916 r852_engine_disable(dev);
917 r852_disable_irqs(dev);
918
919 r852_dma_test(dev);
920
cc1fed00
ML		 921 dev->irq = pci_dev->irq;
922 spin_lock_init(&dev->irqlock);
923
924 dev->card_detected = 0;
925 r852_card_update_present(dev);
926
67e054e9
ML		 927 /*register irq handler*/
928 error = -ENODEV;
929 if (request_irq(pci_dev->irq, &r852_irq, IRQF_SHARED,
930 DRV_NAME, dev))
931 goto error10;
932
67e054e9 933 /* kick initial present test */
67e054e9
ML		 934 queue_delayed_work(dev->card_workqueue,
935 &dev->card_detect_work, 0);
936
937
25985edc 938 printk(KERN_NOTICE DRV_NAME ": driver loaded successfully\n");
67e054e9
ML		 939 return 0;
940
941error10:
942 destroy_workqueue(dev->card_workqueue);
943error9:
944 kfree(dev->tmp_buffer);
945error8:
946 pci_iounmap(pci_dev, dev->mmio);
947error7:
948 pci_free_consistent(pci_dev, R852_DMA_LEN,
949 dev->bounce_buffer, dev->phys_bounce_buffer);
950error6:
951 kfree(dev);
952error5:
953 kfree(chip);
954error4:
955 pci_release_regions(pci_dev);
956error3:
957error2:
958 pci_disable_device(pci_dev);
959error1:
960 return error;
961}
962
2fffc798 963static void r852_remove(struct pci_dev *pci_dev)
67e054e9
ML		 964{
965 struct r852_device *dev = pci_get_drvdata(pci_dev);
966
967 /* Stop detect workqueue -
968 we are going to unregister the device anyway*/
969 cancel_delayed_work_sync(&dev->card_detect_work);
970 destroy_workqueue(dev->card_workqueue);
971
972 /* Unregister the device, this might make more IO */
973 r852_unregister_nand_device(dev);
974
975 /* Stop interrupts */
976 r852_disable_irqs(dev);
67e054e9
ML		 977 free_irq(dev->irq, dev);
978
979 /* Cleanup */
980 kfree(dev->tmp_buffer);
981 pci_iounmap(pci_dev, dev->mmio);
982 pci_free_consistent(pci_dev, R852_DMA_LEN,
983 dev->bounce_buffer, dev->phys_bounce_buffer);
984
985 kfree(dev->chip);
986 kfree(dev);
987
988 /* Shutdown the PCI device */
989 pci_release_regions(pci_dev);
990 pci_disable_device(pci_dev);
991}
992
2fffc798 993static void r852_shutdown(struct pci_dev *pci_dev)
67e054e9
ML		 994{
995 struct r852_device *dev = pci_get_drvdata(pci_dev);
996
997 cancel_delayed_work_sync(&dev->card_detect_work);
998 r852_disable_irqs(dev);
999 synchronize_irq(dev->irq);
1000 pci_disable_device(pci_dev);
1001}
1002
b87c92c1 1003#ifdef CONFIG_PM_SLEEP
1bba688b 1004static int r852_suspend(struct device *device)
67e054e9
ML		 1005{
1006 struct r852_device *dev = pci_get_drvdata(to_pci_dev(device));
67e054e9
ML		 1007
1008 if (dev->ctlreg & R852_CTL_CARDENABLE)
1009 return -EBUSY;
1010
1011 /* First make sure the detect work is gone */
1012 cancel_delayed_work_sync(&dev->card_detect_work);
1013
1014 /* Turn off the interrupts and stop the device */
1015 r852_disable_irqs(dev);
1016 r852_engine_disable(dev);
1017
67e054e9
ML		 1018 /* If card was pulled off just during the suspend, which is very
1019 unlikely, we will remove it on resume, it too late now
1020 anyway... */
1021 dev->card_unstable = 0;
9bf70717 1022 return 0;
67e054e9
ML		 1023}
1024
1bba688b 1025static int r852_resume(struct device *device)
67e054e9
ML		 1026{
1027 struct r852_device *dev = pci_get_drvdata(to_pci_dev(device));
de9f56f9 1028 struct mtd_info *mtd = nand_to_mtd(dev->chip);
67e054e9
ML		 1029
1030 r852_disable_irqs(dev);
1031 r852_card_update_present(dev);
1032 r852_engine_disable(dev);
1033
1034
67e054e9
ML		 1035 /* If card status changed, just do the work */
1036 if (dev->card_detected != dev->card_registred) {
1037 dbg("card was %s during low power state",
1038 dev->card_detected ? "added" : "removed");
1039
1040 queue_delayed_work(dev->card_workqueue,
9489be8c 1041 &dev->card_detect_work, msecs_to_jiffies(1000));
67e054e9
ML		 1042 return 0;
1043 }
1044
1045 /* Otherwise, initialize the card */
1046 if (dev->card_registred) {
1047 r852_engine_enable(dev);
de9f56f9
BB		 1048 dev->chip->select_chip(mtd, 0);
1049 dev->chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
1050 dev->chip->select_chip(mtd, -1);
67e054e9
ML		 1051 }
1052
1053 /* Program card detection IRQ */
1054 r852_update_card_detect(dev);
1055 return 0;
1056}
b2aaf7a2 1057#endif
67e054e9
ML		 1058
1059static const struct pci_device_id r852_pci_id_tbl[] = {
1060
d4080cb3 1061 { PCI_VDEVICE(RICOH, 0x0852), },
67e054e9
ML		 1062 { },
1063};
1064
1065MODULE_DEVICE_TABLE(pci, r852_pci_id_tbl);
1066
1bba688b 1067static SIMPLE_DEV_PM_OPS(r852_pm_ops, r852_suspend, r852_resume);
67e054e9 1068
67e054e9
ML		 1069static struct pci_driver r852_pci_driver = {
1070 .name = DRV_NAME,
1071 .id_table = r852_pci_id_tbl,
1072 .probe = r852_probe,
1073 .remove = r852_remove,
1074 .shutdown = r852_shutdown,
1075 .driver.pm = &r852_pm_ops,
1076};
1077
4d16cd65 1078module_pci_driver(r852_pci_driver);
67e054e9
ML		 1079
1080MODULE_LICENSE("GPL");
1081MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>");
1082MODULE_DESCRIPTION("Ricoh 85xx xD/smartmedia card reader driver");
Linux 6.x block layer and io_uring tree(s)