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846fc31d EM |
1 | /* |
2 | * Copyright (C) 2006-2007 PA Semi, Inc | |
3 | * | |
4 | * Author: Egor Martovetsky <egor@pasemi.com> | |
5 | * Maintained by: Olof Johansson <olof@lixom.net> | |
6 | * | |
7 | * Driver for the PWRficient onchip NAND flash interface | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | */ | |
22 | ||
23 | #undef DEBUG | |
24 | ||
25 | #include <linux/slab.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/module.h> | |
28 | #include <linux/mtd/mtd.h> | |
29 | #include <linux/mtd/nand.h> | |
30 | #include <linux/mtd/nand_ecc.h> | |
5af50730 RH |
31 | #include <linux/of_address.h> |
32 | #include <linux/of_irq.h> | |
846fc31d EM |
33 | #include <linux/of_platform.h> |
34 | #include <linux/platform_device.h> | |
35 | #include <linux/pci.h> | |
36 | ||
37 | #include <asm/io.h> | |
38 | ||
39 | #define LBICTRL_LPCCTL_NR 0x00004000 | |
40 | #define CLE_PIN_CTL 15 | |
41 | #define ALE_PIN_CTL 14 | |
42 | ||
43 | static unsigned int lpcctl; | |
44 | static struct mtd_info *pasemi_nand_mtd; | |
45 | static const char driver_name[] = "pasemi-nand"; | |
46 | ||
47 | static void pasemi_read_buf(struct mtd_info *mtd, u_char *buf, int len) | |
48 | { | |
49 | struct nand_chip *chip = mtd->priv; | |
50 | ||
51 | while (len > 0x800) { | |
52 | memcpy_fromio(buf, chip->IO_ADDR_R, 0x800); | |
53 | buf += 0x800; | |
54 | len -= 0x800; | |
55 | } | |
56 | memcpy_fromio(buf, chip->IO_ADDR_R, len); | |
57 | } | |
58 | ||
59 | static void pasemi_write_buf(struct mtd_info *mtd, const u_char *buf, int len) | |
60 | { | |
61 | struct nand_chip *chip = mtd->priv; | |
62 | ||
63 | while (len > 0x800) { | |
64 | memcpy_toio(chip->IO_ADDR_R, buf, 0x800); | |
65 | buf += 0x800; | |
66 | len -= 0x800; | |
67 | } | |
68 | memcpy_toio(chip->IO_ADDR_R, buf, len); | |
69 | } | |
70 | ||
71 | static void pasemi_hwcontrol(struct mtd_info *mtd, int cmd, | |
72 | unsigned int ctrl) | |
73 | { | |
74 | struct nand_chip *chip = mtd->priv; | |
75 | ||
76 | if (cmd == NAND_CMD_NONE) | |
77 | return; | |
78 | ||
79 | if (ctrl & NAND_CLE) | |
80 | out_8(chip->IO_ADDR_W + (1 << CLE_PIN_CTL), cmd); | |
81 | else | |
82 | out_8(chip->IO_ADDR_W + (1 << ALE_PIN_CTL), cmd); | |
83 | ||
84 | /* Push out posted writes */ | |
85 | eieio(); | |
86 | inl(lpcctl); | |
87 | } | |
88 | ||
89 | int pasemi_device_ready(struct mtd_info *mtd) | |
90 | { | |
91 | return !!(inl(lpcctl) & LBICTRL_LPCCTL_NR); | |
92 | } | |
93 | ||
06f25510 | 94 | static int pasemi_nand_probe(struct platform_device *ofdev) |
846fc31d EM |
95 | { |
96 | struct pci_dev *pdev; | |
61c7a080 | 97 | struct device_node *np = ofdev->dev.of_node; |
846fc31d EM |
98 | struct resource res; |
99 | struct nand_chip *chip; | |
100 | int err = 0; | |
101 | ||
102 | err = of_address_to_resource(np, 0, &res); | |
103 | ||
104 | if (err) | |
105 | return -EINVAL; | |
106 | ||
107 | /* We only support one device at the moment */ | |
108 | if (pasemi_nand_mtd) | |
109 | return -ENODEV; | |
110 | ||
23079f94 | 111 | pr_debug("pasemi_nand at %pR\n", &res); |
846fc31d EM |
112 | |
113 | /* Allocate memory for MTD device structure and private data */ | |
114 | pasemi_nand_mtd = kzalloc(sizeof(struct mtd_info) + | |
115 | sizeof(struct nand_chip), GFP_KERNEL); | |
116 | if (!pasemi_nand_mtd) { | |
117 | printk(KERN_WARNING | |
118 | "Unable to allocate PASEMI NAND MTD device structure\n"); | |
119 | err = -ENOMEM; | |
120 | goto out; | |
121 | } | |
122 | ||
123 | /* Get pointer to private data */ | |
124 | chip = (struct nand_chip *)&pasemi_nand_mtd[1]; | |
125 | ||
126 | /* Link the private data with the MTD structure */ | |
127 | pasemi_nand_mtd->priv = chip; | |
128 | pasemi_nand_mtd->owner = THIS_MODULE; | |
129 | ||
130 | chip->IO_ADDR_R = of_iomap(np, 0); | |
131 | chip->IO_ADDR_W = chip->IO_ADDR_R; | |
132 | ||
133 | if (!chip->IO_ADDR_R) { | |
134 | err = -EIO; | |
135 | goto out_mtd; | |
136 | } | |
137 | ||
138 | pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa008, NULL); | |
139 | if (!pdev) { | |
140 | err = -ENODEV; | |
141 | goto out_ior; | |
142 | } | |
143 | ||
144 | lpcctl = pci_resource_start(pdev, 0); | |
d9476298 | 145 | pci_dev_put(pdev); |
846fc31d EM |
146 | |
147 | if (!request_region(lpcctl, 4, driver_name)) { | |
148 | err = -EBUSY; | |
149 | goto out_ior; | |
150 | } | |
151 | ||
152 | chip->cmd_ctrl = pasemi_hwcontrol; | |
153 | chip->dev_ready = pasemi_device_ready; | |
154 | chip->read_buf = pasemi_read_buf; | |
155 | chip->write_buf = pasemi_write_buf; | |
156 | chip->chip_delay = 0; | |
157 | chip->ecc.mode = NAND_ECC_SOFT; | |
158 | ||
159 | /* Enable the following for a flash based bad block table */ | |
bb9ebd4e | 160 | chip->bbt_options = NAND_BBT_USE_FLASH; |
846fc31d | 161 | |
25985edc | 162 | /* Scan to find existence of the device */ |
846fc31d EM |
163 | if (nand_scan(pasemi_nand_mtd, 1)) { |
164 | err = -ENXIO; | |
165 | goto out_lpc; | |
166 | } | |
167 | ||
ee0e87b1 | 168 | if (mtd_device_register(pasemi_nand_mtd, NULL, 0)) { |
846fc31d EM |
169 | printk(KERN_ERR "pasemi_nand: Unable to register MTD device\n"); |
170 | err = -ENODEV; | |
171 | goto out_lpc; | |
172 | } | |
173 | ||
4712fff9 | 174 | printk(KERN_INFO "PA Semi NAND flash at %08llx, control at I/O %x\n", |
846fc31d EM |
175 | res.start, lpcctl); |
176 | ||
177 | return 0; | |
178 | ||
179 | out_lpc: | |
180 | release_region(lpcctl, 4); | |
181 | out_ior: | |
182 | iounmap(chip->IO_ADDR_R); | |
183 | out_mtd: | |
184 | kfree(pasemi_nand_mtd); | |
185 | out: | |
186 | return err; | |
187 | } | |
188 | ||
810b7e06 | 189 | static int pasemi_nand_remove(struct platform_device *ofdev) |
846fc31d EM |
190 | { |
191 | struct nand_chip *chip; | |
192 | ||
193 | if (!pasemi_nand_mtd) | |
194 | return 0; | |
195 | ||
196 | chip = pasemi_nand_mtd->priv; | |
197 | ||
198 | /* Release resources, unregister device */ | |
199 | nand_release(pasemi_nand_mtd); | |
200 | ||
201 | release_region(lpcctl, 4); | |
202 | ||
203 | iounmap(chip->IO_ADDR_R); | |
204 | ||
205 | /* Free the MTD device structure */ | |
206 | kfree(pasemi_nand_mtd); | |
207 | ||
208 | pasemi_nand_mtd = NULL; | |
209 | ||
210 | return 0; | |
211 | } | |
212 | ||
b2d4fbab | 213 | static const struct of_device_id pasemi_nand_match[] = |
846fc31d EM |
214 | { |
215 | { | |
216 | .compatible = "pasemi,localbus-nand", | |
217 | }, | |
218 | {}, | |
219 | }; | |
220 | ||
221 | MODULE_DEVICE_TABLE(of, pasemi_nand_match); | |
222 | ||
1c48a5c9 | 223 | static struct platform_driver pasemi_nand_driver = |
846fc31d | 224 | { |
4018294b GL |
225 | .driver = { |
226 | .name = (char*)driver_name, | |
227 | .owner = THIS_MODULE, | |
228 | .of_match_table = pasemi_nand_match, | |
229 | }, | |
846fc31d EM |
230 | .probe = pasemi_nand_probe, |
231 | .remove = pasemi_nand_remove, | |
232 | }; | |
233 | ||
f99640de | 234 | module_platform_driver(pasemi_nand_driver); |
846fc31d EM |
235 | |
236 | MODULE_LICENSE("GPL"); | |
237 | MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>"); | |
238 | MODULE_DESCRIPTION("NAND flash interface driver for PA Semi PWRficient"); |