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mtd: nandsim: remove unused code
[linux-2.6-block.git] / drivers / mtd / nand / nandsim.c
CommitLineData
1da177e4
LT		 1/*
2 * NAND flash simulator.
3 *
4 * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
5 *
61b03bd7 6 * Copyright (C) 2004 Nokia Corporation
1da177e4
LT		 7 *
8 * Note: NS means "NAND Simulator".
9 * Note: Input means input TO flash chip, output means output FROM chip.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2, or (at your option) any later
14 * version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
19 * Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
1da177e4
LT		 24 */
25
1da177e4
LT		 26#include <linux/init.h>
27#include <linux/types.h>
28#include <linux/module.h>
29#include <linux/moduleparam.h>
30#include <linux/vmalloc.h>
596fd462 31#include <linux/math64.h>
1da177e4
LT		 32#include <linux/slab.h>
33#include <linux/errno.h>
34#include <linux/string.h>
35#include <linux/mtd/mtd.h>
36#include <linux/mtd/nand.h>
fc2ff592 37#include <linux/mtd/nand_bch.h>
1da177e4
LT		 38#include <linux/mtd/partitions.h>
39#include <linux/delay.h>
2b77a0ed 40#include <linux/list.h>
514087e7 41#include <linux/random.h>
a5cce42f 42#include <linux/sched.h>
a9fc8991
AH		 43#include <linux/fs.h>
44#include <linux/pagemap.h>
5346c27c
EG		 45#include <linux/seq_file.h>
46#include <linux/debugfs.h>
1da177e4
LT		 47
48/* Default simulator parameters values */
49#if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE) || \
50 !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
51 !defined(CONFIG_NANDSIM_THIRD_ID_BYTE) || \
52 !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
53#define CONFIG_NANDSIM_FIRST_ID_BYTE 0x98
54#define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
55#define CONFIG_NANDSIM_THIRD_ID_BYTE 0xFF /* No byte */
56#define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
57#endif
58
59#ifndef CONFIG_NANDSIM_ACCESS_DELAY
60#define CONFIG_NANDSIM_ACCESS_DELAY 25
61#endif
62#ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
63#define CONFIG_NANDSIM_PROGRAMM_DELAY 200
64#endif
65#ifndef CONFIG_NANDSIM_ERASE_DELAY
66#define CONFIG_NANDSIM_ERASE_DELAY 2
67#endif
68#ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
69#define CONFIG_NANDSIM_OUTPUT_CYCLE 40
70#endif
71#ifndef CONFIG_NANDSIM_INPUT_CYCLE
72#define CONFIG_NANDSIM_INPUT_CYCLE 50
73#endif
74#ifndef CONFIG_NANDSIM_BUS_WIDTH
75#define CONFIG_NANDSIM_BUS_WIDTH 8
76#endif
77#ifndef CONFIG_NANDSIM_DO_DELAYS
78#define CONFIG_NANDSIM_DO_DELAYS 0
79#endif
80#ifndef CONFIG_NANDSIM_LOG
81#define CONFIG_NANDSIM_LOG 0
82#endif
83#ifndef CONFIG_NANDSIM_DBG
84#define CONFIG_NANDSIM_DBG 0
85#endif
e99e90ae
BH		 86#ifndef CONFIG_NANDSIM_MAX_PARTS
87#define CONFIG_NANDSIM_MAX_PARTS 32
88#endif
1da177e4
LT		 89
90static uint first_id_byte = CONFIG_NANDSIM_FIRST_ID_BYTE;
91static uint second_id_byte = CONFIG_NANDSIM_SECOND_ID_BYTE;
92static uint third_id_byte = CONFIG_NANDSIM_THIRD_ID_BYTE;
93static uint fourth_id_byte = CONFIG_NANDSIM_FOURTH_ID_BYTE;
94static uint access_delay = CONFIG_NANDSIM_ACCESS_DELAY;
95static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
96static uint erase_delay = CONFIG_NANDSIM_ERASE_DELAY;
97static uint output_cycle = CONFIG_NANDSIM_OUTPUT_CYCLE;
98static uint input_cycle = CONFIG_NANDSIM_INPUT_CYCLE;
99static uint bus_width = CONFIG_NANDSIM_BUS_WIDTH;
100static uint do_delays = CONFIG_NANDSIM_DO_DELAYS;
101static uint log = CONFIG_NANDSIM_LOG;
102static uint dbg = CONFIG_NANDSIM_DBG;
e99e90ae 103static unsigned long parts[CONFIG_NANDSIM_MAX_PARTS];
2b77a0ed 104static unsigned int parts_num;
514087e7
AH		 105static char *badblocks = NULL;
106static char *weakblocks = NULL;
107static char *weakpages = NULL;
108static unsigned int bitflips = 0;
109static char *gravepages = NULL;
a5ac8aeb 110static unsigned int overridesize = 0;
a9fc8991 111static char *cache_file = NULL;
ce85b79f 112static unsigned int bbt;
fc2ff592 113static unsigned int bch;
1da177e4
LT		 114
115module_param(first_id_byte, uint, 0400);
116module_param(second_id_byte, uint, 0400);
117module_param(third_id_byte, uint, 0400);
118module_param(fourth_id_byte, uint, 0400);
119module_param(access_delay, uint, 0400);
120module_param(programm_delay, uint, 0400);
121module_param(erase_delay, uint, 0400);
122module_param(output_cycle, uint, 0400);
123module_param(input_cycle, uint, 0400);
124module_param(bus_width, uint, 0400);
125module_param(do_delays, uint, 0400);
126module_param(log, uint, 0400);
127module_param(dbg, uint, 0400);
2b77a0ed 128module_param_array(parts, ulong, &parts_num, 0400);
514087e7
AH		 129module_param(badblocks, charp, 0400);
130module_param(weakblocks, charp, 0400);
131module_param(weakpages, charp, 0400);
132module_param(bitflips, uint, 0400);
133module_param(gravepages, charp, 0400);
a5ac8aeb 134module_param(overridesize, uint, 0400);
a9fc8991 135module_param(cache_file, charp, 0400);
ce85b79f 136module_param(bbt, uint, 0400);
fc2ff592 137module_param(bch, uint, 0400);
1da177e4 138
a5ac8aeb 139MODULE_PARM_DESC(first_id_byte, "The first byte returned by NAND Flash 'read ID' command (manufacturer ID)");
1da177e4
LT		 140MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID)");
141MODULE_PARM_DESC(third_id_byte, "The third byte returned by NAND Flash 'read ID' command");
142MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command");
a9fc8991 143MODULE_PARM_DESC(access_delay, "Initial page access delay (microseconds)");
1da177e4
LT		 144MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
145MODULE_PARM_DESC(erase_delay, "Sector erase delay (milliseconds)");
6029a3a4
AY		 146MODULE_PARM_DESC(output_cycle, "Word output (from flash) time (nanoseconds)");
147MODULE_PARM_DESC(input_cycle, "Word input (to flash) time (nanoseconds)");
1da177e4
LT		 148MODULE_PARM_DESC(bus_width, "Chip's bus width (8- or 16-bit)");
149MODULE_PARM_DESC(do_delays, "Simulate NAND delays using busy-waits if not zero");
150MODULE_PARM_DESC(log, "Perform logging if not zero");
151MODULE_PARM_DESC(dbg, "Output debug information if not zero");
2b77a0ed 152MODULE_PARM_DESC(parts, "Partition sizes (in erase blocks) separated by commas");
514087e7
AH		 153/* Page and erase block positions for the following parameters are independent of any partitions */
154MODULE_PARM_DESC(badblocks, "Erase blocks that are initially marked bad, separated by commas");
155MODULE_PARM_DESC(weakblocks, "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
156 " separated by commas e.g. 113:2 means eb 113"
157 " can be erased only twice before failing");
158MODULE_PARM_DESC(weakpages, "Weak pages [: maximum writes (defaults to 3)]"
159 " separated by commas e.g. 1401:2 means page 1401"
160 " can be written only twice before failing");
161MODULE_PARM_DESC(bitflips, "Maximum number of random bit flips per page (zero by default)");
162MODULE_PARM_DESC(gravepages, "Pages that lose data [: maximum reads (defaults to 3)]"
163 " separated by commas e.g. 1401:2 means page 1401"
164 " can be read only twice before failing");
a5ac8aeb
AH		 165MODULE_PARM_DESC(overridesize, "Specifies the NAND Flash size overriding the ID bytes. "
166 "The size is specified in erase blocks and as the exponent of a power of two"
167 " e.g. 5 means a size of 32 erase blocks");
a9fc8991 168MODULE_PARM_DESC(cache_file, "File to use to cache nand pages instead of memory");
ce85b79f 169MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in data area");
fc2ff592
ID		 170MODULE_PARM_DESC(bch, "Enable BCH ecc and set how many bits should "
171 "be correctable in 512-byte blocks");
1da177e4
LT		 172
173/* The largest possible page size */
75352662 174#define NS_LARGEST_PAGE_SIZE 4096
61b03bd7 175
1da177e4
LT		 176/* The prefix for simulator output */
177#define NS_OUTPUT_PREFIX "[nandsim]"
178
179/* Simulator's output macros (logging, debugging, warning, error) */
180#define NS_LOG(args...) \
181 do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0)
182#define NS_DBG(args...) \
183 do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0)
184#define NS_WARN(args...) \
2b77a0ed 185 do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0)
1da177e4 186#define NS_ERR(args...) \
2b77a0ed 187 do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0)
57aa6b54
AH		 188#define NS_INFO(args...) \
189 do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0)
1da177e4
LT		 190
191/* Busy-wait delay macros (microseconds, milliseconds) */
192#define NS_UDELAY(us) \
193 do { if (do_delays) udelay(us); } while(0)
194#define NS_MDELAY(us) \
195 do { if (do_delays) mdelay(us); } while(0)
61b03bd7 196
1da177e4
LT		 197/* Is the nandsim structure initialized ? */
198#define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
199
200/* Good operation completion status */
201#define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
202
203/* Operation failed completion status */
61b03bd7 204#define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
1da177e4
LT		 205
206/* Calculate the page offset in flash RAM image by (row, column) address */
207#define NS_RAW_OFFSET(ns) \
3b8b8fa1 208 (((ns)->regs.row * (ns)->geom.pgszoob) + (ns)->regs.column)
61b03bd7 209
1da177e4
LT		 210/* Calculate the OOB offset in flash RAM image by (row, column) address */
211#define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
212
213/* After a command is input, the simulator goes to one of the following states */
214#define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */
215#define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */
4a0c50c0 216#define STATE_CMD_READSTART 0x00000003 /* read data second command (large page devices) */
daf05ec0 217#define STATE_CMD_PAGEPROG 0x00000004 /* start page program */
1da177e4
LT		 218#define STATE_CMD_READOOB 0x00000005 /* read OOB area */
219#define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */
220#define STATE_CMD_STATUS 0x00000007 /* read status */
daf05ec0 221#define STATE_CMD_SEQIN 0x00000009 /* sequential data input */
1da177e4
LT		 222#define STATE_CMD_READID 0x0000000A /* read ID */
223#define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */
224#define STATE_CMD_RESET 0x0000000C /* reset */
74216be4
AB		 225#define STATE_CMD_RNDOUT 0x0000000D /* random output command */
226#define STATE_CMD_RNDOUTSTART 0x0000000E /* random output start command */
1da177e4
LT		 227#define STATE_CMD_MASK 0x0000000F /* command states mask */
228
8e87d782 229/* After an address is input, the simulator goes to one of these states */
1da177e4
LT		 230#define STATE_ADDR_PAGE 0x00000010 /* full (row, column) address is accepted */
231#define STATE_ADDR_SEC 0x00000020 /* sector address was accepted */
74216be4
AB		 232#define STATE_ADDR_COLUMN 0x00000030 /* column address was accepted */
233#define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */
234#define STATE_ADDR_MASK 0x00000070 /* address states mask */
1da177e4 235
daf05ec0 236/* During data input/output the simulator is in these states */
1da177e4
LT		 237#define STATE_DATAIN 0x00000100 /* waiting for data input */
238#define STATE_DATAIN_MASK 0x00000100 /* data input states mask */
239
240#define STATE_DATAOUT 0x00001000 /* waiting for page data output */
241#define STATE_DATAOUT_ID 0x00002000 /* waiting for ID bytes output */
242#define STATE_DATAOUT_STATUS 0x00003000 /* waiting for status output */
243#define STATE_DATAOUT_STATUS_M 0x00004000 /* waiting for multi-plane status output */
244#define STATE_DATAOUT_MASK 0x00007000 /* data output states mask */
245
246/* Previous operation is done, ready to accept new requests */
247#define STATE_READY 0x00000000
248
249/* This state is used to mark that the next state isn't known yet */
250#define STATE_UNKNOWN 0x10000000
251
252/* Simulator's actions bit masks */
253#define ACTION_CPY 0x00100000 /* copy page/OOB to the internal buffer */
daf05ec0 254#define ACTION_PRGPAGE 0x00200000 /* program the internal buffer to flash */
1da177e4
LT		 255#define ACTION_SECERASE 0x00300000 /* erase sector */
256#define ACTION_ZEROOFF 0x00400000 /* don't add any offset to address */
257#define ACTION_HALFOFF 0x00500000 /* add to address half of page */
258#define ACTION_OOBOFF 0x00600000 /* add to address OOB offset */
259#define ACTION_MASK 0x00700000 /* action mask */
260
74216be4 261#define NS_OPER_NUM 13 /* Number of operations supported by the simulator */
1da177e4
LT		 262#define NS_OPER_STATES 6 /* Maximum number of states in operation */
263
264#define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */
1da177e4
LT		 265#define OPT_PAGE512 0x00000002 /* 512-byte page chips */
266#define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */
267#define OPT_SMARTMEDIA 0x00000010 /* SmartMedia technology chips */
1da177e4 268#define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
75352662
SAS		 269#define OPT_PAGE4096 0x00000080 /* 4096-byte page chips */
270#define OPT_LARGEPAGE (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */
51148f1f 271#define OPT_SMALLPAGE (OPT_PAGE512) /* 512-byte page chips */
1da177e4 272
daf05ec0 273/* Remove action bits from state */
1da177e4 274#define NS_STATE(x) ((x) & ~ACTION_MASK)
61b03bd7
TG		 275
276/*
1da177e4 277 * Maximum previous states which need to be saved. Currently saving is
daf05ec0 278 * only needed for page program operation with preceded read command
1da177e4
LT		 279 * (which is only valid for 512-byte pages).
280 */
281#define NS_MAX_PREVSTATES 1
282
a9fc8991
AH		 283/* Maximum page cache pages needed to read or write a NAND page to the cache_file */
284#define NS_MAX_HELD_PAGES 16
285
5346c27c
EG		 286struct nandsim_debug_info {
287 struct dentry *dfs_root;
288 struct dentry *dfs_wear_report;
289};
290
d086d436
VK		 291/*
292 * A union to represent flash memory contents and flash buffer.
293 */
294union ns_mem {
295 u_char *byte; /* for byte access */
296 uint16_t *word; /* for 16-bit word access */
297};
298
61b03bd7 299/*
1da177e4
LT		 300 * The structure which describes all the internal simulator data.
301 */
302struct nandsim {
e99e90ae 303 struct mtd_partition partitions[CONFIG_NANDSIM_MAX_PARTS];
2b77a0ed 304 unsigned int nbparts;
1da177e4
LT		 305
306 uint busw; /* flash chip bus width (8 or 16) */
307 u_char ids[4]; /* chip's ID bytes */
308 uint32_t options; /* chip's characteristic bits */
309 uint32_t state; /* current chip state */
310 uint32_t nxstate; /* next expected state */
61b03bd7 311
1da177e4
LT		 312 uint32_t *op; /* current operation, NULL operations isn't known yet */
313 uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
314 uint16_t npstates; /* number of previous states saved */
315 uint16_t stateidx; /* current state index */
316
d086d436
VK		 317 /* The simulated NAND flash pages array */
318 union ns_mem *pages;
1da177e4 319
8a4c2495
AK		 320 /* Slab allocator for nand pages */
321 struct kmem_cache *nand_pages_slab;
322
1da177e4 323 /* Internal buffer of page + OOB size bytes */
d086d436 324 union ns_mem buf;
1da177e4
LT		 325
326 /* NAND flash "geometry" */
0bfa4df2 327 struct {
6eda7a55 328 uint64_t totsz; /* total flash size, bytes */
1da177e4
LT		 329 uint32_t secsz; /* flash sector (erase block) size, bytes */
330 uint pgsz; /* NAND flash page size, bytes */
331 uint oobsz; /* page OOB area size, bytes */
6eda7a55 332 uint64_t totszoob; /* total flash size including OOB, bytes */
1da177e4
LT		 333 uint pgszoob; /* page size including OOB , bytes*/
334 uint secszoob; /* sector size including OOB, bytes */
335 uint pgnum; /* total number of pages */
336 uint pgsec; /* number of pages per sector */
337 uint secshift; /* bits number in sector size */
338 uint pgshift; /* bits number in page size */
339 uint oobshift; /* bits number in OOB size */
340 uint pgaddrbytes; /* bytes per page address */
341 uint secaddrbytes; /* bytes per sector address */
342 uint idbytes; /* the number ID bytes that this chip outputs */
343 } geom;
344
345 /* NAND flash internal registers */
0bfa4df2 346 struct {
1da177e4
LT		 347 unsigned command; /* the command register */
348 u_char status; /* the status register */
349 uint row; /* the page number */
350 uint column; /* the offset within page */
351 uint count; /* internal counter */
352 uint num; /* number of bytes which must be processed */
353 uint off; /* fixed page offset */
354 } regs;
355
356 /* NAND flash lines state */
0bfa4df2 357 struct {
1da177e4
LT		 358 int ce; /* chip Enable */
359 int cle; /* command Latch Enable */
360 int ale; /* address Latch Enable */
361 int wp; /* write Protect */
362 } lines;
a9fc8991
AH		 363
364 /* Fields needed when using a cache file */
365 struct file *cfile; /* Open file */
08efe91a 366 unsigned long *pages_written; /* Which pages have been written */
a9fc8991
AH		 367 void *file_buf;
368 struct page *held_pages[NS_MAX_HELD_PAGES];
369 int held_cnt;
5346c27c
EG		 370
371 struct nandsim_debug_info dbg;
1da177e4
LT		 372};
373
374/*
375 * Operations array. To perform any operation the simulator must pass
376 * through the correspondent states chain.
377 */
378static struct nandsim_operations {
379 uint32_t reqopts; /* options which are required to perform the operation */
380 uint32_t states[NS_OPER_STATES]; /* operation's states */
381} ops[NS_OPER_NUM] = {
382 /* Read page + OOB from the beginning */
383 {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
384 STATE_DATAOUT, STATE_READY}},
385 /* Read page + OOB from the second half */
386 {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
387 STATE_DATAOUT, STATE_READY}},
388 /* Read OOB */
389 {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
390 STATE_DATAOUT, STATE_READY}},
daf05ec0 391 /* Program page starting from the beginning */
1da177e4
LT		 392 {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
393 STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
daf05ec0 394 /* Program page starting from the beginning */
1da177e4
LT		 395 {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
396 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
daf05ec0 397 /* Program page starting from the second half */
1da177e4
LT		 398 {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
399 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
daf05ec0 400 /* Program OOB */
1da177e4
LT		 401 {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
402 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
403 /* Erase sector */
404 {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
405 /* Read status */
406 {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
1da177e4
LT		 407 /* Read ID */
408 {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
409 /* Large page devices read page */
410 {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
74216be4
AB		 411 STATE_DATAOUT, STATE_READY}},
412 /* Large page devices random page read */
413 {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY,
414 STATE_DATAOUT, STATE_READY}},
1da177e4
LT		 415};
416
514087e7
AH		 417struct weak_block {
418 struct list_head list;
419 unsigned int erase_block_no;
420 unsigned int max_erases;
421 unsigned int erases_done;
422};
423
424static LIST_HEAD(weak_blocks);
425
426struct weak_page {
427 struct list_head list;
428 unsigned int page_no;
429 unsigned int max_writes;
430 unsigned int writes_done;
431};
432
433static LIST_HEAD(weak_pages);
434
435struct grave_page {
436 struct list_head list;
437 unsigned int page_no;
438 unsigned int max_reads;
439 unsigned int reads_done;
440};
441
442static LIST_HEAD(grave_pages);
443
57aa6b54
AH		 444static unsigned long *erase_block_wear = NULL;
445static unsigned int wear_eb_count = 0;
446static unsigned long total_wear = 0;
57aa6b54 447
1da177e4
LT		 448/* MTD structure for NAND controller */
449static struct mtd_info *nsmtd;
450
5346c27c
EG		 451static int nandsim_debugfs_show(struct seq_file *m, void *private)
452{
453 unsigned long wmin = -1, wmax = 0, avg;
454 unsigned long deciles[10], decile_max[10], tot = 0;
455 unsigned int i;
456
457 /* Calc wear stats */
458 for (i = 0; i < wear_eb_count; ++i) {
459 unsigned long wear = erase_block_wear[i];
460 if (wear < wmin)
461 wmin = wear;
462 if (wear > wmax)
463 wmax = wear;
464 tot += wear;
465 }
466
467 for (i = 0; i < 9; ++i) {
468 deciles[i] = 0;
469 decile_max[i] = (wmax * (i + 1) + 5) / 10;
470 }
471 deciles[9] = 0;
472 decile_max[9] = wmax;
473 for (i = 0; i < wear_eb_count; ++i) {
474 int d;
475 unsigned long wear = erase_block_wear[i];
476 for (d = 0; d < 10; ++d)
477 if (wear <= decile_max[d]) {
478 deciles[d] += 1;
479 break;
480 }
481 }
482 avg = tot / wear_eb_count;
483
484 /* Output wear report */
485 seq_printf(m, "Total numbers of erases: %lu\n", tot);
486 seq_printf(m, "Number of erase blocks: %u\n", wear_eb_count);
487 seq_printf(m, "Average number of erases: %lu\n", avg);
488 seq_printf(m, "Maximum number of erases: %lu\n", wmax);
489 seq_printf(m, "Minimum number of erases: %lu\n", wmin);
490 for (i = 0; i < 10; ++i) {
491 unsigned long from = (i ? decile_max[i - 1] + 1 : 0);
492 if (from > decile_max[i])
493 continue;
494 seq_printf(m, "Number of ebs with erase counts from %lu to %lu : %lu\n",
495 from,
496 decile_max[i],
497 deciles[i]);
498 }
499
500 return 0;
501}
502
503static int nandsim_debugfs_open(struct inode *inode, struct file *file)
504{
505 return single_open(file, nandsim_debugfs_show, inode->i_private);
506}
507
508static const struct file_operations dfs_fops = {
509 .open = nandsim_debugfs_open,
510 .read = seq_read,
511 .llseek = seq_lseek,
512 .release = single_release,
513};
514
515/**
516 * nandsim_debugfs_create - initialize debugfs
517 * @dev: nandsim device description object
518 *
519 * This function creates all debugfs files for UBI device @ubi. Returns zero in
520 * case of success and a negative error code in case of failure.
521 */
522static int nandsim_debugfs_create(struct nandsim *dev)
523{
524 struct nandsim_debug_info *dbg = &dev->dbg;
525 struct dentry *dent;
526 int err;
527
528 if (!IS_ENABLED(CONFIG_DEBUG_FS))
529 return 0;
530
531 dent = debugfs_create_dir("nandsim", NULL);
532 if (IS_ERR_OR_NULL(dent)) {
533 int err = dent ? -ENODEV : PTR_ERR(dent);
534
535 NS_ERR("cannot create \"nandsim\" debugfs directory, err %d\n",
536 err);
537 return err;
538 }
539 dbg->dfs_root = dent;
540
541 dent = debugfs_create_file("wear_report", S_IRUSR,
542 dbg->dfs_root, dev, &dfs_fops);
543 if (IS_ERR_OR_NULL(dent))
544 goto out_remove;
545 dbg->dfs_wear_report = dent;
546
547 return 0;
548
549out_remove:
550 debugfs_remove_recursive(dbg->dfs_root);
551 err = dent ? PTR_ERR(dent) : -ENODEV;
552 return err;
553}
554
555/**
556 * nandsim_debugfs_remove - destroy all debugfs files
557 */
558static void nandsim_debugfs_remove(struct nandsim *ns)
559{
560 if (IS_ENABLED(CONFIG_DEBUG_FS))
561 debugfs_remove_recursive(ns->dbg.dfs_root);
562}
563
d086d436 564/*
8a4c2495
AK		 565 * Allocate array of page pointers, create slab allocation for an array
566 * and initialize the array by NULL pointers.
d086d436
VK		 567 *
568 * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
569 */
a5602146 570static int alloc_device(struct nandsim *ns)
d086d436 571{
a9fc8991
AH		 572 struct file *cfile;
573 int i, err;
574
575 if (cache_file) {
576 cfile = filp_open(cache_file, O_CREAT | O_RDWR | O_LARGEFILE, 0600);
577 if (IS_ERR(cfile))
578 return PTR_ERR(cfile);
579 if (!cfile->f_op || (!cfile->f_op->read && !cfile->f_op->aio_read)) {
580 NS_ERR("alloc_device: cache file not readable\n");
581 err = -EINVAL;
582 goto err_close;
583 }
584 if (!cfile->f_op->write && !cfile->f_op->aio_write) {
585 NS_ERR("alloc_device: cache file not writeable\n");
586 err = -EINVAL;
587 goto err_close;
588 }
08efe91a
AM		 589 ns->pages_written = vzalloc(BITS_TO_LONGS(ns->geom.pgnum) *
590 sizeof(unsigned long));
a9fc8991
AH		 591 if (!ns->pages_written) {
592 NS_ERR("alloc_device: unable to allocate pages written array\n");
593 err = -ENOMEM;
594 goto err_close;
595 }
596 ns->file_buf = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
597 if (!ns->file_buf) {
598 NS_ERR("alloc_device: unable to allocate file buf\n");
599 err = -ENOMEM;
600 goto err_free;
601 }
602 ns->cfile = cfile;
a9fc8991
AH		 603 return 0;
604 }
d086d436
VK		 605
606 ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem));
607 if (!ns->pages) {
a9fc8991 608 NS_ERR("alloc_device: unable to allocate page array\n");
d086d436
VK		 609 return -ENOMEM;
610 }
611 for (i = 0; i < ns->geom.pgnum; i++) {
612 ns->pages[i].byte = NULL;
613 }
8a4c2495
AK		 614 ns->nand_pages_slab = kmem_cache_create("nandsim",
615 ns->geom.pgszoob, 0, 0, NULL);
616 if (!ns->nand_pages_slab) {
617 NS_ERR("cache_create: unable to create kmem_cache\n");
618 return -ENOMEM;
619 }
d086d436
VK		 620
621 return 0;
a9fc8991
AH		 622
623err_free:
624 vfree(ns->pages_written);
625err_close:
626 filp_close(cfile, NULL);
627 return err;
d086d436
VK		 628}
629
630/*
631 * Free any allocated pages, and free the array of page pointers.
632 */
a5602146 633static void free_device(struct nandsim *ns)
d086d436
VK		 634{
635 int i;
636
a9fc8991
AH		 637 if (ns->cfile) {
638 kfree(ns->file_buf);
639 vfree(ns->pages_written);
640 filp_close(ns->cfile, NULL);
641 return;
642 }
643
d086d436
VK		 644 if (ns->pages) {
645 for (i = 0; i < ns->geom.pgnum; i++) {
646 if (ns->pages[i].byte)
8a4c2495
AK		 647 kmem_cache_free(ns->nand_pages_slab,
648 ns->pages[i].byte);
d086d436 649 }
8a4c2495 650 kmem_cache_destroy(ns->nand_pages_slab);
d086d436
VK		 651 vfree(ns->pages);
652 }
653}
654
2b77a0ed
AH		 655static char *get_partition_name(int i)
656{
f03a5729 657 return kasprintf(GFP_KERNEL, "NAND simulator partition %d", i);
2b77a0ed
AH		 658}
659
1da177e4
LT		 660/*
661 * Initialize the nandsim structure.
662 *
663 * RETURNS: 0 if success, -ERRNO if failure.
664 */
a5602146 665static int init_nandsim(struct mtd_info *mtd)
1da177e4 666{
7b8516b7
KV		 667 struct nand_chip *chip = mtd->priv;
668 struct nandsim *ns = chip->priv;
2b77a0ed 669 int i, ret = 0;
0f07a0be
DW		 670 uint64_t remains;
671 uint64_t next_offset;
1da177e4
LT		 672
673 if (NS_IS_INITIALIZED(ns)) {
674 NS_ERR("init_nandsim: nandsim is already initialized\n");
675 return -EIO;
676 }
677
678 /* Force mtd to not do delays */
679 chip->chip_delay = 0;
680
681 /* Initialize the NAND flash parameters */
682 ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
683 ns->geom.totsz = mtd->size;
28318776 684 ns->geom.pgsz = mtd->writesize;
1da177e4
LT		 685 ns->geom.oobsz = mtd->oobsize;
686 ns->geom.secsz = mtd->erasesize;
687 ns->geom.pgszoob = ns->geom.pgsz + ns->geom.oobsz;
596fd462 688 ns->geom.pgnum = div_u64(ns->geom.totsz, ns->geom.pgsz);
6eda7a55 689 ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz;
1da177e4
LT		 690 ns->geom.secshift = ffs(ns->geom.secsz) - 1;
691 ns->geom.pgshift = chip->page_shift;
692 ns->geom.oobshift = ffs(ns->geom.oobsz) - 1;
693 ns->geom.pgsec = ns->geom.secsz / ns->geom.pgsz;
694 ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
695 ns->options = 0;
696
51148f1f 697 if (ns->geom.pgsz == 512) {
831d316b 698 ns->options |= OPT_PAGE512;
1da177e4
LT		 699 if (ns->busw == 8)
700 ns->options |= OPT_PAGE512_8BIT;
701 } else if (ns->geom.pgsz == 2048) {
702 ns->options |= OPT_PAGE2048;
75352662
SAS		 703 } else if (ns->geom.pgsz == 4096) {
704 ns->options |= OPT_PAGE4096;
1da177e4
LT		 705 } else {
706 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
707 return -EIO;
708 }
709
710 if (ns->options & OPT_SMALLPAGE) {
af3deccf 711 if (ns->geom.totsz <= (32 << 20)) {
1da177e4
LT		 712 ns->geom.pgaddrbytes = 3;
713 ns->geom.secaddrbytes = 2;
714 } else {
715 ns->geom.pgaddrbytes = 4;
716 ns->geom.secaddrbytes = 3;
717 }
718 } else {
719 if (ns->geom.totsz <= (128 << 20)) {
4a0c50c0 720 ns->geom.pgaddrbytes = 4;
1da177e4
LT		 721 ns->geom.secaddrbytes = 2;
722 } else {
723 ns->geom.pgaddrbytes = 5;
724 ns->geom.secaddrbytes = 3;
725 }
726 }
61b03bd7 727
2b77a0ed
AH		 728 /* Fill the partition_info structure */
729 if (parts_num > ARRAY_SIZE(ns->partitions)) {
730 NS_ERR("too many partitions.\n");
731 ret = -EINVAL;
732 goto error;
733 }
734 remains = ns->geom.totsz;
735 next_offset = 0;
736 for (i = 0; i < parts_num; ++i) {
0f07a0be 737 uint64_t part_sz = (uint64_t)parts[i] * ns->geom.secsz;
6eda7a55
AH		 738
739 if (!part_sz || part_sz > remains) {
2b77a0ed
AH		 740 NS_ERR("bad partition size.\n");
741 ret = -EINVAL;
742 goto error;
743 }
744 ns->partitions[i].name = get_partition_name(i);
745 ns->partitions[i].offset = next_offset;
6eda7a55 746 ns->partitions[i].size = part_sz;
2b77a0ed
AH		 747 next_offset += ns->partitions[i].size;
748 remains -= ns->partitions[i].size;
749 }
750 ns->nbparts = parts_num;
751 if (remains) {
752 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
753 NS_ERR("too many partitions.\n");
754 ret = -EINVAL;
755 goto error;
756 }
757 ns->partitions[i].name = get_partition_name(i);
758 ns->partitions[i].offset = next_offset;
759 ns->partitions[i].size = remains;
760 ns->nbparts += 1;
761 }
762
1da177e4
LT		 763 if (ns->busw == 16)
764 NS_WARN("16-bit flashes support wasn't tested\n");
765
e4c094a5
AM		 766 printk("flash size: %llu MiB\n",
767 (unsigned long long)ns->geom.totsz >> 20);
1da177e4
LT		 768 printk("page size: %u bytes\n", ns->geom.pgsz);
769 printk("OOB area size: %u bytes\n", ns->geom.oobsz);
770 printk("sector size: %u KiB\n", ns->geom.secsz >> 10);
771 printk("pages number: %u\n", ns->geom.pgnum);
772 printk("pages per sector: %u\n", ns->geom.pgsec);
773 printk("bus width: %u\n", ns->busw);
774 printk("bits in sector size: %u\n", ns->geom.secshift);
775 printk("bits in page size: %u\n", ns->geom.pgshift);
e4c094a5
AM		 776 printk("bits in OOB size: %u\n", ns->geom.oobshift);
777 printk("flash size with OOB: %llu KiB\n",
778 (unsigned long long)ns->geom.totszoob >> 10);
1da177e4
LT		 779 printk("page address bytes: %u\n", ns->geom.pgaddrbytes);
780 printk("sector address bytes: %u\n", ns->geom.secaddrbytes);
781 printk("options: %#x\n", ns->options);
782
2b77a0ed 783 if ((ret = alloc_device(ns)) != 0)
d086d436 784 goto error;
1da177e4
LT		 785
786 /* Allocate / initialize the internal buffer */
787 ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
788 if (!ns->buf.byte) {
789 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
790 ns->geom.pgszoob);
2b77a0ed 791 ret = -ENOMEM;
1da177e4
LT		 792 goto error;
793 }
794 memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
795
1da177e4
LT		 796 return 0;
797
798error:
d086d436 799 free_device(ns);
1da177e4 800
2b77a0ed 801 return ret;
1da177e4
LT		 802}
803
804/*
805 * Free the nandsim structure.
806 */
a5602146 807static void free_nandsim(struct nandsim *ns)
1da177e4
LT		 808{
809 kfree(ns->buf.byte);
d086d436 810 free_device(ns);
1da177e4
LT		 811
812 return;
813}
814
514087e7
AH		 815static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
816{
817 char *w;
818 int zero_ok;
819 unsigned int erase_block_no;
820 loff_t offset;
821
822 if (!badblocks)
823 return 0;
824 w = badblocks;
825 do {
826 zero_ok = (*w == '0' ? 1 : 0);
827 erase_block_no = simple_strtoul(w, &w, 0);
828 if (!zero_ok && !erase_block_no) {
829 NS_ERR("invalid badblocks.\n");
830 return -EINVAL;
831 }
832 offset = erase_block_no * ns->geom.secsz;
5942ddbc 833 if (mtd_block_markbad(mtd, offset)) {
514087e7
AH		 834 NS_ERR("invalid badblocks.\n");
835 return -EINVAL;
836 }
837 if (*w == ',')
838 w += 1;
839 } while (*w);
840 return 0;
841}
842
843static int parse_weakblocks(void)
844{
845 char *w;
846 int zero_ok;
847 unsigned int erase_block_no;
848 unsigned int max_erases;
849 struct weak_block *wb;
850
851 if (!weakblocks)
852 return 0;
853 w = weakblocks;
854 do {
855 zero_ok = (*w == '0' ? 1 : 0);
856 erase_block_no = simple_strtoul(w, &w, 0);
857 if (!zero_ok && !erase_block_no) {
858 NS_ERR("invalid weakblocks.\n");
859 return -EINVAL;
860 }
861 max_erases = 3;
862 if (*w == ':') {
863 w += 1;
864 max_erases = simple_strtoul(w, &w, 0);
865 }
866 if (*w == ',')
867 w += 1;
868 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
869 if (!wb) {
870 NS_ERR("unable to allocate memory.\n");
871 return -ENOMEM;
872 }
873 wb->erase_block_no = erase_block_no;
874 wb->max_erases = max_erases;
875 list_add(&wb->list, &weak_blocks);
876 } while (*w);
877 return 0;
878}
879
880static int erase_error(unsigned int erase_block_no)
881{
882 struct weak_block *wb;
883
884 list_for_each_entry(wb, &weak_blocks, list)
885 if (wb->erase_block_no == erase_block_no) {
886 if (wb->erases_done >= wb->max_erases)
887 return 1;
888 wb->erases_done += 1;
889 return 0;
890 }
891 return 0;
892}
893
894static int parse_weakpages(void)
895{
896 char *w;
897 int zero_ok;
898 unsigned int page_no;
899 unsigned int max_writes;
900 struct weak_page *wp;
901
902 if (!weakpages)
903 return 0;
904 w = weakpages;
905 do {
906 zero_ok = (*w == '0' ? 1 : 0);
907 page_no = simple_strtoul(w, &w, 0);
908 if (!zero_ok && !page_no) {
909 NS_ERR("invalid weakpagess.\n");
910 return -EINVAL;
911 }
912 max_writes = 3;
913 if (*w == ':') {
914 w += 1;
915 max_writes = simple_strtoul(w, &w, 0);
916 }
917 if (*w == ',')
918 w += 1;
919 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
920 if (!wp) {
921 NS_ERR("unable to allocate memory.\n");
922 return -ENOMEM;
923 }
924 wp->page_no = page_no;
925 wp->max_writes = max_writes;
926 list_add(&wp->list, &weak_pages);
927 } while (*w);
928 return 0;
929}
930
931static int write_error(unsigned int page_no)
932{
933 struct weak_page *wp;
934
935 list_for_each_entry(wp, &weak_pages, list)
936 if (wp->page_no == page_no) {
937 if (wp->writes_done >= wp->max_writes)
938 return 1;
939 wp->writes_done += 1;
940 return 0;
941 }
942 return 0;
943}
944
945static int parse_gravepages(void)
946{
947 char *g;
948 int zero_ok;
949 unsigned int page_no;
950 unsigned int max_reads;
951 struct grave_page *gp;
952
953 if (!gravepages)
954 return 0;
955 g = gravepages;
956 do {
957 zero_ok = (*g == '0' ? 1 : 0);
958 page_no = simple_strtoul(g, &g, 0);
959 if (!zero_ok && !page_no) {
960 NS_ERR("invalid gravepagess.\n");
961 return -EINVAL;
962 }
963 max_reads = 3;
964 if (*g == ':') {
965 g += 1;
966 max_reads = simple_strtoul(g, &g, 0);
967 }
968 if (*g == ',')
969 g += 1;
970 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
971 if (!gp) {
972 NS_ERR("unable to allocate memory.\n");
973 return -ENOMEM;
974 }
975 gp->page_no = page_no;
976 gp->max_reads = max_reads;
977 list_add(&gp->list, &grave_pages);
978 } while (*g);
979 return 0;
980}
981
982static int read_error(unsigned int page_no)
983{
984 struct grave_page *gp;
985
986 list_for_each_entry(gp, &grave_pages, list)
987 if (gp->page_no == page_no) {
988 if (gp->reads_done >= gp->max_reads)
989 return 1;
990 gp->reads_done += 1;
991 return 0;
992 }
993 return 0;
994}
995
996static void free_lists(void)
997{
998 struct list_head *pos, *n;
999 list_for_each_safe(pos, n, &weak_blocks) {
1000 list_del(pos);
1001 kfree(list_entry(pos, struct weak_block, list));
1002 }
1003 list_for_each_safe(pos, n, &weak_pages) {
1004 list_del(pos);
1005 kfree(list_entry(pos, struct weak_page, list));
1006 }
1007 list_for_each_safe(pos, n, &grave_pages) {
1008 list_del(pos);
1009 kfree(list_entry(pos, struct grave_page, list));
1010 }
57aa6b54
AH		 1011 kfree(erase_block_wear);
1012}
1013
1014static int setup_wear_reporting(struct mtd_info *mtd)
1015{
1016 size_t mem;
1017
596fd462 1018 wear_eb_count = div_u64(mtd->size, mtd->erasesize);
57aa6b54
AH		 1019 mem = wear_eb_count * sizeof(unsigned long);
1020 if (mem / sizeof(unsigned long) != wear_eb_count) {
1021 NS_ERR("Too many erase blocks for wear reporting\n");
1022 return -ENOMEM;
1023 }
1024 erase_block_wear = kzalloc(mem, GFP_KERNEL);
1025 if (!erase_block_wear) {
1026 NS_ERR("Too many erase blocks for wear reporting\n");
1027 return -ENOMEM;
1028 }
1029 return 0;
1030}
1031
1032static void update_wear(unsigned int erase_block_no)
1033{
57aa6b54
AH		 1034 if (!erase_block_wear)
1035 return;
1036 total_wear += 1;
5346c27c
EG		 1037 /*
1038 * TODO: Notify this through a debugfs entry,
1039 * instead of showing an error message.
1040 */
57aa6b54
AH		 1041 if (total_wear == 0)
1042 NS_ERR("Erase counter total overflow\n");
1043 erase_block_wear[erase_block_no] += 1;
1044 if (erase_block_wear[erase_block_no] == 0)
1045 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no);
514087e7
AH		 1046}
1047
1da177e4
LT		 1048/*
1049 * Returns the string representation of 'state' state.
1050 */
a5602146 1051static char *get_state_name(uint32_t state)
1da177e4
LT		 1052{
1053 switch (NS_STATE(state)) {
1054 case STATE_CMD_READ0:
1055 return "STATE_CMD_READ0";
1056 case STATE_CMD_READ1:
1057 return "STATE_CMD_READ1";
1058 case STATE_CMD_PAGEPROG:
1059 return "STATE_CMD_PAGEPROG";
1060 case STATE_CMD_READOOB:
1061 return "STATE_CMD_READOOB";
1062 case STATE_CMD_READSTART:
1063 return "STATE_CMD_READSTART";
1064 case STATE_CMD_ERASE1:
1065 return "STATE_CMD_ERASE1";
1066 case STATE_CMD_STATUS:
1067 return "STATE_CMD_STATUS";
1da177e4
LT		 1068 case STATE_CMD_SEQIN:
1069 return "STATE_CMD_SEQIN";
1070 case STATE_CMD_READID:
1071 return "STATE_CMD_READID";
1072 case STATE_CMD_ERASE2:
1073 return "STATE_CMD_ERASE2";
1074 case STATE_CMD_RESET:
1075 return "STATE_CMD_RESET";
74216be4
AB		 1076 case STATE_CMD_RNDOUT:
1077 return "STATE_CMD_RNDOUT";
1078 case STATE_CMD_RNDOUTSTART:
1079 return "STATE_CMD_RNDOUTSTART";
1da177e4
LT		 1080 case STATE_ADDR_PAGE:
1081 return "STATE_ADDR_PAGE";
1082 case STATE_ADDR_SEC:
1083 return "STATE_ADDR_SEC";
1084 case STATE_ADDR_ZERO:
1085 return "STATE_ADDR_ZERO";
74216be4
AB		 1086 case STATE_ADDR_COLUMN:
1087 return "STATE_ADDR_COLUMN";
1da177e4
LT		 1088 case STATE_DATAIN:
1089 return "STATE_DATAIN";
1090 case STATE_DATAOUT:
1091 return "STATE_DATAOUT";
1092 case STATE_DATAOUT_ID:
1093 return "STATE_DATAOUT_ID";
1094 case STATE_DATAOUT_STATUS:
1095 return "STATE_DATAOUT_STATUS";
1096 case STATE_DATAOUT_STATUS_M:
1097 return "STATE_DATAOUT_STATUS_M";
1098 case STATE_READY:
1099 return "STATE_READY";
1100 case STATE_UNKNOWN:
1101 return "STATE_UNKNOWN";
1102 }
1103
1104 NS_ERR("get_state_name: unknown state, BUG\n");
1105 return NULL;
1106}
1107
1108/*
1109 * Check if command is valid.
1110 *
1111 * RETURNS: 1 if wrong command, 0 if right.
1112 */
a5602146 1113static int check_command(int cmd)
1da177e4
LT		 1114{
1115 switch (cmd) {
61b03bd7 1116
1da177e4 1117 case NAND_CMD_READ0:
74216be4 1118 case NAND_CMD_READ1:
1da177e4
LT		 1119 case NAND_CMD_READSTART:
1120 case NAND_CMD_PAGEPROG:
1121 case NAND_CMD_READOOB:
1122 case NAND_CMD_ERASE1:
1123 case NAND_CMD_STATUS:
1124 case NAND_CMD_SEQIN:
1125 case NAND_CMD_READID:
1126 case NAND_CMD_ERASE2:
1127 case NAND_CMD_RESET:
74216be4
AB		 1128 case NAND_CMD_RNDOUT:
1129 case NAND_CMD_RNDOUTSTART:
1da177e4 1130 return 0;
61b03bd7 1131
1da177e4
LT		 1132 default:
1133 return 1;
1134 }
1135}
1136
1137/*
1138 * Returns state after command is accepted by command number.
1139 */
a5602146 1140static uint32_t get_state_by_command(unsigned command)
1da177e4
LT		 1141{
1142 switch (command) {
1143 case NAND_CMD_READ0:
1144 return STATE_CMD_READ0;
1145 case NAND_CMD_READ1:
1146 return STATE_CMD_READ1;
1147 case NAND_CMD_PAGEPROG:
1148 return STATE_CMD_PAGEPROG;
1149 case NAND_CMD_READSTART:
1150 return STATE_CMD_READSTART;
1151 case NAND_CMD_READOOB:
1152 return STATE_CMD_READOOB;
1153 case NAND_CMD_ERASE1:
1154 return STATE_CMD_ERASE1;
1155 case NAND_CMD_STATUS:
1156 return STATE_CMD_STATUS;
1da177e4
LT		 1157 case NAND_CMD_SEQIN:
1158 return STATE_CMD_SEQIN;
1159 case NAND_CMD_READID:
1160 return STATE_CMD_READID;
1161 case NAND_CMD_ERASE2:
1162 return STATE_CMD_ERASE2;
1163 case NAND_CMD_RESET:
1164 return STATE_CMD_RESET;
74216be4
AB		 1165 case NAND_CMD_RNDOUT:
1166 return STATE_CMD_RNDOUT;
1167 case NAND_CMD_RNDOUTSTART:
1168 return STATE_CMD_RNDOUTSTART;
1da177e4
LT		 1169 }
1170
1171 NS_ERR("get_state_by_command: unknown command, BUG\n");
1172 return 0;
1173}
1174
1175/*
1176 * Move an address byte to the correspondent internal register.
1177 */
a5602146 1178static inline void accept_addr_byte(struct nandsim *ns, u_char bt)
1da177e4
LT		 1179{
1180 uint byte = (uint)bt;
61b03bd7 1181
1da177e4
LT		 1182 if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
1183 ns->regs.column |= (byte << 8 * ns->regs.count);
1184 else {
1185 ns->regs.row |= (byte << 8 * (ns->regs.count -
1186 ns->geom.pgaddrbytes +
1187 ns->geom.secaddrbytes));
1188 }
1189
1190 return;
1191}
61b03bd7 1192
1da177e4
LT		 1193/*
1194 * Switch to STATE_READY state.
1195 */
a5602146 1196static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1da177e4
LT		 1197{
1198 NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY));
1199
1200 ns->state = STATE_READY;
1201 ns->nxstate = STATE_UNKNOWN;
1202 ns->op = NULL;
1203 ns->npstates = 0;
1204 ns->stateidx = 0;
1205 ns->regs.num = 0;
1206 ns->regs.count = 0;
1207 ns->regs.off = 0;
1208 ns->regs.row = 0;
1209 ns->regs.column = 0;
1210 ns->regs.status = status;
1211}
1212
1213/*
1214 * If the operation isn't known yet, try to find it in the global array
1215 * of supported operations.
1216 *
1217 * Operation can be unknown because of the following.
daf05ec0 1218 * 1. New command was accepted and this is the first call to find the
1da177e4 1219 * correspondent states chain. In this case ns->npstates = 0;
daf05ec0 1220 * 2. There are several operations which begin with the same command(s)
1da177e4
LT		 1221 * (for example program from the second half and read from the
1222 * second half operations both begin with the READ1 command). In this
1223 * case the ns->pstates[] array contains previous states.
61b03bd7 1224 *
1da177e4
LT		 1225 * Thus, the function tries to find operation containing the following
1226 * states (if the 'flag' parameter is 0):
1227 * ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1228 *
1229 * If (one and only one) matching operation is found, it is accepted (
1230 * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1231 * zeroed).
61b03bd7 1232 *
daf05ec0 1233 * If there are several matches, the current state is pushed to the
1da177e4
LT		 1234 * ns->pstates.
1235 *
1236 * The operation can be unknown only while commands are input to the chip.
1237 * As soon as address command is accepted, the operation must be known.
1238 * In such situation the function is called with 'flag' != 0, and the
1239 * operation is searched using the following pattern:
1240 * ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
61b03bd7 1241 *
daf05ec0 1242 * It is supposed that this pattern must either match one operation or
1da177e4
LT		 1243 * none. There can't be ambiguity in that case.
1244 *
daf05ec0 1245 * If no matches found, the function does the following:
1da177e4
LT		 1246 * 1. if there are saved states present, try to ignore them and search
1247 * again only using the last command. If nothing was found, switch
1248 * to the STATE_READY state.
1249 * 2. if there are no saved states, switch to the STATE_READY state.
1250 *
1251 * RETURNS: -2 - no matched operations found.
1252 * -1 - several matches.
1253 * 0 - operation is found.
1254 */
a5602146 1255static int find_operation(struct nandsim *ns, uint32_t flag)
1da177e4
LT		 1256{
1257 int opsfound = 0;
1258 int i, j, idx = 0;
61b03bd7 1259
1da177e4
LT		 1260 for (i = 0; i < NS_OPER_NUM; i++) {
1261
1262 int found = 1;
61b03bd7 1263
1da177e4
LT		 1264 if (!(ns->options & ops[i].reqopts))
1265 /* Ignore operations we can't perform */
1266 continue;
61b03bd7 1267
1da177e4
LT		 1268 if (flag) {
1269 if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1270 continue;
1271 } else {
1272 if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1273 continue;
1274 }
1275
61b03bd7 1276 for (j = 0; j < ns->npstates; j++)
1da177e4
LT		 1277 if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1278 && (ns->options & ops[idx].reqopts)) {
1279 found = 0;
1280 break;
1281 }
1282
1283 if (found) {
1284 idx = i;
1285 opsfound += 1;
1286 }
1287 }
1288
1289 if (opsfound == 1) {
1290 /* Exact match */
1291 ns->op = &ops[idx].states[0];
1292 if (flag) {
61b03bd7 1293 /*
1da177e4
LT		 1294 * In this case the find_operation function was
1295 * called when address has just began input. But it isn't
1296 * yet fully input and the current state must
1297 * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1298 * state must be the next state (ns->nxstate).
1299 */
1300 ns->stateidx = ns->npstates - 1;
1301 } else {
1302 ns->stateidx = ns->npstates;
1303 }
1304 ns->npstates = 0;
1305 ns->state = ns->op[ns->stateidx];
1306 ns->nxstate = ns->op[ns->stateidx + 1];
1307 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1308 idx, get_state_name(ns->state), get_state_name(ns->nxstate));
1309 return 0;
1310 }
61b03bd7 1311
1da177e4
LT		 1312 if (opsfound == 0) {
1313 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1314 if (ns->npstates != 0) {
1315 NS_DBG("find_operation: no operation found, try again with state %s\n",
1316 get_state_name(ns->state));
1317 ns->npstates = 0;
1318 return find_operation(ns, 0);
1319
1320 }
1321 NS_DBG("find_operation: no operations found\n");
1322 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1323 return -2;
1324 }
61b03bd7 1325
1da177e4
LT		 1326 if (flag) {
1327 /* This shouldn't happen */
1328 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1329 return -2;
1330 }
61b03bd7 1331
1da177e4
LT		 1332 NS_DBG("find_operation: there is still ambiguity\n");
1333
1334 ns->pstates[ns->npstates++] = ns->state;
1335
1336 return -1;
1337}
1338
a9fc8991
AH		 1339static void put_pages(struct nandsim *ns)
1340{
1341 int i;
1342
1343 for (i = 0; i < ns->held_cnt; i++)
1344 page_cache_release(ns->held_pages[i]);
1345}
1346
1347/* Get page cache pages in advance to provide NOFS memory allocation */
1348static int get_pages(struct nandsim *ns, struct file *file, size_t count, loff_t pos)
1349{
1350 pgoff_t index, start_index, end_index;
1351 struct page *page;
1352 struct address_space *mapping = file->f_mapping;
1353
1354 start_index = pos >> PAGE_CACHE_SHIFT;
1355 end_index = (pos + count - 1) >> PAGE_CACHE_SHIFT;
1356 if (end_index - start_index + 1 > NS_MAX_HELD_PAGES)
1357 return -EINVAL;
1358 ns->held_cnt = 0;
1359 for (index = start_index; index <= end_index; index++) {
1360 page = find_get_page(mapping, index);
1361 if (page == NULL) {
1362 page = find_or_create_page(mapping, index, GFP_NOFS);
1363 if (page == NULL) {
1364 write_inode_now(mapping->host, 1);
1365 page = find_or_create_page(mapping, index, GFP_NOFS);
1366 }
1367 if (page == NULL) {
1368 put_pages(ns);
1369 return -ENOMEM;
1370 }
1371 unlock_page(page);
1372 }
1373 ns->held_pages[ns->held_cnt++] = page;
1374 }
1375 return 0;
1376}
1377
1378static int set_memalloc(void)
1379{
1380 if (current->flags & PF_MEMALLOC)
1381 return 0;
1382 current->flags |= PF_MEMALLOC;
1383 return 1;
1384}
1385
1386static void clear_memalloc(int memalloc)
1387{
1388 if (memalloc)
1389 current->flags &= ~PF_MEMALLOC;
1390}
1391
7bb307e8 1392static ssize_t read_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t pos)
a9fc8991 1393{
a9fc8991
AH		 1394 ssize_t tx;
1395 int err, memalloc;
1396
7bb307e8 1397 err = get_pages(ns, file, count, pos);
a9fc8991
AH		 1398 if (err)
1399 return err;
a9fc8991 1400 memalloc = set_memalloc();
7bb307e8 1401 tx = kernel_read(file, pos, buf, count);
a9fc8991 1402 clear_memalloc(memalloc);
a9fc8991
AH		 1403 put_pages(ns);
1404 return tx;
1405}
1406
7bb307e8 1407static ssize_t write_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t pos)
a9fc8991 1408{
a9fc8991
AH		 1409 ssize_t tx;
1410 int err, memalloc;
1411
7bb307e8 1412 err = get_pages(ns, file, count, pos);
a9fc8991
AH		 1413 if (err)
1414 return err;
a9fc8991 1415 memalloc = set_memalloc();
7bb307e8 1416 tx = kernel_write(file, buf, count, pos);
a9fc8991 1417 clear_memalloc(memalloc);
a9fc8991
AH		 1418 put_pages(ns);
1419 return tx;
1420}
1421
d086d436
VK		 1422/*
1423 * Returns a pointer to the current page.
1424 */
1425static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1426{
1427 return &(ns->pages[ns->regs.row]);
1428}
1429
1430/*
1431 * Retuns a pointer to the current byte, within the current page.
1432 */
1433static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1434{
1435 return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1436}
1437
a9fc8991
AH		 1438int do_read_error(struct nandsim *ns, int num)
1439{
1440 unsigned int page_no = ns->regs.row;
1441
1442 if (read_error(page_no)) {
7e45bf83 1443 prandom_bytes(ns->buf.byte, num);
a9fc8991
AH		 1444 NS_WARN("simulating read error in page %u\n", page_no);
1445 return 1;
1446 }
1447 return 0;
1448}
1449
1450void do_bit_flips(struct nandsim *ns, int num)
1451{
aca662a3 1452 if (bitflips && prandom_u32() < (1 << 22)) {
a9fc8991
AH		 1453 int flips = 1;
1454 if (bitflips > 1)
aca662a3 1455 flips = (prandom_u32() % (int) bitflips) + 1;
a9fc8991 1456 while (flips--) {
aca662a3 1457 int pos = prandom_u32() % (num * 8);
a9fc8991
AH		 1458 ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1459 NS_WARN("read_page: flipping bit %d in page %d "
1460 "reading from %d ecc: corrected=%u failed=%u\n",
1461 pos, ns->regs.row, ns->regs.column + ns->regs.off,
1462 nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1463 }
1464 }
1465}
1466
d086d436
VK		 1467/*
1468 * Fill the NAND buffer with data read from the specified page.
1469 */
1470static void read_page(struct nandsim *ns, int num)
1471{
1472 union ns_mem *mypage;
1473
a9fc8991 1474 if (ns->cfile) {
08efe91a 1475 if (!test_bit(ns->regs.row, ns->pages_written)) {
a9fc8991
AH		 1476 NS_DBG("read_page: page %d not written\n", ns->regs.row);
1477 memset(ns->buf.byte, 0xFF, num);
1478 } else {
1479 loff_t pos;
1480 ssize_t tx;
1481
1482 NS_DBG("read_page: page %d written, reading from %d\n",
1483 ns->regs.row, ns->regs.column + ns->regs.off);
1484 if (do_read_error(ns, num))
1485 return;
6d07fcf7 1486 pos = (loff_t)NS_RAW_OFFSET(ns) + ns->regs.off;
7bb307e8 1487 tx = read_file(ns, ns->cfile, ns->buf.byte, num, pos);
a9fc8991
AH		 1488 if (tx != num) {
1489 NS_ERR("read_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1490 return;
1491 }
1492 do_bit_flips(ns, num);
1493 }
1494 return;
1495 }
1496
d086d436
VK		 1497 mypage = NS_GET_PAGE(ns);
1498 if (mypage->byte == NULL) {
1499 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1500 memset(ns->buf.byte, 0xFF, num);
1501 } else {
1502 NS_DBG("read_page: page %d allocated, reading from %d\n",
1503 ns->regs.row, ns->regs.column + ns->regs.off);
a9fc8991 1504 if (do_read_error(ns, num))
514087e7 1505 return;
d086d436 1506 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
a9fc8991 1507 do_bit_flips(ns, num);
d086d436
VK		 1508 }
1509}
1510
1511/*
1512 * Erase all pages in the specified sector.
1513 */
1514static void erase_sector(struct nandsim *ns)
1515{
1516 union ns_mem *mypage;
1517 int i;
1518
a9fc8991
AH		 1519 if (ns->cfile) {
1520 for (i = 0; i < ns->geom.pgsec; i++)
08efe91a
AM		 1521 if (__test_and_clear_bit(ns->regs.row + i,
1522 ns->pages_written)) {
a9fc8991 1523 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row + i);
a9fc8991
AH		 1524 }
1525 return;
1526 }
1527
d086d436
VK		 1528 mypage = NS_GET_PAGE(ns);
1529 for (i = 0; i < ns->geom.pgsec; i++) {
1530 if (mypage->byte != NULL) {
1531 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
8a4c2495 1532 kmem_cache_free(ns->nand_pages_slab, mypage->byte);
d086d436
VK		 1533 mypage->byte = NULL;
1534 }
1535 mypage++;
1536 }
1537}
1538
1539/*
1540 * Program the specified page with the contents from the NAND buffer.
1541 */
1542static int prog_page(struct nandsim *ns, int num)
1543{
82810b7b 1544 int i;
d086d436
VK		 1545 union ns_mem *mypage;
1546 u_char *pg_off;
1547
a9fc8991 1548 if (ns->cfile) {
7bb307e8 1549 loff_t off;
a9fc8991
AH		 1550 ssize_t tx;
1551 int all;
1552
1553 NS_DBG("prog_page: writing page %d\n", ns->regs.row);
1554 pg_off = ns->file_buf + ns->regs.column + ns->regs.off;
6d07fcf7 1555 off = (loff_t)NS_RAW_OFFSET(ns) + ns->regs.off;
08efe91a 1556 if (!test_bit(ns->regs.row, ns->pages_written)) {
a9fc8991
AH		 1557 all = 1;
1558 memset(ns->file_buf, 0xff, ns->geom.pgszoob);
1559 } else {
1560 all = 0;
7bb307e8 1561 tx = read_file(ns, ns->cfile, pg_off, num, off);
a9fc8991
AH		 1562 if (tx != num) {
1563 NS_ERR("prog_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1564 return -1;
1565 }
1566 }
1567 for (i = 0; i < num; i++)
1568 pg_off[i] &= ns->buf.byte[i];
1569 if (all) {
7bb307e8
AV		 1570 loff_t pos = (loff_t)ns->regs.row * ns->geom.pgszoob;
1571 tx = write_file(ns, ns->cfile, ns->file_buf, ns->geom.pgszoob, pos);
a9fc8991
AH		 1572 if (tx != ns->geom.pgszoob) {
1573 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1574 return -1;
1575 }
08efe91a 1576 __set_bit(ns->regs.row, ns->pages_written);
a9fc8991 1577 } else {
7bb307e8 1578 tx = write_file(ns, ns->cfile, pg_off, num, off);
a9fc8991
AH		 1579 if (tx != num) {
1580 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1581 return -1;
1582 }
1583 }
1584 return 0;
1585 }
1586
d086d436
VK		 1587 mypage = NS_GET_PAGE(ns);
1588 if (mypage->byte == NULL) {
1589 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
98b830d2
AB		 1590 /*
1591 * We allocate memory with GFP_NOFS because a flash FS may
1592 * utilize this. If it is holding an FS lock, then gets here,
8a4c2495
AK		 1593 * then kernel memory alloc runs writeback which goes to the FS
1594 * again and deadlocks. This was seen in practice.
98b830d2 1595 */
8a4c2495 1596 mypage->byte = kmem_cache_alloc(ns->nand_pages_slab, GFP_NOFS);
d086d436
VK		 1597 if (mypage->byte == NULL) {
1598 NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1599 return -1;
1600 }
1601 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1602 }
1603
1604 pg_off = NS_PAGE_BYTE_OFF(ns);
82810b7b
AB		 1605 for (i = 0; i < num; i++)
1606 pg_off[i] &= ns->buf.byte[i];
d086d436
VK		 1607
1608 return 0;
1609}
1610
1da177e4
LT		 1611/*
1612 * If state has any action bit, perform this action.
1613 *
1614 * RETURNS: 0 if success, -1 if error.
1615 */
a5602146 1616static int do_state_action(struct nandsim *ns, uint32_t action)
1da177e4 1617{
d086d436 1618 int num;
1da177e4 1619 int busdiv = ns->busw == 8 ? 1 : 2;
514087e7 1620 unsigned int erase_block_no, page_no;
1da177e4
LT		 1621
1622 action &= ACTION_MASK;
61b03bd7 1623
1da177e4
LT		 1624 /* Check that page address input is correct */
1625 if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1626 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1627 return -1;
1628 }
1629
1630 switch (action) {
1631
1632 case ACTION_CPY:
1633 /*
1634 * Copy page data to the internal buffer.
1635 */
1636
1637 /* Column shouldn't be very large */
1638 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1639 NS_ERR("do_state_action: column number is too large\n");
1640 break;
1641 }
1642 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
d086d436 1643 read_page(ns, num);
1da177e4
LT		 1644
1645 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1646 num, NS_RAW_OFFSET(ns) + ns->regs.off);
61b03bd7 1647
1da177e4
LT		 1648 if (ns->regs.off == 0)
1649 NS_LOG("read page %d\n", ns->regs.row);
1650 else if (ns->regs.off < ns->geom.pgsz)
1651 NS_LOG("read page %d (second half)\n", ns->regs.row);
1652 else
1653 NS_LOG("read OOB of page %d\n", ns->regs.row);
61b03bd7 1654
1da177e4
LT		 1655 NS_UDELAY(access_delay);
1656 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1657
1658 break;
1659
1660 case ACTION_SECERASE:
1661 /*
1662 * Erase sector.
1663 */
61b03bd7 1664
1da177e4
LT		 1665 if (ns->lines.wp) {
1666 NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1667 return -1;
1668 }
61b03bd7 1669
1da177e4
LT		 1670 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1671 || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1672 NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1673 return -1;
1674 }
61b03bd7 1675
1da177e4
LT		 1676 ns->regs.row = (ns->regs.row <<
1677 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1678 ns->regs.column = 0;
61b03bd7 1679
514087e7
AH		 1680 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1681
1da177e4
LT		 1682 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1683 ns->regs.row, NS_RAW_OFFSET(ns));
514087e7 1684 NS_LOG("erase sector %u\n", erase_block_no);
1da177e4 1685
d086d436 1686 erase_sector(ns);
61b03bd7 1687
1da177e4 1688 NS_MDELAY(erase_delay);
61b03bd7 1689
57aa6b54
AH		 1690 if (erase_block_wear)
1691 update_wear(erase_block_no);
1692
514087e7
AH		 1693 if (erase_error(erase_block_no)) {
1694 NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1695 return -1;
1696 }
1697
1da177e4
LT		 1698 break;
1699
1700 case ACTION_PRGPAGE:
1701 /*
daf05ec0 1702 * Program page - move internal buffer data to the page.
1da177e4
LT		 1703 */
1704
1705 if (ns->lines.wp) {
1706 NS_WARN("do_state_action: device is write-protected, programm\n");
1707 return -1;
1708 }
1709
1710 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1711 if (num != ns->regs.count) {
1712 NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1713 ns->regs.count, num);
1714 return -1;
1715 }
1716
d086d436
VK		 1717 if (prog_page(ns, num) == -1)
1718 return -1;
1da177e4 1719
514087e7
AH		 1720 page_no = ns->regs.row;
1721
1da177e4
LT		 1722 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1723 num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1724 NS_LOG("programm page %d\n", ns->regs.row);
61b03bd7 1725
1da177e4
LT		 1726 NS_UDELAY(programm_delay);
1727 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
61b03bd7 1728
514087e7
AH		 1729 if (write_error(page_no)) {
1730 NS_WARN("simulating write failure in page %u\n", page_no);
1731 return -1;
1732 }
1733
1da177e4 1734 break;
61b03bd7 1735
1da177e4
LT		 1736 case ACTION_ZEROOFF:
1737 NS_DBG("do_state_action: set internal offset to 0\n");
1738 ns->regs.off = 0;
1739 break;
1740
1741 case ACTION_HALFOFF:
1742 if (!(ns->options & OPT_PAGE512_8BIT)) {
1743 NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1744 "byte page size 8x chips\n");
1745 return -1;
1746 }
1747 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1748 ns->regs.off = ns->geom.pgsz/2;
1749 break;
1750
1751 case ACTION_OOBOFF:
1752 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1753 ns->regs.off = ns->geom.pgsz;
1754 break;
61b03bd7 1755
1da177e4
LT		 1756 default:
1757 NS_DBG("do_state_action: BUG! unknown action\n");
1758 }
1759
1760 return 0;
1761}
1762
1763/*
1764 * Switch simulator's state.
1765 */
a5602146 1766static void switch_state(struct nandsim *ns)
1da177e4
LT		 1767{
1768 if (ns->op) {
1769 /*
1770 * The current operation have already been identified.
1771 * Just follow the states chain.
1772 */
61b03bd7 1773
1da177e4
LT		 1774 ns->stateidx += 1;
1775 ns->state = ns->nxstate;
1776 ns->nxstate = ns->op[ns->stateidx + 1];
1777
1778 NS_DBG("switch_state: operation is known, switch to the next state, "
1779 "state: %s, nxstate: %s\n",
1780 get_state_name(ns->state), get_state_name(ns->nxstate));
1781
1782 /* See, whether we need to do some action */
1783 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1784 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1785 return;
1786 }
61b03bd7 1787
1da177e4
LT		 1788 } else {
1789 /*
1790 * We don't yet know which operation we perform.
1791 * Try to identify it.
1792 */
1793
61b03bd7 1794 /*
1da177e4
LT		 1795 * The only event causing the switch_state function to
1796 * be called with yet unknown operation is new command.
1797 */
1798 ns->state = get_state_by_command(ns->regs.command);
1799
1800 NS_DBG("switch_state: operation is unknown, try to find it\n");
1801
1802 if (find_operation(ns, 0) != 0)
1803 return;
1804
1805 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1806 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1807 return;
1808 }
1809 }
1810
1811 /* For 16x devices column means the page offset in words */
1812 if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1813 NS_DBG("switch_state: double the column number for 16x device\n");
1814 ns->regs.column <<= 1;
1815 }
1816
1817 if (NS_STATE(ns->nxstate) == STATE_READY) {
1818 /*
1819 * The current state is the last. Return to STATE_READY
1820 */
1821
1822 u_char status = NS_STATUS_OK(ns);
61b03bd7 1823
1da177e4
LT		 1824 /* In case of data states, see if all bytes were input/output */
1825 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1826 && ns->regs.count != ns->regs.num) {
1827 NS_WARN("switch_state: not all bytes were processed, %d left\n",
1828 ns->regs.num - ns->regs.count);
1829 status = NS_STATUS_FAILED(ns);
1830 }
61b03bd7 1831
1da177e4
LT		 1832 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1833
1834 switch_to_ready_state(ns, status);
1835
1836 return;
1837 } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
61b03bd7 1838 /*
1da177e4
LT		 1839 * If the next state is data input/output, switch to it now
1840 */
61b03bd7 1841
1da177e4
LT		 1842 ns->state = ns->nxstate;
1843 ns->nxstate = ns->op[++ns->stateidx + 1];
1844 ns->regs.num = ns->regs.count = 0;
1845
1846 NS_DBG("switch_state: the next state is data I/O, switch, "
1847 "state: %s, nxstate: %s\n",
1848 get_state_name(ns->state), get_state_name(ns->nxstate));
1849
1850 /*
1851 * Set the internal register to the count of bytes which
1852 * are expected to be input or output
1853 */
1854 switch (NS_STATE(ns->state)) {
1855 case STATE_DATAIN:
1856 case STATE_DATAOUT:
1857 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1858 break;
61b03bd7 1859
1da177e4
LT		 1860 case STATE_DATAOUT_ID:
1861 ns->regs.num = ns->geom.idbytes;
1862 break;
61b03bd7 1863
1da177e4
LT		 1864 case STATE_DATAOUT_STATUS:
1865 case STATE_DATAOUT_STATUS_M:
1866 ns->regs.count = ns->regs.num = 0;
1867 break;
61b03bd7 1868
1da177e4
LT		 1869 default:
1870 NS_ERR("switch_state: BUG! unknown data state\n");
1871 }
1872
1873 } else if (ns->nxstate & STATE_ADDR_MASK) {
1874 /*
1875 * If the next state is address input, set the internal
1876 * register to the number of expected address bytes
1877 */
1878
1879 ns->regs.count = 0;
61b03bd7 1880
1da177e4
LT		 1881 switch (NS_STATE(ns->nxstate)) {
1882 case STATE_ADDR_PAGE:
1883 ns->regs.num = ns->geom.pgaddrbytes;
61b03bd7 1884
1da177e4
LT		 1885 break;
1886 case STATE_ADDR_SEC:
1887 ns->regs.num = ns->geom.secaddrbytes;
1888 break;
61b03bd7 1889
1da177e4
LT		 1890 case STATE_ADDR_ZERO:
1891 ns->regs.num = 1;
1892 break;
1893
74216be4
AB		 1894 case STATE_ADDR_COLUMN:
1895 /* Column address is always 2 bytes */
1896 ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes;
1897 break;
1898
1da177e4
LT		 1899 default:
1900 NS_ERR("switch_state: BUG! unknown address state\n");
1901 }
1902 } else {
61b03bd7 1903 /*
1da177e4
LT		 1904 * Just reset internal counters.
1905 */
1906
1907 ns->regs.num = 0;
1908 ns->regs.count = 0;
1909 }
1910}
1911
a5602146 1912static u_char ns_nand_read_byte(struct mtd_info *mtd)
1da177e4 1913{
7b8516b7 1914 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1da177e4
LT		 1915 u_char outb = 0x00;
1916
1917 /* Sanity and correctness checks */
1918 if (!ns->lines.ce) {
1919 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1920 return outb;
1921 }
1922 if (ns->lines.ale || ns->lines.cle) {
1923 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1924 return outb;
1925 }
1926 if (!(ns->state & STATE_DATAOUT_MASK)) {
1927 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1928 "return %#x\n", get_state_name(ns->state), (uint)outb);
1929 return outb;
1930 }
1931
1932 /* Status register may be read as many times as it is wanted */
1933 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1934 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1935 return ns->regs.status;
1936 }
1937
1938 /* Check if there is any data in the internal buffer which may be read */
1939 if (ns->regs.count == ns->regs.num) {
1940 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1941 return outb;
1942 }
1943
1944 switch (NS_STATE(ns->state)) {
1945 case STATE_DATAOUT:
1946 if (ns->busw == 8) {
1947 outb = ns->buf.byte[ns->regs.count];
1948 ns->regs.count += 1;
1949 } else {
1950 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1951 ns->regs.count += 2;
1952 }
1953 break;
1954 case STATE_DATAOUT_ID:
1955 NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1956 outb = ns->ids[ns->regs.count];
1957 ns->regs.count += 1;
1958 break;
1959 default:
1960 BUG();
1961 }
61b03bd7 1962
1da177e4
LT		 1963 if (ns->regs.count == ns->regs.num) {
1964 NS_DBG("read_byte: all bytes were read\n");
1965
831d316b 1966 if (NS_STATE(ns->nxstate) == STATE_READY)
1da177e4 1967 switch_state(ns);
1da177e4 1968 }
61b03bd7 1969
1da177e4
LT		 1970 return outb;
1971}
1972
a5602146 1973static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1da177e4 1974{
7b8516b7 1975 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
61b03bd7 1976
1da177e4
LT		 1977 /* Sanity and correctness checks */
1978 if (!ns->lines.ce) {
1979 NS_ERR("write_byte: chip is disabled, ignore write\n");
1980 return;
1981 }
1982 if (ns->lines.ale && ns->lines.cle) {
1983 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1984 return;
1985 }
61b03bd7 1986
1da177e4
LT		 1987 if (ns->lines.cle == 1) {
1988 /*
1989 * The byte written is a command.
1990 */
1991
1992 if (byte == NAND_CMD_RESET) {
1993 NS_LOG("reset chip\n");
1994 switch_to_ready_state(ns, NS_STATUS_OK(ns));
1995 return;
1996 }
1997
74216be4
AB		 1998 /* Check that the command byte is correct */
1999 if (check_command(byte)) {
2000 NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
2001 return;
2002 }
2003
1da177e4
LT		 2004 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
2005 || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M
74216be4
AB		 2006 || NS_STATE(ns->state) == STATE_DATAOUT) {
2007 int row = ns->regs.row;
2008
1da177e4 2009 switch_state(ns);
74216be4
AB		 2010 if (byte == NAND_CMD_RNDOUT)
2011 ns->regs.row = row;
2012 }
1da177e4
LT		 2013
2014 /* Check if chip is expecting command */
2015 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
9359ea46
AH		 2016 /* Do not warn if only 2 id bytes are read */
2017 if (!(ns->regs.command == NAND_CMD_READID &&
2018 NS_STATE(ns->state) == STATE_DATAOUT_ID && ns->regs.count == 2)) {
2019 /*
2020 * We are in situation when something else (not command)
2021 * was expected but command was input. In this case ignore
2022 * previous command(s)/state(s) and accept the last one.
2023 */
2024 NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
2025 "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate));
2026 }
1da177e4
LT		 2027 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2028 }
61b03bd7 2029
1da177e4
LT		 2030 NS_DBG("command byte corresponding to %s state accepted\n",
2031 get_state_name(get_state_by_command(byte)));
2032 ns->regs.command = byte;
2033 switch_state(ns);
2034
2035 } else if (ns->lines.ale == 1) {
2036 /*
2037 * The byte written is an address.
2038 */
2039
2040 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
2041
2042 NS_DBG("write_byte: operation isn't known yet, identify it\n");
2043
2044 if (find_operation(ns, 1) < 0)
2045 return;
61b03bd7 2046
1da177e4
LT		 2047 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
2048 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2049 return;
2050 }
61b03bd7 2051
1da177e4
LT		 2052 ns->regs.count = 0;
2053 switch (NS_STATE(ns->nxstate)) {
2054 case STATE_ADDR_PAGE:
2055 ns->regs.num = ns->geom.pgaddrbytes;
2056 break;
2057 case STATE_ADDR_SEC:
2058 ns->regs.num = ns->geom.secaddrbytes;
2059 break;
2060 case STATE_ADDR_ZERO:
2061 ns->regs.num = 1;
2062 break;
2063 default:
2064 BUG();
2065 }
2066 }
2067
2068 /* Check that chip is expecting address */
2069 if (!(ns->nxstate & STATE_ADDR_MASK)) {
2070 NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
2071 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate));
2072 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2073 return;
2074 }
61b03bd7 2075
1da177e4
LT		 2076 /* Check if this is expected byte */
2077 if (ns->regs.count == ns->regs.num) {
2078 NS_ERR("write_byte: no more address bytes expected\n");
2079 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2080 return;
2081 }
2082
2083 accept_addr_byte(ns, byte);
2084
2085 ns->regs.count += 1;
2086
2087 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
2088 (uint)byte, ns->regs.count, ns->regs.num);
2089
2090 if (ns->regs.count == ns->regs.num) {
2091 NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
2092 switch_state(ns);
2093 }
61b03bd7 2094
1da177e4
LT		 2095 } else {
2096 /*
2097 * The byte written is an input data.
2098 */
61b03bd7 2099
1da177e4
LT		 2100 /* Check that chip is expecting data input */
2101 if (!(ns->state & STATE_DATAIN_MASK)) {
2102 NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
2103 "switch to %s\n", (uint)byte,
2104 get_state_name(ns->state), get_state_name(STATE_READY));
2105 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2106 return;
2107 }
2108
2109 /* Check if this is expected byte */
2110 if (ns->regs.count == ns->regs.num) {
2111 NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
2112 ns->regs.num);
2113 return;
2114 }
2115
2116 if (ns->busw == 8) {
2117 ns->buf.byte[ns->regs.count] = byte;
2118 ns->regs.count += 1;
2119 } else {
2120 ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
2121 ns->regs.count += 2;
2122 }
2123 }
2124
2125 return;
2126}
2127
7abd3ef9
TG		 2128static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask)
2129{
2130 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2131
2132 ns->lines.cle = bitmask & NAND_CLE ? 1 : 0;
2133 ns->lines.ale = bitmask & NAND_ALE ? 1 : 0;
2134 ns->lines.ce = bitmask & NAND_NCE ? 1 : 0;
2135
2136 if (cmd != NAND_CMD_NONE)
2137 ns_nand_write_byte(mtd, cmd);
2138}
2139
a5602146 2140static int ns_device_ready(struct mtd_info *mtd)
1da177e4
LT		 2141{
2142 NS_DBG("device_ready\n");
2143 return 1;
2144}
2145
a5602146 2146static uint16_t ns_nand_read_word(struct mtd_info *mtd)
1da177e4
LT		 2147{
2148 struct nand_chip *chip = (struct nand_chip *)mtd->priv;
2149
2150 NS_DBG("read_word\n");
61b03bd7 2151
1da177e4
LT		 2152 return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8);
2153}
2154
a5602146 2155static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
1da177e4 2156{
7b8516b7 2157 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1da177e4
LT		 2158
2159 /* Check that chip is expecting data input */
2160 if (!(ns->state & STATE_DATAIN_MASK)) {
2161 NS_ERR("write_buf: data input isn't expected, state is %s, "
2162 "switch to STATE_READY\n", get_state_name(ns->state));
2163 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2164 return;
2165 }
2166
2167 /* Check if these are expected bytes */
2168 if (ns->regs.count + len > ns->regs.num) {
2169 NS_ERR("write_buf: too many input bytes\n");
2170 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2171 return;
2172 }
2173
2174 memcpy(ns->buf.byte + ns->regs.count, buf, len);
2175 ns->regs.count += len;
61b03bd7 2176
1da177e4
LT		 2177 if (ns->regs.count == ns->regs.num) {
2178 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
2179 }
2180}
2181
a5602146 2182static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
1da177e4 2183{
7b8516b7 2184 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1da177e4
LT		 2185
2186 /* Sanity and correctness checks */
2187 if (!ns->lines.ce) {
2188 NS_ERR("read_buf: chip is disabled\n");
2189 return;
2190 }
2191 if (ns->lines.ale || ns->lines.cle) {
2192 NS_ERR("read_buf: ALE or CLE pin is high\n");
2193 return;
2194 }
2195 if (!(ns->state & STATE_DATAOUT_MASK)) {
2196 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
2197 get_state_name(ns->state));
2198 return;
2199 }
2200
2201 if (NS_STATE(ns->state) != STATE_DATAOUT) {
2202 int i;
2203
2204 for (i = 0; i < len; i++)
2205 buf[i] = ((struct nand_chip *)mtd->priv)->read_byte(mtd);
2206
2207 return;
2208 }
2209
2210 /* Check if these are expected bytes */
2211 if (ns->regs.count + len > ns->regs.num) {
2212 NS_ERR("read_buf: too many bytes to read\n");
2213 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2214 return;
2215 }
2216
2217 memcpy(buf, ns->buf.byte + ns->regs.count, len);
2218 ns->regs.count += len;
61b03bd7 2219
1da177e4 2220 if (ns->regs.count == ns->regs.num) {
831d316b 2221 if (NS_STATE(ns->nxstate) == STATE_READY)
1da177e4
LT		 2222 switch_state(ns);
2223 }
61b03bd7 2224
1da177e4
LT		 2225 return;
2226}
2227
1da177e4
LT		 2228/*
2229 * Module initialization function
2230 */
2b9175c1 2231static int __init ns_init_module(void)
1da177e4
LT		 2232{
2233 struct nand_chip *chip;
2234 struct nandsim *nand;
2b77a0ed 2235 int retval = -ENOMEM, i;
1da177e4
LT		 2236
2237 if (bus_width != 8 && bus_width != 16) {
2238 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
2239 return -EINVAL;
2240 }
61b03bd7 2241
1da177e4 2242 /* Allocate and initialize mtd_info, nand_chip and nandsim structures */
95b93a0c 2243 nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip)
1da177e4
LT		 2244 + sizeof(struct nandsim), GFP_KERNEL);
2245 if (!nsmtd) {
2246 NS_ERR("unable to allocate core structures.\n");
2247 return -ENOMEM;
2248 }
1da177e4
LT		 2249 chip = (struct nand_chip *)(nsmtd + 1);
2250 nsmtd->priv = (void *)chip;
2251 nand = (struct nandsim *)(chip + 1);
61b03bd7 2252 chip->priv = (void *)nand;
1da177e4
LT		 2253
2254 /*
2255 * Register simulator's callbacks.
2256 */
7abd3ef9 2257 chip->cmd_ctrl = ns_hwcontrol;
1da177e4
LT		 2258 chip->read_byte = ns_nand_read_byte;
2259 chip->dev_ready = ns_device_ready;
1da177e4
LT		 2260 chip->write_buf = ns_nand_write_buf;
2261 chip->read_buf = ns_nand_read_buf;
1da177e4 2262 chip->read_word = ns_nand_read_word;
6dfc6d25 2263 chip->ecc.mode = NAND_ECC_SOFT;
a5ac8aeb
AH		 2264 /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
2265 /* and 'badblocks' parameters to work */
51502287 2266 chip->options |= NAND_SKIP_BBTSCAN;
1da177e4 2267
ce85b79f
SAS		 2268 switch (bbt) {
2269 case 2:
a40f7341 2270 chip->bbt_options |= NAND_BBT_NO_OOB;
ce85b79f 2271 case 1:
bb9ebd4e 2272 chip->bbt_options |= NAND_BBT_USE_FLASH;
ce85b79f
SAS		 2273 case 0:
2274 break;
2275 default:
2276 NS_ERR("bbt has to be 0..2\n");
2277 retval = -EINVAL;
2278 goto error;
2279 }
61b03bd7 2280 /*
1da177e4 2281 * Perform minimum nandsim structure initialization to handle
61b03bd7 2282 * the initial ID read command correctly
1da177e4
LT		 2283 */
2284 if (third_id_byte != 0xFF || fourth_id_byte != 0xFF)
2285 nand->geom.idbytes = 4;
2286 else
2287 nand->geom.idbytes = 2;
2288 nand->regs.status = NS_STATUS_OK(nand);
2289 nand->nxstate = STATE_UNKNOWN;
51148f1f 2290 nand->options |= OPT_PAGE512; /* temporary value */
1da177e4
LT		 2291 nand->ids[0] = first_id_byte;
2292 nand->ids[1] = second_id_byte;
2293 nand->ids[2] = third_id_byte;
2294 nand->ids[3] = fourth_id_byte;
2295 if (bus_width == 16) {
2296 nand->busw = 16;
2297 chip->options |= NAND_BUSWIDTH_16;
2298 }
2299
552d9205
DW		 2300 nsmtd->owner = THIS_MODULE;
2301
514087e7
AH		 2302 if ((retval = parse_weakblocks()) != 0)
2303 goto error;
2304
2305 if ((retval = parse_weakpages()) != 0)
2306 goto error;
2307
2308 if ((retval = parse_gravepages()) != 0)
2309 goto error;
2310
fc2ff592
ID		 2311 retval = nand_scan_ident(nsmtd, 1, NULL);
2312 if (retval) {
2313 NS_ERR("cannot scan NAND Simulator device\n");
2314 if (retval > 0)
2315 retval = -ENXIO;
2316 goto error;
2317 }
2318
2319 if (bch) {
2320 unsigned int eccsteps, eccbytes;
2321 if (!mtd_nand_has_bch()) {
2322 NS_ERR("BCH ECC support is disabled\n");
2323 retval = -EINVAL;
2324 goto error;
2325 }
2326 /* use 512-byte ecc blocks */
2327 eccsteps = nsmtd->writesize/512;
2328 eccbytes = (bch*13+7)/8;
2329 /* do not bother supporting small page devices */
2330 if ((nsmtd->oobsize < 64) || !eccsteps) {
2331 NS_ERR("bch not available on small page devices\n");
2332 retval = -EINVAL;
2333 goto error;
2334 }
2335 if ((eccbytes*eccsteps+2) > nsmtd->oobsize) {
2336 NS_ERR("invalid bch value %u\n", bch);
2337 retval = -EINVAL;
2338 goto error;
2339 }
2340 chip->ecc.mode = NAND_ECC_SOFT_BCH;
2341 chip->ecc.size = 512;
2342 chip->ecc.bytes = eccbytes;
2343 NS_INFO("using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size);
2344 }
2345
2346 retval = nand_scan_tail(nsmtd);
2347 if (retval) {
1da177e4
LT		 2348 NS_ERR("can't register NAND Simulator\n");
2349 if (retval > 0)
2350 retval = -ENXIO;
2351 goto error;
2352 }
2353
a5ac8aeb 2354 if (overridesize) {
0f07a0be 2355 uint64_t new_size = (uint64_t)nsmtd->erasesize << overridesize;
a5ac8aeb
AH		 2356 if (new_size >> overridesize != nsmtd->erasesize) {
2357 NS_ERR("overridesize is too big\n");
bb0a13a1 2358 retval = -EINVAL;
a5ac8aeb
AH		 2359 goto err_exit;
2360 }
2361 /* N.B. This relies on nand_scan not doing anything with the size before we change it */
2362 nsmtd->size = new_size;
2363 chip->chipsize = new_size;
6eda7a55 2364 chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1;
07293b20 2365 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
a5ac8aeb
AH		 2366 }
2367
57aa6b54
AH		 2368 if ((retval = setup_wear_reporting(nsmtd)) != 0)
2369 goto err_exit;
2370
5346c27c
EG		 2371 if ((retval = nandsim_debugfs_create(nand)) != 0)
2372 goto err_exit;
2373
2b77a0ed
AH		 2374 if ((retval = init_nandsim(nsmtd)) != 0)
2375 goto err_exit;
61b03bd7 2376
ce85b79f 2377 if ((retval = nand_default_bbt(nsmtd)) != 0)
514087e7
AH		 2378 goto err_exit;
2379
ce85b79f 2380 if ((retval = parse_badblocks(nand, nsmtd)) != 0)
2b77a0ed 2381 goto err_exit;
51502287 2382
2b77a0ed 2383 /* Register NAND partitions */
ee0e87b1
JI		 2384 retval = mtd_device_register(nsmtd, &nand->partitions[0],
2385 nand->nbparts);
2386 if (retval != 0)
2b77a0ed 2387 goto err_exit;
1da177e4
LT		 2388
2389 return 0;
2390
2b77a0ed
AH		 2391err_exit:
2392 free_nandsim(nand);
2393 nand_release(nsmtd);
2394 for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i)
2395 kfree(nand->partitions[i].name);
1da177e4
LT		 2396error:
2397 kfree(nsmtd);
514087e7 2398 free_lists();
1da177e4
LT		 2399
2400 return retval;
2401}
2402
2403module_init(ns_init_module);
2404
2405/*
2406 * Module clean-up function
2407 */
2408static void __exit ns_cleanup_module(void)
2409{
7b8516b7 2410 struct nandsim *ns = ((struct nand_chip *)nsmtd->priv)->priv;
2b77a0ed 2411 int i;
1da177e4 2412
5346c27c 2413 nandsim_debugfs_remove(ns);
1da177e4 2414 free_nandsim(ns); /* Free nandsim private resources */
2b77a0ed
AH		 2415 nand_release(nsmtd); /* Unregister driver */
2416 for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
2417 kfree(ns->partitions[i].name);
1da177e4 2418 kfree(nsmtd); /* Free other structures */
514087e7 2419 free_lists();
1da177e4
LT		 2420}
2421
2422module_exit(ns_cleanup_module);
2423
2424MODULE_LICENSE ("GPL");
2425MODULE_AUTHOR ("Artem B. Bityuckiy");
2426MODULE_DESCRIPTION ("The NAND flash simulator");
Linux 6.x block layer and io_uring tree(s)