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10a2bcae HS |
1 | /* |
2 | * Freescale GPMI NAND Flash Driver | |
3 | * | |
4 | * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. | |
5 | * Copyright (C) 2008 Embedded Alley Solutions, Inc. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License along | |
18 | * with this program; if not, write to the Free Software Foundation, Inc., | |
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | |
20 | */ | |
3d10095a FE |
21 | |
22 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
23 | ||
10a2bcae HS |
24 | #include <linux/clk.h> |
25 | #include <linux/slab.h> | |
26 | #include <linux/interrupt.h> | |
df16c86a | 27 | #include <linux/module.h> |
10a2bcae | 28 | #include <linux/mtd/partitions.h> |
39febc01 | 29 | #include <linux/pinctrl/consumer.h> |
e10db1f0 HS |
30 | #include <linux/of.h> |
31 | #include <linux/of_device.h> | |
c50c6940 | 32 | #include <linux/of_mtd.h> |
10a2bcae HS |
33 | #include "gpmi-nand.h" |
34 | ||
5de0b52e HS |
35 | /* Resource names for the GPMI NAND driver. */ |
36 | #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand" | |
37 | #define GPMI_NAND_BCH_REGS_ADDR_RES_NAME "bch" | |
38 | #define GPMI_NAND_BCH_INTERRUPT_RES_NAME "bch" | |
39 | #define GPMI_NAND_DMA_INTERRUPT_RES_NAME "gpmi-dma" | |
40 | ||
10a2bcae HS |
41 | /* add our owner bbt descriptor */ |
42 | static uint8_t scan_ff_pattern[] = { 0xff }; | |
43 | static struct nand_bbt_descr gpmi_bbt_descr = { | |
44 | .options = 0, | |
45 | .offs = 0, | |
46 | .len = 1, | |
47 | .pattern = scan_ff_pattern | |
48 | }; | |
49 | ||
50 | /* We will use all the (page + OOB). */ | |
51 | static struct nand_ecclayout gpmi_hw_ecclayout = { | |
52 | .eccbytes = 0, | |
53 | .eccpos = { 0, }, | |
54 | .oobfree = { {.offset = 0, .length = 0} } | |
55 | }; | |
56 | ||
57 | static irqreturn_t bch_irq(int irq, void *cookie) | |
58 | { | |
59 | struct gpmi_nand_data *this = cookie; | |
60 | ||
61 | gpmi_clear_bch(this); | |
62 | complete(&this->bch_done); | |
63 | return IRQ_HANDLED; | |
64 | } | |
65 | ||
66 | /* | |
67 | * Calculate the ECC strength by hand: | |
68 | * E : The ECC strength. | |
69 | * G : the length of Galois Field. | |
70 | * N : The chunk count of per page. | |
71 | * O : the oobsize of the NAND chip. | |
72 | * M : the metasize of per page. | |
73 | * | |
74 | * The formula is : | |
75 | * E * G * N | |
76 | * ------------ <= (O - M) | |
77 | * 8 | |
78 | * | |
79 | * So, we get E by: | |
80 | * (O - M) * 8 | |
81 | * E <= ------------- | |
82 | * G * N | |
83 | */ | |
84 | static inline int get_ecc_strength(struct gpmi_nand_data *this) | |
85 | { | |
86 | struct bch_geometry *geo = &this->bch_geometry; | |
87 | struct mtd_info *mtd = &this->mtd; | |
88 | int ecc_strength; | |
89 | ||
90 | ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8) | |
91 | / (geo->gf_len * geo->ecc_chunk_count); | |
92 | ||
93 | /* We need the minor even number. */ | |
94 | return round_down(ecc_strength, 2); | |
95 | } | |
96 | ||
97 | int common_nfc_set_geometry(struct gpmi_nand_data *this) | |
98 | { | |
99 | struct bch_geometry *geo = &this->bch_geometry; | |
100 | struct mtd_info *mtd = &this->mtd; | |
101 | unsigned int metadata_size; | |
102 | unsigned int status_size; | |
103 | unsigned int block_mark_bit_offset; | |
104 | ||
105 | /* | |
106 | * The size of the metadata can be changed, though we set it to 10 | |
107 | * bytes now. But it can't be too large, because we have to save | |
108 | * enough space for BCH. | |
109 | */ | |
110 | geo->metadata_size = 10; | |
111 | ||
112 | /* The default for the length of Galois Field. */ | |
113 | geo->gf_len = 13; | |
114 | ||
115 | /* The default for chunk size. There is no oobsize greater then 512. */ | |
116 | geo->ecc_chunk_size = 512; | |
117 | while (geo->ecc_chunk_size < mtd->oobsize) | |
118 | geo->ecc_chunk_size *= 2; /* keep C >= O */ | |
119 | ||
120 | geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; | |
121 | ||
122 | /* We use the same ECC strength for all chunks. */ | |
123 | geo->ecc_strength = get_ecc_strength(this); | |
124 | if (!geo->ecc_strength) { | |
3d10095a | 125 | pr_err("wrong ECC strength.\n"); |
10a2bcae HS |
126 | return -EINVAL; |
127 | } | |
128 | ||
129 | geo->page_size = mtd->writesize + mtd->oobsize; | |
130 | geo->payload_size = mtd->writesize; | |
131 | ||
132 | /* | |
133 | * The auxiliary buffer contains the metadata and the ECC status. The | |
134 | * metadata is padded to the nearest 32-bit boundary. The ECC status | |
135 | * contains one byte for every ECC chunk, and is also padded to the | |
136 | * nearest 32-bit boundary. | |
137 | */ | |
138 | metadata_size = ALIGN(geo->metadata_size, 4); | |
139 | status_size = ALIGN(geo->ecc_chunk_count, 4); | |
140 | ||
141 | geo->auxiliary_size = metadata_size + status_size; | |
142 | geo->auxiliary_status_offset = metadata_size; | |
143 | ||
144 | if (!this->swap_block_mark) | |
145 | return 0; | |
146 | ||
147 | /* | |
148 | * We need to compute the byte and bit offsets of | |
149 | * the physical block mark within the ECC-based view of the page. | |
150 | * | |
151 | * NAND chip with 2K page shows below: | |
152 | * (Block Mark) | |
153 | * | | | |
154 | * | D | | |
155 | * |<---->| | |
156 | * V V | |
157 | * +---+----------+-+----------+-+----------+-+----------+-+ | |
158 | * | M | data |E| data |E| data |E| data |E| | |
159 | * +---+----------+-+----------+-+----------+-+----------+-+ | |
160 | * | |
161 | * The position of block mark moves forward in the ECC-based view | |
162 | * of page, and the delta is: | |
163 | * | |
164 | * E * G * (N - 1) | |
165 | * D = (---------------- + M) | |
166 | * 8 | |
167 | * | |
168 | * With the formula to compute the ECC strength, and the condition | |
169 | * : C >= O (C is the ecc chunk size) | |
170 | * | |
171 | * It's easy to deduce to the following result: | |
172 | * | |
173 | * E * G (O - M) C - M C - M | |
174 | * ----------- <= ------- <= -------- < --------- | |
175 | * 8 N N (N - 1) | |
176 | * | |
177 | * So, we get: | |
178 | * | |
179 | * E * G * (N - 1) | |
180 | * D = (---------------- + M) < C | |
181 | * 8 | |
182 | * | |
183 | * The above inequality means the position of block mark | |
184 | * within the ECC-based view of the page is still in the data chunk, | |
185 | * and it's NOT in the ECC bits of the chunk. | |
186 | * | |
187 | * Use the following to compute the bit position of the | |
188 | * physical block mark within the ECC-based view of the page: | |
189 | * (page_size - D) * 8 | |
190 | * | |
191 | * --Huang Shijie | |
192 | */ | |
193 | block_mark_bit_offset = mtd->writesize * 8 - | |
194 | (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1) | |
195 | + geo->metadata_size * 8); | |
196 | ||
197 | geo->block_mark_byte_offset = block_mark_bit_offset / 8; | |
198 | geo->block_mark_bit_offset = block_mark_bit_offset % 8; | |
199 | return 0; | |
200 | } | |
201 | ||
202 | struct dma_chan *get_dma_chan(struct gpmi_nand_data *this) | |
203 | { | |
204 | int chipnr = this->current_chip; | |
205 | ||
206 | return this->dma_chans[chipnr]; | |
207 | } | |
208 | ||
209 | /* Can we use the upper's buffer directly for DMA? */ | |
210 | void prepare_data_dma(struct gpmi_nand_data *this, enum dma_data_direction dr) | |
211 | { | |
212 | struct scatterlist *sgl = &this->data_sgl; | |
213 | int ret; | |
214 | ||
215 | this->direct_dma_map_ok = true; | |
216 | ||
217 | /* first try to map the upper buffer directly */ | |
218 | sg_init_one(sgl, this->upper_buf, this->upper_len); | |
219 | ret = dma_map_sg(this->dev, sgl, 1, dr); | |
220 | if (ret == 0) { | |
221 | /* We have to use our own DMA buffer. */ | |
222 | sg_init_one(sgl, this->data_buffer_dma, PAGE_SIZE); | |
223 | ||
224 | if (dr == DMA_TO_DEVICE) | |
225 | memcpy(this->data_buffer_dma, this->upper_buf, | |
226 | this->upper_len); | |
227 | ||
228 | ret = dma_map_sg(this->dev, sgl, 1, dr); | |
229 | if (ret == 0) | |
2d350e5a | 230 | pr_err("DMA mapping failed.\n"); |
10a2bcae HS |
231 | |
232 | this->direct_dma_map_ok = false; | |
233 | } | |
234 | } | |
235 | ||
236 | /* This will be called after the DMA operation is finished. */ | |
237 | static void dma_irq_callback(void *param) | |
238 | { | |
239 | struct gpmi_nand_data *this = param; | |
240 | struct completion *dma_c = &this->dma_done; | |
241 | ||
242 | complete(dma_c); | |
243 | ||
244 | switch (this->dma_type) { | |
245 | case DMA_FOR_COMMAND: | |
246 | dma_unmap_sg(this->dev, &this->cmd_sgl, 1, DMA_TO_DEVICE); | |
247 | break; | |
248 | ||
249 | case DMA_FOR_READ_DATA: | |
250 | dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_FROM_DEVICE); | |
251 | if (this->direct_dma_map_ok == false) | |
252 | memcpy(this->upper_buf, this->data_buffer_dma, | |
253 | this->upper_len); | |
254 | break; | |
255 | ||
256 | case DMA_FOR_WRITE_DATA: | |
257 | dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_TO_DEVICE); | |
258 | break; | |
259 | ||
260 | case DMA_FOR_READ_ECC_PAGE: | |
261 | case DMA_FOR_WRITE_ECC_PAGE: | |
262 | /* We have to wait the BCH interrupt to finish. */ | |
263 | break; | |
264 | ||
265 | default: | |
266 | pr_err("in wrong DMA operation.\n"); | |
267 | } | |
268 | } | |
269 | ||
270 | int start_dma_without_bch_irq(struct gpmi_nand_data *this, | |
271 | struct dma_async_tx_descriptor *desc) | |
272 | { | |
273 | struct completion *dma_c = &this->dma_done; | |
274 | int err; | |
275 | ||
276 | init_completion(dma_c); | |
277 | ||
278 | desc->callback = dma_irq_callback; | |
279 | desc->callback_param = this; | |
280 | dmaengine_submit(desc); | |
d04525ed | 281 | dma_async_issue_pending(get_dma_chan(this)); |
10a2bcae HS |
282 | |
283 | /* Wait for the interrupt from the DMA block. */ | |
284 | err = wait_for_completion_timeout(dma_c, msecs_to_jiffies(1000)); | |
285 | if (!err) { | |
286 | pr_err("DMA timeout, last DMA :%d\n", this->last_dma_type); | |
287 | gpmi_dump_info(this); | |
288 | return -ETIMEDOUT; | |
289 | } | |
290 | return 0; | |
291 | } | |
292 | ||
293 | /* | |
294 | * This function is used in BCH reading or BCH writing pages. | |
295 | * It will wait for the BCH interrupt as long as ONE second. | |
296 | * Actually, we must wait for two interrupts : | |
297 | * [1] firstly the DMA interrupt and | |
298 | * [2] secondly the BCH interrupt. | |
299 | */ | |
300 | int start_dma_with_bch_irq(struct gpmi_nand_data *this, | |
301 | struct dma_async_tx_descriptor *desc) | |
302 | { | |
303 | struct completion *bch_c = &this->bch_done; | |
304 | int err; | |
305 | ||
306 | /* Prepare to receive an interrupt from the BCH block. */ | |
307 | init_completion(bch_c); | |
308 | ||
309 | /* start the DMA */ | |
310 | start_dma_without_bch_irq(this, desc); | |
311 | ||
312 | /* Wait for the interrupt from the BCH block. */ | |
313 | err = wait_for_completion_timeout(bch_c, msecs_to_jiffies(1000)); | |
314 | if (!err) { | |
315 | pr_err("BCH timeout, last DMA :%d\n", this->last_dma_type); | |
316 | gpmi_dump_info(this); | |
317 | return -ETIMEDOUT; | |
318 | } | |
319 | return 0; | |
320 | } | |
321 | ||
d8929942 GKH |
322 | static int acquire_register_block(struct gpmi_nand_data *this, |
323 | const char *res_name) | |
10a2bcae HS |
324 | { |
325 | struct platform_device *pdev = this->pdev; | |
326 | struct resources *res = &this->resources; | |
327 | struct resource *r; | |
513d57e1 | 328 | void __iomem *p; |
10a2bcae HS |
329 | |
330 | r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name); | |
331 | if (!r) { | |
332 | pr_err("Can't get resource for %s\n", res_name); | |
333 | return -ENXIO; | |
334 | } | |
335 | ||
336 | p = ioremap(r->start, resource_size(r)); | |
337 | if (!p) { | |
338 | pr_err("Can't remap %s\n", res_name); | |
339 | return -ENOMEM; | |
340 | } | |
341 | ||
342 | if (!strcmp(res_name, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME)) | |
343 | res->gpmi_regs = p; | |
344 | else if (!strcmp(res_name, GPMI_NAND_BCH_REGS_ADDR_RES_NAME)) | |
345 | res->bch_regs = p; | |
346 | else | |
347 | pr_err("unknown resource name : %s\n", res_name); | |
348 | ||
349 | return 0; | |
350 | } | |
351 | ||
352 | static void release_register_block(struct gpmi_nand_data *this) | |
353 | { | |
354 | struct resources *res = &this->resources; | |
355 | if (res->gpmi_regs) | |
356 | iounmap(res->gpmi_regs); | |
357 | if (res->bch_regs) | |
358 | iounmap(res->bch_regs); | |
359 | res->gpmi_regs = NULL; | |
360 | res->bch_regs = NULL; | |
361 | } | |
362 | ||
d8929942 | 363 | static int acquire_bch_irq(struct gpmi_nand_data *this, irq_handler_t irq_h) |
10a2bcae HS |
364 | { |
365 | struct platform_device *pdev = this->pdev; | |
366 | struct resources *res = &this->resources; | |
367 | const char *res_name = GPMI_NAND_BCH_INTERRUPT_RES_NAME; | |
368 | struct resource *r; | |
369 | int err; | |
370 | ||
371 | r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name); | |
372 | if (!r) { | |
373 | pr_err("Can't get resource for %s\n", res_name); | |
374 | return -ENXIO; | |
375 | } | |
376 | ||
377 | err = request_irq(r->start, irq_h, 0, res_name, this); | |
378 | if (err) { | |
379 | pr_err("Can't own %s\n", res_name); | |
380 | return err; | |
381 | } | |
382 | ||
383 | res->bch_low_interrupt = r->start; | |
384 | res->bch_high_interrupt = r->end; | |
385 | return 0; | |
386 | } | |
387 | ||
388 | static void release_bch_irq(struct gpmi_nand_data *this) | |
389 | { | |
390 | struct resources *res = &this->resources; | |
391 | int i = res->bch_low_interrupt; | |
392 | ||
393 | for (; i <= res->bch_high_interrupt; i++) | |
394 | free_irq(i, this); | |
395 | } | |
396 | ||
397 | static bool gpmi_dma_filter(struct dma_chan *chan, void *param) | |
398 | { | |
399 | struct gpmi_nand_data *this = param; | |
e10db1f0 | 400 | int dma_channel = (int)this->private; |
10a2bcae HS |
401 | |
402 | if (!mxs_dma_is_apbh(chan)) | |
403 | return false; | |
404 | /* | |
405 | * only catch the GPMI dma channels : | |
406 | * for mx23 : MX23_DMA_GPMI0 ~ MX23_DMA_GPMI3 | |
407 | * (These four channels share the same IRQ!) | |
408 | * | |
409 | * for mx28 : MX28_DMA_GPMI0 ~ MX28_DMA_GPMI7 | |
410 | * (These eight channels share the same IRQ!) | |
411 | */ | |
e10db1f0 | 412 | if (dma_channel == chan->chan_id) { |
10a2bcae HS |
413 | chan->private = &this->dma_data; |
414 | return true; | |
415 | } | |
416 | return false; | |
417 | } | |
418 | ||
419 | static void release_dma_channels(struct gpmi_nand_data *this) | |
420 | { | |
421 | unsigned int i; | |
422 | for (i = 0; i < DMA_CHANS; i++) | |
423 | if (this->dma_chans[i]) { | |
424 | dma_release_channel(this->dma_chans[i]); | |
425 | this->dma_chans[i] = NULL; | |
426 | } | |
427 | } | |
428 | ||
06f25510 | 429 | static int acquire_dma_channels(struct gpmi_nand_data *this) |
10a2bcae HS |
430 | { |
431 | struct platform_device *pdev = this->pdev; | |
e10db1f0 HS |
432 | struct resource *r_dma; |
433 | struct device_node *dn; | |
513d57e1 HS |
434 | u32 dma_channel; |
435 | int ret; | |
e10db1f0 HS |
436 | struct dma_chan *dma_chan; |
437 | dma_cap_mask_t mask; | |
438 | ||
439 | /* dma channel, we only use the first one. */ | |
440 | dn = pdev->dev.of_node; | |
441 | ret = of_property_read_u32(dn, "fsl,gpmi-dma-channel", &dma_channel); | |
442 | if (ret) { | |
443 | pr_err("unable to get DMA channel from dt.\n"); | |
444 | goto acquire_err; | |
445 | } | |
446 | this->private = (void *)dma_channel; | |
10a2bcae | 447 | |
e10db1f0 | 448 | /* gpmi dma interrupt */ |
10a2bcae HS |
449 | r_dma = platform_get_resource_byname(pdev, IORESOURCE_IRQ, |
450 | GPMI_NAND_DMA_INTERRUPT_RES_NAME); | |
e10db1f0 | 451 | if (!r_dma) { |
10a2bcae | 452 | pr_err("Can't get resource for DMA\n"); |
e10db1f0 | 453 | goto acquire_err; |
10a2bcae | 454 | } |
e10db1f0 | 455 | this->dma_data.chan_irq = r_dma->start; |
10a2bcae | 456 | |
e10db1f0 HS |
457 | /* request dma channel */ |
458 | dma_cap_zero(mask); | |
459 | dma_cap_set(DMA_SLAVE, mask); | |
10a2bcae | 460 | |
e10db1f0 HS |
461 | dma_chan = dma_request_channel(mask, gpmi_dma_filter, this); |
462 | if (!dma_chan) { | |
2d350e5a | 463 | pr_err("Failed to request DMA channel.\n"); |
e10db1f0 | 464 | goto acquire_err; |
10a2bcae HS |
465 | } |
466 | ||
e10db1f0 | 467 | this->dma_chans[0] = dma_chan; |
10a2bcae HS |
468 | return 0; |
469 | ||
470 | acquire_err: | |
10a2bcae HS |
471 | release_dma_channels(this); |
472 | return -EINVAL; | |
473 | } | |
474 | ||
ff506172 HS |
475 | static void gpmi_put_clks(struct gpmi_nand_data *this) |
476 | { | |
477 | struct resources *r = &this->resources; | |
478 | struct clk *clk; | |
479 | int i; | |
480 | ||
481 | for (i = 0; i < GPMI_CLK_MAX; i++) { | |
482 | clk = r->clock[i]; | |
483 | if (clk) { | |
484 | clk_put(clk); | |
485 | r->clock[i] = NULL; | |
486 | } | |
487 | } | |
488 | } | |
489 | ||
490 | static char *extra_clks_for_mx6q[GPMI_CLK_MAX] = { | |
491 | "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch", | |
492 | }; | |
493 | ||
06f25510 | 494 | static int gpmi_get_clks(struct gpmi_nand_data *this) |
ff506172 HS |
495 | { |
496 | struct resources *r = &this->resources; | |
497 | char **extra_clks = NULL; | |
498 | struct clk *clk; | |
499 | int i; | |
500 | ||
501 | /* The main clock is stored in the first. */ | |
502 | r->clock[0] = clk_get(this->dev, "gpmi_io"); | |
503 | if (IS_ERR(r->clock[0])) | |
504 | goto err_clock; | |
505 | ||
506 | /* Get extra clocks */ | |
507 | if (GPMI_IS_MX6Q(this)) | |
508 | extra_clks = extra_clks_for_mx6q; | |
509 | if (!extra_clks) | |
510 | return 0; | |
511 | ||
512 | for (i = 1; i < GPMI_CLK_MAX; i++) { | |
513 | if (extra_clks[i - 1] == NULL) | |
514 | break; | |
515 | ||
516 | clk = clk_get(this->dev, extra_clks[i - 1]); | |
517 | if (IS_ERR(clk)) | |
518 | goto err_clock; | |
519 | ||
520 | r->clock[i] = clk; | |
521 | } | |
522 | ||
e1ca95e3 | 523 | if (GPMI_IS_MX6Q(this)) |
ff506172 | 524 | /* |
e1ca95e3 | 525 | * Set the default value for the gpmi clock in mx6q: |
ff506172 | 526 | * |
e1ca95e3 HS |
527 | * If you want to use the ONFI nand which is in the |
528 | * Synchronous Mode, you should change the clock as you need. | |
ff506172 HS |
529 | */ |
530 | clk_set_rate(r->clock[0], 22000000); | |
e1ca95e3 | 531 | |
ff506172 HS |
532 | return 0; |
533 | ||
534 | err_clock: | |
535 | dev_dbg(this->dev, "failed in finding the clocks.\n"); | |
536 | gpmi_put_clks(this); | |
537 | return -ENOMEM; | |
538 | } | |
539 | ||
06f25510 | 540 | static int acquire_resources(struct gpmi_nand_data *this) |
10a2bcae | 541 | { |
39febc01 | 542 | struct pinctrl *pinctrl; |
10a2bcae HS |
543 | int ret; |
544 | ||
545 | ret = acquire_register_block(this, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME); | |
546 | if (ret) | |
547 | goto exit_regs; | |
548 | ||
549 | ret = acquire_register_block(this, GPMI_NAND_BCH_REGS_ADDR_RES_NAME); | |
550 | if (ret) | |
551 | goto exit_regs; | |
552 | ||
553 | ret = acquire_bch_irq(this, bch_irq); | |
554 | if (ret) | |
555 | goto exit_regs; | |
556 | ||
557 | ret = acquire_dma_channels(this); | |
558 | if (ret) | |
559 | goto exit_dma_channels; | |
560 | ||
3e48b1ba | 561 | pinctrl = devm_pinctrl_get_select_default(&this->pdev->dev); |
39febc01 SG |
562 | if (IS_ERR(pinctrl)) { |
563 | ret = PTR_ERR(pinctrl); | |
564 | goto exit_pin; | |
565 | } | |
566 | ||
ff506172 HS |
567 | ret = gpmi_get_clks(this); |
568 | if (ret) | |
10a2bcae | 569 | goto exit_clock; |
10a2bcae HS |
570 | return 0; |
571 | ||
572 | exit_clock: | |
39febc01 | 573 | exit_pin: |
10a2bcae HS |
574 | release_dma_channels(this); |
575 | exit_dma_channels: | |
576 | release_bch_irq(this); | |
577 | exit_regs: | |
578 | release_register_block(this); | |
579 | return ret; | |
580 | } | |
581 | ||
582 | static void release_resources(struct gpmi_nand_data *this) | |
583 | { | |
ff506172 | 584 | gpmi_put_clks(this); |
10a2bcae HS |
585 | release_register_block(this); |
586 | release_bch_irq(this); | |
587 | release_dma_channels(this); | |
588 | } | |
589 | ||
06f25510 | 590 | static int init_hardware(struct gpmi_nand_data *this) |
10a2bcae HS |
591 | { |
592 | int ret; | |
593 | ||
594 | /* | |
595 | * This structure contains the "safe" GPMI timing that should succeed | |
596 | * with any NAND Flash device | |
597 | * (although, with less-than-optimal performance). | |
598 | */ | |
599 | struct nand_timing safe_timing = { | |
600 | .data_setup_in_ns = 80, | |
601 | .data_hold_in_ns = 60, | |
602 | .address_setup_in_ns = 25, | |
603 | .gpmi_sample_delay_in_ns = 6, | |
604 | .tREA_in_ns = -1, | |
605 | .tRLOH_in_ns = -1, | |
606 | .tRHOH_in_ns = -1, | |
607 | }; | |
608 | ||
609 | /* Initialize the hardwares. */ | |
610 | ret = gpmi_init(this); | |
611 | if (ret) | |
612 | return ret; | |
613 | ||
614 | this->timing = safe_timing; | |
615 | return 0; | |
616 | } | |
617 | ||
618 | static int read_page_prepare(struct gpmi_nand_data *this, | |
619 | void *destination, unsigned length, | |
620 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
621 | void **use_virt, dma_addr_t *use_phys) | |
622 | { | |
623 | struct device *dev = this->dev; | |
624 | ||
625 | if (virt_addr_valid(destination)) { | |
626 | dma_addr_t dest_phys; | |
627 | ||
628 | dest_phys = dma_map_single(dev, destination, | |
629 | length, DMA_FROM_DEVICE); | |
630 | if (dma_mapping_error(dev, dest_phys)) { | |
631 | if (alt_size < length) { | |
2d350e5a VN |
632 | pr_err("%s, Alternate buffer is too small\n", |
633 | __func__); | |
10a2bcae HS |
634 | return -ENOMEM; |
635 | } | |
636 | goto map_failed; | |
637 | } | |
638 | *use_virt = destination; | |
639 | *use_phys = dest_phys; | |
640 | this->direct_dma_map_ok = true; | |
641 | return 0; | |
642 | } | |
643 | ||
644 | map_failed: | |
645 | *use_virt = alt_virt; | |
646 | *use_phys = alt_phys; | |
647 | this->direct_dma_map_ok = false; | |
648 | return 0; | |
649 | } | |
650 | ||
651 | static inline void read_page_end(struct gpmi_nand_data *this, | |
652 | void *destination, unsigned length, | |
653 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
654 | void *used_virt, dma_addr_t used_phys) | |
655 | { | |
656 | if (this->direct_dma_map_ok) | |
657 | dma_unmap_single(this->dev, used_phys, length, DMA_FROM_DEVICE); | |
658 | } | |
659 | ||
660 | static inline void read_page_swap_end(struct gpmi_nand_data *this, | |
661 | void *destination, unsigned length, | |
662 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
663 | void *used_virt, dma_addr_t used_phys) | |
664 | { | |
665 | if (!this->direct_dma_map_ok) | |
666 | memcpy(destination, alt_virt, length); | |
667 | } | |
668 | ||
669 | static int send_page_prepare(struct gpmi_nand_data *this, | |
670 | const void *source, unsigned length, | |
671 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
672 | const void **use_virt, dma_addr_t *use_phys) | |
673 | { | |
674 | struct device *dev = this->dev; | |
675 | ||
676 | if (virt_addr_valid(source)) { | |
677 | dma_addr_t source_phys; | |
678 | ||
679 | source_phys = dma_map_single(dev, (void *)source, length, | |
680 | DMA_TO_DEVICE); | |
681 | if (dma_mapping_error(dev, source_phys)) { | |
682 | if (alt_size < length) { | |
2d350e5a VN |
683 | pr_err("%s, Alternate buffer is too small\n", |
684 | __func__); | |
10a2bcae HS |
685 | return -ENOMEM; |
686 | } | |
687 | goto map_failed; | |
688 | } | |
689 | *use_virt = source; | |
690 | *use_phys = source_phys; | |
691 | return 0; | |
692 | } | |
693 | map_failed: | |
694 | /* | |
695 | * Copy the content of the source buffer into the alternate | |
696 | * buffer and set up the return values accordingly. | |
697 | */ | |
698 | memcpy(alt_virt, source, length); | |
699 | ||
700 | *use_virt = alt_virt; | |
701 | *use_phys = alt_phys; | |
702 | return 0; | |
703 | } | |
704 | ||
705 | static void send_page_end(struct gpmi_nand_data *this, | |
706 | const void *source, unsigned length, | |
707 | void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, | |
708 | const void *used_virt, dma_addr_t used_phys) | |
709 | { | |
710 | struct device *dev = this->dev; | |
711 | if (used_virt == source) | |
712 | dma_unmap_single(dev, used_phys, length, DMA_TO_DEVICE); | |
713 | } | |
714 | ||
715 | static void gpmi_free_dma_buffer(struct gpmi_nand_data *this) | |
716 | { | |
717 | struct device *dev = this->dev; | |
718 | ||
719 | if (this->page_buffer_virt && virt_addr_valid(this->page_buffer_virt)) | |
720 | dma_free_coherent(dev, this->page_buffer_size, | |
721 | this->page_buffer_virt, | |
722 | this->page_buffer_phys); | |
723 | kfree(this->cmd_buffer); | |
724 | kfree(this->data_buffer_dma); | |
725 | ||
726 | this->cmd_buffer = NULL; | |
727 | this->data_buffer_dma = NULL; | |
728 | this->page_buffer_virt = NULL; | |
729 | this->page_buffer_size = 0; | |
730 | } | |
731 | ||
732 | /* Allocate the DMA buffers */ | |
733 | static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this) | |
734 | { | |
735 | struct bch_geometry *geo = &this->bch_geometry; | |
736 | struct device *dev = this->dev; | |
737 | ||
738 | /* [1] Allocate a command buffer. PAGE_SIZE is enough. */ | |
513d57e1 | 739 | this->cmd_buffer = kzalloc(PAGE_SIZE, GFP_DMA | GFP_KERNEL); |
10a2bcae HS |
740 | if (this->cmd_buffer == NULL) |
741 | goto error_alloc; | |
742 | ||
743 | /* [2] Allocate a read/write data buffer. PAGE_SIZE is enough. */ | |
513d57e1 | 744 | this->data_buffer_dma = kzalloc(PAGE_SIZE, GFP_DMA | GFP_KERNEL); |
10a2bcae HS |
745 | if (this->data_buffer_dma == NULL) |
746 | goto error_alloc; | |
747 | ||
748 | /* | |
749 | * [3] Allocate the page buffer. | |
750 | * | |
751 | * Both the payload buffer and the auxiliary buffer must appear on | |
752 | * 32-bit boundaries. We presume the size of the payload buffer is a | |
753 | * power of two and is much larger than four, which guarantees the | |
754 | * auxiliary buffer will appear on a 32-bit boundary. | |
755 | */ | |
756 | this->page_buffer_size = geo->payload_size + geo->auxiliary_size; | |
757 | this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size, | |
758 | &this->page_buffer_phys, GFP_DMA); | |
759 | if (!this->page_buffer_virt) | |
760 | goto error_alloc; | |
761 | ||
762 | ||
763 | /* Slice up the page buffer. */ | |
764 | this->payload_virt = this->page_buffer_virt; | |
765 | this->payload_phys = this->page_buffer_phys; | |
766 | this->auxiliary_virt = this->payload_virt + geo->payload_size; | |
767 | this->auxiliary_phys = this->payload_phys + geo->payload_size; | |
768 | return 0; | |
769 | ||
770 | error_alloc: | |
771 | gpmi_free_dma_buffer(this); | |
2d350e5a | 772 | pr_err("Error allocating DMA buffers!\n"); |
10a2bcae HS |
773 | return -ENOMEM; |
774 | } | |
775 | ||
776 | static void gpmi_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl) | |
777 | { | |
778 | struct nand_chip *chip = mtd->priv; | |
779 | struct gpmi_nand_data *this = chip->priv; | |
780 | int ret; | |
781 | ||
782 | /* | |
783 | * Every operation begins with a command byte and a series of zero or | |
784 | * more address bytes. These are distinguished by either the Address | |
785 | * Latch Enable (ALE) or Command Latch Enable (CLE) signals being | |
786 | * asserted. When MTD is ready to execute the command, it will deassert | |
787 | * both latch enables. | |
788 | * | |
789 | * Rather than run a separate DMA operation for every single byte, we | |
790 | * queue them up and run a single DMA operation for the entire series | |
791 | * of command and data bytes. NAND_CMD_NONE means the END of the queue. | |
792 | */ | |
793 | if ((ctrl & (NAND_ALE | NAND_CLE))) { | |
794 | if (data != NAND_CMD_NONE) | |
795 | this->cmd_buffer[this->command_length++] = data; | |
796 | return; | |
797 | } | |
798 | ||
799 | if (!this->command_length) | |
800 | return; | |
801 | ||
802 | ret = gpmi_send_command(this); | |
803 | if (ret) | |
804 | pr_err("Chip: %u, Error %d\n", this->current_chip, ret); | |
805 | ||
806 | this->command_length = 0; | |
807 | } | |
808 | ||
809 | static int gpmi_dev_ready(struct mtd_info *mtd) | |
810 | { | |
811 | struct nand_chip *chip = mtd->priv; | |
812 | struct gpmi_nand_data *this = chip->priv; | |
813 | ||
814 | return gpmi_is_ready(this, this->current_chip); | |
815 | } | |
816 | ||
817 | static void gpmi_select_chip(struct mtd_info *mtd, int chipnr) | |
818 | { | |
819 | struct nand_chip *chip = mtd->priv; | |
820 | struct gpmi_nand_data *this = chip->priv; | |
821 | ||
822 | if ((this->current_chip < 0) && (chipnr >= 0)) | |
823 | gpmi_begin(this); | |
824 | else if ((this->current_chip >= 0) && (chipnr < 0)) | |
825 | gpmi_end(this); | |
826 | ||
827 | this->current_chip = chipnr; | |
828 | } | |
829 | ||
830 | static void gpmi_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) | |
831 | { | |
832 | struct nand_chip *chip = mtd->priv; | |
833 | struct gpmi_nand_data *this = chip->priv; | |
834 | ||
835 | pr_debug("len is %d\n", len); | |
836 | this->upper_buf = buf; | |
837 | this->upper_len = len; | |
838 | ||
839 | gpmi_read_data(this); | |
840 | } | |
841 | ||
842 | static void gpmi_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) | |
843 | { | |
844 | struct nand_chip *chip = mtd->priv; | |
845 | struct gpmi_nand_data *this = chip->priv; | |
846 | ||
847 | pr_debug("len is %d\n", len); | |
848 | this->upper_buf = (uint8_t *)buf; | |
849 | this->upper_len = len; | |
850 | ||
851 | gpmi_send_data(this); | |
852 | } | |
853 | ||
854 | static uint8_t gpmi_read_byte(struct mtd_info *mtd) | |
855 | { | |
856 | struct nand_chip *chip = mtd->priv; | |
857 | struct gpmi_nand_data *this = chip->priv; | |
858 | uint8_t *buf = this->data_buffer_dma; | |
859 | ||
860 | gpmi_read_buf(mtd, buf, 1); | |
861 | return buf[0]; | |
862 | } | |
863 | ||
864 | /* | |
865 | * Handles block mark swapping. | |
866 | * It can be called in swapping the block mark, or swapping it back, | |
867 | * because the the operations are the same. | |
868 | */ | |
869 | static void block_mark_swapping(struct gpmi_nand_data *this, | |
870 | void *payload, void *auxiliary) | |
871 | { | |
872 | struct bch_geometry *nfc_geo = &this->bch_geometry; | |
873 | unsigned char *p; | |
874 | unsigned char *a; | |
875 | unsigned int bit; | |
876 | unsigned char mask; | |
877 | unsigned char from_data; | |
878 | unsigned char from_oob; | |
879 | ||
880 | if (!this->swap_block_mark) | |
881 | return; | |
882 | ||
883 | /* | |
884 | * If control arrives here, we're swapping. Make some convenience | |
885 | * variables. | |
886 | */ | |
887 | bit = nfc_geo->block_mark_bit_offset; | |
888 | p = payload + nfc_geo->block_mark_byte_offset; | |
889 | a = auxiliary; | |
890 | ||
891 | /* | |
892 | * Get the byte from the data area that overlays the block mark. Since | |
893 | * the ECC engine applies its own view to the bits in the page, the | |
894 | * physical block mark won't (in general) appear on a byte boundary in | |
895 | * the data. | |
896 | */ | |
897 | from_data = (p[0] >> bit) | (p[1] << (8 - bit)); | |
898 | ||
899 | /* Get the byte from the OOB. */ | |
900 | from_oob = a[0]; | |
901 | ||
902 | /* Swap them. */ | |
903 | a[0] = from_data; | |
904 | ||
905 | mask = (0x1 << bit) - 1; | |
906 | p[0] = (p[0] & mask) | (from_oob << bit); | |
907 | ||
908 | mask = ~0 << bit; | |
909 | p[1] = (p[1] & mask) | (from_oob >> (8 - bit)); | |
910 | } | |
911 | ||
912 | static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip, | |
1fbb938d | 913 | uint8_t *buf, int oob_required, int page) |
10a2bcae HS |
914 | { |
915 | struct gpmi_nand_data *this = chip->priv; | |
916 | struct bch_geometry *nfc_geo = &this->bch_geometry; | |
917 | void *payload_virt; | |
918 | dma_addr_t payload_phys; | |
919 | void *auxiliary_virt; | |
920 | dma_addr_t auxiliary_phys; | |
921 | unsigned int i; | |
922 | unsigned char *status; | |
923 | unsigned int failed; | |
924 | unsigned int corrected; | |
925 | int ret; | |
926 | ||
927 | pr_debug("page number is : %d\n", page); | |
928 | ret = read_page_prepare(this, buf, mtd->writesize, | |
929 | this->payload_virt, this->payload_phys, | |
930 | nfc_geo->payload_size, | |
931 | &payload_virt, &payload_phys); | |
932 | if (ret) { | |
933 | pr_err("Inadequate DMA buffer\n"); | |
934 | ret = -ENOMEM; | |
935 | return ret; | |
936 | } | |
937 | auxiliary_virt = this->auxiliary_virt; | |
938 | auxiliary_phys = this->auxiliary_phys; | |
939 | ||
940 | /* go! */ | |
941 | ret = gpmi_read_page(this, payload_phys, auxiliary_phys); | |
942 | read_page_end(this, buf, mtd->writesize, | |
943 | this->payload_virt, this->payload_phys, | |
944 | nfc_geo->payload_size, | |
945 | payload_virt, payload_phys); | |
946 | if (ret) { | |
947 | pr_err("Error in ECC-based read: %d\n", ret); | |
948 | goto exit_nfc; | |
949 | } | |
950 | ||
951 | /* handle the block mark swapping */ | |
952 | block_mark_swapping(this, payload_virt, auxiliary_virt); | |
953 | ||
954 | /* Loop over status bytes, accumulating ECC status. */ | |
955 | failed = 0; | |
956 | corrected = 0; | |
957 | status = auxiliary_virt + nfc_geo->auxiliary_status_offset; | |
958 | ||
959 | for (i = 0; i < nfc_geo->ecc_chunk_count; i++, status++) { | |
960 | if ((*status == STATUS_GOOD) || (*status == STATUS_ERASED)) | |
961 | continue; | |
962 | ||
963 | if (*status == STATUS_UNCORRECTABLE) { | |
964 | failed++; | |
965 | continue; | |
966 | } | |
967 | corrected += *status; | |
968 | } | |
969 | ||
970 | /* | |
971 | * Propagate ECC status to the owning MTD only when failed or | |
972 | * corrected times nearly reaches our ECC correction threshold. | |
973 | */ | |
974 | if (failed || corrected >= (nfc_geo->ecc_strength - 1)) { | |
975 | mtd->ecc_stats.failed += failed; | |
976 | mtd->ecc_stats.corrected += corrected; | |
977 | } | |
978 | ||
7725cc85 BN |
979 | if (oob_required) { |
980 | /* | |
981 | * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob() | |
982 | * for details about our policy for delivering the OOB. | |
983 | * | |
984 | * We fill the caller's buffer with set bits, and then copy the | |
985 | * block mark to th caller's buffer. Note that, if block mark | |
986 | * swapping was necessary, it has already been done, so we can | |
987 | * rely on the first byte of the auxiliary buffer to contain | |
988 | * the block mark. | |
989 | */ | |
990 | memset(chip->oob_poi, ~0, mtd->oobsize); | |
991 | chip->oob_poi[0] = ((uint8_t *) auxiliary_virt)[0]; | |
7725cc85 | 992 | } |
6023813a SH |
993 | |
994 | read_page_swap_end(this, buf, mtd->writesize, | |
995 | this->payload_virt, this->payload_phys, | |
996 | nfc_geo->payload_size, | |
997 | payload_virt, payload_phys); | |
10a2bcae HS |
998 | exit_nfc: |
999 | return ret; | |
1000 | } | |
1001 | ||
fdbad98d | 1002 | static int gpmi_ecc_write_page(struct mtd_info *mtd, struct nand_chip *chip, |
1fbb938d | 1003 | const uint8_t *buf, int oob_required) |
10a2bcae HS |
1004 | { |
1005 | struct gpmi_nand_data *this = chip->priv; | |
1006 | struct bch_geometry *nfc_geo = &this->bch_geometry; | |
1007 | const void *payload_virt; | |
1008 | dma_addr_t payload_phys; | |
1009 | const void *auxiliary_virt; | |
1010 | dma_addr_t auxiliary_phys; | |
1011 | int ret; | |
1012 | ||
1013 | pr_debug("ecc write page.\n"); | |
1014 | if (this->swap_block_mark) { | |
1015 | /* | |
1016 | * If control arrives here, we're doing block mark swapping. | |
1017 | * Since we can't modify the caller's buffers, we must copy them | |
1018 | * into our own. | |
1019 | */ | |
1020 | memcpy(this->payload_virt, buf, mtd->writesize); | |
1021 | payload_virt = this->payload_virt; | |
1022 | payload_phys = this->payload_phys; | |
1023 | ||
1024 | memcpy(this->auxiliary_virt, chip->oob_poi, | |
1025 | nfc_geo->auxiliary_size); | |
1026 | auxiliary_virt = this->auxiliary_virt; | |
1027 | auxiliary_phys = this->auxiliary_phys; | |
1028 | ||
1029 | /* Handle block mark swapping. */ | |
1030 | block_mark_swapping(this, | |
1031 | (void *) payload_virt, (void *) auxiliary_virt); | |
1032 | } else { | |
1033 | /* | |
1034 | * If control arrives here, we're not doing block mark swapping, | |
1035 | * so we can to try and use the caller's buffers. | |
1036 | */ | |
1037 | ret = send_page_prepare(this, | |
1038 | buf, mtd->writesize, | |
1039 | this->payload_virt, this->payload_phys, | |
1040 | nfc_geo->payload_size, | |
1041 | &payload_virt, &payload_phys); | |
1042 | if (ret) { | |
1043 | pr_err("Inadequate payload DMA buffer\n"); | |
fdbad98d | 1044 | return 0; |
10a2bcae HS |
1045 | } |
1046 | ||
1047 | ret = send_page_prepare(this, | |
1048 | chip->oob_poi, mtd->oobsize, | |
1049 | this->auxiliary_virt, this->auxiliary_phys, | |
1050 | nfc_geo->auxiliary_size, | |
1051 | &auxiliary_virt, &auxiliary_phys); | |
1052 | if (ret) { | |
1053 | pr_err("Inadequate auxiliary DMA buffer\n"); | |
1054 | goto exit_auxiliary; | |
1055 | } | |
1056 | } | |
1057 | ||
1058 | /* Ask the NFC. */ | |
1059 | ret = gpmi_send_page(this, payload_phys, auxiliary_phys); | |
1060 | if (ret) | |
1061 | pr_err("Error in ECC-based write: %d\n", ret); | |
1062 | ||
1063 | if (!this->swap_block_mark) { | |
1064 | send_page_end(this, chip->oob_poi, mtd->oobsize, | |
1065 | this->auxiliary_virt, this->auxiliary_phys, | |
1066 | nfc_geo->auxiliary_size, | |
1067 | auxiliary_virt, auxiliary_phys); | |
1068 | exit_auxiliary: | |
1069 | send_page_end(this, buf, mtd->writesize, | |
1070 | this->payload_virt, this->payload_phys, | |
1071 | nfc_geo->payload_size, | |
1072 | payload_virt, payload_phys); | |
1073 | } | |
fdbad98d JW |
1074 | |
1075 | return 0; | |
10a2bcae HS |
1076 | } |
1077 | ||
1078 | /* | |
1079 | * There are several places in this driver where we have to handle the OOB and | |
1080 | * block marks. This is the function where things are the most complicated, so | |
1081 | * this is where we try to explain it all. All the other places refer back to | |
1082 | * here. | |
1083 | * | |
1084 | * These are the rules, in order of decreasing importance: | |
1085 | * | |
1086 | * 1) Nothing the caller does can be allowed to imperil the block mark. | |
1087 | * | |
1088 | * 2) In read operations, the first byte of the OOB we return must reflect the | |
1089 | * true state of the block mark, no matter where that block mark appears in | |
1090 | * the physical page. | |
1091 | * | |
1092 | * 3) ECC-based read operations return an OOB full of set bits (since we never | |
1093 | * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads | |
1094 | * return). | |
1095 | * | |
1096 | * 4) "Raw" read operations return a direct view of the physical bytes in the | |
1097 | * page, using the conventional definition of which bytes are data and which | |
1098 | * are OOB. This gives the caller a way to see the actual, physical bytes | |
1099 | * in the page, without the distortions applied by our ECC engine. | |
1100 | * | |
1101 | * | |
1102 | * What we do for this specific read operation depends on two questions: | |
1103 | * | |
1104 | * 1) Are we doing a "raw" read, or an ECC-based read? | |
1105 | * | |
1106 | * 2) Are we using block mark swapping or transcription? | |
1107 | * | |
1108 | * There are four cases, illustrated by the following Karnaugh map: | |
1109 | * | |
1110 | * | Raw | ECC-based | | |
1111 | * -------------+-------------------------+-------------------------+ | |
1112 | * | Read the conventional | | | |
1113 | * | OOB at the end of the | | | |
1114 | * Swapping | page and return it. It | | | |
1115 | * | contains exactly what | | | |
1116 | * | we want. | Read the block mark and | | |
1117 | * -------------+-------------------------+ return it in a buffer | | |
1118 | * | Read the conventional | full of set bits. | | |
1119 | * | OOB at the end of the | | | |
1120 | * | page and also the block | | | |
1121 | * Transcribing | mark in the metadata. | | | |
1122 | * | Copy the block mark | | | |
1123 | * | into the first byte of | | | |
1124 | * | the OOB. | | | |
1125 | * -------------+-------------------------+-------------------------+ | |
1126 | * | |
1127 | * Note that we break rule #4 in the Transcribing/Raw case because we're not | |
1128 | * giving an accurate view of the actual, physical bytes in the page (we're | |
1129 | * overwriting the block mark). That's OK because it's more important to follow | |
1130 | * rule #2. | |
1131 | * | |
1132 | * It turns out that knowing whether we want an "ECC-based" or "raw" read is not | |
1133 | * easy. When reading a page, for example, the NAND Flash MTD code calls our | |
1134 | * ecc.read_page or ecc.read_page_raw function. Thus, the fact that MTD wants an | |
1135 | * ECC-based or raw view of the page is implicit in which function it calls | |
1136 | * (there is a similar pair of ECC-based/raw functions for writing). | |
1137 | * | |
271b874b BN |
1138 | * FIXME: The following paragraph is incorrect, now that there exist |
1139 | * ecc.read_oob_raw and ecc.write_oob_raw functions. | |
1140 | * | |
10a2bcae HS |
1141 | * Since MTD assumes the OOB is not covered by ECC, there is no pair of |
1142 | * ECC-based/raw functions for reading or or writing the OOB. The fact that the | |
1143 | * caller wants an ECC-based or raw view of the page is not propagated down to | |
1144 | * this driver. | |
1145 | */ | |
1146 | static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip, | |
5c2ffb11 | 1147 | int page) |
10a2bcae HS |
1148 | { |
1149 | struct gpmi_nand_data *this = chip->priv; | |
1150 | ||
1151 | pr_debug("page number is %d\n", page); | |
1152 | /* clear the OOB buffer */ | |
1153 | memset(chip->oob_poi, ~0, mtd->oobsize); | |
1154 | ||
1155 | /* Read out the conventional OOB. */ | |
1156 | chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page); | |
1157 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); | |
1158 | ||
1159 | /* | |
1160 | * Now, we want to make sure the block mark is correct. In the | |
1161 | * Swapping/Raw case, we already have it. Otherwise, we need to | |
1162 | * explicitly read it. | |
1163 | */ | |
1164 | if (!this->swap_block_mark) { | |
1165 | /* Read the block mark into the first byte of the OOB buffer. */ | |
1166 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); | |
1167 | chip->oob_poi[0] = chip->read_byte(mtd); | |
1168 | } | |
1169 | ||
5c2ffb11 | 1170 | return 0; |
10a2bcae HS |
1171 | } |
1172 | ||
1173 | static int | |
1174 | gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page) | |
1175 | { | |
1176 | /* | |
1177 | * The BCH will use all the (page + oob). | |
1178 | * Our gpmi_hw_ecclayout can only prohibit the JFFS2 to write the oob. | |
1179 | * But it can not stop some ioctls such MEMWRITEOOB which uses | |
0612b9dd | 1180 | * MTD_OPS_PLACE_OOB. So We have to implement this function to prohibit |
10a2bcae HS |
1181 | * these ioctls too. |
1182 | */ | |
1183 | return -EPERM; | |
1184 | } | |
1185 | ||
1186 | static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs) | |
1187 | { | |
1188 | struct nand_chip *chip = mtd->priv; | |
1189 | struct gpmi_nand_data *this = chip->priv; | |
1190 | int block, ret = 0; | |
1191 | uint8_t *block_mark; | |
1192 | int column, page, status, chipnr; | |
1193 | ||
1194 | /* Get block number */ | |
1195 | block = (int)(ofs >> chip->bbt_erase_shift); | |
1196 | if (chip->bbt) | |
1197 | chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); | |
1198 | ||
1199 | /* Do we have a flash based bad block table ? */ | |
5289966e | 1200 | if (chip->bbt_options & NAND_BBT_USE_FLASH) |
10a2bcae HS |
1201 | ret = nand_update_bbt(mtd, ofs); |
1202 | else { | |
1203 | chipnr = (int)(ofs >> chip->chip_shift); | |
1204 | chip->select_chip(mtd, chipnr); | |
1205 | ||
1206 | column = this->swap_block_mark ? mtd->writesize : 0; | |
1207 | ||
1208 | /* Write the block mark. */ | |
1209 | block_mark = this->data_buffer_dma; | |
1210 | block_mark[0] = 0; /* bad block marker */ | |
1211 | ||
1212 | /* Shift to get page */ | |
1213 | page = (int)(ofs >> chip->page_shift); | |
1214 | ||
1215 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, column, page); | |
1216 | chip->write_buf(mtd, block_mark, 1); | |
1217 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); | |
1218 | ||
1219 | status = chip->waitfunc(mtd, chip); | |
1220 | if (status & NAND_STATUS_FAIL) | |
1221 | ret = -EIO; | |
1222 | ||
1223 | chip->select_chip(mtd, -1); | |
1224 | } | |
1225 | if (!ret) | |
1226 | mtd->ecc_stats.badblocks++; | |
1227 | ||
1228 | return ret; | |
1229 | } | |
1230 | ||
a78da287 | 1231 | static int nand_boot_set_geometry(struct gpmi_nand_data *this) |
10a2bcae HS |
1232 | { |
1233 | struct boot_rom_geometry *geometry = &this->rom_geometry; | |
1234 | ||
1235 | /* | |
1236 | * Set the boot block stride size. | |
1237 | * | |
1238 | * In principle, we should be reading this from the OTP bits, since | |
1239 | * that's where the ROM is going to get it. In fact, we don't have any | |
1240 | * way to read the OTP bits, so we go with the default and hope for the | |
1241 | * best. | |
1242 | */ | |
1243 | geometry->stride_size_in_pages = 64; | |
1244 | ||
1245 | /* | |
1246 | * Set the search area stride exponent. | |
1247 | * | |
1248 | * In principle, we should be reading this from the OTP bits, since | |
1249 | * that's where the ROM is going to get it. In fact, we don't have any | |
1250 | * way to read the OTP bits, so we go with the default and hope for the | |
1251 | * best. | |
1252 | */ | |
1253 | geometry->search_area_stride_exponent = 2; | |
1254 | return 0; | |
1255 | } | |
1256 | ||
1257 | static const char *fingerprint = "STMP"; | |
a78da287 | 1258 | static int mx23_check_transcription_stamp(struct gpmi_nand_data *this) |
10a2bcae HS |
1259 | { |
1260 | struct boot_rom_geometry *rom_geo = &this->rom_geometry; | |
1261 | struct device *dev = this->dev; | |
1262 | struct mtd_info *mtd = &this->mtd; | |
1263 | struct nand_chip *chip = &this->nand; | |
1264 | unsigned int search_area_size_in_strides; | |
1265 | unsigned int stride; | |
1266 | unsigned int page; | |
10a2bcae HS |
1267 | uint8_t *buffer = chip->buffers->databuf; |
1268 | int saved_chip_number; | |
1269 | int found_an_ncb_fingerprint = false; | |
1270 | ||
1271 | /* Compute the number of strides in a search area. */ | |
1272 | search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; | |
1273 | ||
1274 | saved_chip_number = this->current_chip; | |
1275 | chip->select_chip(mtd, 0); | |
1276 | ||
1277 | /* | |
1278 | * Loop through the first search area, looking for the NCB fingerprint. | |
1279 | */ | |
1280 | dev_dbg(dev, "Scanning for an NCB fingerprint...\n"); | |
1281 | ||
1282 | for (stride = 0; stride < search_area_size_in_strides; stride++) { | |
513d57e1 | 1283 | /* Compute the page addresses. */ |
10a2bcae | 1284 | page = stride * rom_geo->stride_size_in_pages; |
10a2bcae HS |
1285 | |
1286 | dev_dbg(dev, "Looking for a fingerprint in page 0x%x\n", page); | |
1287 | ||
1288 | /* | |
1289 | * Read the NCB fingerprint. The fingerprint is four bytes long | |
1290 | * and starts in the 12th byte of the page. | |
1291 | */ | |
1292 | chip->cmdfunc(mtd, NAND_CMD_READ0, 12, page); | |
1293 | chip->read_buf(mtd, buffer, strlen(fingerprint)); | |
1294 | ||
1295 | /* Look for the fingerprint. */ | |
1296 | if (!memcmp(buffer, fingerprint, strlen(fingerprint))) { | |
1297 | found_an_ncb_fingerprint = true; | |
1298 | break; | |
1299 | } | |
1300 | ||
1301 | } | |
1302 | ||
1303 | chip->select_chip(mtd, saved_chip_number); | |
1304 | ||
1305 | if (found_an_ncb_fingerprint) | |
1306 | dev_dbg(dev, "\tFound a fingerprint\n"); | |
1307 | else | |
1308 | dev_dbg(dev, "\tNo fingerprint found\n"); | |
1309 | return found_an_ncb_fingerprint; | |
1310 | } | |
1311 | ||
1312 | /* Writes a transcription stamp. */ | |
a78da287 | 1313 | static int mx23_write_transcription_stamp(struct gpmi_nand_data *this) |
10a2bcae HS |
1314 | { |
1315 | struct device *dev = this->dev; | |
1316 | struct boot_rom_geometry *rom_geo = &this->rom_geometry; | |
1317 | struct mtd_info *mtd = &this->mtd; | |
1318 | struct nand_chip *chip = &this->nand; | |
1319 | unsigned int block_size_in_pages; | |
1320 | unsigned int search_area_size_in_strides; | |
1321 | unsigned int search_area_size_in_pages; | |
1322 | unsigned int search_area_size_in_blocks; | |
1323 | unsigned int block; | |
1324 | unsigned int stride; | |
1325 | unsigned int page; | |
10a2bcae HS |
1326 | uint8_t *buffer = chip->buffers->databuf; |
1327 | int saved_chip_number; | |
1328 | int status; | |
1329 | ||
1330 | /* Compute the search area geometry. */ | |
1331 | block_size_in_pages = mtd->erasesize / mtd->writesize; | |
1332 | search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; | |
1333 | search_area_size_in_pages = search_area_size_in_strides * | |
1334 | rom_geo->stride_size_in_pages; | |
1335 | search_area_size_in_blocks = | |
1336 | (search_area_size_in_pages + (block_size_in_pages - 1)) / | |
1337 | block_size_in_pages; | |
1338 | ||
1339 | dev_dbg(dev, "Search Area Geometry :\n"); | |
1340 | dev_dbg(dev, "\tin Blocks : %u\n", search_area_size_in_blocks); | |
1341 | dev_dbg(dev, "\tin Strides: %u\n", search_area_size_in_strides); | |
1342 | dev_dbg(dev, "\tin Pages : %u\n", search_area_size_in_pages); | |
1343 | ||
1344 | /* Select chip 0. */ | |
1345 | saved_chip_number = this->current_chip; | |
1346 | chip->select_chip(mtd, 0); | |
1347 | ||
1348 | /* Loop over blocks in the first search area, erasing them. */ | |
1349 | dev_dbg(dev, "Erasing the search area...\n"); | |
1350 | ||
1351 | for (block = 0; block < search_area_size_in_blocks; block++) { | |
1352 | /* Compute the page address. */ | |
1353 | page = block * block_size_in_pages; | |
1354 | ||
1355 | /* Erase this block. */ | |
1356 | dev_dbg(dev, "\tErasing block 0x%x\n", block); | |
1357 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); | |
1358 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); | |
1359 | ||
1360 | /* Wait for the erase to finish. */ | |
1361 | status = chip->waitfunc(mtd, chip); | |
1362 | if (status & NAND_STATUS_FAIL) | |
1363 | dev_err(dev, "[%s] Erase failed.\n", __func__); | |
1364 | } | |
1365 | ||
1366 | /* Write the NCB fingerprint into the page buffer. */ | |
1367 | memset(buffer, ~0, mtd->writesize); | |
1368 | memset(chip->oob_poi, ~0, mtd->oobsize); | |
1369 | memcpy(buffer + 12, fingerprint, strlen(fingerprint)); | |
1370 | ||
1371 | /* Loop through the first search area, writing NCB fingerprints. */ | |
1372 | dev_dbg(dev, "Writing NCB fingerprints...\n"); | |
1373 | for (stride = 0; stride < search_area_size_in_strides; stride++) { | |
513d57e1 | 1374 | /* Compute the page addresses. */ |
10a2bcae | 1375 | page = stride * rom_geo->stride_size_in_pages; |
10a2bcae HS |
1376 | |
1377 | /* Write the first page of the current stride. */ | |
1378 | dev_dbg(dev, "Writing an NCB fingerprint in page 0x%x\n", page); | |
1379 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); | |
1fbb938d | 1380 | chip->ecc.write_page_raw(mtd, chip, buffer, 0); |
10a2bcae HS |
1381 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
1382 | ||
1383 | /* Wait for the write to finish. */ | |
1384 | status = chip->waitfunc(mtd, chip); | |
1385 | if (status & NAND_STATUS_FAIL) | |
1386 | dev_err(dev, "[%s] Write failed.\n", __func__); | |
1387 | } | |
1388 | ||
1389 | /* Deselect chip 0. */ | |
1390 | chip->select_chip(mtd, saved_chip_number); | |
1391 | return 0; | |
1392 | } | |
1393 | ||
a78da287 | 1394 | static int mx23_boot_init(struct gpmi_nand_data *this) |
10a2bcae HS |
1395 | { |
1396 | struct device *dev = this->dev; | |
1397 | struct nand_chip *chip = &this->nand; | |
1398 | struct mtd_info *mtd = &this->mtd; | |
1399 | unsigned int block_count; | |
1400 | unsigned int block; | |
1401 | int chipnr; | |
1402 | int page; | |
1403 | loff_t byte; | |
1404 | uint8_t block_mark; | |
1405 | int ret = 0; | |
1406 | ||
1407 | /* | |
1408 | * If control arrives here, we can't use block mark swapping, which | |
1409 | * means we're forced to use transcription. First, scan for the | |
1410 | * transcription stamp. If we find it, then we don't have to do | |
1411 | * anything -- the block marks are already transcribed. | |
1412 | */ | |
1413 | if (mx23_check_transcription_stamp(this)) | |
1414 | return 0; | |
1415 | ||
1416 | /* | |
1417 | * If control arrives here, we couldn't find a transcription stamp, so | |
1418 | * so we presume the block marks are in the conventional location. | |
1419 | */ | |
1420 | dev_dbg(dev, "Transcribing bad block marks...\n"); | |
1421 | ||
1422 | /* Compute the number of blocks in the entire medium. */ | |
1423 | block_count = chip->chipsize >> chip->phys_erase_shift; | |
1424 | ||
1425 | /* | |
1426 | * Loop over all the blocks in the medium, transcribing block marks as | |
1427 | * we go. | |
1428 | */ | |
1429 | for (block = 0; block < block_count; block++) { | |
1430 | /* | |
1431 | * Compute the chip, page and byte addresses for this block's | |
1432 | * conventional mark. | |
1433 | */ | |
1434 | chipnr = block >> (chip->chip_shift - chip->phys_erase_shift); | |
1435 | page = block << (chip->phys_erase_shift - chip->page_shift); | |
1436 | byte = block << chip->phys_erase_shift; | |
1437 | ||
1438 | /* Send the command to read the conventional block mark. */ | |
1439 | chip->select_chip(mtd, chipnr); | |
1440 | chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page); | |
1441 | block_mark = chip->read_byte(mtd); | |
1442 | chip->select_chip(mtd, -1); | |
1443 | ||
1444 | /* | |
1445 | * Check if the block is marked bad. If so, we need to mark it | |
1446 | * again, but this time the result will be a mark in the | |
1447 | * location where we transcribe block marks. | |
1448 | */ | |
1449 | if (block_mark != 0xff) { | |
1450 | dev_dbg(dev, "Transcribing mark in block %u\n", block); | |
1451 | ret = chip->block_markbad(mtd, byte); | |
1452 | if (ret) | |
1453 | dev_err(dev, "Failed to mark block bad with " | |
1454 | "ret %d\n", ret); | |
1455 | } | |
1456 | } | |
1457 | ||
1458 | /* Write the stamp that indicates we've transcribed the block marks. */ | |
1459 | mx23_write_transcription_stamp(this); | |
1460 | return 0; | |
1461 | } | |
1462 | ||
a78da287 | 1463 | static int nand_boot_init(struct gpmi_nand_data *this) |
10a2bcae HS |
1464 | { |
1465 | nand_boot_set_geometry(this); | |
1466 | ||
1467 | /* This is ROM arch-specific initilization before the BBT scanning. */ | |
1468 | if (GPMI_IS_MX23(this)) | |
1469 | return mx23_boot_init(this); | |
1470 | return 0; | |
1471 | } | |
1472 | ||
a78da287 | 1473 | static int gpmi_set_geometry(struct gpmi_nand_data *this) |
10a2bcae HS |
1474 | { |
1475 | int ret; | |
1476 | ||
1477 | /* Free the temporary DMA memory for reading ID. */ | |
1478 | gpmi_free_dma_buffer(this); | |
1479 | ||
1480 | /* Set up the NFC geometry which is used by BCH. */ | |
1481 | ret = bch_set_geometry(this); | |
1482 | if (ret) { | |
2d350e5a | 1483 | pr_err("Error setting BCH geometry : %d\n", ret); |
10a2bcae HS |
1484 | return ret; |
1485 | } | |
1486 | ||
1487 | /* Alloc the new DMA buffers according to the pagesize and oobsize */ | |
1488 | return gpmi_alloc_dma_buffer(this); | |
1489 | } | |
1490 | ||
1491 | static int gpmi_pre_bbt_scan(struct gpmi_nand_data *this) | |
1492 | { | |
1493 | int ret; | |
1494 | ||
1495 | /* Set up swap_block_mark, must be set before the gpmi_set_geometry() */ | |
1496 | if (GPMI_IS_MX23(this)) | |
1497 | this->swap_block_mark = false; | |
1498 | else | |
1499 | this->swap_block_mark = true; | |
1500 | ||
1501 | /* Set up the medium geometry */ | |
1502 | ret = gpmi_set_geometry(this); | |
1503 | if (ret) | |
1504 | return ret; | |
1505 | ||
5636ce0f MV |
1506 | /* Adjust the ECC strength according to the chip. */ |
1507 | this->nand.ecc.strength = this->bch_geometry.ecc_strength; | |
1508 | this->mtd.ecc_strength = this->bch_geometry.ecc_strength; | |
e0dd89c5 | 1509 | this->mtd.bitflip_threshold = this->bch_geometry.ecc_strength; |
5636ce0f | 1510 | |
10a2bcae HS |
1511 | /* NAND boot init, depends on the gpmi_set_geometry(). */ |
1512 | return nand_boot_init(this); | |
1513 | } | |
1514 | ||
1515 | static int gpmi_scan_bbt(struct mtd_info *mtd) | |
1516 | { | |
1517 | struct nand_chip *chip = mtd->priv; | |
1518 | struct gpmi_nand_data *this = chip->priv; | |
1519 | int ret; | |
1520 | ||
1521 | /* Prepare for the BBT scan. */ | |
1522 | ret = gpmi_pre_bbt_scan(this); | |
1523 | if (ret) | |
1524 | return ret; | |
1525 | ||
995fbbf5 HS |
1526 | /* |
1527 | * Can we enable the extra features? such as EDO or Sync mode. | |
1528 | * | |
1529 | * We do not check the return value now. That's means if we fail in | |
1530 | * enable the extra features, we still can run in the normal way. | |
1531 | */ | |
1532 | gpmi_extra_init(this); | |
1533 | ||
10a2bcae HS |
1534 | /* use the default BBT implementation */ |
1535 | return nand_default_bbt(mtd); | |
1536 | } | |
1537 | ||
513d57e1 | 1538 | static void gpmi_nfc_exit(struct gpmi_nand_data *this) |
10a2bcae HS |
1539 | { |
1540 | nand_release(&this->mtd); | |
1541 | gpmi_free_dma_buffer(this); | |
1542 | } | |
1543 | ||
06f25510 | 1544 | static int gpmi_nfc_init(struct gpmi_nand_data *this) |
10a2bcae | 1545 | { |
10a2bcae HS |
1546 | struct mtd_info *mtd = &this->mtd; |
1547 | struct nand_chip *chip = &this->nand; | |
e10db1f0 | 1548 | struct mtd_part_parser_data ppdata = {}; |
10a2bcae HS |
1549 | int ret; |
1550 | ||
1551 | /* init current chip */ | |
1552 | this->current_chip = -1; | |
1553 | ||
1554 | /* init the MTD data structures */ | |
1555 | mtd->priv = chip; | |
1556 | mtd->name = "gpmi-nand"; | |
1557 | mtd->owner = THIS_MODULE; | |
1558 | ||
1559 | /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */ | |
1560 | chip->priv = this; | |
1561 | chip->select_chip = gpmi_select_chip; | |
1562 | chip->cmd_ctrl = gpmi_cmd_ctrl; | |
1563 | chip->dev_ready = gpmi_dev_ready; | |
1564 | chip->read_byte = gpmi_read_byte; | |
1565 | chip->read_buf = gpmi_read_buf; | |
1566 | chip->write_buf = gpmi_write_buf; | |
1567 | chip->ecc.read_page = gpmi_ecc_read_page; | |
1568 | chip->ecc.write_page = gpmi_ecc_write_page; | |
1569 | chip->ecc.read_oob = gpmi_ecc_read_oob; | |
1570 | chip->ecc.write_oob = gpmi_ecc_write_oob; | |
1571 | chip->scan_bbt = gpmi_scan_bbt; | |
1572 | chip->badblock_pattern = &gpmi_bbt_descr; | |
1573 | chip->block_markbad = gpmi_block_markbad; | |
1574 | chip->options |= NAND_NO_SUBPAGE_WRITE; | |
1575 | chip->ecc.mode = NAND_ECC_HW; | |
1576 | chip->ecc.size = 1; | |
5636ce0f | 1577 | chip->ecc.strength = 8; |
10a2bcae | 1578 | chip->ecc.layout = &gpmi_hw_ecclayout; |
c50c6940 HS |
1579 | if (of_get_nand_on_flash_bbt(this->dev->of_node)) |
1580 | chip->bbt_options |= NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB; | |
10a2bcae HS |
1581 | |
1582 | /* Allocate a temporary DMA buffer for reading ID in the nand_scan() */ | |
1583 | this->bch_geometry.payload_size = 1024; | |
1584 | this->bch_geometry.auxiliary_size = 128; | |
1585 | ret = gpmi_alloc_dma_buffer(this); | |
1586 | if (ret) | |
1587 | goto err_out; | |
1588 | ||
e10db1f0 | 1589 | ret = nand_scan(mtd, 1); |
10a2bcae HS |
1590 | if (ret) { |
1591 | pr_err("Chip scan failed\n"); | |
1592 | goto err_out; | |
1593 | } | |
1594 | ||
e10db1f0 HS |
1595 | ppdata.of_node = this->pdev->dev.of_node; |
1596 | ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0); | |
10a2bcae HS |
1597 | if (ret) |
1598 | goto err_out; | |
1599 | return 0; | |
1600 | ||
1601 | err_out: | |
1602 | gpmi_nfc_exit(this); | |
1603 | return ret; | |
1604 | } | |
1605 | ||
e10db1f0 HS |
1606 | static const struct platform_device_id gpmi_ids[] = { |
1607 | { .name = "imx23-gpmi-nand", .driver_data = IS_MX23, }, | |
1608 | { .name = "imx28-gpmi-nand", .driver_data = IS_MX28, }, | |
9013bb40 | 1609 | { .name = "imx6q-gpmi-nand", .driver_data = IS_MX6Q, }, |
e10db1f0 HS |
1610 | {}, |
1611 | }; | |
1612 | ||
1613 | static const struct of_device_id gpmi_nand_id_table[] = { | |
1614 | { | |
1615 | .compatible = "fsl,imx23-gpmi-nand", | |
1616 | .data = (void *)&gpmi_ids[IS_MX23] | |
1617 | }, { | |
1618 | .compatible = "fsl,imx28-gpmi-nand", | |
1619 | .data = (void *)&gpmi_ids[IS_MX28] | |
9013bb40 HS |
1620 | }, { |
1621 | .compatible = "fsl,imx6q-gpmi-nand", | |
1622 | .data = (void *)&gpmi_ids[IS_MX6Q] | |
e10db1f0 HS |
1623 | }, {} |
1624 | }; | |
1625 | MODULE_DEVICE_TABLE(of, gpmi_nand_id_table); | |
1626 | ||
06f25510 | 1627 | static int gpmi_nand_probe(struct platform_device *pdev) |
10a2bcae | 1628 | { |
10a2bcae | 1629 | struct gpmi_nand_data *this; |
e10db1f0 | 1630 | const struct of_device_id *of_id; |
10a2bcae HS |
1631 | int ret; |
1632 | ||
e10db1f0 HS |
1633 | of_id = of_match_device(gpmi_nand_id_table, &pdev->dev); |
1634 | if (of_id) { | |
1635 | pdev->id_entry = of_id->data; | |
1636 | } else { | |
1637 | pr_err("Failed to find the right device id.\n"); | |
1638 | return -ENOMEM; | |
1639 | } | |
1640 | ||
10a2bcae HS |
1641 | this = kzalloc(sizeof(*this), GFP_KERNEL); |
1642 | if (!this) { | |
1643 | pr_err("Failed to allocate per-device memory\n"); | |
1644 | return -ENOMEM; | |
1645 | } | |
1646 | ||
1647 | platform_set_drvdata(pdev, this); | |
1648 | this->pdev = pdev; | |
1649 | this->dev = &pdev->dev; | |
10a2bcae HS |
1650 | |
1651 | ret = acquire_resources(this); | |
1652 | if (ret) | |
1653 | goto exit_acquire_resources; | |
1654 | ||
1655 | ret = init_hardware(this); | |
1656 | if (ret) | |
1657 | goto exit_nfc_init; | |
1658 | ||
1659 | ret = gpmi_nfc_init(this); | |
1660 | if (ret) | |
1661 | goto exit_nfc_init; | |
1662 | ||
490e280a FE |
1663 | dev_info(this->dev, "driver registered.\n"); |
1664 | ||
10a2bcae HS |
1665 | return 0; |
1666 | ||
1667 | exit_nfc_init: | |
1668 | release_resources(this); | |
10a2bcae HS |
1669 | exit_acquire_resources: |
1670 | platform_set_drvdata(pdev, NULL); | |
1671 | kfree(this); | |
490e280a FE |
1672 | dev_err(this->dev, "driver registration failed: %d\n", ret); |
1673 | ||
10a2bcae HS |
1674 | return ret; |
1675 | } | |
1676 | ||
810b7e06 | 1677 | static int gpmi_nand_remove(struct platform_device *pdev) |
10a2bcae HS |
1678 | { |
1679 | struct gpmi_nand_data *this = platform_get_drvdata(pdev); | |
1680 | ||
1681 | gpmi_nfc_exit(this); | |
1682 | release_resources(this); | |
1683 | platform_set_drvdata(pdev, NULL); | |
1684 | kfree(this); | |
1685 | return 0; | |
1686 | } | |
1687 | ||
10a2bcae HS |
1688 | static struct platform_driver gpmi_nand_driver = { |
1689 | .driver = { | |
1690 | .name = "gpmi-nand", | |
e10db1f0 | 1691 | .of_match_table = gpmi_nand_id_table, |
10a2bcae HS |
1692 | }, |
1693 | .probe = gpmi_nand_probe, | |
5153b88c | 1694 | .remove = gpmi_nand_remove, |
10a2bcae HS |
1695 | .id_table = gpmi_ids, |
1696 | }; | |
490e280a | 1697 | module_platform_driver(gpmi_nand_driver); |
10a2bcae HS |
1698 | |
1699 | MODULE_AUTHOR("Freescale Semiconductor, Inc."); | |
1700 | MODULE_DESCRIPTION("i.MX GPMI NAND Flash Controller Driver"); | |
1701 | MODULE_LICENSE("GPL"); |