[linux-2.6-block.git] / drivers / mtd / maps / l440gx.c

/*
 * BIOS Flash chip on Intel 440GX board.
 *
 * Bugs this currently does not work under linuxBIOS.
 */

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/io.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>

#define PIIXE_IOBASE_RESOURCE	11

#define WINDOW_ADDR 0xfff00000
#define WINDOW_SIZE 0x00100000
#define BUSWIDTH 1

static u32 iobase;
#define IOBASE iobase
#define TRIBUF_PORT (IOBASE+0x37)
#define VPP_PORT (IOBASE+0x28)

static struct mtd_info *mymtd;


/* Is this really the vpp port? */
static void l440gx_set_vpp(struct map_info *map, int vpp)
{
	unsigned long l;

	l = inl(VPP_PORT);
	if (vpp) {
		l |= 1;
	} else {
		l &= ~1;
	}
	outl(l, VPP_PORT);
}

static struct map_info l440gx_map = {
	.name = "L440GX BIOS",
	.size = WINDOW_SIZE,
	.bankwidth = BUSWIDTH,
	.phys = WINDOW_ADDR,
#if 0
	/* FIXME verify that this is the
	 * appripriate code for vpp enable/disable
	 */
	.set_vpp = l440gx_set_vpp
#endif
};

static int __init init_l440gx(void)
{
	struct pci_dev *dev, *pm_dev;
	struct resource *pm_iobase;
	__u16 word;

	dev = pci_get_device(PCI_VENDOR_ID_INTEL,
		PCI_DEVICE_ID_INTEL_82371AB_0, NULL);

	pm_dev = pci_get_device(PCI_VENDOR_ID_INTEL,
		PCI_DEVICE_ID_INTEL_82371AB_3, NULL);

	pci_dev_put(dev);

	if (!dev || !pm_dev) {
		printk(KERN_NOTICE "L440GX flash mapping: failed to find PIIX4 ISA bridge, cannot continue\n");
		pci_dev_put(pm_dev);
		return -ENODEV;
	}

	l440gx_map.virt = ioremap_nocache(WINDOW_ADDR, WINDOW_SIZE);

	if (!l440gx_map.virt) {
		printk(KERN_WARNING "Failed to ioremap L440GX flash region\n");
		pci_dev_put(pm_dev);
		return -ENOMEM;
	}
	simple_map_init(&l440gx_map);
	printk(KERN_NOTICE "window_addr = 0x%08lx\n", (unsigned long)l440gx_map.virt);

	/* Setup the pm iobase resource
	 * This code should move into some kind of generic bridge
	 * driver but for the moment I'm content with getting the
	 * allocation correct.
	 */
	pm_iobase = &pm_dev->resource[PIIXE_IOBASE_RESOURCE];
	if (!(pm_iobase->flags & IORESOURCE_IO)) {
		pm_iobase->name = "pm iobase";
		pm_iobase->start = 0;
		pm_iobase->end = 63;
		pm_iobase->flags = IORESOURCE_IO;

		/* Put the current value in the resource */
		pci_read_config_dword(pm_dev, 0x40, &iobase);
		iobase &= ~1;
		pm_iobase->start += iobase & ~1;
		pm_iobase->end += iobase & ~1;

		pci_dev_put(pm_dev);

		/* Allocate the resource region */
		if (pci_assign_resource(pm_dev, PIIXE_IOBASE_RESOURCE) != 0) {
			pci_dev_put(dev);
			pci_dev_put(pm_dev);
			printk(KERN_WARNING "Could not allocate pm iobase resource\n");
			iounmap(l440gx_map.virt);
			return -ENXIO;
		}
	}
	/* Set the iobase */
	iobase = pm_iobase->start;
	pci_write_config_dword(pm_dev, 0x40, iobase | 1);


	/* Set XBCS# */
	pci_read_config_word(dev, 0x4e, &word);
	word |= 0x4;
        pci_write_config_word(dev, 0x4e, word);

	/* Supply write voltage to the chip */
	l440gx_set_vpp(&l440gx_map, 1);

	/* Enable the gate on the WE line */
	outb(inb(TRIBUF_PORT) & ~1, TRIBUF_PORT);

       	printk(KERN_NOTICE "Enabled WE line to L440GX BIOS flash chip.\n");

	mymtd = do_map_probe("jedec_probe", &l440gx_map);
	if (!mymtd) {
		printk(KERN_NOTICE "JEDEC probe on BIOS chip failed. Using ROM\n");
		mymtd = do_map_probe("map_rom", &l440gx_map);
	}
	if (mymtd) {
		mymtd->owner = THIS_MODULE;

		add_mtd_device(mymtd);
		return 0;
	}

	iounmap(l440gx_map.virt);
	return -ENXIO;
}

static void __exit cleanup_l440gx(void)
{
	del_mtd_device(mymtd);
	map_destroy(mymtd);

	iounmap(l440gx_map.virt);
}

module_init(init_l440gx);
module_exit(cleanup_l440gx);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
MODULE_DESCRIPTION("MTD map driver for BIOS chips on Intel L440GX motherboards");
Commit	Line	Data
1da177e4	1	/*
1da177e4 LT	2	* BIOS Flash chip on Intel 440GX board.
	3	*
	4	* Bugs this currently does not work under linuxBIOS.
	5	*/
	6
	7	#include <linux/module.h>
	8	#include <linux/pci.h>
	9	#include <linux/kernel.h>
	10	#include <linux/init.h>
	11	#include <asm/io.h>
	12	#include <linux/mtd/mtd.h>
	13	#include <linux/mtd/map.h>
1da177e4 LT	14
	15	#define PIIXE_IOBASE_RESOURCE 11
	16
	17	#define WINDOW_ADDR 0xfff00000
	18	#define WINDOW_SIZE 0x00100000
	19	#define BUSWIDTH 1
	20
	21	static u32 iobase;
	22	#define IOBASE iobase
	23	#define TRIBUF_PORT (IOBASE+0x37)
	24	#define VPP_PORT (IOBASE+0x28)
	25
	26	static struct mtd_info *mymtd;
	27
	28
	29	/* Is this really the vpp port? */
	30	static void l440gx_set_vpp(struct map_info *map, int vpp)
	31	{
	32	unsigned long l;
	33
	34	l = inl(VPP_PORT);
	35	if (vpp) {
	36	l \|= 1;
	37	} else {
	38	l &= ~1;
	39	}
	40	outl(l, VPP_PORT);
	41	}
	42
	43	static struct map_info l440gx_map = {
	44	.name = "L440GX BIOS",
	45	.size = WINDOW_SIZE,
	46	.bankwidth = BUSWIDTH,
	47	.phys = WINDOW_ADDR,
	48	#if 0
69f34c98	49	/* FIXME verify that this is the
1da177e4 LT	50	* appripriate code for vpp enable/disable
	51	*/
	52	.set_vpp = l440gx_set_vpp
	53	#endif
	54	};
	55
	56	static int __init init_l440gx(void)
	57	{
	58	struct pci_dev dev, pm_dev;
	59	struct resource *pm_iobase;
	60	__u16 word;
	61
dd8e9ed6	62	dev = pci_get_device(PCI_VENDOR_ID_INTEL,
1da177e4 LT	63	PCI_DEVICE_ID_INTEL_82371AB_0, NULL);
1da177e4 LT	64
dd8e9ed6	65	pm_dev = pci_get_device(PCI_VENDOR_ID_INTEL,
1da177e4 LT	66	PCI_DEVICE_ID_INTEL_82371AB_3, NULL);
1da177e4 LT	67
dd8e9ed6 AC	68	pci_dev_put(dev);
dd8e9ed6 AC	69
1da177e4 LT	70	if (!dev \|\| !pm_dev) {
1da177e4 LT	71	printk(KERN_NOTICE "L440GX flash mapping: failed to find PIIX4 ISA bridge, cannot continue\n");
dd8e9ed6	72	pci_dev_put(pm_dev);
1da177e4 LT	73	return -ENODEV;
	74	}
	75
	76	l440gx_map.virt = ioremap_nocache(WINDOW_ADDR, WINDOW_SIZE);
	77
	78	if (!l440gx_map.virt) {
	79	printk(KERN_WARNING "Failed to ioremap L440GX flash region\n");
dd8e9ed6	80	pci_dev_put(pm_dev);
1da177e4 LT	81	return -ENOMEM;
	82	}
	83	simple_map_init(&l440gx_map);
	84	printk(KERN_NOTICE "window_addr = 0x%08lx\n", (unsigned long)l440gx_map.virt);
	85
69f34c98	86	/* Setup the pm iobase resource
1da177e4 LT	87	* This code should move into some kind of generic bridge
1da177e4 LT	88	* driver but for the moment I'm content with getting the
69f34c98	89	* allocation correct.
1da177e4 LT	90	*/
	91	pm_iobase = &pm_dev->resource[PIIXE_IOBASE_RESOURCE];
	92	if (!(pm_iobase->flags & IORESOURCE_IO)) {
	93	pm_iobase->name = "pm iobase";
	94	pm_iobase->start = 0;
	95	pm_iobase->end = 63;
	96	pm_iobase->flags = IORESOURCE_IO;
	97
	98	/* Put the current value in the resource */
	99	pci_read_config_dword(pm_dev, 0x40, &iobase);
	100	iobase &= ~1;
	101	pm_iobase->start += iobase & ~1;
	102	pm_iobase->end += iobase & ~1;
	103
dd8e9ed6 AC	104	pci_dev_put(pm_dev);
dd8e9ed6 AC	105
1da177e4 LT	106	/* Allocate the resource region */
1da177e4 LT	107	if (pci_assign_resource(pm_dev, PIIXE_IOBASE_RESOURCE) != 0) {
dd8e9ed6 AC	108	pci_dev_put(dev);
dd8e9ed6 AC	109	pci_dev_put(pm_dev);
1da177e4 LT	110	printk(KERN_WARNING "Could not allocate pm iobase resource\n");
	111	iounmap(l440gx_map.virt);
	112	return -ENXIO;
	113	}
	114	}
	115	/* Set the iobase */
	116	iobase = pm_iobase->start;
	117	pci_write_config_dword(pm_dev, 0x40, iobase \| 1);
69f34c98	118
1da177e4 LT	119
	120	/* Set XBCS# */
	121	pci_read_config_word(dev, 0x4e, &word);
	122	word \|= 0x4;
	123	pci_write_config_word(dev, 0x4e, word);
	124
	125	/* Supply write voltage to the chip */
	126	l440gx_set_vpp(&l440gx_map, 1);
	127
	128	/* Enable the gate on the WE line */
	129	outb(inb(TRIBUF_PORT) & ~1, TRIBUF_PORT);
69f34c98	130
1da177e4 LT	131	printk(KERN_NOTICE "Enabled WE line to L440GX BIOS flash chip.\n");
	132
	133	mymtd = do_map_probe("jedec_probe", &l440gx_map);
	134	if (!mymtd) {
	135	printk(KERN_NOTICE "JEDEC probe on BIOS chip failed. Using ROM\n");
	136	mymtd = do_map_probe("map_rom", &l440gx_map);
	137	}
	138	if (mymtd) {
	139	mymtd->owner = THIS_MODULE;
	140
	141	add_mtd_device(mymtd);
	142	return 0;
	143	}
	144
	145	iounmap(l440gx_map.virt);
	146	return -ENXIO;
	147	}
	148
	149	static void __exit cleanup_l440gx(void)
	150	{
	151	del_mtd_device(mymtd);
	152	map_destroy(mymtd);
69f34c98	153
1da177e4 LT	154	iounmap(l440gx_map.virt);
	155	}
	156
	157	module_init(init_l440gx);
	158	module_exit(cleanup_l440gx);
	159
	160	MODULE_LICENSE("GPL");
	161	MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
	162	MODULE_DESCRIPTION("MTD map driver for BIOS chips on Intel L440GX motherboards");