Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * amd76xrom.c | |
3 | * | |
4 | * Normal mappings of chips in physical memory | |
1da177e4 LT |
5 | */ |
6 | ||
7 | #include <linux/module.h> | |
8 | #include <linux/types.h> | |
9 | #include <linux/kernel.h> | |
10 | #include <linux/init.h> | |
5a0e3ad6 | 11 | #include <linux/slab.h> |
1da177e4 LT |
12 | #include <asm/io.h> |
13 | #include <linux/mtd/mtd.h> | |
14 | #include <linux/mtd/map.h> | |
15 | #include <linux/mtd/cfi.h> | |
16 | #include <linux/mtd/flashchip.h> | |
1da177e4 LT |
17 | #include <linux/pci.h> |
18 | #include <linux/pci_ids.h> | |
19 | #include <linux/list.h> | |
20 | ||
21 | ||
22 | #define xstr(s) str(s) | |
23 | #define str(s) #s | |
24 | #define MOD_NAME xstr(KBUILD_BASENAME) | |
25 | ||
26 | #define ADDRESS_NAME_LEN 18 | |
27 | ||
28 | #define ROM_PROBE_STEP_SIZE (64*1024) /* 64KiB */ | |
29 | ||
30 | struct amd76xrom_window { | |
31 | void __iomem *virt; | |
32 | unsigned long phys; | |
33 | unsigned long size; | |
34 | struct list_head maps; | |
35 | struct resource rsrc; | |
36 | struct pci_dev *pdev; | |
37 | }; | |
38 | ||
39 | struct amd76xrom_map_info { | |
40 | struct list_head list; | |
41 | struct map_info map; | |
42 | struct mtd_info *mtd; | |
43 | struct resource rsrc; | |
44 | char map_name[sizeof(MOD_NAME) + 2 + ADDRESS_NAME_LEN]; | |
45 | }; | |
46 | ||
c9073ce0 RJ |
47 | /* The 2 bits controlling the window size are often set to allow reading |
48 | * the BIOS, but too small to allow writing, since the lock registers are | |
49 | * 4MiB lower in the address space than the data. | |
50 | * | |
51 | * This is intended to prevent flashing the bios, perhaps accidentally. | |
52 | * | |
53 | * This parameter allows the normal driver to over-ride the BIOS settings. | |
54 | * | |
55 | * The bits are 6 and 7. If both bits are set, it is a 5MiB window. | |
56 | * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a | |
57 | * 64KiB window. | |
58 | * | |
59 | */ | |
60 | static uint win_size_bits; | |
61 | module_param(win_size_bits, uint, 0); | |
62 | MODULE_PARM_DESC(win_size_bits, "ROM window size bits override for 0x43 byte, normally set by BIOS."); | |
63 | ||
1da177e4 LT |
64 | static struct amd76xrom_window amd76xrom_window = { |
65 | .maps = LIST_HEAD_INIT(amd76xrom_window.maps), | |
66 | }; | |
67 | ||
68 | static void amd76xrom_cleanup(struct amd76xrom_window *window) | |
69 | { | |
70 | struct amd76xrom_map_info *map, *scratch; | |
71 | u8 byte; | |
72 | ||
73 | if (window->pdev) { | |
74 | /* Disable writes through the rom window */ | |
75 | pci_read_config_byte(window->pdev, 0x40, &byte); | |
76 | pci_write_config_byte(window->pdev, 0x40, byte & ~1); | |
dd8e9ed6 | 77 | pci_dev_put(window->pdev); |
1da177e4 LT |
78 | } |
79 | ||
80 | /* Free all of the mtd devices */ | |
81 | list_for_each_entry_safe(map, scratch, &window->maps, list) { | |
82 | if (map->rsrc.parent) { | |
83 | release_resource(&map->rsrc); | |
84 | } | |
85 | del_mtd_device(map->mtd); | |
86 | map_destroy(map->mtd); | |
87 | list_del(&map->list); | |
88 | kfree(map); | |
89 | } | |
69f34c98 | 90 | if (window->rsrc.parent) |
1da177e4 LT |
91 | release_resource(&window->rsrc); |
92 | ||
93 | if (window->virt) { | |
94 | iounmap(window->virt); | |
95 | window->virt = NULL; | |
96 | window->phys = 0; | |
97 | window->size = 0; | |
98 | window->pdev = NULL; | |
99 | } | |
100 | } | |
101 | ||
102 | ||
103 | static int __devinit amd76xrom_init_one (struct pci_dev *pdev, | |
104 | const struct pci_device_id *ent) | |
105 | { | |
106 | static char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL }; | |
107 | u8 byte; | |
108 | struct amd76xrom_window *window = &amd76xrom_window; | |
109 | struct amd76xrom_map_info *map = NULL; | |
110 | unsigned long map_top; | |
111 | ||
dd8e9ed6 | 112 | /* Remember the pci dev I find the window in - already have a ref */ |
1da177e4 LT |
113 | window->pdev = pdev; |
114 | ||
c9073ce0 RJ |
115 | /* Enable the selected rom window. This is often incorrectly |
116 | * set up by the BIOS, and the 4MiB offset for the lock registers | |
117 | * requires the full 5MiB of window space. | |
118 | * | |
119 | * This 'write, then read' approach leaves the bits for | |
120 | * other uses of the hardware info. | |
121 | */ | |
122 | pci_read_config_byte(pdev, 0x43, &byte); | |
123 | pci_write_config_byte(pdev, 0x43, byte | win_size_bits ); | |
124 | ||
1da177e4 LT |
125 | /* Assume the rom window is properly setup, and find it's size */ |
126 | pci_read_config_byte(pdev, 0x43, &byte); | |
127 | if ((byte & ((1<<7)|(1<<6))) == ((1<<7)|(1<<6))) { | |
128 | window->phys = 0xffb00000; /* 5MiB */ | |
129 | } | |
130 | else if ((byte & (1<<7)) == (1<<7)) { | |
131 | window->phys = 0xffc00000; /* 4MiB */ | |
132 | } | |
133 | else { | |
134 | window->phys = 0xffff0000; /* 64KiB */ | |
135 | } | |
136 | window->size = 0xffffffffUL - window->phys + 1UL; | |
69f34c98 | 137 | |
1da177e4 LT |
138 | /* |
139 | * Try to reserve the window mem region. If this fails then | |
140 | * it is likely due to a fragment of the window being | |
141 | * "reseved" by the BIOS. In the case that the | |
142 | * request_mem_region() fails then once the rom size is | |
143 | * discovered we will try to reserve the unreserved fragment. | |
144 | */ | |
145 | window->rsrc.name = MOD_NAME; | |
146 | window->rsrc.start = window->phys; | |
147 | window->rsrc.end = window->phys + window->size - 1; | |
148 | window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY; | |
149 | if (request_resource(&iomem_resource, &window->rsrc)) { | |
150 | window->rsrc.parent = NULL; | |
151 | printk(KERN_ERR MOD_NAME | |
152 | " %s(): Unable to register resource" | |
176dfc63 | 153 | " 0x%.16llx-0x%.16llx - kernel bug?\n", |
1da177e4 | 154 | __func__, |
176dfc63 GKH |
155 | (unsigned long long)window->rsrc.start, |
156 | (unsigned long long)window->rsrc.end); | |
1da177e4 LT |
157 | } |
158 | ||
1da177e4 LT |
159 | |
160 | /* Enable writes through the rom window */ | |
161 | pci_read_config_byte(pdev, 0x40, &byte); | |
162 | pci_write_config_byte(pdev, 0x40, byte | 1); | |
69f34c98 | 163 | |
1da177e4 LT |
164 | /* FIXME handle registers 0x80 - 0x8C the bios region locks */ |
165 | ||
166 | /* For write accesses caches are useless */ | |
167 | window->virt = ioremap_nocache(window->phys, window->size); | |
168 | if (!window->virt) { | |
169 | printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n", | |
170 | window->phys, window->size); | |
171 | goto out; | |
172 | } | |
173 | ||
174 | /* Get the first address to look for an rom chip at */ | |
175 | map_top = window->phys; | |
176 | #if 1 | |
177 | /* The probe sequence run over the firmware hub lock | |
178 | * registers sets them to 0x7 (no access). | |
179 | * Probe at most the last 4M of the address space. | |
180 | */ | |
181 | if (map_top < 0xffc00000) { | |
182 | map_top = 0xffc00000; | |
183 | } | |
184 | #endif | |
185 | /* Loop through and look for rom chips */ | |
186 | while((map_top - 1) < 0xffffffffUL) { | |
187 | struct cfi_private *cfi; | |
188 | unsigned long offset; | |
189 | int i; | |
190 | ||
191 | if (!map) { | |
192 | map = kmalloc(sizeof(*map), GFP_KERNEL); | |
193 | } | |
194 | if (!map) { | |
195 | printk(KERN_ERR MOD_NAME ": kmalloc failed"); | |
196 | goto out; | |
197 | } | |
198 | memset(map, 0, sizeof(*map)); | |
199 | INIT_LIST_HEAD(&map->list); | |
200 | map->map.name = map->map_name; | |
201 | map->map.phys = map_top; | |
202 | offset = map_top - window->phys; | |
203 | map->map.virt = (void __iomem *) | |
204 | (((unsigned long)(window->virt)) + offset); | |
205 | map->map.size = 0xffffffffUL - map_top + 1UL; | |
206 | /* Set the name of the map to the address I am trying */ | |
1a6284cb AM |
207 | sprintf(map->map_name, "%s @%08Lx", |
208 | MOD_NAME, (unsigned long long)map->map.phys); | |
1da177e4 LT |
209 | |
210 | /* There is no generic VPP support */ | |
69f34c98 | 211 | for(map->map.bankwidth = 32; map->map.bankwidth; |
1da177e4 LT |
212 | map->map.bankwidth >>= 1) |
213 | { | |
214 | char **probe_type; | |
215 | /* Skip bankwidths that are not supported */ | |
216 | if (!map_bankwidth_supported(map->map.bankwidth)) | |
217 | continue; | |
218 | ||
219 | /* Setup the map methods */ | |
220 | simple_map_init(&map->map); | |
221 | ||
222 | /* Try all of the probe methods */ | |
223 | probe_type = rom_probe_types; | |
224 | for(; *probe_type; probe_type++) { | |
225 | map->mtd = do_map_probe(*probe_type, &map->map); | |
226 | if (map->mtd) | |
227 | goto found; | |
228 | } | |
229 | } | |
230 | map_top += ROM_PROBE_STEP_SIZE; | |
231 | continue; | |
232 | found: | |
233 | /* Trim the size if we are larger than the map */ | |
234 | if (map->mtd->size > map->map.size) { | |
235 | printk(KERN_WARNING MOD_NAME | |
69423d99 AH |
236 | " rom(%llu) larger than window(%lu). fixing...\n", |
237 | (unsigned long long)map->mtd->size, map->map.size); | |
1da177e4 LT |
238 | map->mtd->size = map->map.size; |
239 | } | |
240 | if (window->rsrc.parent) { | |
241 | /* | |
242 | * Registering the MTD device in iomem may not be possible | |
243 | * if there is a BIOS "reserved" and BUSY range. If this | |
244 | * fails then continue anyway. | |
245 | */ | |
246 | map->rsrc.name = map->map_name; | |
247 | map->rsrc.start = map->map.phys; | |
248 | map->rsrc.end = map->map.phys + map->mtd->size - 1; | |
249 | map->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY; | |
250 | if (request_resource(&window->rsrc, &map->rsrc)) { | |
251 | printk(KERN_ERR MOD_NAME | |
252 | ": cannot reserve MTD resource\n"); | |
253 | map->rsrc.parent = NULL; | |
254 | } | |
255 | } | |
256 | ||
257 | /* Make the whole region visible in the map */ | |
258 | map->map.virt = window->virt; | |
259 | map->map.phys = window->phys; | |
260 | cfi = map->map.fldrv_priv; | |
261 | for(i = 0; i < cfi->numchips; i++) { | |
262 | cfi->chips[i].start += offset; | |
263 | } | |
69f34c98 | 264 | |
1da177e4 LT |
265 | /* Now that the mtd devices is complete claim and export it */ |
266 | map->mtd->owner = THIS_MODULE; | |
267 | if (add_mtd_device(map->mtd)) { | |
268 | map_destroy(map->mtd); | |
269 | map->mtd = NULL; | |
270 | goto out; | |
271 | } | |
272 | ||
273 | ||
274 | /* Calculate the new value of map_top */ | |
275 | map_top += map->mtd->size; | |
276 | ||
277 | /* File away the map structure */ | |
278 | list_add(&map->list, &window->maps); | |
279 | map = NULL; | |
280 | } | |
281 | ||
282 | out: | |
283 | /* Free any left over map structures */ | |
fa671646 | 284 | kfree(map); |
1da177e4 LT |
285 | /* See if I have any map structures */ |
286 | if (list_empty(&window->maps)) { | |
287 | amd76xrom_cleanup(window); | |
288 | return -ENODEV; | |
289 | } | |
290 | return 0; | |
291 | } | |
292 | ||
293 | ||
294 | static void __devexit amd76xrom_remove_one (struct pci_dev *pdev) | |
295 | { | |
296 | struct amd76xrom_window *window = &amd76xrom_window; | |
297 | ||
298 | amd76xrom_cleanup(window); | |
299 | } | |
300 | ||
301 | static struct pci_device_id amd76xrom_pci_tbl[] = { | |
69f34c98 | 302 | { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410, |
1da177e4 | 303 | PCI_ANY_ID, PCI_ANY_ID, }, |
69f34c98 | 304 | { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7440, |
1da177e4 LT |
305 | PCI_ANY_ID, PCI_ANY_ID, }, |
306 | { PCI_VENDOR_ID_AMD, 0x7468 }, /* amd8111 support */ | |
307 | { 0, } | |
308 | }; | |
309 | ||
310 | MODULE_DEVICE_TABLE(pci, amd76xrom_pci_tbl); | |
311 | ||
312 | #if 0 | |
313 | static struct pci_driver amd76xrom_driver = { | |
314 | .name = MOD_NAME, | |
315 | .id_table = amd76xrom_pci_tbl, | |
316 | .probe = amd76xrom_init_one, | |
317 | .remove = amd76xrom_remove_one, | |
318 | }; | |
319 | #endif | |
320 | ||
321 | static int __init init_amd76xrom(void) | |
322 | { | |
323 | struct pci_dev *pdev; | |
324 | struct pci_device_id *id; | |
325 | pdev = NULL; | |
326 | for(id = amd76xrom_pci_tbl; id->vendor; id++) { | |
dd8e9ed6 | 327 | pdev = pci_get_device(id->vendor, id->device, NULL); |
1da177e4 LT |
328 | if (pdev) { |
329 | break; | |
330 | } | |
331 | } | |
332 | if (pdev) { | |
333 | return amd76xrom_init_one(pdev, &amd76xrom_pci_tbl[0]); | |
334 | } | |
335 | return -ENXIO; | |
336 | #if 0 | |
ff3bc4eb | 337 | return pci_register_driver(&amd76xrom_driver); |
1da177e4 LT |
338 | #endif |
339 | } | |
340 | ||
341 | static void __exit cleanup_amd76xrom(void) | |
342 | { | |
343 | amd76xrom_remove_one(amd76xrom_window.pdev); | |
344 | } | |
345 | ||
346 | module_init(init_amd76xrom); | |
347 | module_exit(cleanup_amd76xrom); | |
348 | ||
349 | MODULE_LICENSE("GPL"); | |
350 | MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>"); | |
351 | MODULE_DESCRIPTION("MTD map driver for BIOS chips on the AMD76X southbridge"); | |
352 |