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[MMC] sdhci: fix sdhci reset timeout
[linux-2.6-block.git] / drivers / mmc / sdhci.c
CommitLineData
d129bceb
PO		 1/*
2 * linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
3 *
4 * Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 /*
12 * Note that PIO transfer is rather crappy atm. The buffer full/empty
13 * interrupts aren't reliable so we currently transfer the entire buffer
14 * directly. Patches to solve the problem are welcome.
15 */
16
17#include <linux/delay.h>
18#include <linux/highmem.h>
19#include <linux/pci.h>
20#include <linux/dma-mapping.h>
21
22#include <linux/mmc/host.h>
23#include <linux/mmc/protocol.h>
24
25#include <asm/scatterlist.h>
26
27#include "sdhci.h"
28
29#define DRIVER_NAME "sdhci"
30#define DRIVER_VERSION "0.11"
31
32#define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
33
d129bceb 34#define DBG(f, x...) \
c6563178 35 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
d129bceb
PO		 36
37static const struct pci_device_id pci_ids[] __devinitdata = {
38 /* handle any SD host controller */
39 {PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)},
40 { /* end: all zeroes */ },
41};
42
43MODULE_DEVICE_TABLE(pci, pci_ids);
44
45static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
46static void sdhci_finish_data(struct sdhci_host *);
47
48static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
49static void sdhci_finish_command(struct sdhci_host *);
50
51static void sdhci_dumpregs(struct sdhci_host *host)
52{
53 printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
54
55 printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
56 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
57 readw(host->ioaddr + SDHCI_HOST_VERSION));
58 printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
59 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
60 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
61 printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
62 readl(host->ioaddr + SDHCI_ARGUMENT),
63 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
64 printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
65 readl(host->ioaddr + SDHCI_PRESENT_STATE),
66 readb(host->ioaddr + SDHCI_HOST_CONTROL));
67 printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
68 readb(host->ioaddr + SDHCI_POWER_CONTROL),
69 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
70 printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
71 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
72 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
73 printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
74 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
75 readl(host->ioaddr + SDHCI_INT_STATUS));
76 printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
77 readl(host->ioaddr + SDHCI_INT_ENABLE),
78 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
79 printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
80 readw(host->ioaddr + SDHCI_ACMD12_ERR),
81 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
82 printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n",
83 readl(host->ioaddr + SDHCI_CAPABILITIES),
84 readl(host->ioaddr + SDHCI_MAX_CURRENT));
85
86 printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
87}
88
89/*****************************************************************************\
90 * *
91 * Low level functions *
92 * *
93\*****************************************************************************/
94
95static void sdhci_reset(struct sdhci_host *host, u8 mask)
96{
e16514d8
PO		 97 unsigned long timeout;
98
d129bceb
PO		 99 writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
100
e16514d8 101 if (mask & SDHCI_RESET_ALL)
d129bceb
PO		 102 host->clock = 0;
103
e16514d8
PO		 104 /* Wait max 100 ms */
105 timeout = 100;
106
107 /* hw clears the bit when it's done */
108 while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
109 if (timeout == 0) {
110 printk(KERN_ERR "%s: Reset 0x%x never completed. "
111 "Please report this to " BUGMAIL ".\n",
112 mmc_hostname(host->mmc), (int)mask);
113 sdhci_dumpregs(host);
114 return;
115 }
116 timeout--;
117 mdelay(1);
d129bceb
PO		 118 }
119}
120
121static void sdhci_init(struct sdhci_host *host)
122{
123 u32 intmask;
124
125 sdhci_reset(host, SDHCI_RESET_ALL);
126
127 intmask = ~(SDHCI_INT_CARD_INT | SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL);
128
129 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
130 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
131
132 /* This is unknown magic. */
133 writeb(0xE, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
134}
135
136static void sdhci_activate_led(struct sdhci_host *host)
137{
138 u8 ctrl;
139
140 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
141 ctrl |= SDHCI_CTRL_LED;
142 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
143}
144
145static void sdhci_deactivate_led(struct sdhci_host *host)
146{
147 u8 ctrl;
148
149 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
150 ctrl &= ~SDHCI_CTRL_LED;
151 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
152}
153
154/*****************************************************************************\
155 * *
156 * Core functions *
157 * *
158\*****************************************************************************/
159
160static inline char* sdhci_kmap_sg(struct sdhci_host* host)
161{
162 host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ);
163 return host->mapped_sg + host->cur_sg->offset;
164}
165
166static inline void sdhci_kunmap_sg(struct sdhci_host* host)
167{
168 kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
169}
170
171static inline int sdhci_next_sg(struct sdhci_host* host)
172{
173 /*
174 * Skip to next SG entry.
175 */
176 host->cur_sg++;
177 host->num_sg--;
178
179 /*
180 * Any entries left?
181 */
182 if (host->num_sg > 0) {
183 host->offset = 0;
184 host->remain = host->cur_sg->length;
185 }
186
187 return host->num_sg;
188}
189
190static void sdhci_transfer_pio(struct sdhci_host *host)
191{
192 char *buffer;
193 u32 mask;
194 int bytes, size;
195 unsigned long max_jiffies;
196
197 BUG_ON(!host->data);
198
199 if (host->num_sg == 0)
200 return;
201
202 bytes = 0;
203 if (host->data->flags & MMC_DATA_READ)
204 mask = SDHCI_DATA_AVAILABLE;
205 else
206 mask = SDHCI_SPACE_AVAILABLE;
207
208 buffer = sdhci_kmap_sg(host) + host->offset;
209
210 /* Transfer shouldn't take more than 5 s */
211 max_jiffies = jiffies + HZ * 5;
212
213 while (host->size > 0) {
214 if (time_after(jiffies, max_jiffies)) {
215 printk(KERN_ERR "%s: PIO transfer stalled. "
216 "Please report this to "
217 BUGMAIL ".\n", mmc_hostname(host->mmc));
218 sdhci_dumpregs(host);
219
220 sdhci_kunmap_sg(host);
221
222 host->data->error = MMC_ERR_FAILED;
223 sdhci_finish_data(host);
224 return;
225 }
226
227 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask))
228 continue;
229
230 size = min(host->size, host->remain);
231
232 if (size >= 4) {
233 if (host->data->flags & MMC_DATA_READ)
234 *(u32*)buffer = readl(host->ioaddr + SDHCI_BUFFER);
235 else
236 writel(*(u32*)buffer, host->ioaddr + SDHCI_BUFFER);
237 size = 4;
238 } else if (size >= 2) {
239 if (host->data->flags & MMC_DATA_READ)
240 *(u16*)buffer = readw(host->ioaddr + SDHCI_BUFFER);
241 else
242 writew(*(u16*)buffer, host->ioaddr + SDHCI_BUFFER);
243 size = 2;
244 } else {
245 if (host->data->flags & MMC_DATA_READ)
246 *(u8*)buffer = readb(host->ioaddr + SDHCI_BUFFER);
247 else
248 writeb(*(u8*)buffer, host->ioaddr + SDHCI_BUFFER);
249 size = 1;
250 }
251
252 buffer += size;
253 host->offset += size;
254 host->remain -= size;
255
256 bytes += size;
257 host->size -= size;
258
259 if (host->remain == 0) {
260 sdhci_kunmap_sg(host);
261 if (sdhci_next_sg(host) == 0) {
262 DBG("PIO transfer: %d bytes\n", bytes);
263 return;
264 }
265 buffer = sdhci_kmap_sg(host);
266 }
267 }
268
269 sdhci_kunmap_sg(host);
270
271 DBG("PIO transfer: %d bytes\n", bytes);
272}
273
274static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
275{
276 u16 mode;
277
278 WARN_ON(host->data);
279
280 if (data == NULL) {
281 writew(0, host->ioaddr + SDHCI_TRANSFER_MODE);
282 return;
283 }
284
285 DBG("blksz %04x blks %04x flags %08x\n",
a3fd4a1b 286 data->blksz, data->blocks, data->flags);
d129bceb
PO		 287 DBG("tsac %d ms nsac %d clk\n",
288 data->timeout_ns / 1000000, data->timeout_clks);
289
290 mode = SDHCI_TRNS_BLK_CNT_EN;
291 if (data->blocks > 1)
292 mode |= SDHCI_TRNS_MULTI;
293 if (data->flags & MMC_DATA_READ)
294 mode |= SDHCI_TRNS_READ;
295 if (host->flags & SDHCI_USE_DMA)
296 mode |= SDHCI_TRNS_DMA;
297
298 writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
299
a3fd4a1b 300 writew(data->blksz, host->ioaddr + SDHCI_BLOCK_SIZE);
d129bceb
PO		 301 writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
302
303 if (host->flags & SDHCI_USE_DMA) {
304 int count;
305
306 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
307 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
308 BUG_ON(count != 1);
309
310 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
311 } else {
a3fd4a1b 312 host->size = data->blksz * data->blocks;
d129bceb
PO		 313
314 host->cur_sg = data->sg;
315 host->num_sg = data->sg_len;
316
317 host->offset = 0;
318 host->remain = host->cur_sg->length;
319 }
320}
321
322static void sdhci_finish_data(struct sdhci_host *host)
323{
324 struct mmc_data *data;
325 u32 intmask;
326 u16 blocks;
327
328 BUG_ON(!host->data);
329
330 data = host->data;
331 host->data = NULL;
332
333 if (host->flags & SDHCI_USE_DMA) {
334 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
335 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
336 } else {
337 intmask = readl(host->ioaddr + SDHCI_SIGNAL_ENABLE);
338 intmask &= ~(SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL);
339 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
340
341 intmask = readl(host->ioaddr + SDHCI_INT_ENABLE);
342 intmask &= ~(SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL);
343 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
344 }
345
346 /*
347 * Controller doesn't count down when in single block mode.
348 */
349 if ((data->blocks == 1) && (data->error == MMC_ERR_NONE))
350 blocks = 0;
351 else
352 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
a3fd4a1b 353 data->bytes_xfered = data->blksz * (data->blocks - blocks);
d129bceb
PO		 354
355 if ((data->error == MMC_ERR_NONE) && blocks) {
356 printk(KERN_ERR "%s: Controller signalled completion even "
357 "though there were blocks left. Please report this "
358 "to " BUGMAIL ".\n", mmc_hostname(host->mmc));
359 data->error = MMC_ERR_FAILED;
360 }
361
362 if (host->size != 0) {
363 printk(KERN_ERR "%s: %d bytes were left untransferred. "
364 "Please report this to " BUGMAIL ".\n",
365 mmc_hostname(host->mmc), host->size);
366 data->error = MMC_ERR_FAILED;
367 }
368
369 DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered);
370
371 if (data->stop) {
372 /*
373 * The controller needs a reset of internal state machines
374 * upon error conditions.
375 */
376 if (data->error != MMC_ERR_NONE) {
377 sdhci_reset(host, SDHCI_RESET_CMD);
378 sdhci_reset(host, SDHCI_RESET_DATA);
379 }
380
381 sdhci_send_command(host, data->stop);
382 } else
383 tasklet_schedule(&host->finish_tasklet);
384}
385
386static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
387{
388 int flags;
7cb2c76f 389 unsigned long timeout;
d129bceb
PO		 390
391 WARN_ON(host->cmd);
392
393 DBG("Sending cmd (%x)\n", cmd->opcode);
394
395 /* Wait max 10 ms */
7cb2c76f
PO		 396 timeout = 10;
397 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) &
398 (SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT)) {
399 if (timeout == 0) {
d129bceb
PO		 400 printk(KERN_ERR "%s: Controller never released "
401 "inhibit bits. Please report this to "
402 BUGMAIL ".\n", mmc_hostname(host->mmc));
403 sdhci_dumpregs(host);
404 cmd->error = MMC_ERR_FAILED;
405 tasklet_schedule(&host->finish_tasklet);
406 return;
407 }
7cb2c76f
PO		 408 timeout--;
409 mdelay(1);
410 }
d129bceb
PO		 411
412 mod_timer(&host->timer, jiffies + 10 * HZ);
413
414 host->cmd = cmd;
415
416 sdhci_prepare_data(host, cmd->data);
417
418 writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
419
420 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
421 printk(KERN_ERR "%s: Unsupported response type! "
422 "Please report this to " BUGMAIL ".\n",
423 mmc_hostname(host->mmc));
424 cmd->error = MMC_ERR_INVALID;
425 tasklet_schedule(&host->finish_tasklet);
426 return;
427 }
428
429 if (!(cmd->flags & MMC_RSP_PRESENT))
430 flags = SDHCI_CMD_RESP_NONE;
431 else if (cmd->flags & MMC_RSP_136)
432 flags = SDHCI_CMD_RESP_LONG;
433 else if (cmd->flags & MMC_RSP_BUSY)
434 flags = SDHCI_CMD_RESP_SHORT_BUSY;
435 else
436 flags = SDHCI_CMD_RESP_SHORT;
437
438 if (cmd->flags & MMC_RSP_CRC)
439 flags |= SDHCI_CMD_CRC;
440 if (cmd->flags & MMC_RSP_OPCODE)
441 flags |= SDHCI_CMD_INDEX;
442 if (cmd->data)
443 flags |= SDHCI_CMD_DATA;
444
445 writel(SDHCI_MAKE_CMD(cmd->opcode, flags),
446 host->ioaddr + SDHCI_COMMAND);
447}
448
449static void sdhci_finish_command(struct sdhci_host *host)
450{
451 int i;
452
453 BUG_ON(host->cmd == NULL);
454
455 if (host->cmd->flags & MMC_RSP_PRESENT) {
456 if (host->cmd->flags & MMC_RSP_136) {
457 /* CRC is stripped so we need to do some shifting. */
458 for (i = 0;i < 4;i++) {
459 host->cmd->resp[i] = readl(host->ioaddr +
460 SDHCI_RESPONSE + (3-i)*4) << 8;
461 if (i != 3)
462 host->cmd->resp[i] |=
463 readb(host->ioaddr +
464 SDHCI_RESPONSE + (3-i)*4-1);
465 }
466 } else {
467 host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
468 }
469 }
470
471 host->cmd->error = MMC_ERR_NONE;
472
473 DBG("Ending cmd (%x)\n", host->cmd->opcode);
474
475 if (host->cmd->data) {
476 u32 intmask;
477
478 host->data = host->cmd->data;
479
480 if (!(host->flags & SDHCI_USE_DMA)) {
481 /*
482 * Don't enable the interrupts until now to make sure we
483 * get stable handling of the FIFO.
484 */
485 intmask = readl(host->ioaddr + SDHCI_INT_ENABLE);
486 intmask |= SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL;
487 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
488
489 intmask = readl(host->ioaddr + SDHCI_SIGNAL_ENABLE);
490 intmask |= SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL;
491 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
492
493 /*
494 * The buffer interrupts are to unreliable so we
495 * start the transfer immediatly.
496 */
497 sdhci_transfer_pio(host);
498 }
499 } else
500 tasklet_schedule(&host->finish_tasklet);
501
502 host->cmd = NULL;
503}
504
505static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
506{
507 int div;
508 u16 clk;
7cb2c76f 509 unsigned long timeout;
d129bceb
PO		 510
511 if (clock == host->clock)
512 return;
513
514 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
515
516 if (clock == 0)
517 goto out;
518
519 for (div = 1;div < 256;div *= 2) {
520 if ((host->max_clk / div) <= clock)
521 break;
522 }
523 div >>= 1;
524
525 clk = div << SDHCI_DIVIDER_SHIFT;
526 clk |= SDHCI_CLOCK_INT_EN;
527 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
528
529 /* Wait max 10 ms */
7cb2c76f
PO		 530 timeout = 10;
531 while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
532 & SDHCI_CLOCK_INT_STABLE)) {
533 if (timeout == 0) {
d129bceb
PO		 534 printk(KERN_ERR "%s: Internal clock never stabilised. "
535 "Please report this to " BUGMAIL ".\n",
536 mmc_hostname(host->mmc));
537 sdhci_dumpregs(host);
538 return;
539 }
7cb2c76f
PO		 540 timeout--;
541 mdelay(1);
542 }
d129bceb
PO		 543
544 clk |= SDHCI_CLOCK_CARD_EN;
545 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
546
547out:
548 host->clock = clock;
549}
550
146ad66e
PO		 551static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
552{
553 u8 pwr;
554
555 if (host->power == power)
556 return;
557
558 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
559
560 if (power == (unsigned short)-1)
561 goto out;
562
563 pwr = SDHCI_POWER_ON;
564
565 switch (power) {
566 case MMC_VDD_170:
567 case MMC_VDD_180:
568 case MMC_VDD_190:
569 pwr |= SDHCI_POWER_180;
570 break;
571 case MMC_VDD_290:
572 case MMC_VDD_300:
573 case MMC_VDD_310:
574 pwr |= SDHCI_POWER_300;
575 break;
576 case MMC_VDD_320:
577 case MMC_VDD_330:
578 case MMC_VDD_340:
579 pwr |= SDHCI_POWER_330;
580 break;
581 default:
582 BUG();
583 }
584
585 writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
586
587out:
588 host->power = power;
589}
590
d129bceb
PO		 591/*****************************************************************************\
592 * *
593 * MMC callbacks *
594 * *
595\*****************************************************************************/
596
597static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
598{
599 struct sdhci_host *host;
600 unsigned long flags;
601
602 host = mmc_priv(mmc);
603
604 spin_lock_irqsave(&host->lock, flags);
605
606 WARN_ON(host->mrq != NULL);
607
608 sdhci_activate_led(host);
609
610 host->mrq = mrq;
611
612 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
613 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
614 tasklet_schedule(&host->finish_tasklet);
615 } else
616 sdhci_send_command(host, mrq->cmd);
617
618 spin_unlock_irqrestore(&host->lock, flags);
619}
620
621static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
622{
623 struct sdhci_host *host;
624 unsigned long flags;
625 u8 ctrl;
626
627 host = mmc_priv(mmc);
628
629 spin_lock_irqsave(&host->lock, flags);
630
d129bceb
PO		 631 /*
632 * Reset the chip on each power off.
633 * Should clear out any weird states.
634 */
635 if (ios->power_mode == MMC_POWER_OFF) {
636 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
d129bceb 637 sdhci_init(host);
d129bceb
PO		 638 }
639
640 sdhci_set_clock(host, ios->clock);
641
642 if (ios->power_mode == MMC_POWER_OFF)
146ad66e 643 sdhci_set_power(host, -1);
d129bceb 644 else
146ad66e 645 sdhci_set_power(host, ios->vdd);
d129bceb
PO		 646
647 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
648 if (ios->bus_width == MMC_BUS_WIDTH_4)
649 ctrl |= SDHCI_CTRL_4BITBUS;
650 else
651 ctrl &= ~SDHCI_CTRL_4BITBUS;
652 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
653
654 spin_unlock_irqrestore(&host->lock, flags);
655}
656
657static int sdhci_get_ro(struct mmc_host *mmc)
658{
659 struct sdhci_host *host;
660 unsigned long flags;
661 int present;
662
663 host = mmc_priv(mmc);
664
665 spin_lock_irqsave(&host->lock, flags);
666
667 present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
668
669 spin_unlock_irqrestore(&host->lock, flags);
670
671 return !(present & SDHCI_WRITE_PROTECT);
672}
673
674static struct mmc_host_ops sdhci_ops = {
675 .request = sdhci_request,
676 .set_ios = sdhci_set_ios,
677 .get_ro = sdhci_get_ro,
678};
679
680/*****************************************************************************\
681 * *
682 * Tasklets *
683 * *
684\*****************************************************************************/
685
686static void sdhci_tasklet_card(unsigned long param)
687{
688 struct sdhci_host *host;
689 unsigned long flags;
690
691 host = (struct sdhci_host*)param;
692
693 spin_lock_irqsave(&host->lock, flags);
694
695 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
696 if (host->mrq) {
697 printk(KERN_ERR "%s: Card removed during transfer!\n",
698 mmc_hostname(host->mmc));
699 printk(KERN_ERR "%s: Resetting controller.\n",
700 mmc_hostname(host->mmc));
701
702 sdhci_reset(host, SDHCI_RESET_CMD);
703 sdhci_reset(host, SDHCI_RESET_DATA);
704
705 host->mrq->cmd->error = MMC_ERR_FAILED;
706 tasklet_schedule(&host->finish_tasklet);
707 }
708 }
709
710 spin_unlock_irqrestore(&host->lock, flags);
711
712 mmc_detect_change(host->mmc, msecs_to_jiffies(500));
713}
714
715static void sdhci_tasklet_finish(unsigned long param)
716{
717 struct sdhci_host *host;
718 unsigned long flags;
719 struct mmc_request *mrq;
720
721 host = (struct sdhci_host*)param;
722
723 spin_lock_irqsave(&host->lock, flags);
724
725 del_timer(&host->timer);
726
727 mrq = host->mrq;
728
729 DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode);
730
731 /*
732 * The controller needs a reset of internal state machines
733 * upon error conditions.
734 */
735 if ((mrq->cmd->error != MMC_ERR_NONE) ||
736 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) ||
737 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) {
738 sdhci_reset(host, SDHCI_RESET_CMD);
739 sdhci_reset(host, SDHCI_RESET_DATA);
740 }
741
742 host->mrq = NULL;
743 host->cmd = NULL;
744 host->data = NULL;
745
746 sdhci_deactivate_led(host);
747
748 spin_unlock_irqrestore(&host->lock, flags);
749
750 mmc_request_done(host->mmc, mrq);
751}
752
753static void sdhci_timeout_timer(unsigned long data)
754{
755 struct sdhci_host *host;
756 unsigned long flags;
757
758 host = (struct sdhci_host*)data;
759
760 spin_lock_irqsave(&host->lock, flags);
761
762 if (host->mrq) {
763 printk(KERN_ERR "%s: Timeout waiting for hardware interrupt. "
764 "Please report this to " BUGMAIL ".\n",
765 mmc_hostname(host->mmc));
766 sdhci_dumpregs(host);
767
768 if (host->data) {
769 host->data->error = MMC_ERR_TIMEOUT;
770 sdhci_finish_data(host);
771 } else {
772 if (host->cmd)
773 host->cmd->error = MMC_ERR_TIMEOUT;
774 else
775 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
776
777 tasklet_schedule(&host->finish_tasklet);
778 }
779 }
780
781 spin_unlock_irqrestore(&host->lock, flags);
782}
783
784/*****************************************************************************\
785 * *
786 * Interrupt handling *
787 * *
788\*****************************************************************************/
789
790static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
791{
792 BUG_ON(intmask == 0);
793
794 if (!host->cmd) {
795 printk(KERN_ERR "%s: Got command interrupt even though no "
796 "command operation was in progress.\n",
797 mmc_hostname(host->mmc));
798 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
799 mmc_hostname(host->mmc));
800 sdhci_dumpregs(host);
801 return;
802 }
803
804 if (intmask & SDHCI_INT_RESPONSE)
805 sdhci_finish_command(host);
806 else {
807 if (intmask & SDHCI_INT_TIMEOUT)
808 host->cmd->error = MMC_ERR_TIMEOUT;
809 else if (intmask & SDHCI_INT_CRC)
810 host->cmd->error = MMC_ERR_BADCRC;
811 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX))
812 host->cmd->error = MMC_ERR_FAILED;
813 else
814 host->cmd->error = MMC_ERR_INVALID;
815
816 tasklet_schedule(&host->finish_tasklet);
817 }
818}
819
820static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
821{
822 BUG_ON(intmask == 0);
823
824 if (!host->data) {
825 /*
826 * A data end interrupt is sent together with the response
827 * for the stop command.
828 */
829 if (intmask & SDHCI_INT_DATA_END)
830 return;
831
832 printk(KERN_ERR "%s: Got data interrupt even though no "
833 "data operation was in progress.\n",
834 mmc_hostname(host->mmc));
835 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
836 mmc_hostname(host->mmc));
837 sdhci_dumpregs(host);
838
839 return;
840 }
841
842 if (intmask & SDHCI_INT_DATA_TIMEOUT)
843 host->data->error = MMC_ERR_TIMEOUT;
844 else if (intmask & SDHCI_INT_DATA_CRC)
845 host->data->error = MMC_ERR_BADCRC;
846 else if (intmask & SDHCI_INT_DATA_END_BIT)
847 host->data->error = MMC_ERR_FAILED;
848
849 if (host->data->error != MMC_ERR_NONE)
850 sdhci_finish_data(host);
851 else {
852 if (intmask & (SDHCI_INT_BUF_FULL | SDHCI_INT_BUF_EMPTY))
853 sdhci_transfer_pio(host);
854
855 if (intmask & SDHCI_INT_DATA_END)
856 sdhci_finish_data(host);
857 }
858}
859
860static irqreturn_t sdhci_irq(int irq, void *dev_id, struct pt_regs *regs)
861{
862 irqreturn_t result;
863 struct sdhci_host* host = dev_id;
864 u32 intmask;
865
866 spin_lock(&host->lock);
867
868 intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
869
870 if (!intmask) {
871 result = IRQ_NONE;
872 goto out;
873 }
874
875 DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
876
877 if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE))
878 tasklet_schedule(&host->card_tasklet);
879
880 if (intmask & SDHCI_INT_CMD_MASK) {
881 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
882
883 writel(intmask & SDHCI_INT_CMD_MASK,
884 host->ioaddr + SDHCI_INT_STATUS);
885 }
886
887 if (intmask & SDHCI_INT_DATA_MASK) {
888 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
889
890 writel(intmask & SDHCI_INT_DATA_MASK,
891 host->ioaddr + SDHCI_INT_STATUS);
892 }
893
894 intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
895
896 if (intmask & SDHCI_INT_CARD_INT) {
897 printk(KERN_ERR "%s: Unexpected card interrupt. Please "
898 "report this to " BUGMAIL ".\n",
899 mmc_hostname(host->mmc));
900 sdhci_dumpregs(host);
901 }
902
903 if (intmask & SDHCI_INT_BUS_POWER) {
904 printk(KERN_ERR "%s: Unexpected bus power interrupt. Please "
905 "report this to " BUGMAIL ".\n",
906 mmc_hostname(host->mmc));
907 sdhci_dumpregs(host);
908 }
909
910 if (intmask & SDHCI_INT_ACMD12ERR) {
911 printk(KERN_ERR "%s: Unexpected auto CMD12 error. Please "
912 "report this to " BUGMAIL ".\n",
913 mmc_hostname(host->mmc));
914 sdhci_dumpregs(host);
915
916 writew(~0, host->ioaddr + SDHCI_ACMD12_ERR);
917 }
918
919 if (intmask)
920 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
921
922 result = IRQ_HANDLED;
923
924out:
925 spin_unlock(&host->lock);
926
927 return result;
928}
929
930/*****************************************************************************\
931 * *
932 * Suspend/resume *
933 * *
934\*****************************************************************************/
935
936#ifdef CONFIG_PM
937
938static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
939{
940 struct sdhci_chip *chip;
941 int i, ret;
942
943 chip = pci_get_drvdata(pdev);
944 if (!chip)
945 return 0;
946
947 DBG("Suspending...\n");
948
949 for (i = 0;i < chip->num_slots;i++) {
950 if (!chip->hosts[i])
951 continue;
952 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
953 if (ret) {
954 for (i--;i >= 0;i--)
955 mmc_resume_host(chip->hosts[i]->mmc);
956 return ret;
957 }
958 }
959
960 pci_save_state(pdev);
961 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
962 pci_disable_device(pdev);
963 pci_set_power_state(pdev, pci_choose_state(pdev, state));
964
965 return 0;
966}
967
968static int sdhci_resume (struct pci_dev *pdev)
969{
970 struct sdhci_chip *chip;
971 int i, ret;
972
973 chip = pci_get_drvdata(pdev);
974 if (!chip)
975 return 0;
976
977 DBG("Resuming...\n");
978
979 pci_set_power_state(pdev, PCI_D0);
980 pci_restore_state(pdev);
981 pci_enable_device(pdev);
982
983 for (i = 0;i < chip->num_slots;i++) {
984 if (!chip->hosts[i])
985 continue;
986 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
987 pci_set_master(pdev);
988 sdhci_init(chip->hosts[i]);
989 ret = mmc_resume_host(chip->hosts[i]->mmc);
990 if (ret)
991 return ret;
992 }
993
994 return 0;
995}
996
997#else /* CONFIG_PM */
998
999#define sdhci_suspend NULL
1000#define sdhci_resume NULL
1001
1002#endif /* CONFIG_PM */
1003
1004/*****************************************************************************\
1005 * *
1006 * Device probing/removal *
1007 * *
1008\*****************************************************************************/
1009
1010static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1011{
1012 int ret;
1013 struct sdhci_chip *chip;
1014 struct mmc_host *mmc;
1015 struct sdhci_host *host;
1016
1017 u8 first_bar;
1018 unsigned int caps;
1019
1020 chip = pci_get_drvdata(pdev);
1021 BUG_ON(!chip);
1022
1023 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1024 if (ret)
1025 return ret;
1026
1027 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1028
1029 if (first_bar > 5) {
1030 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
1031 return -ENODEV;
1032 }
1033
1034 if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
1035 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
1036 return -ENODEV;
1037 }
1038
1039 if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
1040 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. Aborting.\n");
1041 return -ENODEV;
1042 }
1043
1044 mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
1045 if (!mmc)
1046 return -ENOMEM;
1047
1048 host = mmc_priv(mmc);
1049 host->mmc = mmc;
1050
1051 host->bar = first_bar + slot;
1052
1053 host->addr = pci_resource_start(pdev, host->bar);
1054 host->irq = pdev->irq;
1055
1056 DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1057
1058 snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1059
1060 ret = pci_request_region(pdev, host->bar, host->slot_descr);
1061 if (ret)
1062 goto free;
1063
1064 host->ioaddr = ioremap_nocache(host->addr,
1065 pci_resource_len(pdev, host->bar));
1066 if (!host->ioaddr) {
1067 ret = -ENOMEM;
1068 goto release;
1069 }
1070
1071 caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1072
1073 if ((caps & SDHCI_CAN_DO_DMA) && ((pdev->class & 0x0000FF) == 0x01))
1074 host->flags |= SDHCI_USE_DMA;
1075
1076 if (host->flags & SDHCI_USE_DMA) {
1077 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1078 printk(KERN_WARNING "%s: No suitable DMA available. "
1079 "Falling back to PIO.\n", host->slot_descr);
1080 host->flags &= ~SDHCI_USE_DMA;
1081 }
1082 }
1083
1084 if (host->flags & SDHCI_USE_DMA)
1085 pci_set_master(pdev);
1086 else /* XXX: Hack to get MMC layer to avoid highmem */
1087 pdev->dma_mask = 0;
1088
8ef1a143
PO		 1089 host->max_clk =
1090 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1091 if (host->max_clk == 0) {
1092 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1093 "frequency.\n", host->slot_descr);
1094 ret = -ENODEV;
1095 goto unmap;
1096 }
d129bceb
PO		 1097 host->max_clk *= 1000000;
1098
1099 /*
1100 * Set host parameters.
1101 */
1102 mmc->ops = &sdhci_ops;
1103 mmc->f_min = host->max_clk / 256;
1104 mmc->f_max = host->max_clk;
d129bceb
PO		 1105 mmc->caps = MMC_CAP_4_BIT_DATA;
1106
146ad66e
PO		 1107 mmc->ocr_avail = 0;
1108 if (caps & SDHCI_CAN_VDD_330)
1109 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1110 else if (caps & SDHCI_CAN_VDD_300)
1111 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1112 else if (caps & SDHCI_CAN_VDD_180)
1113 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19;
1114
1115 if (mmc->ocr_avail == 0) {
1116 printk(KERN_ERR "%s: Hardware doesn't report any "
1117 "support voltages.\n", host->slot_descr);
1118 ret = -ENODEV;
1119 goto unmap;
1120 }
1121
d129bceb
PO		 1122 spin_lock_init(&host->lock);
1123
1124 /*
1125 * Maximum number of segments. Hardware cannot do scatter lists.
1126 */
1127 if (host->flags & SDHCI_USE_DMA)
1128 mmc->max_hw_segs = 1;
1129 else
1130 mmc->max_hw_segs = 16;
1131 mmc->max_phys_segs = 16;
1132
1133 /*
1134 * Maximum number of sectors in one transfer. Limited by sector
1135 * count register.
1136 */
1137 mmc->max_sectors = 0x3FFF;
1138
1139 /*
1140 * Maximum segment size. Could be one segment with the maximum number
1141 * of sectors.
1142 */
1143 mmc->max_seg_size = mmc->max_sectors * 512;
1144
1145 /*
1146 * Init tasklets.
1147 */
1148 tasklet_init(&host->card_tasklet,
1149 sdhci_tasklet_card, (unsigned long)host);
1150 tasklet_init(&host->finish_tasklet,
1151 sdhci_tasklet_finish, (unsigned long)host);
1152
e474c66b 1153 setup_timer(&host->timer, sdhci_timeout_timer, (long)host);
d129bceb
PO		 1154
1155 ret = request_irq(host->irq, sdhci_irq, SA_SHIRQ,
1156 host->slot_descr, host);
1157 if (ret)
8ef1a143 1158 goto untasklet;
d129bceb
PO		 1159
1160 sdhci_init(host);
1161
1162#ifdef CONFIG_MMC_DEBUG
1163 sdhci_dumpregs(host);
1164#endif
1165
1166 host->chip = chip;
1167 chip->hosts[slot] = host;
1168
1169 mmc_add_host(mmc);
1170
1171 printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1172 host->addr, host->irq,
1173 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1174
1175 return 0;
1176
8ef1a143 1177untasklet:
d129bceb
PO		 1178 tasklet_kill(&host->card_tasklet);
1179 tasklet_kill(&host->finish_tasklet);
8ef1a143 1180unmap:
d129bceb
PO		 1181 iounmap(host->ioaddr);
1182release:
1183 pci_release_region(pdev, host->bar);
1184free:
1185 mmc_free_host(mmc);
1186
1187 return ret;
1188}
1189
1190static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1191{
1192 struct sdhci_chip *chip;
1193 struct mmc_host *mmc;
1194 struct sdhci_host *host;
1195
1196 chip = pci_get_drvdata(pdev);
1197 host = chip->hosts[slot];
1198 mmc = host->mmc;
1199
1200 chip->hosts[slot] = NULL;
1201
1202 mmc_remove_host(mmc);
1203
1204 sdhci_reset(host, SDHCI_RESET_ALL);
1205
1206 free_irq(host->irq, host);
1207
1208 del_timer_sync(&host->timer);
1209
1210 tasklet_kill(&host->card_tasklet);
1211 tasklet_kill(&host->finish_tasklet);
1212
1213 iounmap(host->ioaddr);
1214
1215 pci_release_region(pdev, host->bar);
1216
1217 mmc_free_host(mmc);
1218}
1219
1220static int __devinit sdhci_probe(struct pci_dev *pdev,
1221 const struct pci_device_id *ent)
1222{
1223 int ret, i;
51f82bc0 1224 u8 slots, rev;
d129bceb
PO		 1225 struct sdhci_chip *chip;
1226
1227 BUG_ON(pdev == NULL);
1228 BUG_ON(ent == NULL);
1229
51f82bc0
PO		 1230 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1231
1232 printk(KERN_INFO DRIVER_NAME
1233 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1234 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
1235 (int)rev);
d129bceb
PO		 1236
1237 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1238 if (ret)
1239 return ret;
1240
1241 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1242 DBG("found %d slot(s)\n", slots);
1243 if (slots == 0)
1244 return -ENODEV;
1245
1246 ret = pci_enable_device(pdev);
1247 if (ret)
1248 return ret;
1249
1250 chip = kzalloc(sizeof(struct sdhci_chip) +
1251 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1252 if (!chip) {
1253 ret = -ENOMEM;
1254 goto err;
1255 }
1256
1257 chip->pdev = pdev;
1258
1259 chip->num_slots = slots;
1260 pci_set_drvdata(pdev, chip);
1261
1262 for (i = 0;i < slots;i++) {
1263 ret = sdhci_probe_slot(pdev, i);
1264 if (ret) {
1265 for (i--;i >= 0;i--)
1266 sdhci_remove_slot(pdev, i);
1267 goto free;
1268 }
1269 }
1270
1271 return 0;
1272
1273free:
1274 pci_set_drvdata(pdev, NULL);
1275 kfree(chip);
1276
1277err:
1278 pci_disable_device(pdev);
1279 return ret;
1280}
1281
1282static void __devexit sdhci_remove(struct pci_dev *pdev)
1283{
1284 int i;
1285 struct sdhci_chip *chip;
1286
1287 chip = pci_get_drvdata(pdev);
1288
1289 if (chip) {
1290 for (i = 0;i < chip->num_slots;i++)
1291 sdhci_remove_slot(pdev, i);
1292
1293 pci_set_drvdata(pdev, NULL);
1294
1295 kfree(chip);
1296 }
1297
1298 pci_disable_device(pdev);
1299}
1300
1301static struct pci_driver sdhci_driver = {
1302 .name = DRIVER_NAME,
1303 .id_table = pci_ids,
1304 .probe = sdhci_probe,
1305 .remove = __devexit_p(sdhci_remove),
1306 .suspend = sdhci_suspend,
1307 .resume = sdhci_resume,
1308};
1309
1310/*****************************************************************************\
1311 * *
1312 * Driver init/exit *
1313 * *
1314\*****************************************************************************/
1315
1316static int __init sdhci_drv_init(void)
1317{
1318 printk(KERN_INFO DRIVER_NAME
1319 ": Secure Digital Host Controller Interface driver, "
1320 DRIVER_VERSION "\n");
1321 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1322
1323 return pci_register_driver(&sdhci_driver);
1324}
1325
1326static void __exit sdhci_drv_exit(void)
1327{
1328 DBG("Exiting\n");
1329
1330 pci_unregister_driver(&sdhci_driver);
1331}
1332
1333module_init(sdhci_drv_init);
1334module_exit(sdhci_drv_exit);
1335
1336MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1337MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1338MODULE_VERSION(DRIVER_VERSION);
1339MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)