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[MMC] sdhci: check SDHCI base clock
[linux-2.6-block.git] / drivers / mmc / sdhci.c
CommitLineData
d129bceb
PO		 1/*
2 * linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
3 *
4 * Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 /*
12 * Note that PIO transfer is rather crappy atm. The buffer full/empty
13 * interrupts aren't reliable so we currently transfer the entire buffer
14 * directly. Patches to solve the problem are welcome.
15 */
16
17#include <linux/delay.h>
18#include <linux/highmem.h>
19#include <linux/pci.h>
20#include <linux/dma-mapping.h>
21
22#include <linux/mmc/host.h>
23#include <linux/mmc/protocol.h>
24
25#include <asm/scatterlist.h>
26
27#include "sdhci.h"
28
29#define DRIVER_NAME "sdhci"
30#define DRIVER_VERSION "0.11"
31
32#define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
33
d129bceb 34#define DBG(f, x...) \
c6563178 35 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
d129bceb
PO		 36
37static const struct pci_device_id pci_ids[] __devinitdata = {
38 /* handle any SD host controller */
39 {PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)},
40 { /* end: all zeroes */ },
41};
42
43MODULE_DEVICE_TABLE(pci, pci_ids);
44
45static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
46static void sdhci_finish_data(struct sdhci_host *);
47
48static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
49static void sdhci_finish_command(struct sdhci_host *);
50
51static void sdhci_dumpregs(struct sdhci_host *host)
52{
53 printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
54
55 printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
56 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
57 readw(host->ioaddr + SDHCI_HOST_VERSION));
58 printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
59 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
60 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
61 printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
62 readl(host->ioaddr + SDHCI_ARGUMENT),
63 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
64 printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
65 readl(host->ioaddr + SDHCI_PRESENT_STATE),
66 readb(host->ioaddr + SDHCI_HOST_CONTROL));
67 printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
68 readb(host->ioaddr + SDHCI_POWER_CONTROL),
69 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
70 printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
71 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
72 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
73 printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
74 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
75 readl(host->ioaddr + SDHCI_INT_STATUS));
76 printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
77 readl(host->ioaddr + SDHCI_INT_ENABLE),
78 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
79 printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
80 readw(host->ioaddr + SDHCI_ACMD12_ERR),
81 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
82 printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n",
83 readl(host->ioaddr + SDHCI_CAPABILITIES),
84 readl(host->ioaddr + SDHCI_MAX_CURRENT));
85
86 printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
87}
88
89/*****************************************************************************\
90 * *
91 * Low level functions *
92 * *
93\*****************************************************************************/
94
95static void sdhci_reset(struct sdhci_host *host, u8 mask)
96{
97 writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
98
99 if (mask & SDHCI_RESET_ALL) {
100 host->clock = 0;
101
102 mdelay(50);
103 }
104}
105
106static void sdhci_init(struct sdhci_host *host)
107{
108 u32 intmask;
109
110 sdhci_reset(host, SDHCI_RESET_ALL);
111
112 intmask = ~(SDHCI_INT_CARD_INT | SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL);
113
114 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
115 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
116
117 /* This is unknown magic. */
118 writeb(0xE, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
119}
120
121static void sdhci_activate_led(struct sdhci_host *host)
122{
123 u8 ctrl;
124
125 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
126 ctrl |= SDHCI_CTRL_LED;
127 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
128}
129
130static void sdhci_deactivate_led(struct sdhci_host *host)
131{
132 u8 ctrl;
133
134 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
135 ctrl &= ~SDHCI_CTRL_LED;
136 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
137}
138
139/*****************************************************************************\
140 * *
141 * Core functions *
142 * *
143\*****************************************************************************/
144
145static inline char* sdhci_kmap_sg(struct sdhci_host* host)
146{
147 host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ);
148 return host->mapped_sg + host->cur_sg->offset;
149}
150
151static inline void sdhci_kunmap_sg(struct sdhci_host* host)
152{
153 kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
154}
155
156static inline int sdhci_next_sg(struct sdhci_host* host)
157{
158 /*
159 * Skip to next SG entry.
160 */
161 host->cur_sg++;
162 host->num_sg--;
163
164 /*
165 * Any entries left?
166 */
167 if (host->num_sg > 0) {
168 host->offset = 0;
169 host->remain = host->cur_sg->length;
170 }
171
172 return host->num_sg;
173}
174
175static void sdhci_transfer_pio(struct sdhci_host *host)
176{
177 char *buffer;
178 u32 mask;
179 int bytes, size;
180 unsigned long max_jiffies;
181
182 BUG_ON(!host->data);
183
184 if (host->num_sg == 0)
185 return;
186
187 bytes = 0;
188 if (host->data->flags & MMC_DATA_READ)
189 mask = SDHCI_DATA_AVAILABLE;
190 else
191 mask = SDHCI_SPACE_AVAILABLE;
192
193 buffer = sdhci_kmap_sg(host) + host->offset;
194
195 /* Transfer shouldn't take more than 5 s */
196 max_jiffies = jiffies + HZ * 5;
197
198 while (host->size > 0) {
199 if (time_after(jiffies, max_jiffies)) {
200 printk(KERN_ERR "%s: PIO transfer stalled. "
201 "Please report this to "
202 BUGMAIL ".\n", mmc_hostname(host->mmc));
203 sdhci_dumpregs(host);
204
205 sdhci_kunmap_sg(host);
206
207 host->data->error = MMC_ERR_FAILED;
208 sdhci_finish_data(host);
209 return;
210 }
211
212 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask))
213 continue;
214
215 size = min(host->size, host->remain);
216
217 if (size >= 4) {
218 if (host->data->flags & MMC_DATA_READ)
219 *(u32*)buffer = readl(host->ioaddr + SDHCI_BUFFER);
220 else
221 writel(*(u32*)buffer, host->ioaddr + SDHCI_BUFFER);
222 size = 4;
223 } else if (size >= 2) {
224 if (host->data->flags & MMC_DATA_READ)
225 *(u16*)buffer = readw(host->ioaddr + SDHCI_BUFFER);
226 else
227 writew(*(u16*)buffer, host->ioaddr + SDHCI_BUFFER);
228 size = 2;
229 } else {
230 if (host->data->flags & MMC_DATA_READ)
231 *(u8*)buffer = readb(host->ioaddr + SDHCI_BUFFER);
232 else
233 writeb(*(u8*)buffer, host->ioaddr + SDHCI_BUFFER);
234 size = 1;
235 }
236
237 buffer += size;
238 host->offset += size;
239 host->remain -= size;
240
241 bytes += size;
242 host->size -= size;
243
244 if (host->remain == 0) {
245 sdhci_kunmap_sg(host);
246 if (sdhci_next_sg(host) == 0) {
247 DBG("PIO transfer: %d bytes\n", bytes);
248 return;
249 }
250 buffer = sdhci_kmap_sg(host);
251 }
252 }
253
254 sdhci_kunmap_sg(host);
255
256 DBG("PIO transfer: %d bytes\n", bytes);
257}
258
259static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
260{
261 u16 mode;
262
263 WARN_ON(host->data);
264
265 if (data == NULL) {
266 writew(0, host->ioaddr + SDHCI_TRANSFER_MODE);
267 return;
268 }
269
270 DBG("blksz %04x blks %04x flags %08x\n",
a3fd4a1b 271 data->blksz, data->blocks, data->flags);
d129bceb
PO		 272 DBG("tsac %d ms nsac %d clk\n",
273 data->timeout_ns / 1000000, data->timeout_clks);
274
275 mode = SDHCI_TRNS_BLK_CNT_EN;
276 if (data->blocks > 1)
277 mode |= SDHCI_TRNS_MULTI;
278 if (data->flags & MMC_DATA_READ)
279 mode |= SDHCI_TRNS_READ;
280 if (host->flags & SDHCI_USE_DMA)
281 mode |= SDHCI_TRNS_DMA;
282
283 writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
284
a3fd4a1b 285 writew(data->blksz, host->ioaddr + SDHCI_BLOCK_SIZE);
d129bceb
PO		 286 writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
287
288 if (host->flags & SDHCI_USE_DMA) {
289 int count;
290
291 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
292 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
293 BUG_ON(count != 1);
294
295 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
296 } else {
a3fd4a1b 297 host->size = data->blksz * data->blocks;
d129bceb
PO		 298
299 host->cur_sg = data->sg;
300 host->num_sg = data->sg_len;
301
302 host->offset = 0;
303 host->remain = host->cur_sg->length;
304 }
305}
306
307static void sdhci_finish_data(struct sdhci_host *host)
308{
309 struct mmc_data *data;
310 u32 intmask;
311 u16 blocks;
312
313 BUG_ON(!host->data);
314
315 data = host->data;
316 host->data = NULL;
317
318 if (host->flags & SDHCI_USE_DMA) {
319 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
320 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
321 } else {
322 intmask = readl(host->ioaddr + SDHCI_SIGNAL_ENABLE);
323 intmask &= ~(SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL);
324 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
325
326 intmask = readl(host->ioaddr + SDHCI_INT_ENABLE);
327 intmask &= ~(SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL);
328 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
329 }
330
331 /*
332 * Controller doesn't count down when in single block mode.
333 */
334 if ((data->blocks == 1) && (data->error == MMC_ERR_NONE))
335 blocks = 0;
336 else
337 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
a3fd4a1b 338 data->bytes_xfered = data->blksz * (data->blocks - blocks);
d129bceb
PO		 339
340 if ((data->error == MMC_ERR_NONE) && blocks) {
341 printk(KERN_ERR "%s: Controller signalled completion even "
342 "though there were blocks left. Please report this "
343 "to " BUGMAIL ".\n", mmc_hostname(host->mmc));
344 data->error = MMC_ERR_FAILED;
345 }
346
347 if (host->size != 0) {
348 printk(KERN_ERR "%s: %d bytes were left untransferred. "
349 "Please report this to " BUGMAIL ".\n",
350 mmc_hostname(host->mmc), host->size);
351 data->error = MMC_ERR_FAILED;
352 }
353
354 DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered);
355
356 if (data->stop) {
357 /*
358 * The controller needs a reset of internal state machines
359 * upon error conditions.
360 */
361 if (data->error != MMC_ERR_NONE) {
362 sdhci_reset(host, SDHCI_RESET_CMD);
363 sdhci_reset(host, SDHCI_RESET_DATA);
364 }
365
366 sdhci_send_command(host, data->stop);
367 } else
368 tasklet_schedule(&host->finish_tasklet);
369}
370
371static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
372{
373 int flags;
374 u32 present;
375 unsigned long max_jiffies;
376
377 WARN_ON(host->cmd);
378
379 DBG("Sending cmd (%x)\n", cmd->opcode);
380
381 /* Wait max 10 ms */
382 max_jiffies = jiffies + (HZ + 99)/100;
383 do {
384 if (time_after(jiffies, max_jiffies)) {
385 printk(KERN_ERR "%s: Controller never released "
386 "inhibit bits. Please report this to "
387 BUGMAIL ".\n", mmc_hostname(host->mmc));
388 sdhci_dumpregs(host);
389 cmd->error = MMC_ERR_FAILED;
390 tasklet_schedule(&host->finish_tasklet);
391 return;
392 }
393 present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
394 } while (present & (SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT));
395
396 mod_timer(&host->timer, jiffies + 10 * HZ);
397
398 host->cmd = cmd;
399
400 sdhci_prepare_data(host, cmd->data);
401
402 writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
403
404 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
405 printk(KERN_ERR "%s: Unsupported response type! "
406 "Please report this to " BUGMAIL ".\n",
407 mmc_hostname(host->mmc));
408 cmd->error = MMC_ERR_INVALID;
409 tasklet_schedule(&host->finish_tasklet);
410 return;
411 }
412
413 if (!(cmd->flags & MMC_RSP_PRESENT))
414 flags = SDHCI_CMD_RESP_NONE;
415 else if (cmd->flags & MMC_RSP_136)
416 flags = SDHCI_CMD_RESP_LONG;
417 else if (cmd->flags & MMC_RSP_BUSY)
418 flags = SDHCI_CMD_RESP_SHORT_BUSY;
419 else
420 flags = SDHCI_CMD_RESP_SHORT;
421
422 if (cmd->flags & MMC_RSP_CRC)
423 flags |= SDHCI_CMD_CRC;
424 if (cmd->flags & MMC_RSP_OPCODE)
425 flags |= SDHCI_CMD_INDEX;
426 if (cmd->data)
427 flags |= SDHCI_CMD_DATA;
428
429 writel(SDHCI_MAKE_CMD(cmd->opcode, flags),
430 host->ioaddr + SDHCI_COMMAND);
431}
432
433static void sdhci_finish_command(struct sdhci_host *host)
434{
435 int i;
436
437 BUG_ON(host->cmd == NULL);
438
439 if (host->cmd->flags & MMC_RSP_PRESENT) {
440 if (host->cmd->flags & MMC_RSP_136) {
441 /* CRC is stripped so we need to do some shifting. */
442 for (i = 0;i < 4;i++) {
443 host->cmd->resp[i] = readl(host->ioaddr +
444 SDHCI_RESPONSE + (3-i)*4) << 8;
445 if (i != 3)
446 host->cmd->resp[i] |=
447 readb(host->ioaddr +
448 SDHCI_RESPONSE + (3-i)*4-1);
449 }
450 } else {
451 host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
452 }
453 }
454
455 host->cmd->error = MMC_ERR_NONE;
456
457 DBG("Ending cmd (%x)\n", host->cmd->opcode);
458
459 if (host->cmd->data) {
460 u32 intmask;
461
462 host->data = host->cmd->data;
463
464 if (!(host->flags & SDHCI_USE_DMA)) {
465 /*
466 * Don't enable the interrupts until now to make sure we
467 * get stable handling of the FIFO.
468 */
469 intmask = readl(host->ioaddr + SDHCI_INT_ENABLE);
470 intmask |= SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL;
471 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
472
473 intmask = readl(host->ioaddr + SDHCI_SIGNAL_ENABLE);
474 intmask |= SDHCI_INT_BUF_EMPTY | SDHCI_INT_BUF_FULL;
475 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
476
477 /*
478 * The buffer interrupts are to unreliable so we
479 * start the transfer immediatly.
480 */
481 sdhci_transfer_pio(host);
482 }
483 } else
484 tasklet_schedule(&host->finish_tasklet);
485
486 host->cmd = NULL;
487}
488
489static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
490{
491 int div;
492 u16 clk;
493 unsigned long max_jiffies;
494
495 if (clock == host->clock)
496 return;
497
498 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
499
500 if (clock == 0)
501 goto out;
502
503 for (div = 1;div < 256;div *= 2) {
504 if ((host->max_clk / div) <= clock)
505 break;
506 }
507 div >>= 1;
508
509 clk = div << SDHCI_DIVIDER_SHIFT;
510 clk |= SDHCI_CLOCK_INT_EN;
511 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
512
513 /* Wait max 10 ms */
514 max_jiffies = jiffies + (HZ + 99)/100;
515 do {
516 if (time_after(jiffies, max_jiffies)) {
517 printk(KERN_ERR "%s: Internal clock never stabilised. "
518 "Please report this to " BUGMAIL ".\n",
519 mmc_hostname(host->mmc));
520 sdhci_dumpregs(host);
521 return;
522 }
523 clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL);
524 } while (!(clk & SDHCI_CLOCK_INT_STABLE));
525
526 clk |= SDHCI_CLOCK_CARD_EN;
527 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
528
529out:
530 host->clock = clock;
531}
532
533/*****************************************************************************\
534 * *
535 * MMC callbacks *
536 * *
537\*****************************************************************************/
538
539static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
540{
541 struct sdhci_host *host;
542 unsigned long flags;
543
544 host = mmc_priv(mmc);
545
546 spin_lock_irqsave(&host->lock, flags);
547
548 WARN_ON(host->mrq != NULL);
549
550 sdhci_activate_led(host);
551
552 host->mrq = mrq;
553
554 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
555 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
556 tasklet_schedule(&host->finish_tasklet);
557 } else
558 sdhci_send_command(host, mrq->cmd);
559
560 spin_unlock_irqrestore(&host->lock, flags);
561}
562
563static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
564{
565 struct sdhci_host *host;
566 unsigned long flags;
567 u8 ctrl;
568
569 host = mmc_priv(mmc);
570
571 spin_lock_irqsave(&host->lock, flags);
572
d129bceb
PO		 573 /*
574 * Reset the chip on each power off.
575 * Should clear out any weird states.
576 */
577 if (ios->power_mode == MMC_POWER_OFF) {
578 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
579 spin_unlock_irqrestore(&host->lock, flags);
580 sdhci_init(host);
581 spin_lock_irqsave(&host->lock, flags);
582 }
583
584 sdhci_set_clock(host, ios->clock);
585
586 if (ios->power_mode == MMC_POWER_OFF)
587 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
588 else
589 writeb(0xFF, host->ioaddr + SDHCI_POWER_CONTROL);
590
591 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
592 if (ios->bus_width == MMC_BUS_WIDTH_4)
593 ctrl |= SDHCI_CTRL_4BITBUS;
594 else
595 ctrl &= ~SDHCI_CTRL_4BITBUS;
596 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
597
598 spin_unlock_irqrestore(&host->lock, flags);
599}
600
601static int sdhci_get_ro(struct mmc_host *mmc)
602{
603 struct sdhci_host *host;
604 unsigned long flags;
605 int present;
606
607 host = mmc_priv(mmc);
608
609 spin_lock_irqsave(&host->lock, flags);
610
611 present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
612
613 spin_unlock_irqrestore(&host->lock, flags);
614
615 return !(present & SDHCI_WRITE_PROTECT);
616}
617
618static struct mmc_host_ops sdhci_ops = {
619 .request = sdhci_request,
620 .set_ios = sdhci_set_ios,
621 .get_ro = sdhci_get_ro,
622};
623
624/*****************************************************************************\
625 * *
626 * Tasklets *
627 * *
628\*****************************************************************************/
629
630static void sdhci_tasklet_card(unsigned long param)
631{
632 struct sdhci_host *host;
633 unsigned long flags;
634
635 host = (struct sdhci_host*)param;
636
637 spin_lock_irqsave(&host->lock, flags);
638
639 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
640 if (host->mrq) {
641 printk(KERN_ERR "%s: Card removed during transfer!\n",
642 mmc_hostname(host->mmc));
643 printk(KERN_ERR "%s: Resetting controller.\n",
644 mmc_hostname(host->mmc));
645
646 sdhci_reset(host, SDHCI_RESET_CMD);
647 sdhci_reset(host, SDHCI_RESET_DATA);
648
649 host->mrq->cmd->error = MMC_ERR_FAILED;
650 tasklet_schedule(&host->finish_tasklet);
651 }
652 }
653
654 spin_unlock_irqrestore(&host->lock, flags);
655
656 mmc_detect_change(host->mmc, msecs_to_jiffies(500));
657}
658
659static void sdhci_tasklet_finish(unsigned long param)
660{
661 struct sdhci_host *host;
662 unsigned long flags;
663 struct mmc_request *mrq;
664
665 host = (struct sdhci_host*)param;
666
667 spin_lock_irqsave(&host->lock, flags);
668
669 del_timer(&host->timer);
670
671 mrq = host->mrq;
672
673 DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode);
674
675 /*
676 * The controller needs a reset of internal state machines
677 * upon error conditions.
678 */
679 if ((mrq->cmd->error != MMC_ERR_NONE) ||
680 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) ||
681 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) {
682 sdhci_reset(host, SDHCI_RESET_CMD);
683 sdhci_reset(host, SDHCI_RESET_DATA);
684 }
685
686 host->mrq = NULL;
687 host->cmd = NULL;
688 host->data = NULL;
689
690 sdhci_deactivate_led(host);
691
692 spin_unlock_irqrestore(&host->lock, flags);
693
694 mmc_request_done(host->mmc, mrq);
695}
696
697static void sdhci_timeout_timer(unsigned long data)
698{
699 struct sdhci_host *host;
700 unsigned long flags;
701
702 host = (struct sdhci_host*)data;
703
704 spin_lock_irqsave(&host->lock, flags);
705
706 if (host->mrq) {
707 printk(KERN_ERR "%s: Timeout waiting for hardware interrupt. "
708 "Please report this to " BUGMAIL ".\n",
709 mmc_hostname(host->mmc));
710 sdhci_dumpregs(host);
711
712 if (host->data) {
713 host->data->error = MMC_ERR_TIMEOUT;
714 sdhci_finish_data(host);
715 } else {
716 if (host->cmd)
717 host->cmd->error = MMC_ERR_TIMEOUT;
718 else
719 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
720
721 tasklet_schedule(&host->finish_tasklet);
722 }
723 }
724
725 spin_unlock_irqrestore(&host->lock, flags);
726}
727
728/*****************************************************************************\
729 * *
730 * Interrupt handling *
731 * *
732\*****************************************************************************/
733
734static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
735{
736 BUG_ON(intmask == 0);
737
738 if (!host->cmd) {
739 printk(KERN_ERR "%s: Got command interrupt even though no "
740 "command operation was in progress.\n",
741 mmc_hostname(host->mmc));
742 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
743 mmc_hostname(host->mmc));
744 sdhci_dumpregs(host);
745 return;
746 }
747
748 if (intmask & SDHCI_INT_RESPONSE)
749 sdhci_finish_command(host);
750 else {
751 if (intmask & SDHCI_INT_TIMEOUT)
752 host->cmd->error = MMC_ERR_TIMEOUT;
753 else if (intmask & SDHCI_INT_CRC)
754 host->cmd->error = MMC_ERR_BADCRC;
755 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX))
756 host->cmd->error = MMC_ERR_FAILED;
757 else
758 host->cmd->error = MMC_ERR_INVALID;
759
760 tasklet_schedule(&host->finish_tasklet);
761 }
762}
763
764static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
765{
766 BUG_ON(intmask == 0);
767
768 if (!host->data) {
769 /*
770 * A data end interrupt is sent together with the response
771 * for the stop command.
772 */
773 if (intmask & SDHCI_INT_DATA_END)
774 return;
775
776 printk(KERN_ERR "%s: Got data interrupt even though no "
777 "data operation was in progress.\n",
778 mmc_hostname(host->mmc));
779 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
780 mmc_hostname(host->mmc));
781 sdhci_dumpregs(host);
782
783 return;
784 }
785
786 if (intmask & SDHCI_INT_DATA_TIMEOUT)
787 host->data->error = MMC_ERR_TIMEOUT;
788 else if (intmask & SDHCI_INT_DATA_CRC)
789 host->data->error = MMC_ERR_BADCRC;
790 else if (intmask & SDHCI_INT_DATA_END_BIT)
791 host->data->error = MMC_ERR_FAILED;
792
793 if (host->data->error != MMC_ERR_NONE)
794 sdhci_finish_data(host);
795 else {
796 if (intmask & (SDHCI_INT_BUF_FULL | SDHCI_INT_BUF_EMPTY))
797 sdhci_transfer_pio(host);
798
799 if (intmask & SDHCI_INT_DATA_END)
800 sdhci_finish_data(host);
801 }
802}
803
804static irqreturn_t sdhci_irq(int irq, void *dev_id, struct pt_regs *regs)
805{
806 irqreturn_t result;
807 struct sdhci_host* host = dev_id;
808 u32 intmask;
809
810 spin_lock(&host->lock);
811
812 intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
813
814 if (!intmask) {
815 result = IRQ_NONE;
816 goto out;
817 }
818
819 DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
820
821 if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE))
822 tasklet_schedule(&host->card_tasklet);
823
824 if (intmask & SDHCI_INT_CMD_MASK) {
825 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
826
827 writel(intmask & SDHCI_INT_CMD_MASK,
828 host->ioaddr + SDHCI_INT_STATUS);
829 }
830
831 if (intmask & SDHCI_INT_DATA_MASK) {
832 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
833
834 writel(intmask & SDHCI_INT_DATA_MASK,
835 host->ioaddr + SDHCI_INT_STATUS);
836 }
837
838 intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
839
840 if (intmask & SDHCI_INT_CARD_INT) {
841 printk(KERN_ERR "%s: Unexpected card interrupt. Please "
842 "report this to " BUGMAIL ".\n",
843 mmc_hostname(host->mmc));
844 sdhci_dumpregs(host);
845 }
846
847 if (intmask & SDHCI_INT_BUS_POWER) {
848 printk(KERN_ERR "%s: Unexpected bus power interrupt. Please "
849 "report this to " BUGMAIL ".\n",
850 mmc_hostname(host->mmc));
851 sdhci_dumpregs(host);
852 }
853
854 if (intmask & SDHCI_INT_ACMD12ERR) {
855 printk(KERN_ERR "%s: Unexpected auto CMD12 error. Please "
856 "report this to " BUGMAIL ".\n",
857 mmc_hostname(host->mmc));
858 sdhci_dumpregs(host);
859
860 writew(~0, host->ioaddr + SDHCI_ACMD12_ERR);
861 }
862
863 if (intmask)
864 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
865
866 result = IRQ_HANDLED;
867
868out:
869 spin_unlock(&host->lock);
870
871 return result;
872}
873
874/*****************************************************************************\
875 * *
876 * Suspend/resume *
877 * *
878\*****************************************************************************/
879
880#ifdef CONFIG_PM
881
882static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
883{
884 struct sdhci_chip *chip;
885 int i, ret;
886
887 chip = pci_get_drvdata(pdev);
888 if (!chip)
889 return 0;
890
891 DBG("Suspending...\n");
892
893 for (i = 0;i < chip->num_slots;i++) {
894 if (!chip->hosts[i])
895 continue;
896 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
897 if (ret) {
898 for (i--;i >= 0;i--)
899 mmc_resume_host(chip->hosts[i]->mmc);
900 return ret;
901 }
902 }
903
904 pci_save_state(pdev);
905 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
906 pci_disable_device(pdev);
907 pci_set_power_state(pdev, pci_choose_state(pdev, state));
908
909 return 0;
910}
911
912static int sdhci_resume (struct pci_dev *pdev)
913{
914 struct sdhci_chip *chip;
915 int i, ret;
916
917 chip = pci_get_drvdata(pdev);
918 if (!chip)
919 return 0;
920
921 DBG("Resuming...\n");
922
923 pci_set_power_state(pdev, PCI_D0);
924 pci_restore_state(pdev);
925 pci_enable_device(pdev);
926
927 for (i = 0;i < chip->num_slots;i++) {
928 if (!chip->hosts[i])
929 continue;
930 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
931 pci_set_master(pdev);
932 sdhci_init(chip->hosts[i]);
933 ret = mmc_resume_host(chip->hosts[i]->mmc);
934 if (ret)
935 return ret;
936 }
937
938 return 0;
939}
940
941#else /* CONFIG_PM */
942
943#define sdhci_suspend NULL
944#define sdhci_resume NULL
945
946#endif /* CONFIG_PM */
947
948/*****************************************************************************\
949 * *
950 * Device probing/removal *
951 * *
952\*****************************************************************************/
953
954static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
955{
956 int ret;
957 struct sdhci_chip *chip;
958 struct mmc_host *mmc;
959 struct sdhci_host *host;
960
961 u8 first_bar;
962 unsigned int caps;
963
964 chip = pci_get_drvdata(pdev);
965 BUG_ON(!chip);
966
967 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
968 if (ret)
969 return ret;
970
971 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
972
973 if (first_bar > 5) {
974 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
975 return -ENODEV;
976 }
977
978 if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
979 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
980 return -ENODEV;
981 }
982
983 if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
984 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. Aborting.\n");
985 return -ENODEV;
986 }
987
988 mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
989 if (!mmc)
990 return -ENOMEM;
991
992 host = mmc_priv(mmc);
993 host->mmc = mmc;
994
995 host->bar = first_bar + slot;
996
997 host->addr = pci_resource_start(pdev, host->bar);
998 host->irq = pdev->irq;
999
1000 DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1001
1002 snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1003
1004 ret = pci_request_region(pdev, host->bar, host->slot_descr);
1005 if (ret)
1006 goto free;
1007
1008 host->ioaddr = ioremap_nocache(host->addr,
1009 pci_resource_len(pdev, host->bar));
1010 if (!host->ioaddr) {
1011 ret = -ENOMEM;
1012 goto release;
1013 }
1014
1015 caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1016
1017 if ((caps & SDHCI_CAN_DO_DMA) && ((pdev->class & 0x0000FF) == 0x01))
1018 host->flags |= SDHCI_USE_DMA;
1019
1020 if (host->flags & SDHCI_USE_DMA) {
1021 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1022 printk(KERN_WARNING "%s: No suitable DMA available. "
1023 "Falling back to PIO.\n", host->slot_descr);
1024 host->flags &= ~SDHCI_USE_DMA;
1025 }
1026 }
1027
1028 if (host->flags & SDHCI_USE_DMA)
1029 pci_set_master(pdev);
1030 else /* XXX: Hack to get MMC layer to avoid highmem */
1031 pdev->dma_mask = 0;
1032
8ef1a143
PO		 1033 host->max_clk =
1034 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1035 if (host->max_clk == 0) {
1036 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1037 "frequency.\n", host->slot_descr);
1038 ret = -ENODEV;
1039 goto unmap;
1040 }
d129bceb
PO		 1041 host->max_clk *= 1000000;
1042
1043 /*
1044 * Set host parameters.
1045 */
1046 mmc->ops = &sdhci_ops;
1047 mmc->f_min = host->max_clk / 256;
1048 mmc->f_max = host->max_clk;
1049 mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34;
1050 mmc->caps = MMC_CAP_4_BIT_DATA;
1051
1052 spin_lock_init(&host->lock);
1053
1054 /*
1055 * Maximum number of segments. Hardware cannot do scatter lists.
1056 */
1057 if (host->flags & SDHCI_USE_DMA)
1058 mmc->max_hw_segs = 1;
1059 else
1060 mmc->max_hw_segs = 16;
1061 mmc->max_phys_segs = 16;
1062
1063 /*
1064 * Maximum number of sectors in one transfer. Limited by sector
1065 * count register.
1066 */
1067 mmc->max_sectors = 0x3FFF;
1068
1069 /*
1070 * Maximum segment size. Could be one segment with the maximum number
1071 * of sectors.
1072 */
1073 mmc->max_seg_size = mmc->max_sectors * 512;
1074
1075 /*
1076 * Init tasklets.
1077 */
1078 tasklet_init(&host->card_tasklet,
1079 sdhci_tasklet_card, (unsigned long)host);
1080 tasklet_init(&host->finish_tasklet,
1081 sdhci_tasklet_finish, (unsigned long)host);
1082
e474c66b 1083 setup_timer(&host->timer, sdhci_timeout_timer, (long)host);
d129bceb
PO		 1084
1085 ret = request_irq(host->irq, sdhci_irq, SA_SHIRQ,
1086 host->slot_descr, host);
1087 if (ret)
8ef1a143 1088 goto untasklet;
d129bceb
PO		 1089
1090 sdhci_init(host);
1091
1092#ifdef CONFIG_MMC_DEBUG
1093 sdhci_dumpregs(host);
1094#endif
1095
1096 host->chip = chip;
1097 chip->hosts[slot] = host;
1098
1099 mmc_add_host(mmc);
1100
1101 printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1102 host->addr, host->irq,
1103 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1104
1105 return 0;
1106
8ef1a143 1107untasklet:
d129bceb
PO		 1108 tasklet_kill(&host->card_tasklet);
1109 tasklet_kill(&host->finish_tasklet);
8ef1a143 1110unmap:
d129bceb
PO		 1111 iounmap(host->ioaddr);
1112release:
1113 pci_release_region(pdev, host->bar);
1114free:
1115 mmc_free_host(mmc);
1116
1117 return ret;
1118}
1119
1120static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1121{
1122 struct sdhci_chip *chip;
1123 struct mmc_host *mmc;
1124 struct sdhci_host *host;
1125
1126 chip = pci_get_drvdata(pdev);
1127 host = chip->hosts[slot];
1128 mmc = host->mmc;
1129
1130 chip->hosts[slot] = NULL;
1131
1132 mmc_remove_host(mmc);
1133
1134 sdhci_reset(host, SDHCI_RESET_ALL);
1135
1136 free_irq(host->irq, host);
1137
1138 del_timer_sync(&host->timer);
1139
1140 tasklet_kill(&host->card_tasklet);
1141 tasklet_kill(&host->finish_tasklet);
1142
1143 iounmap(host->ioaddr);
1144
1145 pci_release_region(pdev, host->bar);
1146
1147 mmc_free_host(mmc);
1148}
1149
1150static int __devinit sdhci_probe(struct pci_dev *pdev,
1151 const struct pci_device_id *ent)
1152{
1153 int ret, i;
1154 u8 slots;
1155 struct sdhci_chip *chip;
1156
1157 BUG_ON(pdev == NULL);
1158 BUG_ON(ent == NULL);
1159
1160 DBG("found at %s\n", pci_name(pdev));
1161
1162 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1163 if (ret)
1164 return ret;
1165
1166 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1167 DBG("found %d slot(s)\n", slots);
1168 if (slots == 0)
1169 return -ENODEV;
1170
1171 ret = pci_enable_device(pdev);
1172 if (ret)
1173 return ret;
1174
1175 chip = kzalloc(sizeof(struct sdhci_chip) +
1176 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1177 if (!chip) {
1178 ret = -ENOMEM;
1179 goto err;
1180 }
1181
1182 chip->pdev = pdev;
1183
1184 chip->num_slots = slots;
1185 pci_set_drvdata(pdev, chip);
1186
1187 for (i = 0;i < slots;i++) {
1188 ret = sdhci_probe_slot(pdev, i);
1189 if (ret) {
1190 for (i--;i >= 0;i--)
1191 sdhci_remove_slot(pdev, i);
1192 goto free;
1193 }
1194 }
1195
1196 return 0;
1197
1198free:
1199 pci_set_drvdata(pdev, NULL);
1200 kfree(chip);
1201
1202err:
1203 pci_disable_device(pdev);
1204 return ret;
1205}
1206
1207static void __devexit sdhci_remove(struct pci_dev *pdev)
1208{
1209 int i;
1210 struct sdhci_chip *chip;
1211
1212 chip = pci_get_drvdata(pdev);
1213
1214 if (chip) {
1215 for (i = 0;i < chip->num_slots;i++)
1216 sdhci_remove_slot(pdev, i);
1217
1218 pci_set_drvdata(pdev, NULL);
1219
1220 kfree(chip);
1221 }
1222
1223 pci_disable_device(pdev);
1224}
1225
1226static struct pci_driver sdhci_driver = {
1227 .name = DRIVER_NAME,
1228 .id_table = pci_ids,
1229 .probe = sdhci_probe,
1230 .remove = __devexit_p(sdhci_remove),
1231 .suspend = sdhci_suspend,
1232 .resume = sdhci_resume,
1233};
1234
1235/*****************************************************************************\
1236 * *
1237 * Driver init/exit *
1238 * *
1239\*****************************************************************************/
1240
1241static int __init sdhci_drv_init(void)
1242{
1243 printk(KERN_INFO DRIVER_NAME
1244 ": Secure Digital Host Controller Interface driver, "
1245 DRIVER_VERSION "\n");
1246 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1247
1248 return pci_register_driver(&sdhci_driver);
1249}
1250
1251static void __exit sdhci_drv_exit(void)
1252{
1253 DBG("Exiting\n");
1254
1255 pci_unregister_driver(&sdhci_driver);
1256}
1257
1258module_init(sdhci_drv_init);
1259module_exit(sdhci_drv_exit);
1260
1261MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1262MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1263MODULE_VERSION(DRIVER_VERSION);
1264MODULE_LICENSE("GPL");
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