Merge remote-tracking branch 'asoc/topic/qcom' into asoc-next
[linux-2.6-block.git] / drivers / mmc / host / tmio_mmc_dma.c
CommitLineData
b6147490
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1/*
2 * linux/drivers/mmc/tmio_mmc_dma.c
3 *
4 * Copyright (C) 2010-2011 Guennadi Liakhovetski
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * DMA function for TMIO MMC implementations
11 */
12
13#include <linux/device.h>
b7f080cf 14#include <linux/dma-mapping.h>
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15#include <linux/dmaengine.h>
16#include <linux/mfd/tmio.h>
17#include <linux/mmc/host.h>
cba179ae 18#include <linux/mmc/tmio.h>
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19#include <linux/pagemap.h>
20#include <linux/scatterlist.h>
21
22#include "tmio_mmc.h"
23
24#define TMIO_MMC_MIN_DMA_LEN 8
25
162f43e3 26void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
b6147490 27{
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28 if (!host->chan_tx || !host->chan_rx)
29 return;
30
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31 if (host->dma->enable)
32 host->dma->enable(host, enable);
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33}
34
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35void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
36{
37 tmio_mmc_enable_dma(host, false);
38
39 if (host->chan_rx)
40 dmaengine_terminate_all(host->chan_rx);
41 if (host->chan_tx)
42 dmaengine_terminate_all(host->chan_tx);
43
44 tmio_mmc_enable_dma(host, true);
45}
46
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47static void tmio_mmc_start_dma_rx(struct tmio_mmc_host *host)
48{
49 struct scatterlist *sg = host->sg_ptr, *sg_tmp;
50 struct dma_async_tx_descriptor *desc = NULL;
51 struct dma_chan *chan = host->chan_rx;
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52 dma_cookie_t cookie;
53 int ret, i;
54 bool aligned = true, multiple = true;
e471df0b 55 unsigned int align = (1 << host->pdata->alignment_shift) - 1;
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56
57 for_each_sg(sg, sg_tmp, host->sg_len, i) {
58 if (sg_tmp->offset & align)
59 aligned = false;
60 if (sg_tmp->length & align) {
61 multiple = false;
62 break;
63 }
64 }
65
09cbfeaf 66 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
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67 (align & PAGE_MASK))) || !multiple) {
68 ret = -EINVAL;
69 goto pio;
70 }
71
72 if (sg->length < TMIO_MMC_MIN_DMA_LEN) {
73 host->force_pio = true;
74 return;
75 }
76
77 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_RXRDY);
78
79 /* The only sg element can be unaligned, use our bounce buffer then */
80 if (!aligned) {
81 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
82 host->sg_ptr = &host->bounce_sg;
83 sg = host->sg_ptr;
84 }
85
86 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE);
87 if (ret > 0)
16052827 88 desc = dmaengine_prep_slave_sg(chan, sg, ret,
05f5799c 89 DMA_DEV_TO_MEM, DMA_CTRL_ACK);
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90
91 if (desc) {
92 cookie = dmaengine_submit(desc);
93 if (cookie < 0) {
94 desc = NULL;
95 ret = cookie;
96 }
97 }
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98pio:
99 if (!desc) {
100 /* DMA failed, fall back to PIO */
f936f9b6 101 tmio_mmc_enable_dma(host, false);
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102 if (ret >= 0)
103 ret = -EIO;
104 host->chan_rx = NULL;
105 dma_release_channel(chan);
106 /* Free the Tx channel too */
107 chan = host->chan_tx;
108 if (chan) {
109 host->chan_tx = NULL;
110 dma_release_channel(chan);
111 }
112 dev_warn(&host->pdev->dev,
113 "DMA failed: %d, falling back to PIO\n", ret);
b6147490 114 }
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115}
116
117static void tmio_mmc_start_dma_tx(struct tmio_mmc_host *host)
118{
119 struct scatterlist *sg = host->sg_ptr, *sg_tmp;
120 struct dma_async_tx_descriptor *desc = NULL;
121 struct dma_chan *chan = host->chan_tx;
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122 dma_cookie_t cookie;
123 int ret, i;
124 bool aligned = true, multiple = true;
e471df0b 125 unsigned int align = (1 << host->pdata->alignment_shift) - 1;
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126
127 for_each_sg(sg, sg_tmp, host->sg_len, i) {
128 if (sg_tmp->offset & align)
129 aligned = false;
130 if (sg_tmp->length & align) {
131 multiple = false;
132 break;
133 }
134 }
135
09cbfeaf 136 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
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137 (align & PAGE_MASK))) || !multiple) {
138 ret = -EINVAL;
139 goto pio;
140 }
141
142 if (sg->length < TMIO_MMC_MIN_DMA_LEN) {
143 host->force_pio = true;
144 return;
145 }
146
147 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_TXRQ);
148
149 /* The only sg element can be unaligned, use our bounce buffer then */
150 if (!aligned) {
151 unsigned long flags;
152 void *sg_vaddr = tmio_mmc_kmap_atomic(sg, &flags);
153 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
154 memcpy(host->bounce_buf, sg_vaddr, host->bounce_sg.length);
155 tmio_mmc_kunmap_atomic(sg, &flags, sg_vaddr);
156 host->sg_ptr = &host->bounce_sg;
157 sg = host->sg_ptr;
158 }
159
160 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE);
161 if (ret > 0)
16052827 162 desc = dmaengine_prep_slave_sg(chan, sg, ret,
05f5799c 163 DMA_MEM_TO_DEV, DMA_CTRL_ACK);
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164
165 if (desc) {
166 cookie = dmaengine_submit(desc);
167 if (cookie < 0) {
168 desc = NULL;
169 ret = cookie;
170 }
171 }
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172pio:
173 if (!desc) {
174 /* DMA failed, fall back to PIO */
f936f9b6 175 tmio_mmc_enable_dma(host, false);
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176 if (ret >= 0)
177 ret = -EIO;
178 host->chan_tx = NULL;
179 dma_release_channel(chan);
180 /* Free the Rx channel too */
181 chan = host->chan_rx;
182 if (chan) {
183 host->chan_rx = NULL;
184 dma_release_channel(chan);
185 }
186 dev_warn(&host->pdev->dev,
187 "DMA failed: %d, falling back to PIO\n", ret);
b6147490 188 }
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189}
190
191void tmio_mmc_start_dma(struct tmio_mmc_host *host,
192 struct mmc_data *data)
193{
194 if (data->flags & MMC_DATA_READ) {
195 if (host->chan_rx)
196 tmio_mmc_start_dma_rx(host);
197 } else {
198 if (host->chan_tx)
199 tmio_mmc_start_dma_tx(host);
200 }
201}
202
203static void tmio_mmc_issue_tasklet_fn(unsigned long priv)
204{
205 struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv;
206 struct dma_chan *chan = NULL;
207
208 spin_lock_irq(&host->lock);
209
210 if (host && host->data) {
211 if (host->data->flags & MMC_DATA_READ)
212 chan = host->chan_rx;
213 else
214 chan = host->chan_tx;
215 }
216
217 spin_unlock_irq(&host->lock);
218
219 tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND);
220
221 if (chan)
222 dma_async_issue_pending(chan);
223}
224
225static void tmio_mmc_tasklet_fn(unsigned long arg)
226{
227 struct tmio_mmc_host *host = (struct tmio_mmc_host *)arg;
228
229 spin_lock_irq(&host->lock);
230
231 if (!host->data)
232 goto out;
233
234 if (host->data->flags & MMC_DATA_READ)
235 dma_unmap_sg(host->chan_rx->device->dev,
236 host->sg_ptr, host->sg_len,
237 DMA_FROM_DEVICE);
238 else
239 dma_unmap_sg(host->chan_tx->device->dev,
240 host->sg_ptr, host->sg_len,
241 DMA_TO_DEVICE);
242
243 tmio_mmc_do_data_irq(host);
244out:
245 spin_unlock_irq(&host->lock);
246}
247
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248void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdata)
249{
250 /* We can only either use DMA for both Tx and Rx or not use it at all */
7ecc09ba 251 if (!host->dma || (!host->pdev->dev.of_node &&
f33c9d65 252 (!pdata->chan_priv_tx || !pdata->chan_priv_rx)))
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253 return;
254
255 if (!host->chan_tx && !host->chan_rx) {
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256 struct resource *res = platform_get_resource(host->pdev,
257 IORESOURCE_MEM, 0);
258 struct dma_slave_config cfg = {};
b6147490 259 dma_cap_mask_t mask;
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260 int ret;
261
262 if (!res)
263 return;
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264
265 dma_cap_zero(mask);
266 dma_cap_set(DMA_SLAVE, mask);
267
87ae7bbe 268 host->chan_tx = dma_request_slave_channel_compat(mask,
f33c9d65 269 host->dma->filter, pdata->chan_priv_tx,
87ae7bbe 270 &host->pdev->dev, "tx");
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271 dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__,
272 host->chan_tx);
273
274 if (!host->chan_tx)
275 return;
276
eec95ee2 277 cfg.direction = DMA_MEM_TO_DEV;
7445bf9e 278 cfg.dst_addr = res->start + (CTL_SD_DATA_PORT << host->bus_shift);
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279 cfg.dst_addr_width = host->dma->dma_buswidth;
280 if (!cfg.dst_addr_width)
281 cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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282 cfg.src_addr = 0;
283 ret = dmaengine_slave_config(host->chan_tx, &cfg);
284 if (ret < 0)
285 goto ecfgtx;
286
87ae7bbe 287 host->chan_rx = dma_request_slave_channel_compat(mask,
f33c9d65 288 host->dma->filter, pdata->chan_priv_rx,
87ae7bbe 289 &host->pdev->dev, "rx");
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290 dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__,
291 host->chan_rx);
292
293 if (!host->chan_rx)
294 goto ereqrx;
295
eec95ee2 296 cfg.direction = DMA_DEV_TO_MEM;
8b4c8f32 297 cfg.src_addr = cfg.dst_addr + host->pdata->dma_rx_offset;
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298 cfg.src_addr_width = host->dma->dma_buswidth;
299 if (!cfg.src_addr_width)
300 cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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301 cfg.dst_addr = 0;
302 ret = dmaengine_slave_config(host->chan_rx, &cfg);
303 if (ret < 0)
304 goto ecfgrx;
305
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306 host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA);
307 if (!host->bounce_buf)
308 goto ebouncebuf;
309
310 tasklet_init(&host->dma_complete, tmio_mmc_tasklet_fn, (unsigned long)host);
311 tasklet_init(&host->dma_issue, tmio_mmc_issue_tasklet_fn, (unsigned long)host);
e6ee7182 312 }
b6147490 313
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314 tmio_mmc_enable_dma(host, true);
315
316 return;
b6147490 317
b6147490 318ebouncebuf:
eec95ee2 319ecfgrx:
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320 dma_release_channel(host->chan_rx);
321 host->chan_rx = NULL;
b6147490 322ereqrx:
eec95ee2 323ecfgtx:
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324 dma_release_channel(host->chan_tx);
325 host->chan_tx = NULL;
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326}
327
328void tmio_mmc_release_dma(struct tmio_mmc_host *host)
329{
330 if (host->chan_tx) {
331 struct dma_chan *chan = host->chan_tx;
332 host->chan_tx = NULL;
333 dma_release_channel(chan);
334 }
335 if (host->chan_rx) {
336 struct dma_chan *chan = host->chan_rx;
337 host->chan_rx = NULL;
338 dma_release_channel(chan);
339 }
340 if (host->bounce_buf) {
341 free_pages((unsigned long)host->bounce_buf, 0);
342 host->bounce_buf = NULL;
343 }
344}