Commit | Line | Data |
---|---|---|
f707079d | 1 | // SPDX-License-Identifier: GPL-2.0 |
4a48998f | 2 | /* |
b21f13d8 SH |
3 | * Driver for the MMC / SD / SDIO cell found in: |
4 | * | |
5 | * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3 | |
4a48998f | 6 | * |
87317c4d SH |
7 | * Copyright (C) 2017 Renesas Electronics Corporation |
8 | * Copyright (C) 2017 Horms Solutions, Simon Horman | |
b6147490 GL |
9 | * Copyright (C) 2007 Ian Molton |
10 | * Copyright (C) 2004 Ian Molton | |
4a48998f | 11 | */ |
e0bc6ff8 | 12 | |
0196c8db | 13 | #include <linux/delay.h> |
e0bc6ff8 | 14 | #include <linux/device.h> |
4a48998f IM |
15 | #include <linux/mfd/core.h> |
16 | #include <linux/mfd/tmio.h> | |
e0bc6ff8 GL |
17 | #include <linux/mmc/host.h> |
18 | #include <linux/module.h> | |
19 | #include <linux/pagemap.h> | |
20 | #include <linux/scatterlist.h> | |
6ff56e0d | 21 | |
b6147490 | 22 | #include "tmio_mmc.h" |
4a48998f | 23 | |
0196c8db MY |
24 | static void tmio_mmc_clk_start(struct tmio_mmc_host *host) |
25 | { | |
26 | sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN | | |
27 | sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); | |
28 | ||
29 | usleep_range(10000, 11000); | |
30 | sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100); | |
31 | usleep_range(10000, 11000); | |
32 | } | |
33 | ||
34 | static void tmio_mmc_clk_stop(struct tmio_mmc_host *host) | |
35 | { | |
36 | sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000); | |
37 | usleep_range(10000, 11000); | |
38 | ||
39 | sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN & | |
40 | sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); | |
41 | ||
42 | usleep_range(10000, 11000); | |
43 | } | |
44 | ||
45 | static void tmio_mmc_set_clock(struct tmio_mmc_host *host, | |
46 | unsigned int new_clock) | |
47 | { | |
db4cea91 MY |
48 | unsigned int clock, divisor; |
49 | u32 clk = 0; | |
50 | int clk_sel; | |
0196c8db MY |
51 | |
52 | if (new_clock == 0) { | |
53 | tmio_mmc_clk_stop(host); | |
54 | return; | |
55 | } | |
56 | ||
db4cea91 | 57 | divisor = host->pdata->hclk / new_clock; |
0196c8db | 58 | |
4c595c05 WS |
59 | /* bit7 set: 1/512, ... bit0 set: 1/4, all bits clear: 1/2 */ |
60 | clk_sel = (divisor <= 1); | |
61 | clk = clk_sel ? 0 : (roundup_pow_of_two(divisor) >> 2); | |
0196c8db | 62 | |
db4cea91 | 63 | host->pdata->set_clk_div(host->pdev, clk_sel); |
0196c8db MY |
64 | |
65 | sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN & | |
66 | sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); | |
67 | sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & CLK_CTL_DIV_MASK); | |
68 | usleep_range(10000, 11000); | |
69 | ||
70 | tmio_mmc_clk_start(host); | |
71 | } | |
72 | ||
c8964481 UH |
73 | #ifdef CONFIG_PM_SLEEP |
74 | static int tmio_mmc_suspend(struct device *dev) | |
4a48998f | 75 | { |
c8964481 UH |
76 | struct platform_device *pdev = to_platform_device(dev); |
77 | const struct mfd_cell *cell = mfd_get_cell(pdev); | |
4a48998f IM |
78 | int ret; |
79 | ||
70a15e1a | 80 | ret = pm_runtime_force_suspend(dev); |
4a48998f IM |
81 | |
82 | /* Tell MFD core it can disable us now.*/ | |
83 | if (!ret && cell->disable) | |
c8964481 | 84 | cell->disable(pdev); |
4a48998f IM |
85 | |
86 | return ret; | |
87 | } | |
88 | ||
c8964481 | 89 | static int tmio_mmc_resume(struct device *dev) |
4a48998f | 90 | { |
c8964481 UH |
91 | struct platform_device *pdev = to_platform_device(dev); |
92 | const struct mfd_cell *cell = mfd_get_cell(pdev); | |
4a48998f IM |
93 | int ret = 0; |
94 | ||
4a48998f | 95 | /* Tell the MFD core we are ready to be enabled */ |
e6ee7182 | 96 | if (cell->resume) |
c8964481 | 97 | ret = cell->resume(pdev); |
4a48998f | 98 | |
e6ee7182 | 99 | if (!ret) |
70a15e1a | 100 | ret = pm_runtime_force_resume(dev); |
4a48998f | 101 | |
4a48998f IM |
102 | return ret; |
103 | } | |
4a48998f IM |
104 | #endif |
105 | ||
c3be1efd | 106 | static int tmio_mmc_probe(struct platform_device *pdev) |
4a48998f | 107 | { |
b6147490 | 108 | const struct mfd_cell *cell = mfd_get_cell(pdev); |
f0e46cc4 | 109 | struct tmio_mmc_data *pdata; |
4a48998f | 110 | struct tmio_mmc_host *host; |
3b159a6e | 111 | struct resource *res; |
8e7bfdb3 | 112 | int ret = -EINVAL, irq; |
4a48998f | 113 | |
b6147490 | 114 | if (pdev->num_resources != 2) |
4a48998f IM |
115 | goto out; |
116 | ||
ec71974f | 117 | pdata = pdev->dev.platform_data; |
d6c9b5ed | 118 | if (!pdata || !pdata->hclk) |
f0e46cc4 | 119 | goto out; |
d6c9b5ed | 120 | |
8e7bfdb3 MD |
121 | irq = platform_get_irq(pdev, 0); |
122 | if (irq < 0) { | |
123 | ret = irq; | |
124 | goto out; | |
125 | } | |
126 | ||
4a48998f IM |
127 | /* Tell the MFD core we are ready to be enabled */ |
128 | if (cell->enable) { | |
b6147490 | 129 | ret = cell->enable(pdev); |
4a48998f | 130 | if (ret) |
b6147490 | 131 | goto out; |
4a48998f IM |
132 | } |
133 | ||
3b159a6e | 134 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
25db67e2 IM |
135 | if (!res) { |
136 | ret = -EINVAL; | |
137 | goto cell_disable; | |
138 | } | |
3b159a6e | 139 | |
5d60e500 | 140 | pdata->flags |= TMIO_MMC_HAVE_HIGH_REG; |
3b159a6e | 141 | |
b21fc294 | 142 | host = tmio_mmc_host_alloc(pdev, pdata); |
8d09a133 MY |
143 | if (IS_ERR(host)) { |
144 | ret = PTR_ERR(host); | |
7ee422dc | 145 | goto cell_disable; |
8d09a133 | 146 | } |
4a48998f | 147 | |
7445bf9e KM |
148 | /* SD control register space size is 0x200, 0x400 for bus_shift=1 */ |
149 | host->bus_shift = resource_size(res) >> 10; | |
0196c8db | 150 | host->set_clock = tmio_mmc_set_clock; |
7445bf9e | 151 | |
b21fc294 MY |
152 | host->mmc->f_max = pdata->hclk; |
153 | host->mmc->f_min = pdata->hclk / 512; | |
154 | ||
bc45719c | 155 | ret = tmio_mmc_host_probe(host); |
94b110af KM |
156 | if (ret) |
157 | goto host_free; | |
158 | ||
de501af9 | 159 | ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_irq, |
f2218db8 SH |
160 | IRQF_TRIGGER_FALLING, |
161 | dev_name(&pdev->dev), host); | |
8e7bfdb3 MD |
162 | if (ret) |
163 | goto host_remove; | |
164 | ||
311f3ac7 | 165 | pr_info("%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc), |
8e7bfdb3 | 166 | (unsigned long)host->ctl, irq); |
4a48998f | 167 | |
4a48998f IM |
168 | return 0; |
169 | ||
8e7bfdb3 MD |
170 | host_remove: |
171 | tmio_mmc_host_remove(host); | |
94b110af KM |
172 | host_free: |
173 | tmio_mmc_host_free(host); | |
7ee422dc MD |
174 | cell_disable: |
175 | if (cell->disable) | |
b6147490 | 176 | cell->disable(pdev); |
4a48998f IM |
177 | out: |
178 | return ret; | |
179 | } | |
180 | ||
6e0ee714 | 181 | static int tmio_mmc_remove(struct platform_device *pdev) |
4a48998f | 182 | { |
b6147490 | 183 | const struct mfd_cell *cell = mfd_get_cell(pdev); |
a3b05373 | 184 | struct tmio_mmc_host *host = platform_get_drvdata(pdev); |
4a48998f | 185 | |
a3b05373 MY |
186 | tmio_mmc_host_remove(host); |
187 | if (cell->disable) | |
188 | cell->disable(pdev); | |
4a48998f IM |
189 | |
190 | return 0; | |
191 | } | |
192 | ||
193 | /* ------------------- device registration ----------------------- */ | |
194 | ||
c8964481 UH |
195 | static const struct dev_pm_ops tmio_mmc_dev_pm_ops = { |
196 | SET_SYSTEM_SLEEP_PM_OPS(tmio_mmc_suspend, tmio_mmc_resume) | |
6ed23b80 | 197 | SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend, |
f2218db8 | 198 | tmio_mmc_host_runtime_resume, NULL) |
c8964481 UH |
199 | }; |
200 | ||
4a48998f IM |
201 | static struct platform_driver tmio_mmc_driver = { |
202 | .driver = { | |
203 | .name = "tmio-mmc", | |
c8964481 | 204 | .pm = &tmio_mmc_dev_pm_ops, |
4a48998f IM |
205 | }, |
206 | .probe = tmio_mmc_probe, | |
0433c143 | 207 | .remove = tmio_mmc_remove, |
4a48998f IM |
208 | }; |
209 | ||
d1f81a64 | 210 | module_platform_driver(tmio_mmc_driver); |
4a48998f IM |
211 | |
212 | MODULE_DESCRIPTION("Toshiba TMIO SD/MMC driver"); | |
213 | MODULE_AUTHOR("Ian Molton <spyro@f2s.com>"); | |
214 | MODULE_LICENSE("GPL v2"); | |
215 | MODULE_ALIAS("platform:tmio-mmc"); |