[linux-2.6-block.git] / drivers / mmc / host / tmio_mmc.c

/*
 *  linux/drivers/mmc/tmio_mmc.c
 *
 *  Copyright (C) 2004 Ian Molton
 *  Copyright (C) 2007 Ian Molton
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * Driver for the MMC / SD / SDIO cell found in:
 *
 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
 *
 * This driver draws mainly on scattered spec sheets, Reverse engineering
 * of the toshiba e800  SD driver and some parts of the 2.4 ASIC3 driver (4 bit
 * support). (Further 4 bit support from a later datasheet).
 *
 * TODO:
 *   Investigate using a workqueue for PIO transfers
 *   Eliminate FIXMEs
 *   SDIO support
 *   Better Power management
 *   Handle MMC errors better
 *   double buffer support
 *
 */
#include <linux/module.h>
#include <linux/irq.h>
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/mmc/host.h>
#include <linux/mfd/core.h>
#include <linux/mfd/tmio.h>

#include "tmio_mmc.h"

static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
{
	u32 clk = 0, clock;

	if (new_clock) {
		for (clock = host->mmc->f_min, clk = 0x80000080;
			new_clock >= (clock<<1); clk >>= 1)
			clock <<= 1;
		clk |= 0x100;
	}

	sd_config_write8(host, CNF_SD_CLK_MODE, clk >> 22);
	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
}

static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
{
	sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
	msleep(10);
	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
		sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
	msleep(10);
}

static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
{
	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
		sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
	msleep(10);
	sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
	msleep(10);
}

static void reset(struct tmio_mmc_host *host)
{
	/* FIXME - should we set stop clock reg here */
	sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
	sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
	msleep(10);
	sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
	sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
	msleep(10);
}

static void
tmio_mmc_finish_request(struct tmio_mmc_host *host)
{
	struct mmc_request *mrq = host->mrq;

	host->mrq = NULL;
	host->cmd = NULL;
	host->data = NULL;

	mmc_request_done(host->mmc, mrq);
}

/* These are the bitmasks the tmio chip requires to implement the MMC response
 * types. Note that R1 and R6 are the same in this scheme. */
#define APP_CMD        0x0040
#define RESP_NONE      0x0300
#define RESP_R1        0x0400
#define RESP_R1B       0x0500
#define RESP_R2        0x0600
#define RESP_R3        0x0700
#define DATA_PRESENT   0x0800
#define TRANSFER_READ  0x1000
#define TRANSFER_MULTI 0x2000
#define SECURITY_CMD   0x4000

static int
tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
{
	struct mmc_data *data = host->data;
	int c = cmd->opcode;

	/* Command 12 is handled by hardware */
	if (cmd->opcode == 12 && !cmd->arg) {
		sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
		return 0;
	}

	switch (mmc_resp_type(cmd)) {
	case MMC_RSP_NONE: c |= RESP_NONE; break;
	case MMC_RSP_R1:   c |= RESP_R1;   break;
	case MMC_RSP_R1B:  c |= RESP_R1B;  break;
	case MMC_RSP_R2:   c |= RESP_R2;   break;
	case MMC_RSP_R3:   c |= RESP_R3;   break;
	default:
		pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
		return -EINVAL;
	}

	host->cmd = cmd;

/* FIXME - this seems to be ok comented out but the spec suggest this bit should
 *         be set when issuing app commands.
 *	if(cmd->flags & MMC_FLAG_ACMD)
 *		c |= APP_CMD;
 */
	if (data) {
		c |= DATA_PRESENT;
		if (data->blocks > 1) {
			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
			c |= TRANSFER_MULTI;
		}
		if (data->flags & MMC_DATA_READ)
			c |= TRANSFER_READ;
	}

	enable_mmc_irqs(host, TMIO_MASK_CMD);

	/* Fire off the command */
	sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
	sd_ctrl_write16(host, CTL_SD_CMD, c);

	return 0;
}

/* This chip always returns (at least?) as much data as you ask for.
 * I'm unsure what happens if you ask for less than a block. This should be
 * looked into to ensure that a funny length read doesnt hose the controller.
 *
 */
static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
{
	struct mmc_data *data = host->data;
	unsigned short *buf;
	unsigned int count;
	unsigned long flags;

	if (!data) {
		pr_debug("Spurious PIO IRQ\n");
		return;
	}

	buf = (unsigned short *)(tmio_mmc_kmap_atomic(host, &flags) +
	      host->sg_off);

	count = host->sg_ptr->length - host->sg_off;
	if (count > data->blksz)
		count = data->blksz;

	pr_debug("count: %08x offset: %08x flags %08x\n",
	    count, host->sg_off, data->flags);

	/* Transfer the data */
	if (data->flags & MMC_DATA_READ)
		sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
	else
		sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);

	host->sg_off += count;

	tmio_mmc_kunmap_atomic(host, &flags);

	if (host->sg_off == host->sg_ptr->length)
		tmio_mmc_next_sg(host);

	return;
}

static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
{
	struct mmc_data *data = host->data;
	struct mmc_command *stop;

	host->data = NULL;

	if (!data) {
		pr_debug("Spurious data end IRQ\n");
		return;
	}
	stop = data->stop;

	/* FIXME - return correct transfer count on errors */
	if (!data->error)
		data->bytes_xfered = data->blocks * data->blksz;
	else
		data->bytes_xfered = 0;

	pr_debug("Completed data request\n");

	/*FIXME - other drivers allow an optional stop command of any given type
	 *        which we dont do, as the chip can auto generate them.
	 *        Perhaps we can be smarter about when to use auto CMD12 and
	 *        only issue the auto request when we know this is the desired
	 *        stop command, allowing fallback to the stop command the
	 *        upper layers expect. For now, we do what works.
	 */

	if (data->flags & MMC_DATA_READ)
		disable_mmc_irqs(host, TMIO_MASK_READOP);
	else
		disable_mmc_irqs(host, TMIO_MASK_WRITEOP);

	if (stop) {
		if (stop->opcode == 12 && !stop->arg)
			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
		else
			BUG();
	}

	tmio_mmc_finish_request(host);
}

static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
	unsigned int stat)
{
	struct mmc_command *cmd = host->cmd;
	int i, addr;

	if (!host->cmd) {
		pr_debug("Spurious CMD irq\n");
		return;
	}

	host->cmd = NULL;

	/* This controller is sicker than the PXA one. Not only do we need to
	 * drop the top 8 bits of the first response word, we also need to
	 * modify the order of the response for short response command types.
	 */

	for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
		cmd->resp[i] = sd_ctrl_read32(host, addr);

	if (cmd->flags &  MMC_RSP_136) {
		cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
		cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
		cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
		cmd->resp[3] <<= 8;
	} else if (cmd->flags & MMC_RSP_R3) {
		cmd->resp[0] = cmd->resp[3];
	}

	if (stat & TMIO_STAT_CMDTIMEOUT)
		cmd->error = -ETIMEDOUT;
	else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
		cmd->error = -EILSEQ;

	/* If there is data to handle we enable data IRQs here, and
	 * we will ultimatley finish the request in the data_end handler.
	 * If theres no data or we encountered an error, finish now.
	 */
	if (host->data && !cmd->error) {
		if (host->data->flags & MMC_DATA_READ)
			enable_mmc_irqs(host, TMIO_MASK_READOP);
		else
			enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
	} else {
		tmio_mmc_finish_request(host);
	}

	return;
}


static irqreturn_t tmio_mmc_irq(int irq, void *devid)
{
	struct tmio_mmc_host *host = devid;
	unsigned int ireg, irq_mask, status;

	pr_debug("MMC IRQ begin\n");

	status = sd_ctrl_read32(host, CTL_STATUS);
	irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
	ireg = status & TMIO_MASK_IRQ & ~irq_mask;

	pr_debug_status(status);
	pr_debug_status(ireg);

	if (!ireg) {
		disable_mmc_irqs(host, status & ~irq_mask);

		pr_debug("tmio_mmc: Spurious irq, disabling! "
			"0x%08x 0x%08x 0x%08x\n", status, irq_mask, ireg);
		pr_debug_status(status);

		goto out;
	}

	while (ireg) {
		/* Card insert / remove attempts */
		if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
			ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
				TMIO_STAT_CARD_REMOVE);
			mmc_detect_change(host->mmc, 0);
		}

		/* CRC and other errors */
/*		if (ireg & TMIO_STAT_ERR_IRQ)
 *			handled |= tmio_error_irq(host, irq, stat);
 */

		/* Command completion */
		if (ireg & TMIO_MASK_CMD) {
			ack_mmc_irqs(host, TMIO_MASK_CMD);
			tmio_mmc_cmd_irq(host, status);
		}

		/* Data transfer */
		if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
			ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
			tmio_mmc_pio_irq(host);
		}

		/* Data transfer completion */
		if (ireg & TMIO_STAT_DATAEND) {
			ack_mmc_irqs(host, TMIO_STAT_DATAEND);
			tmio_mmc_data_irq(host);
		}

		/* Check status - keep going until we've handled it all */
		status = sd_ctrl_read32(host, CTL_STATUS);
		irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
		ireg = status & TMIO_MASK_IRQ & ~irq_mask;

		pr_debug("Status at end of loop: %08x\n", status);
		pr_debug_status(status);
	}
	pr_debug("MMC IRQ end\n");

out:
	return IRQ_HANDLED;
}

static int tmio_mmc_start_data(struct tmio_mmc_host *host,
	struct mmc_data *data)
{
	pr_debug("setup data transfer: blocksize %08x  nr_blocks %d\n",
	    data->blksz, data->blocks);

	/* Hardware cannot perform 1 and 2 byte requests in 4 bit mode */
	if (data->blksz < 4 && host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
		printk(KERN_ERR "%s: %d byte block unsupported in 4 bit mode\n",
			mmc_hostname(host->mmc), data->blksz);
		return -EINVAL;
	}

	tmio_mmc_init_sg(host, data);
	host->data = data;

	/* Set transfer length / blocksize */
	sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
	sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);

	return 0;
}

/* Process requests from the MMC layer */
static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);
	int ret;

	if (host->mrq)
		pr_debug("request not null\n");

	host->mrq = mrq;

	if (mrq->data) {
		ret = tmio_mmc_start_data(host, mrq->data);
		if (ret)
			goto fail;
	}

	ret = tmio_mmc_start_command(host, mrq->cmd);

	if (!ret)
		return;

fail:
	mrq->cmd->error = ret;
	mmc_request_done(mmc, mrq);
}

/* Set MMC clock / power.
 * Note: This controller uses a simple divider scheme therefore it cannot
 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
 * slowest setting.
 */
static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);

	if (ios->clock)
		tmio_mmc_set_clock(host, ios->clock);

	/* Power sequence - OFF -> ON -> UP */
	switch (ios->power_mode) {
	case MMC_POWER_OFF: /* power down SD bus */
		sd_config_write8(host, CNF_PWR_CTL_2, 0x00);
		tmio_mmc_clk_stop(host);
		break;
	case MMC_POWER_ON: /* power up SD bus */

		sd_config_write8(host, CNF_PWR_CTL_2, 0x02);
		break;
	case MMC_POWER_UP: /* start bus clock */
		tmio_mmc_clk_start(host);
		break;
	}

	switch (ios->bus_width) {
	case MMC_BUS_WIDTH_1:
		sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
	break;
	case MMC_BUS_WIDTH_4:
		sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
	break;
	}

	/* Let things settle. delay taken from winCE driver */
	udelay(140);
}

static int tmio_mmc_get_ro(struct mmc_host *mmc)
{
	struct tmio_mmc_host *host = mmc_priv(mmc);

	return (sd_ctrl_read16(host, CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
}

static struct mmc_host_ops tmio_mmc_ops = {
	.request	= tmio_mmc_request,
	.set_ios	= tmio_mmc_set_ios,
	.get_ro         = tmio_mmc_get_ro,
};

#ifdef CONFIG_PM
static int tmio_mmc_suspend(struct platform_device *dev, pm_message_t state)
{
	struct mfd_cell	*cell = (struct mfd_cell *)dev->dev.platform_data;
	struct mmc_host *mmc = platform_get_drvdata(dev);
	int ret;

	ret = mmc_suspend_host(mmc, state);

	/* Tell MFD core it can disable us now.*/
	if (!ret && cell->disable)
		cell->disable(dev);

	return ret;
}

static int tmio_mmc_resume(struct platform_device *dev)
{
	struct mfd_cell	*cell = (struct mfd_cell *)dev->dev.platform_data;
	struct mmc_host *mmc = platform_get_drvdata(dev);
	struct tmio_mmc_host *host = mmc_priv(mmc);
	int ret = 0;

	/* Tell the MFD core we are ready to be enabled */
	if (cell->enable) {
		ret = cell->enable(dev);
		if (ret)
			goto out;
	}

	/* Enable the MMC/SD Control registers */
	sd_config_write16(host, CNF_CMD, SDCREN);
	sd_config_write32(host, CNF_CTL_BASE,
		(dev->resource[0].start >> host->bus_shift) & 0xfffe);

	mmc_resume_host(mmc);

out:
	return ret;
}
#else
#define tmio_mmc_suspend NULL
#define tmio_mmc_resume NULL
#endif

static int __devinit tmio_mmc_probe(struct platform_device *dev)
{
	struct mfd_cell	*cell = (struct mfd_cell *)dev->dev.platform_data;
	struct tmio_mmc_data *pdata;
	struct resource *res_ctl, *res_cnf;
	struct tmio_mmc_host *host;
	struct mmc_host *mmc;
	int ret = -EINVAL;

	if (dev->num_resources != 3)
		goto out;

	res_ctl = platform_get_resource(dev, IORESOURCE_MEM, 0);
	res_cnf = platform_get_resource(dev, IORESOURCE_MEM, 1);
	if (!res_ctl || !res_cnf)
		goto out;

	pdata = cell->driver_data;
	if (!pdata || !pdata->hclk)
		goto out;

	ret = -ENOMEM;

	mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &dev->dev);
	if (!mmc)
		goto out;

	host = mmc_priv(mmc);
	host->mmc = mmc;
	platform_set_drvdata(dev, mmc);

	/* SD control register space size is 0x200, 0x400 for bus_shift=1 */
	host->bus_shift = resource_size(res_ctl) >> 10;

	host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
	if (!host->ctl)
		goto host_free;

	host->cnf = ioremap(res_cnf->start, resource_size(res_cnf));
	if (!host->cnf)
		goto unmap_ctl;

	mmc->ops = &tmio_mmc_ops;
	mmc->caps = MMC_CAP_4_BIT_DATA;
	mmc->f_max = pdata->hclk;
	mmc->f_min = mmc->f_max / 512;
	mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;

	/* Tell the MFD core we are ready to be enabled */
	if (cell->enable) {
		ret = cell->enable(dev);
		if (ret)
			goto unmap_cnf;
	}

	/* Enable the MMC/SD Control registers */
	sd_config_write16(host, CNF_CMD, SDCREN);
	sd_config_write32(host, CNF_CTL_BASE,
		(dev->resource[0].start >> host->bus_shift) & 0xfffe);

	/* Disable SD power during suspend */
	sd_config_write8(host, CNF_PWR_CTL_3, 0x01);

	/* The below is required but why? FIXME */
	sd_config_write8(host, CNF_STOP_CLK_CTL, 0x1f);

	/* Power down SD bus*/
	sd_config_write8(host, CNF_PWR_CTL_2, 0x00);

	tmio_mmc_clk_stop(host);
	reset(host);

	ret = platform_get_irq(dev, 0);
	if (ret >= 0)
		host->irq = ret;
	else
		goto unmap_cnf;

	disable_mmc_irqs(host, TMIO_MASK_ALL);

	ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED |
		IRQF_TRIGGER_FALLING, "tmio-mmc", host);
	if (ret)
		goto unmap_cnf;

	mmc_add_host(mmc);

	printk(KERN_INFO "%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc),
	       (unsigned long)host->ctl, host->irq);

	/* Unmask the IRQs we want to know about */
	enable_mmc_irqs(host, TMIO_MASK_IRQ);

	return 0;

unmap_cnf:
	iounmap(host->cnf);
unmap_ctl:
	iounmap(host->ctl);
host_free:
	mmc_free_host(mmc);
out:
	return ret;
}

static int __devexit tmio_mmc_remove(struct platform_device *dev)
{
	struct mmc_host *mmc = platform_get_drvdata(dev);

	platform_set_drvdata(dev, NULL);

	if (mmc) {
		struct tmio_mmc_host *host = mmc_priv(mmc);
		mmc_remove_host(mmc);
		free_irq(host->irq, host);
		iounmap(host->ctl);
		iounmap(host->cnf);
		mmc_free_host(mmc);
	}

	return 0;
}

/* ------------------- device registration ----------------------- */

static struct platform_driver tmio_mmc_driver = {
	.driver = {
		.name = "tmio-mmc",
		.owner = THIS_MODULE,
	},
	.probe = tmio_mmc_probe,
	.remove = __devexit_p(tmio_mmc_remove),
	.suspend = tmio_mmc_suspend,
	.resume = tmio_mmc_resume,
};


static int __init tmio_mmc_init(void)
{
	return platform_driver_register(&tmio_mmc_driver);
}

static void __exit tmio_mmc_exit(void)
{
	platform_driver_unregister(&tmio_mmc_driver);
}

module_init(tmio_mmc_init);
module_exit(tmio_mmc_exit);

MODULE_DESCRIPTION("Toshiba TMIO SD/MMC driver");
MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:tmio-mmc");
Commit	Line	Data
4a48998f IM	1	/*
	2	* linux/drivers/mmc/tmio_mmc.c
	3	*
	4	* Copyright (C) 2004 Ian Molton
	5	* Copyright (C) 2007 Ian Molton
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*
	11	* Driver for the MMC / SD / SDIO cell found in:
	12	*
e6f2c7ad	13	* TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
4a48998f IM	14	*
	15	* This driver draws mainly on scattered spec sheets, Reverse engineering
	16	* of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
	17	* support). (Further 4 bit support from a later datasheet).
	18	*
	19	* TODO:
	20	* Investigate using a workqueue for PIO transfers
	21	* Eliminate FIXMEs
	22	* SDIO support
	23	* Better Power management
	24	* Handle MMC errors better
	25	* double buffer support
	26	*
	27	*/
	28	#include <linux/module.h>
	29	#include <linux/irq.h>
	30	#include <linux/device.h>
	31	#include <linux/delay.h>
	32	#include <linux/mmc/host.h>
	33	#include <linux/mfd/core.h>
	34	#include <linux/mfd/tmio.h>
	35
	36	#include "tmio_mmc.h"
	37
4a48998f IM	38	static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
4a48998f IM	39	{
da46a0bd	40	u32 clk = 0, clock;
4a48998f IM	41
4a48998f IM	42	if (new_clock) {
da46a0bd IM	43	for (clock = host->mmc->f_min, clk = 0x80000080;
da46a0bd IM	44	new_clock >= (clock<<1); clk >>= 1)
4a48998f	45	clock <<= 1;
4a48998f IM	46	clk \|= 0x100;
	47	}
	48
da46a0bd IM	49	sd_config_write8(host, CNF_SD_CLK_MODE, clk >> 22);
da46a0bd IM	50	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
4a48998f IM	51	}
	52
	53	static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
	54	{
5e74672c	55	sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
4a48998f	56	msleep(10);
5e74672c PZ	57	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
5e74672c PZ	58	sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
4a48998f IM	59	msleep(10);
	60	}
	61
	62	static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
	63	{
5e74672c PZ	64	sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 \|
5e74672c PZ	65	sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
4a48998f	66	msleep(10);
5e74672c	67	sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
4a48998f IM	68	msleep(10);
	69	}
	70
	71	static void reset(struct tmio_mmc_host *host)
	72	{
4a48998f	73	/* FIXME - should we set stop clock reg here */
5e74672c PZ	74	sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
5e74672c PZ	75	sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
4a48998f	76	msleep(10);
5e74672c PZ	77	sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
5e74672c PZ	78	sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
4a48998f IM	79	msleep(10);
	80	}
	81
	82	static void
	83	tmio_mmc_finish_request(struct tmio_mmc_host *host)
	84	{
	85	struct mmc_request *mrq = host->mrq;
	86
	87	host->mrq = NULL;
	88	host->cmd = NULL;
	89	host->data = NULL;
	90
	91	mmc_request_done(host->mmc, mrq);
	92	}
	93
	94	/* These are the bitmasks the tmio chip requires to implement the MMC response
	95	* types. Note that R1 and R6 are the same in this scheme. */
	96	#define APP_CMD 0x0040
	97	#define RESP_NONE 0x0300
	98	#define RESP_R1 0x0400
	99	#define RESP_R1B 0x0500
	100	#define RESP_R2 0x0600
	101	#define RESP_R3 0x0700
	102	#define DATA_PRESENT 0x0800
	103	#define TRANSFER_READ 0x1000
	104	#define TRANSFER_MULTI 0x2000
	105	#define SECURITY_CMD 0x4000
	106
	107	static int
	108	tmio_mmc_start_command(struct tmio_mmc_host host, struct mmc_command cmd)
	109	{
4a48998f IM	110	struct mmc_data *data = host->data;
	111	int c = cmd->opcode;
	112
	113	/* Command 12 is handled by hardware */
	114	if (cmd->opcode == 12 && !cmd->arg) {
5e74672c	115	sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
4a48998f IM	116	return 0;
	117	}
	118
	119	switch (mmc_resp_type(cmd)) {
	120	case MMC_RSP_NONE: c \|= RESP_NONE; break;
	121	case MMC_RSP_R1: c \|= RESP_R1; break;
	122	case MMC_RSP_R1B: c \|= RESP_R1B; break;
	123	case MMC_RSP_R2: c \|= RESP_R2; break;
	124	case MMC_RSP_R3: c \|= RESP_R3; break;
	125	default:
	126	pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
	127	return -EINVAL;
	128	}
	129
	130	host->cmd = cmd;
	131
	132	/* FIXME - this seems to be ok comented out but the spec suggest this bit should
	133	* be set when issuing app commands.
	134	* if(cmd->flags & MMC_FLAG_ACMD)
	135	* c \|= APP_CMD;
	136	*/
	137	if (data) {
	138	c \|= DATA_PRESENT;
	139	if (data->blocks > 1) {
5e74672c	140	sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
4a48998f IM	141	c \|= TRANSFER_MULTI;
	142	}
	143	if (data->flags & MMC_DATA_READ)
	144	c \|= TRANSFER_READ;
	145	}
	146
5e74672c	147	enable_mmc_irqs(host, TMIO_MASK_CMD);
4a48998f IM	148
4a48998f IM	149	/* Fire off the command */
5e74672c PZ	150	sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
5e74672c PZ	151	sd_ctrl_write16(host, CTL_SD_CMD, c);
4a48998f IM	152
	153	return 0;
	154	}
	155
	156	/* This chip always returns (at least?) as much data as you ask for.
	157	* I'm unsure what happens if you ask for less than a block. This should be
	158	* looked into to ensure that a funny length read doesnt hose the controller.
	159	*
	160	*/
	161	static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
	162	{
4a48998f IM	163	struct mmc_data *data = host->data;
	164	unsigned short *buf;
	165	unsigned int count;
	166	unsigned long flags;
	167
	168	if (!data) {
	169	pr_debug("Spurious PIO IRQ\n");
	170	return;
	171	}
	172
	173	buf = (unsigned short *)(tmio_mmc_kmap_atomic(host, &flags) +
	174	host->sg_off);
	175
	176	count = host->sg_ptr->length - host->sg_off;
	177	if (count > data->blksz)
	178	count = data->blksz;
	179
	180	pr_debug("count: %08x offset: %08x flags %08x\n",
	181	count, host->sg_off, data->flags);
	182
	183	/* Transfer the data */
	184	if (data->flags & MMC_DATA_READ)
5e74672c	185	sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
4a48998f	186	else
5e74672c	187	sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
4a48998f IM	188
	189	host->sg_off += count;
	190
	191	tmio_mmc_kunmap_atomic(host, &flags);
	192
	193	if (host->sg_off == host->sg_ptr->length)
	194	tmio_mmc_next_sg(host);
	195
	196	return;
	197	}
	198
	199	static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
	200	{
4a48998f	201	struct mmc_data *data = host->data;
a0d045ca	202	struct mmc_command *stop;
4a48998f IM	203
	204	host->data = NULL;
	205
	206	if (!data) {
	207	pr_debug("Spurious data end IRQ\n");
	208	return;
	209	}
a0d045ca	210	stop = data->stop;
4a48998f IM	211
	212	/* FIXME - return correct transfer count on errors */
	213	if (!data->error)
	214	data->bytes_xfered = data->blocks * data->blksz;
	215	else
	216	data->bytes_xfered = 0;
	217
	218	pr_debug("Completed data request\n");
	219
	220	/*FIXME - other drivers allow an optional stop command of any given type
	221	* which we dont do, as the chip can auto generate them.
	222	* Perhaps we can be smarter about when to use auto CMD12 and
	223	* only issue the auto request when we know this is the desired
	224	* stop command, allowing fallback to the stop command the
	225	* upper layers expect. For now, we do what works.
	226	*/
	227
	228	if (data->flags & MMC_DATA_READ)
5e74672c	229	disable_mmc_irqs(host, TMIO_MASK_READOP);
4a48998f	230	else
5e74672c	231	disable_mmc_irqs(host, TMIO_MASK_WRITEOP);
4a48998f IM	232
	233	if (stop) {
	234	if (stop->opcode == 12 && !stop->arg)
5e74672c	235	sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
4a48998f IM	236	else
	237	BUG();
	238	}
	239
	240	tmio_mmc_finish_request(host);
	241	}
	242
	243	static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
	244	unsigned int stat)
	245	{
4a48998f	246	struct mmc_command *cmd = host->cmd;
5e74672c	247	int i, addr;
4a48998f IM	248
	249	if (!host->cmd) {
	250	pr_debug("Spurious CMD irq\n");
	251	return;
	252	}
	253
	254	host->cmd = NULL;
	255
	256	/* This controller is sicker than the PXA one. Not only do we need to
	257	* drop the top 8 bits of the first response word, we also need to
	258	* modify the order of the response for short response command types.
	259	*/
	260
5e74672c PZ	261	for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
5e74672c PZ	262	cmd->resp[i] = sd_ctrl_read32(host, addr);
4a48998f IM	263
	264	if (cmd->flags & MMC_RSP_136) {
	265	cmd->resp[0] = (cmd->resp[0] << 8) \| (cmd->resp[1] >> 24);
	266	cmd->resp[1] = (cmd->resp[1] << 8) \| (cmd->resp[2] >> 24);
	267	cmd->resp[2] = (cmd->resp[2] << 8) \| (cmd->resp[3] >> 24);
	268	cmd->resp[3] <<= 8;
	269	} else if (cmd->flags & MMC_RSP_R3) {
	270	cmd->resp[0] = cmd->resp[3];
	271	}
	272
	273	if (stat & TMIO_STAT_CMDTIMEOUT)
	274	cmd->error = -ETIMEDOUT;
	275	else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
	276	cmd->error = -EILSEQ;
	277
	278	/* If there is data to handle we enable data IRQs here, and
	279	* we will ultimatley finish the request in the data_end handler.
	280	* If theres no data or we encountered an error, finish now.
	281	*/
	282	if (host->data && !cmd->error) {
	283	if (host->data->flags & MMC_DATA_READ)
5e74672c	284	enable_mmc_irqs(host, TMIO_MASK_READOP);
4a48998f	285	else
5e74672c	286	enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
4a48998f IM	287	} else {
	288	tmio_mmc_finish_request(host);
	289	}
	290
	291	return;
	292	}
	293
	294
	295	static irqreturn_t tmio_mmc_irq(int irq, void *devid)
	296	{
	297	struct tmio_mmc_host *host = devid;
4a48998f IM	298	unsigned int ireg, irq_mask, status;
	299
	300	pr_debug("MMC IRQ begin\n");
	301
5e74672c PZ	302	status = sd_ctrl_read32(host, CTL_STATUS);
5e74672c PZ	303	irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
4a48998f IM	304	ireg = status & TMIO_MASK_IRQ & ~irq_mask;
	305
	306	pr_debug_status(status);
	307	pr_debug_status(ireg);
	308
	309	if (!ireg) {
5e74672c	310	disable_mmc_irqs(host, status & ~irq_mask);
4a48998f IM	311
	312	pr_debug("tmio_mmc: Spurious irq, disabling! "
	313	"0x%08x 0x%08x 0x%08x\n", status, irq_mask, ireg);
	314	pr_debug_status(status);
	315
	316	goto out;
	317	}
	318
	319	while (ireg) {
	320	/* Card insert / remove attempts */
	321	if (ireg & (TMIO_STAT_CARD_INSERT \| TMIO_STAT_CARD_REMOVE)) {
5e74672c	322	ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT \|
4a48998f IM	323	TMIO_STAT_CARD_REMOVE);
	324	mmc_detect_change(host->mmc, 0);
	325	}
	326
	327	/* CRC and other errors */
	328	/* if (ireg & TMIO_STAT_ERR_IRQ)
	329	* handled \|= tmio_error_irq(host, irq, stat);
	330	*/
	331
	332	/* Command completion */
	333	if (ireg & TMIO_MASK_CMD) {
5e74672c	334	ack_mmc_irqs(host, TMIO_MASK_CMD);
4a48998f IM	335	tmio_mmc_cmd_irq(host, status);
	336	}
	337
	338	/* Data transfer */
	339	if (ireg & (TMIO_STAT_RXRDY \| TMIO_STAT_TXRQ)) {
5e74672c	340	ack_mmc_irqs(host, TMIO_STAT_RXRDY \| TMIO_STAT_TXRQ);
4a48998f IM	341	tmio_mmc_pio_irq(host);
	342	}
	343
	344	/* Data transfer completion */
	345	if (ireg & TMIO_STAT_DATAEND) {
5e74672c	346	ack_mmc_irqs(host, TMIO_STAT_DATAEND);
4a48998f IM	347	tmio_mmc_data_irq(host);
	348	}
	349
	350	/* Check status - keep going until we've handled it all */
5e74672c PZ	351	status = sd_ctrl_read32(host, CTL_STATUS);
5e74672c PZ	352	irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
4a48998f IM	353	ireg = status & TMIO_MASK_IRQ & ~irq_mask;
	354
	355	pr_debug("Status at end of loop: %08x\n", status);
	356	pr_debug_status(status);
	357	}
	358	pr_debug("MMC IRQ end\n");
	359
	360	out:
	361	return IRQ_HANDLED;
	362	}
	363
	364	static int tmio_mmc_start_data(struct tmio_mmc_host *host,
	365	struct mmc_data *data)
	366	{
4a48998f IM	367	pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
	368	data->blksz, data->blocks);
	369
	370	/* Hardware cannot perform 1 and 2 byte requests in 4 bit mode */
	371	if (data->blksz < 4 && host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
	372	printk(KERN_ERR "%s: %d byte block unsupported in 4 bit mode\n",
	373	mmc_hostname(host->mmc), data->blksz);
	374	return -EINVAL;
	375	}
	376
	377	tmio_mmc_init_sg(host, data);
	378	host->data = data;
	379
	380	/* Set transfer length / blocksize */
5e74672c PZ	381	sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
5e74672c PZ	382	sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
4a48998f IM	383
	384	return 0;
	385	}
	386
	387	/* Process requests from the MMC layer */
	388	static void tmio_mmc_request(struct mmc_host mmc, struct mmc_request mrq)
	389	{
	390	struct tmio_mmc_host *host = mmc_priv(mmc);
	391	int ret;
	392
	393	if (host->mrq)
	394	pr_debug("request not null\n");
	395
	396	host->mrq = mrq;
	397
	398	if (mrq->data) {
	399	ret = tmio_mmc_start_data(host, mrq->data);
	400	if (ret)
	401	goto fail;
	402	}
	403
	404	ret = tmio_mmc_start_command(host, mrq->cmd);
	405
	406	if (!ret)
	407	return;
	408
	409	fail:
	410	mrq->cmd->error = ret;
	411	mmc_request_done(mmc, mrq);
	412	}
	413
	414	/* Set MMC clock / power.
	415	* Note: This controller uses a simple divider scheme therefore it cannot
	416	* run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
	417	* MMC wont run that fast, it has to be clocked at 12MHz which is the next
	418	* slowest setting.
	419	*/
	420	static void tmio_mmc_set_ios(struct mmc_host mmc, struct mmc_ios ios)
	421	{
	422	struct tmio_mmc_host *host = mmc_priv(mmc);
4a48998f IM	423
	424	if (ios->clock)
	425	tmio_mmc_set_clock(host, ios->clock);
	426
	427	/* Power sequence - OFF -> ON -> UP */
	428	switch (ios->power_mode) {
	429	case MMC_POWER_OFF: /* power down SD bus */
5e74672c	430	sd_config_write8(host, CNF_PWR_CTL_2, 0x00);
4a48998f IM	431	tmio_mmc_clk_stop(host);
	432	break;
	433	case MMC_POWER_ON: /* power up SD bus */
	434
5e74672c	435	sd_config_write8(host, CNF_PWR_CTL_2, 0x02);
4a48998f IM	436	break;
	437	case MMC_POWER_UP: /* start bus clock */
	438	tmio_mmc_clk_start(host);
	439	break;
	440	}
	441
	442	switch (ios->bus_width) {
	443	case MMC_BUS_WIDTH_1:
5e74672c	444	sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
4a48998f IM	445	break;
4a48998f IM	446	case MMC_BUS_WIDTH_4:
5e74672c	447	sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
4a48998f IM	448	break;
	449	}
	450
	451	/* Let things settle. delay taken from winCE driver */
	452	udelay(140);
	453	}
	454
	455	static int tmio_mmc_get_ro(struct mmc_host *mmc)
	456	{
	457	struct tmio_mmc_host *host = mmc_priv(mmc);
4a48998f	458
5e74672c	459	return (sd_ctrl_read16(host, CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
4a48998f IM	460	}
	461
	462	static struct mmc_host_ops tmio_mmc_ops = {
	463	.request = tmio_mmc_request,
	464	.set_ios = tmio_mmc_set_ios,
	465	.get_ro = tmio_mmc_get_ro,
	466	};
	467
	468	#ifdef CONFIG_PM
	469	static int tmio_mmc_suspend(struct platform_device *dev, pm_message_t state)
	470	{
	471	struct mfd_cell cell = (struct mfd_cell )dev->dev.platform_data;
	472	struct mmc_host *mmc = platform_get_drvdata(dev);
	473	int ret;
	474
	475	ret = mmc_suspend_host(mmc, state);
	476
	477	/* Tell MFD core it can disable us now.*/
	478	if (!ret && cell->disable)
	479	cell->disable(dev);
	480
	481	return ret;
	482	}
	483
	484	static int tmio_mmc_resume(struct platform_device *dev)
	485	{
	486	struct mfd_cell cell = (struct mfd_cell )dev->dev.platform_data;
	487	struct mmc_host *mmc = platform_get_drvdata(dev);
	488	struct tmio_mmc_host *host = mmc_priv(mmc);
4a48998f IM	489	int ret = 0;
4a48998f IM	490
4a48998f IM	491	/* Tell the MFD core we are ready to be enabled */
	492	if (cell->enable) {
	493	ret = cell->enable(dev);
	494	if (ret)
	495	goto out;
	496	}
	497
544f277b PZ	498	/* Enable the MMC/SD Control registers */
	499	sd_config_write16(host, CNF_CMD, SDCREN);
	500	sd_config_write32(host, CNF_CTL_BASE,
	501	(dev->resource[0].start >> host->bus_shift) & 0xfffe);
	502
4a48998f IM	503	mmc_resume_host(mmc);
	504
	505	out:
	506	return ret;
	507	}
	508	#else
	509	#define tmio_mmc_suspend NULL
	510	#define tmio_mmc_resume NULL
	511	#endif
	512
	513	static int __devinit tmio_mmc_probe(struct platform_device *dev)
	514	{
	515	struct mfd_cell cell = (struct mfd_cell )dev->dev.platform_data;
f0e46cc4	516	struct tmio_mmc_data *pdata;
4a48998f IM	517	struct resource res_ctl, res_cnf;
	518	struct tmio_mmc_host *host;
	519	struct mmc_host *mmc;
d6c9b5ed	520	int ret = -EINVAL;
4a48998f IM	521
	522	if (dev->num_resources != 3)
	523	goto out;
	524
	525	res_ctl = platform_get_resource(dev, IORESOURCE_MEM, 0);
	526	res_cnf = platform_get_resource(dev, IORESOURCE_MEM, 1);
d6c9b5ed	527	if (!res_ctl \|\| !res_cnf)
4a48998f	528	goto out;
4a48998f	529
f0e46cc4	530	pdata = cell->driver_data;
d6c9b5ed	531	if (!pdata \|\| !pdata->hclk)
f0e46cc4	532	goto out;
d6c9b5ed PZ	533
d6c9b5ed PZ	534	ret = -ENOMEM;
f0e46cc4	535
4a48998f IM	536	mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &dev->dev);
	537	if (!mmc)
	538	goto out;
	539
	540	host = mmc_priv(mmc);
	541	host->mmc = mmc;
	542	platform_set_drvdata(dev, mmc);
	543
5e74672c PZ	544	/* SD control register space size is 0x200, 0x400 for bus_shift=1 */
	545	host->bus_shift = resource_size(res_ctl) >> 10;
	546
bc6772a0	547	host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
4a48998f IM	548	if (!host->ctl)
	549	goto host_free;
	550
bc6772a0	551	host->cnf = ioremap(res_cnf->start, resource_size(res_cnf));
4a48998f IM	552	if (!host->cnf)
	553	goto unmap_ctl;
	554
	555	mmc->ops = &tmio_mmc_ops;
	556	mmc->caps = MMC_CAP_4_BIT_DATA;
f0e46cc4 PZ	557	mmc->f_max = pdata->hclk;
f0e46cc4 PZ	558	mmc->f_min = mmc->f_max / 512;
4a48998f IM	559	mmc->ocr_avail = MMC_VDD_32_33 \| MMC_VDD_33_34;
4a48998f IM	560
4a48998f IM	561	/* Tell the MFD core we are ready to be enabled */
	562	if (cell->enable) {
	563	ret = cell->enable(dev);
	564	if (ret)
	565	goto unmap_cnf;
	566	}
	567
544f277b PZ	568	/* Enable the MMC/SD Control registers */
	569	sd_config_write16(host, CNF_CMD, SDCREN);
	570	sd_config_write32(host, CNF_CTL_BASE,
	571	(dev->resource[0].start >> host->bus_shift) & 0xfffe);
	572
4a48998f	573	/* Disable SD power during suspend */
5e74672c	574	sd_config_write8(host, CNF_PWR_CTL_3, 0x01);
4a48998f IM	575
4a48998f IM	576	/* The below is required but why? FIXME */
5e74672c	577	sd_config_write8(host, CNF_STOP_CLK_CTL, 0x1f);
4a48998f IM	578
4a48998f IM	579	/* Power down SD bus*/
5e74672c	580	sd_config_write8(host, CNF_PWR_CTL_2, 0x00);
4a48998f IM	581
	582	tmio_mmc_clk_stop(host);
	583	reset(host);
	584
	585	ret = platform_get_irq(dev, 0);
	586	if (ret >= 0)
	587	host->irq = ret;
	588	else
	589	goto unmap_cnf;
	590
5e74672c	591	disable_mmc_irqs(host, TMIO_MASK_ALL);
4a48998f	592
6c413cc7 PZ	593	ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED \|
6c413cc7 PZ	594	IRQF_TRIGGER_FALLING, "tmio-mmc", host);
4a48998f IM	595	if (ret)
	596	goto unmap_cnf;
	597
4a48998f IM	598	mmc_add_host(mmc);
	599
	600	printk(KERN_INFO "%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc),
	601	(unsigned long)host->ctl, host->irq);
	602
	603	/* Unmask the IRQs we want to know about */
5e74672c	604	enable_mmc_irqs(host, TMIO_MASK_IRQ);
4a48998f IM	605
	606	return 0;
	607
	608	unmap_cnf:
	609	iounmap(host->cnf);
	610	unmap_ctl:
	611	iounmap(host->ctl);
	612	host_free:
	613	mmc_free_host(mmc);
	614	out:
	615	return ret;
	616	}
	617
	618	static int __devexit tmio_mmc_remove(struct platform_device *dev)
	619	{
	620	struct mmc_host *mmc = platform_get_drvdata(dev);
	621
	622	platform_set_drvdata(dev, NULL);
	623
	624	if (mmc) {
	625	struct tmio_mmc_host *host = mmc_priv(mmc);
	626	mmc_remove_host(mmc);
4a48998f IM	627	free_irq(host->irq, host);
	628	iounmap(host->ctl);
	629	iounmap(host->cnf);
bedcc45c	630	mmc_free_host(mmc);
4a48998f IM	631	}
	632
	633	return 0;
	634	}
	635
	636	/* ------------------- device registration ----------------------- */
	637
	638	static struct platform_driver tmio_mmc_driver = {
	639	.driver = {
	640	.name = "tmio-mmc",
	641	.owner = THIS_MODULE,
	642	},
	643	.probe = tmio_mmc_probe,
	644	.remove = __devexit_p(tmio_mmc_remove),
	645	.suspend = tmio_mmc_suspend,
	646	.resume = tmio_mmc_resume,
	647	};
	648
	649
	650	static int __init tmio_mmc_init(void)
	651	{
	652	return platform_driver_register(&tmio_mmc_driver);
	653	}
	654
	655	static void __exit tmio_mmc_exit(void)
	656	{
	657	platform_driver_unregister(&tmio_mmc_driver);
	658	}
	659
	660	module_init(tmio_mmc_init);
	661	module_exit(tmio_mmc_exit);
	662
	663	MODULE_DESCRIPTION("Toshiba TMIO SD/MMC driver");
	664	MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
	665	MODULE_LICENSE("GPL v2");
	666	MODULE_ALIAS("platform:tmio-mmc");