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Merge tag 'hwlock-v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc...
[linux-2.6-block.git] / drivers / mmc / host / tifm_sd.c
CommitLineData
d2912cb1 1// SPDX-License-Identifier: GPL-2.0-only
4020f2d7
AD		 2/*
3 * tifm_sd.c - TI FlashMedia driver
4 *
5 * Copyright (C) 2006 Alex Dubov <oakad@yahoo.com>
6 *
91f8d011 7 * Special thanks to Brad Campbell for extensive testing of this driver.
4020f2d7
AD		 8 */
9
10
11#include <linux/tifm.h>
4020f2d7
AD		 12#include <linux/mmc/host.h>
13#include <linux/highmem.h>
13cdf48e 14#include <linux/scatterlist.h>
88b47679 15#include <linux/module.h>
2099c99e 16#include <asm/io.h>
4020f2d7
AD		 17
18#define DRIVER_NAME "tifm_sd"
4552f0cb 19#define DRIVER_VERSION "0.8"
4020f2d7 20
90ab5ee9
RR		 21static bool no_dma = 0;
22static bool fixed_timeout = 0;
4020f2d7
AD		 23module_param(no_dma, bool, 0644);
24module_param(fixed_timeout, bool, 0644);
25
26/* Constants here are mostly from OMAP5912 datasheet */
27#define TIFM_MMCSD_RESET 0x0002
28#define TIFM_MMCSD_CLKMASK 0x03ff
29#define TIFM_MMCSD_POWER 0x0800
30#define TIFM_MMCSD_4BBUS 0x8000
31#define TIFM_MMCSD_RXDE 0x8000 /* rx dma enable */
32#define TIFM_MMCSD_TXDE 0x0080 /* tx dma enable */
33#define TIFM_MMCSD_BUFINT 0x0c00 /* set bits: AE, AF */
34#define TIFM_MMCSD_DPE 0x0020 /* data timeout counted in kilocycles */
35#define TIFM_MMCSD_INAB 0x0080 /* abort / initialize command */
36#define TIFM_MMCSD_READ 0x8000
37
12c83452 38#define TIFM_MMCSD_ERRMASK 0x01e0 /* set bits: CCRC, CTO, DCRC, DTO */
4020f2d7 39#define TIFM_MMCSD_EOC 0x0001 /* end of command phase */
91f8d011 40#define TIFM_MMCSD_CD 0x0002 /* card detect */
4020f2d7
AD		 41#define TIFM_MMCSD_CB 0x0004 /* card enter busy state */
42#define TIFM_MMCSD_BRS 0x0008 /* block received/sent */
43#define TIFM_MMCSD_EOFB 0x0010 /* card exit busy state */
44#define TIFM_MMCSD_DTO 0x0020 /* data time-out */
45#define TIFM_MMCSD_DCRC 0x0040 /* data crc error */
46#define TIFM_MMCSD_CTO 0x0080 /* command time-out */
47#define TIFM_MMCSD_CCRC 0x0100 /* command crc error */
48#define TIFM_MMCSD_AF 0x0400 /* fifo almost full */
49#define TIFM_MMCSD_AE 0x0800 /* fifo almost empty */
91f8d011
AD		 50#define TIFM_MMCSD_OCRB 0x1000 /* OCR busy */
51#define TIFM_MMCSD_CIRQ 0x2000 /* card irq (cmd40/sdio) */
4020f2d7
AD		 52#define TIFM_MMCSD_CERR 0x4000 /* card status error */
53
0007d483
AD		 54#define TIFM_MMCSD_ODTO 0x0040 /* open drain / extended timeout */
55#define TIFM_MMCSD_CARD_RO 0x0200 /* card is read-only */
56
4020f2d7
AD		 57#define TIFM_MMCSD_FIFO_SIZE 0x0020
58
59#define TIFM_MMCSD_RSP_R0 0x0000
60#define TIFM_MMCSD_RSP_R1 0x0100
61#define TIFM_MMCSD_RSP_R2 0x0200
62#define TIFM_MMCSD_RSP_R3 0x0300
63#define TIFM_MMCSD_RSP_R4 0x0400
64#define TIFM_MMCSD_RSP_R5 0x0500
65#define TIFM_MMCSD_RSP_R6 0x0600
66
67#define TIFM_MMCSD_RSP_BUSY 0x0800
68
69#define TIFM_MMCSD_CMD_BC 0x0000
70#define TIFM_MMCSD_CMD_BCR 0x1000
71#define TIFM_MMCSD_CMD_AC 0x2000
72#define TIFM_MMCSD_CMD_ADTC 0x3000
73
13cdf48e
AD		 74#define TIFM_MMCSD_MAX_BLOCK_SIZE 0x0800UL
75
0b05c977
UH		 76#define TIFM_MMCSD_REQ_TIMEOUT_MS 1000
77
4020f2d7 78enum {
72dc9d96
AD		 79 CMD_READY = 0x0001,
80 FIFO_READY = 0x0002,
81 BRS_READY = 0x0004,
82 SCMD_ACTIVE = 0x0008,
83 SCMD_READY = 0x0010,
84 CARD_BUSY = 0x0020,
85 DATA_CARRY = 0x0040
0007d483 86};
4020f2d7
AD		 87
88struct tifm_sd {
91f8d011 89 struct tifm_dev *dev;
4020f2d7 90
91f8d011
AD		 91 unsigned short eject:1,
92 open_drain:1,
93 no_dma:1;
94 unsigned short cmd_flags;
72dc9d96 95
91f8d011
AD		 96 unsigned int clk_freq;
97 unsigned int clk_div;
98 unsigned long timeout_jiffies;
4020f2d7 99
8e02f858 100 struct tasklet_struct finish_tasklet;
0803dd0c 101 struct timer_list timer;
4020f2d7 102 struct mmc_request *req;
4020f2d7 103
13cdf48e
AD		 104 int sg_len;
105 int sg_pos;
106 unsigned int block_pos;
107 struct scatterlist bounce_buf;
108 unsigned char bounce_buf_data[TIFM_MMCSD_MAX_BLOCK_SIZE];
4020f2d7
AD		 109};
110
13cdf48e
AD		 111/* for some reason, host won't respond correctly to readw/writew */
112static void tifm_sd_read_fifo(struct tifm_sd *host, struct page *pg,
113 unsigned int off, unsigned int cnt)
255ef22e 114{
13cdf48e
AD		 115 struct tifm_dev *sock = host->dev;
116 unsigned char *buf;
117 unsigned int pos = 0, val;
118
4526cdaf 119 buf = kmap_local_page(pg) + off;
13cdf48e
AD		 120 if (host->cmd_flags & DATA_CARRY) {
121 buf[pos++] = host->bounce_buf_data[0];
122 host->cmd_flags &= ~DATA_CARRY;
123 }
124
125 while (pos < cnt) {
126 val = readl(sock->addr + SOCK_MMCSD_DATA);
127 buf[pos++] = val & 0xff;
128 if (pos == cnt) {
129 host->bounce_buf_data[0] = (val >> 8) & 0xff;
130 host->cmd_flags |= DATA_CARRY;
131 break;
132 }
133 buf[pos++] = (val >> 8) & 0xff;
134 }
4526cdaf 135 kunmap_local(buf - off);
255ef22e
AD		 136}
137
13cdf48e
AD		 138static void tifm_sd_write_fifo(struct tifm_sd *host, struct page *pg,
139 unsigned int off, unsigned int cnt)
4020f2d7 140{
13cdf48e
AD		 141 struct tifm_dev *sock = host->dev;
142 unsigned char *buf;
143 unsigned int pos = 0, val;
144
4526cdaf 145 buf = kmap_local_page(pg) + off;
13cdf48e
AD		 146 if (host->cmd_flags & DATA_CARRY) {
147 val = host->bounce_buf_data[0] | ((buf[pos++] << 8) & 0xff00);
148 writel(val, sock->addr + SOCK_MMCSD_DATA);
149 host->cmd_flags &= ~DATA_CARRY;
150 }
151
152 while (pos < cnt) {
153 val = buf[pos++];
154 if (pos == cnt) {
155 host->bounce_buf_data[0] = val & 0xff;
156 host->cmd_flags |= DATA_CARRY;
157 break;
4020f2d7 158 }
13cdf48e
AD		 159 val |= (buf[pos++] << 8) & 0xff00;
160 writel(val, sock->addr + SOCK_MMCSD_DATA);
161 }
4526cdaf 162 kunmap_local(buf - off);
13cdf48e
AD		 163}
164
165static void tifm_sd_transfer_data(struct tifm_sd *host)
166{
167 struct mmc_data *r_data = host->req->cmd->data;
168 struct scatterlist *sg = r_data->sg;
169 unsigned int off, cnt, t_size = TIFM_MMCSD_FIFO_SIZE * 2;
170 unsigned int p_off, p_cnt;
171 struct page *pg;
172
173 if (host->sg_pos == host->sg_len)
174 return;
175 while (t_size) {
176 cnt = sg[host->sg_pos].length - host->block_pos;
177 if (!cnt) {
178 host->block_pos = 0;
179 host->sg_pos++;
180 if (host->sg_pos == host->sg_len) {
181 if ((r_data->flags & MMC_DATA_WRITE)
ce636452 182 && (host->cmd_flags & DATA_CARRY))
13cdf48e
AD		 183 writel(host->bounce_buf_data[0],
184 host->dev->addr
185 + SOCK_MMCSD_DATA);
186
187 return;
4020f2d7 188 }
13cdf48e 189 cnt = sg[host->sg_pos].length;
4020f2d7 190 }
13cdf48e
AD		 191 off = sg[host->sg_pos].offset + host->block_pos;
192
45711f1a 193 pg = nth_page(sg_page(&sg[host->sg_pos]), off >> PAGE_SHIFT);
13cdf48e
AD		 194 p_off = offset_in_page(off);
195 p_cnt = PAGE_SIZE - p_off;
196 p_cnt = min(p_cnt, cnt);
197 p_cnt = min(p_cnt, t_size);
198
199 if (r_data->flags & MMC_DATA_READ)
200 tifm_sd_read_fifo(host, pg, p_off, p_cnt);
201 else if (r_data->flags & MMC_DATA_WRITE)
202 tifm_sd_write_fifo(host, pg, p_off, p_cnt);
203
204 t_size -= p_cnt;
205 host->block_pos += p_cnt;
4020f2d7 206 }
13cdf48e
AD		 207}
208
209static void tifm_sd_copy_page(struct page *dst, unsigned int dst_off,
210 struct page *src, unsigned int src_off,
211 unsigned int count)
212{
4526cdaf
AH		 213 unsigned char *src_buf = kmap_local_page(src) + src_off;
214 unsigned char *dst_buf = kmap_local_page(dst) + dst_off;
13cdf48e
AD		 215
216 memcpy(dst_buf, src_buf, count);
217
4526cdaf
AH		 218 kunmap_local(dst_buf - dst_off);
219 kunmap_local(src_buf - src_off);
13cdf48e
AD		 220}
221
222static void tifm_sd_bounce_block(struct tifm_sd *host, struct mmc_data *r_data)
223{
224 struct scatterlist *sg = r_data->sg;
225 unsigned int t_size = r_data->blksz;
226 unsigned int off, cnt;
227 unsigned int p_off, p_cnt;
228 struct page *pg;
229
230 dev_dbg(&host->dev->dev, "bouncing block\n");
231 while (t_size) {
232 cnt = sg[host->sg_pos].length - host->block_pos;
233 if (!cnt) {
234 host->block_pos = 0;
235 host->sg_pos++;
236 if (host->sg_pos == host->sg_len)
237 return;
238 cnt = sg[host->sg_pos].length;
239 }
240 off = sg[host->sg_pos].offset + host->block_pos;
241
45711f1a 242 pg = nth_page(sg_page(&sg[host->sg_pos]), off >> PAGE_SHIFT);
13cdf48e
AD		 243 p_off = offset_in_page(off);
244 p_cnt = PAGE_SIZE - p_off;
245 p_cnt = min(p_cnt, cnt);
246 p_cnt = min(p_cnt, t_size);
247
248 if (r_data->flags & MMC_DATA_WRITE)
45711f1a 249 tifm_sd_copy_page(sg_page(&host->bounce_buf),
13cdf48e
AD		 250 r_data->blksz - t_size,
251 pg, p_off, p_cnt);
252 else if (r_data->flags & MMC_DATA_READ)
45711f1a 253 tifm_sd_copy_page(pg, p_off, sg_page(&host->bounce_buf),
13cdf48e
AD		 254 r_data->blksz - t_size, p_cnt);
255
256 t_size -= p_cnt;
257 host->block_pos += p_cnt;
258 }
259}
260
d97956f8 261static int tifm_sd_set_dma_data(struct tifm_sd *host, struct mmc_data *r_data)
13cdf48e
AD		 262{
263 struct tifm_dev *sock = host->dev;
264 unsigned int t_size = TIFM_DMA_TSIZE * r_data->blksz;
265 unsigned int dma_len, dma_blk_cnt, dma_off;
266 struct scatterlist *sg = NULL;
13cdf48e
AD		 267
268 if (host->sg_pos == host->sg_len)
269 return 1;
270
271 if (host->cmd_flags & DATA_CARRY) {
272 host->cmd_flags &= ~DATA_CARRY;
13cdf48e 273 tifm_sd_bounce_block(host, r_data);
13cdf48e
AD		 274 if (host->sg_pos == host->sg_len)
275 return 1;
276 }
277
278 dma_len = sg_dma_len(&r_data->sg[host->sg_pos]) - host->block_pos;
279 if (!dma_len) {
280 host->block_pos = 0;
281 host->sg_pos++;
282 if (host->sg_pos == host->sg_len)
283 return 1;
284 dma_len = sg_dma_len(&r_data->sg[host->sg_pos]);
285 }
286
287 if (dma_len < t_size) {
288 dma_blk_cnt = dma_len / r_data->blksz;
289 dma_off = host->block_pos;
290 host->block_pos += dma_blk_cnt * r_data->blksz;
291 } else {
292 dma_blk_cnt = TIFM_DMA_TSIZE;
293 dma_off = host->block_pos;
294 host->block_pos += t_size;
295 }
296
297 if (dma_blk_cnt)
298 sg = &r_data->sg[host->sg_pos];
299 else if (dma_len) {
36bbdc30 300 if (r_data->flags & MMC_DATA_WRITE)
13cdf48e 301 tifm_sd_bounce_block(host, r_data);
36bbdc30 302 else
13cdf48e
AD		 303 host->cmd_flags |= DATA_CARRY;
304
305 sg = &host->bounce_buf;
306 dma_off = 0;
307 dma_blk_cnt = 1;
308 } else
309 return 1;
310
311 dev_dbg(&sock->dev, "setting dma for %d blocks\n", dma_blk_cnt);
312 writel(sg_dma_address(sg) + dma_off, sock->addr + SOCK_DMA_ADDRESS);
313 if (r_data->flags & MMC_DATA_WRITE)
314 writel((dma_blk_cnt << 8) | TIFM_DMA_TX | TIFM_DMA_EN,
315 sock->addr + SOCK_DMA_CONTROL);
316 else
317 writel((dma_blk_cnt << 8) | TIFM_DMA_EN,
318 sock->addr + SOCK_DMA_CONTROL);
319
4020f2d7
AD		 320 return 0;
321}
322
323static unsigned int tifm_sd_op_flags(struct mmc_command *cmd)
324{
325 unsigned int rc = 0;
326
327 switch (mmc_resp_type(cmd)) {
328 case MMC_RSP_NONE:
329 rc |= TIFM_MMCSD_RSP_R0;
330 break;
331 case MMC_RSP_R1B:
a5c83eb2 332 rc |= TIFM_MMCSD_RSP_BUSY;
df561f66 333 fallthrough;
4020f2d7
AD		 334 case MMC_RSP_R1:
335 rc |= TIFM_MMCSD_RSP_R1;
336 break;
337 case MMC_RSP_R2:
338 rc |= TIFM_MMCSD_RSP_R2;
339 break;
340 case MMC_RSP_R3:
341 rc |= TIFM_MMCSD_RSP_R3;
342 break;
4020f2d7
AD		 343 default:
344 BUG();
345 }
346
347 switch (mmc_cmd_type(cmd)) {
348 case MMC_CMD_BC:
349 rc |= TIFM_MMCSD_CMD_BC;
350 break;
351 case MMC_CMD_BCR:
352 rc |= TIFM_MMCSD_CMD_BCR;
353 break;
354 case MMC_CMD_AC:
355 rc |= TIFM_MMCSD_CMD_AC;
356 break;
357 case MMC_CMD_ADTC:
358 rc |= TIFM_MMCSD_CMD_ADTC;
359 break;
360 default:
361 BUG();
362 }
363 return rc;
364}
365
366static void tifm_sd_exec(struct tifm_sd *host, struct mmc_command *cmd)
367{
368 struct tifm_dev *sock = host->dev;
0007d483
AD		 369 unsigned int cmd_mask = tifm_sd_op_flags(cmd);
370
371 if (host->open_drain)
372 cmd_mask |= TIFM_MMCSD_ODTO;
4020f2d7
AD		 373
374 if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
375 cmd_mask |= TIFM_MMCSD_READ;
376
377 dev_dbg(&sock->dev, "executing opcode 0x%x, arg: 0x%x, mask: 0x%x\n",
2e8ce5e7 378 cmd->opcode, cmd->arg, cmd_mask);
4020f2d7
AD		 379
380 writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH);
381 writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW);
382 writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND);
383}
384
385static void tifm_sd_fetch_resp(struct mmc_command *cmd, struct tifm_dev *sock)
386{
387 cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16)
388 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18);
389 cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16)
390 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10);
391 cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16)
392 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08);
393 cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16)
394 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00);
395}
396
72dc9d96 397static void tifm_sd_check_status(struct tifm_sd *host)
4020f2d7 398{
72dc9d96 399 struct tifm_dev *sock = host->dev;
4020f2d7
AD		 400 struct mmc_command *cmd = host->req->cmd;
401
17b0429d 402 if (cmd->error)
72dc9d96
AD		 403 goto finish_request;
404
405 if (!(host->cmd_flags & CMD_READY))
4020f2d7 406 return;
72dc9d96
AD		 407
408 if (cmd->data) {
17b0429d 409 if (cmd->data->error) {
72dc9d96
AD		 410 if ((host->cmd_flags & SCMD_ACTIVE)
411 && !(host->cmd_flags & SCMD_READY))
412 return;
413
414 goto finish_request;
4020f2d7 415 }
72dc9d96
AD		 416
417 if (!(host->cmd_flags & BRS_READY))
418 return;
419
420 if (!(host->no_dma || (host->cmd_flags & FIFO_READY)))
421 return;
422
423 if (cmd->data->flags & MMC_DATA_WRITE) {
424 if (host->req->stop) {
425 if (!(host->cmd_flags & SCMD_ACTIVE)) {
426 host->cmd_flags |= SCMD_ACTIVE;
427 writel(TIFM_MMCSD_EOFB
428 | readl(sock->addr
429 + SOCK_MMCSD_INT_ENABLE),
430 sock->addr
431 + SOCK_MMCSD_INT_ENABLE);
1289335a 432 tifm_sd_exec(host, host->req->stop);
72dc9d96 433 return;
1289335a 434 } else {
72dc9d96
AD		 435 if (!(host->cmd_flags & SCMD_READY)
436 || (host->cmd_flags & CARD_BUSY))
437 return;
438 writel((~TIFM_MMCSD_EOFB)
439 & readl(sock->addr
440 + SOCK_MMCSD_INT_ENABLE),
441 sock->addr
442 + SOCK_MMCSD_INT_ENABLE);
1289335a
AD		 443 }
444 } else {
72dc9d96
AD		 445 if (host->cmd_flags & CARD_BUSY)
446 return;
447 writel((~TIFM_MMCSD_EOFB)
448 & readl(sock->addr
449 + SOCK_MMCSD_INT_ENABLE),
450 sock->addr + SOCK_MMCSD_INT_ENABLE);
1289335a 451 }
72dc9d96 452 } else {
1289335a 453 if (host->req->stop) {
72dc9d96
AD		 454 if (!(host->cmd_flags & SCMD_ACTIVE)) {
455 host->cmd_flags |= SCMD_ACTIVE;
456 tifm_sd_exec(host, host->req->stop);
457 return;
458 } else {
459 if (!(host->cmd_flags & SCMD_READY))
460 return;
461 }
1289335a 462 }
4020f2d7 463 }
4020f2d7 464 }
72dc9d96
AD		 465finish_request:
466 tasklet_schedule(&host->finish_tasklet);
4020f2d7
AD		 467}
468
469/* Called from interrupt handler */
4552f0cb 470static void tifm_sd_data_event(struct tifm_dev *sock)
4020f2d7
AD		 471{
472 struct tifm_sd *host;
4552f0cb 473 unsigned int fifo_status = 0;
72dc9d96 474 struct mmc_data *r_data = NULL;
4020f2d7
AD		 475
476 spin_lock(&sock->lock);
477 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
4552f0cb 478 fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
72dc9d96
AD		 479 dev_dbg(&sock->dev, "data event: fifo_status %x, flags %x\n",
480 fifo_status, host->cmd_flags);
4552f0cb 481
72dc9d96
AD		 482 if (host->req) {
483 r_data = host->req->cmd->data;
4552f0cb 484
72dc9d96 485 if (r_data && (fifo_status & TIFM_FIFO_READY)) {
13cdf48e
AD		 486 if (tifm_sd_set_dma_data(host, r_data)) {
487 host->cmd_flags |= FIFO_READY;
488 tifm_sd_check_status(host);
489 }
72dc9d96
AD		 490 }
491 }
4552f0cb 492
72dc9d96 493 writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
4552f0cb 494 spin_unlock(&sock->lock);
4552f0cb
AD		 495}
496
497/* Called from interrupt handler */
498static void tifm_sd_card_event(struct tifm_dev *sock)
499{
500 struct tifm_sd *host;
501 unsigned int host_status = 0;
17b0429d 502 int cmd_error = 0;
72dc9d96 503 struct mmc_command *cmd = NULL;
4552f0cb
AD		 504
505 spin_lock(&sock->lock);
506 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
72dc9d96
AD		 507 host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
508 dev_dbg(&sock->dev, "host event: host_status %x, flags %x\n",
509 host_status, host->cmd_flags);
4020f2d7 510
72dc9d96
AD		 511 if (host->req) {
512 cmd = host->req->cmd;
4020f2d7
AD		 513
514 if (host_status & TIFM_MMCSD_ERRMASK) {
72dc9d96
AD		 515 writel(host_status & TIFM_MMCSD_ERRMASK,
516 sock->addr + SOCK_MMCSD_STATUS);
517 if (host_status & TIFM_MMCSD_CTO)
17b0429d 518 cmd_error = -ETIMEDOUT;
72dc9d96 519 else if (host_status & TIFM_MMCSD_CCRC)
17b0429d 520 cmd_error = -EILSEQ;
72dc9d96
AD		 521
522 if (cmd->data) {
523 if (host_status & TIFM_MMCSD_DTO)
17b0429d 524 cmd->data->error = -ETIMEDOUT;
72dc9d96 525 else if (host_status & TIFM_MMCSD_DCRC)
17b0429d 526 cmd->data->error = -EILSEQ;
72dc9d96 527 }
4020f2d7
AD		 528
529 writel(TIFM_FIFO_INT_SETALL,
530 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
531 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
532
533 if (host->req->stop) {
72dc9d96
AD		 534 if (host->cmd_flags & SCMD_ACTIVE) {
535 host->req->stop->error = cmd_error;
536 host->cmd_flags |= SCMD_READY;
537 } else {
538 cmd->error = cmd_error;
539 host->cmd_flags |= SCMD_ACTIVE;
4020f2d7 540 tifm_sd_exec(host, host->req->stop);
4020f2d7 541 goto done;
4020f2d7 542 }
72dc9d96
AD		 543 } else
544 cmd->error = cmd_error;
545 } else {
546 if (host_status & (TIFM_MMCSD_EOC | TIFM_MMCSD_CERR)) {
547 if (!(host->cmd_flags & CMD_READY)) {
548 host->cmd_flags |= CMD_READY;
549 tifm_sd_fetch_resp(cmd, sock);
550 } else if (host->cmd_flags & SCMD_ACTIVE) {
551 host->cmd_flags |= SCMD_READY;
552 tifm_sd_fetch_resp(host->req->stop,
553 sock);
554 }
4020f2d7 555 }
72dc9d96
AD		 556 if (host_status & TIFM_MMCSD_BRS)
557 host->cmd_flags |= BRS_READY;
4020f2d7
AD		 558 }
559
72dc9d96
AD		 560 if (host->no_dma && cmd->data) {
561 if (host_status & TIFM_MMCSD_AE)
562 writel(host_status & TIFM_MMCSD_AE,
563 sock->addr + SOCK_MMCSD_STATUS);
564
565 if (host_status & (TIFM_MMCSD_AE | TIFM_MMCSD_AF
566 | TIFM_MMCSD_BRS)) {
13cdf48e 567 tifm_sd_transfer_data(host);
72dc9d96
AD		 568 host_status &= ~TIFM_MMCSD_AE;
569 }
4020f2d7 570 }
4020f2d7 571
72dc9d96
AD		 572 if (host_status & TIFM_MMCSD_EOFB)
573 host->cmd_flags &= ~CARD_BUSY;
574 else if (host_status & TIFM_MMCSD_CB)
575 host->cmd_flags |= CARD_BUSY;
576
577 tifm_sd_check_status(host);
578 }
4020f2d7 579done:
72dc9d96 580 writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
4020f2d7 581 spin_unlock(&sock->lock);
4020f2d7
AD		 582}
583
4020f2d7 584static void tifm_sd_set_data_timeout(struct tifm_sd *host,
2e8ce5e7 585 struct mmc_data *data)
4020f2d7
AD		 586{
587 struct tifm_dev *sock = host->dev;
588 unsigned int data_timeout = data->timeout_clks;
589
590 if (fixed_timeout)
591 return;
592
593 data_timeout += data->timeout_ns /
83d420ba 594 ((1000000000UL / host->clk_freq) * host->clk_div);
4020f2d7
AD		 595
596 if (data_timeout < 0xffff) {
4020f2d7 597 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
83d420ba
AD		 598 writel((~TIFM_MMCSD_DPE)
599 & readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
600 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
4020f2d7 601 } else {
4020f2d7 602 data_timeout = (data_timeout >> 10) + 1;
2e8ce5e7 603 if (data_timeout > 0xffff)
4020f2d7
AD		 604 data_timeout = 0; /* set to unlimited */
605 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
83d420ba
AD		 606 writel(TIFM_MMCSD_DPE
607 | readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
608 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
4020f2d7
AD		 609 }
610}
611
612static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq)
613{
614 struct tifm_sd *host = mmc_priv(mmc);
615 struct tifm_dev *sock = host->dev;
616 unsigned long flags;
4020f2d7
AD		 617 struct mmc_data *r_data = mrq->cmd->data;
618
619 spin_lock_irqsave(&sock->lock, flags);
0007d483 620 if (host->eject) {
255d01af 621 mrq->cmd->error = -ENOMEDIUM;
4020f2d7
AD		 622 goto err_out;
623 }
624
625 if (host->req) {
a3c76eb9 626 pr_err("%s : unfinished request detected\n",
d1b26863 627 dev_name(&sock->dev));
255d01af
PO		 628 mrq->cmd->error = -ETIMEDOUT;
629 goto err_out;
630 }
631
13cdf48e
AD		 632 host->cmd_flags = 0;
633 host->block_pos = 0;
634 host->sg_pos = 0;
635
b37a0506
AD		 636 if (mrq->data && !is_power_of_2(mrq->data->blksz))
637 host->no_dma = 1;
638 else
639 host->no_dma = no_dma ? 1 : 0;
640
4020f2d7
AD		 641 if (r_data) {
642 tifm_sd_set_data_timeout(host, r_data);
643
13cdf48e
AD		 644 if ((r_data->flags & MMC_DATA_WRITE) && !mrq->stop)
645 writel(TIFM_MMCSD_EOFB
646 | readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
647 sock->addr + SOCK_MMCSD_INT_ENABLE);
dfef26d9 648
13cdf48e 649 if (host->no_dma) {
dfef26d9
AD		 650 writel(TIFM_MMCSD_BUFINT
651 | readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
652 sock->addr + SOCK_MMCSD_INT_ENABLE);
653 writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8)
654 | (TIFM_MMCSD_FIFO_SIZE - 1),
655 sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
656
13cdf48e 657 host->sg_len = r_data->sg_len;
dfef26d9 658 } else {
13cdf48e
AD		 659 sg_init_one(&host->bounce_buf, host->bounce_buf_data,
660 r_data->blksz);
661
662 if(1 != tifm_map_sg(sock, &host->bounce_buf, 1,
663 r_data->flags & MMC_DATA_WRITE
b048457c
CJ		 664 ? DMA_TO_DEVICE
665 : DMA_FROM_DEVICE)) {
a3c76eb9 666 pr_err("%s : scatterlist map failed\n",
d1b26863 667 dev_name(&sock->dev));
b37a0506 668 mrq->cmd->error = -ENOMEM;
13cdf48e
AD		 669 goto err_out;
670 }
671 host->sg_len = tifm_map_sg(sock, r_data->sg,
672 r_data->sg_len,
673 r_data->flags
674 & MMC_DATA_WRITE
b048457c
CJ		 675 ? DMA_TO_DEVICE
676 : DMA_FROM_DEVICE);
13cdf48e 677 if (host->sg_len < 1) {
a3c76eb9 678 pr_err("%s : scatterlist map failed\n",
d1b26863 679 dev_name(&sock->dev));
13cdf48e
AD		 680 tifm_unmap_sg(sock, &host->bounce_buf, 1,
681 r_data->flags & MMC_DATA_WRITE
b048457c
CJ		 682 ? DMA_TO_DEVICE
683 : DMA_FROM_DEVICE);
b37a0506 684 mrq->cmd->error = -ENOMEM;
dfef26d9
AD		 685 goto err_out;
686 }
4020f2d7 687
13cdf48e
AD		 688 writel(TIFM_FIFO_INT_SETALL,
689 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
690 writel(ilog2(r_data->blksz) - 2,
691 sock->addr + SOCK_FIFO_PAGE_SIZE);
692 writel(TIFM_FIFO_ENABLE,
693 sock->addr + SOCK_FIFO_CONTROL);
694 writel(TIFM_FIFO_INTMASK,
695 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
696
697 if (r_data->flags & MMC_DATA_WRITE)
698 writel(TIFM_MMCSD_TXDE,
699 sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
700 else
701 writel(TIFM_MMCSD_RXDE,
702 sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
703
704 tifm_sd_set_dma_data(host, r_data);
dfef26d9 705 }
13cdf48e
AD		 706
707 writel(r_data->blocks - 1,
708 sock->addr + SOCK_MMCSD_NUM_BLOCKS);
709 writel(r_data->blksz - 1,
710 sock->addr + SOCK_MMCSD_BLOCK_LEN);
4020f2d7
AD		 711 }
712
713 host->req = mrq;
0803dd0c 714 mod_timer(&host->timer, jiffies + host->timeout_jiffies);
4020f2d7 715 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
2e8ce5e7 716 sock->addr + SOCK_CONTROL);
4020f2d7
AD		 717 tifm_sd_exec(host, mrq->cmd);
718 spin_unlock_irqrestore(&sock->lock, flags);
719 return;
720
721err_out:
255d01af 722 spin_unlock_irqrestore(&sock->lock, flags);
4020f2d7
AD		 723 mmc_request_done(mmc, mrq);
724}
725
c36dd042 726static void tifm_sd_end_cmd(struct tasklet_struct *t)
4020f2d7 727{
c36dd042 728 struct tifm_sd *host = from_tasklet(host, t, finish_tasklet);
4020f2d7
AD		 729 struct tifm_dev *sock = host->dev;
730 struct mmc_host *mmc = tifm_get_drvdata(sock);
731 struct mmc_request *mrq;
e069d79d 732 struct mmc_data *r_data = NULL;
4020f2d7
AD		 733 unsigned long flags;
734
735 spin_lock_irqsave(&sock->lock, flags);
736
0803dd0c 737 del_timer(&host->timer);
4020f2d7 738 mrq = host->req;
e069d79d 739 host->req = NULL;
4020f2d7
AD		 740
741 if (!mrq) {
a3c76eb9 742 pr_err(" %s : no request to complete?\n",
d1b26863 743 dev_name(&sock->dev));
4020f2d7
AD		 744 spin_unlock_irqrestore(&sock->lock, flags);
745 return;
746 }
747
748 r_data = mrq->cmd->data;
749 if (r_data) {
dfef26d9 750 if (host->no_dma) {
13cdf48e
AD		 751 writel((~TIFM_MMCSD_BUFINT)
752 & readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
753 sock->addr + SOCK_MMCSD_INT_ENABLE);
4020f2d7 754 } else {
13cdf48e
AD		 755 tifm_unmap_sg(sock, &host->bounce_buf, 1,
756 (r_data->flags & MMC_DATA_WRITE)
b048457c 757 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
dfef26d9
AD		 758 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
759 (r_data->flags & MMC_DATA_WRITE)
b048457c 760 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
4020f2d7 761 }
13cdf48e
AD		 762
763 r_data->bytes_xfered = r_data->blocks
764 - readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
765 r_data->bytes_xfered *= r_data->blksz;
766 r_data->bytes_xfered += r_data->blksz
767 - readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
4020f2d7
AD		 768 }
769
770 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
2e8ce5e7 771 sock->addr + SOCK_CONTROL);
4020f2d7
AD		 772
773 spin_unlock_irqrestore(&sock->lock, flags);
4020f2d7
AD		 774 mmc_request_done(mmc, mrq);
775}
776
2ee4f620 777static void tifm_sd_abort(struct timer_list *t)
4020f2d7 778{
2ee4f620 779 struct tifm_sd *host = from_timer(host, t, timer);
8e02f858 780
a3c76eb9 781 pr_err("%s : card failed to respond for a long period of time "
91f8d011 782 "(%x, %x)\n",
d1b26863 783 dev_name(&host->dev->dev), host->req->cmd->opcode, host->cmd_flags);
8e02f858 784
8e02f858 785 tifm_eject(host->dev);
4020f2d7
AD		 786}
787
788static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios)
789{
790 struct tifm_sd *host = mmc_priv(mmc);
791 struct tifm_dev *sock = host->dev;
792 unsigned int clk_div1, clk_div2;
793 unsigned long flags;
794
795 spin_lock_irqsave(&sock->lock, flags);
796
91f8d011
AD		 797 dev_dbg(&sock->dev, "ios: clock = %u, vdd = %x, bus_mode = %x, "
798 "chip_select = %x, power_mode = %x, bus_width = %x\n",
799 ios->clock, ios->vdd, ios->bus_mode, ios->chip_select,
800 ios->power_mode, ios->bus_width);
801
4020f2d7
AD		 802 if (ios->bus_width == MMC_BUS_WIDTH_4) {
803 writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG),
804 sock->addr + SOCK_MMCSD_CONFIG);
805 } else {
2e8ce5e7
AD		 806 writel((~TIFM_MMCSD_4BBUS)
807 & readl(sock->addr + SOCK_MMCSD_CONFIG),
808 sock->addr + SOCK_MMCSD_CONFIG);
4020f2d7
AD		 809 }
810
811 if (ios->clock) {
812 clk_div1 = 20000000 / ios->clock;
813 if (!clk_div1)
814 clk_div1 = 1;
815
816 clk_div2 = 24000000 / ios->clock;
817 if (!clk_div2)
818 clk_div2 = 1;
819
820 if ((20000000 / clk_div1) > ios->clock)
821 clk_div1++;
822 if ((24000000 / clk_div2) > ios->clock)
823 clk_div2++;
824 if ((20000000 / clk_div1) > (24000000 / clk_div2)) {
825 host->clk_freq = 20000000;
826 host->clk_div = clk_div1;
2e8ce5e7
AD		 827 writel((~TIFM_CTRL_FAST_CLK)
828 & readl(sock->addr + SOCK_CONTROL),
829 sock->addr + SOCK_CONTROL);
4020f2d7
AD		 830 } else {
831 host->clk_freq = 24000000;
832 host->clk_div = clk_div2;
2e8ce5e7
AD		 833 writel(TIFM_CTRL_FAST_CLK
834 | readl(sock->addr + SOCK_CONTROL),
835 sock->addr + SOCK_CONTROL);
4020f2d7
AD		 836 }
837 } else {
838 host->clk_div = 0;
839 }
840 host->clk_div &= TIFM_MMCSD_CLKMASK;
2e8ce5e7
AD		 841 writel(host->clk_div
842 | ((~TIFM_MMCSD_CLKMASK)
843 & readl(sock->addr + SOCK_MMCSD_CONFIG)),
844 sock->addr + SOCK_MMCSD_CONFIG);
4020f2d7 845
0007d483 846 host->open_drain = (ios->bus_mode == MMC_BUSMODE_OPENDRAIN);
4020f2d7
AD		 847
848 /* chip_select : maybe later */
849 //vdd
850 //power is set before probe / after remove
4020f2d7
AD		 851
852 spin_unlock_irqrestore(&sock->lock, flags);
853}
854
855static int tifm_sd_ro(struct mmc_host *mmc)
856{
0007d483 857 int rc = 0;
4020f2d7
AD		 858 struct tifm_sd *host = mmc_priv(mmc);
859 struct tifm_dev *sock = host->dev;
860 unsigned long flags;
861
862 spin_lock_irqsave(&sock->lock, flags);
0007d483
AD		 863 if (TIFM_MMCSD_CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE))
864 rc = 1;
4020f2d7
AD		 865 spin_unlock_irqrestore(&sock->lock, flags);
866 return rc;
867}
868
dfef26d9 869static const struct mmc_host_ops tifm_sd_ops = {
4020f2d7
AD		 870 .request = tifm_sd_request,
871 .set_ios = tifm_sd_ios,
872 .get_ro = tifm_sd_ro
873};
874
8e02f858 875static int tifm_sd_initialize_host(struct tifm_sd *host)
4020f2d7 876{
8e02f858
AD		 877 int rc;
878 unsigned int host_status = 0;
4020f2d7 879 struct tifm_dev *sock = host->dev;
4020f2d7 880
8e02f858 881 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
8e02f858
AD		 882 host->clk_div = 61;
883 host->clk_freq = 20000000;
884 writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL);
885 writel(host->clk_div | TIFM_MMCSD_POWER,
886 sock->addr + SOCK_MMCSD_CONFIG);
887
888 /* wait up to 0.51 sec for reset */
5897d657 889 for (rc = 32; rc <= 256; rc <<= 1) {
8e02f858
AD		 890 if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) {
891 rc = 0;
892 break;
893 }
894 msleep(rc);
895 }
896
897 if (rc) {
a3c76eb9 898 pr_err("%s : controller failed to reset\n",
d1b26863 899 dev_name(&sock->dev));
8e02f858
AD		 900 return -ENODEV;
901 }
902
903 writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
904 writel(host->clk_div | TIFM_MMCSD_POWER,
905 sock->addr + SOCK_MMCSD_CONFIG);
906 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
907
908 // command timeout fixed to 64 clocks for now
909 writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO);
910 writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND);
911
5897d657 912 for (rc = 16; rc <= 64; rc <<= 1) {
8e02f858
AD		 913 host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
914 writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
915 if (!(host_status & TIFM_MMCSD_ERRMASK)
916 && (host_status & TIFM_MMCSD_EOC)) {
917 rc = 0;
918 break;
919 }
920 msleep(rc);
921 }
922
923 if (rc) {
a3c76eb9 924 pr_err("%s : card not ready - probe failed on initialization\n",
d1b26863 925 dev_name(&sock->dev));
8e02f858
AD		 926 return -ENODEV;
927 }
928
5897d657
AD		 929 writel(TIFM_MMCSD_CERR | TIFM_MMCSD_BRS | TIFM_MMCSD_EOC
930 | TIFM_MMCSD_ERRMASK,
8e02f858 931 sock->addr + SOCK_MMCSD_INT_ENABLE);
8e02f858
AD		 932
933 return 0;
4020f2d7
AD		 934}
935
936static int tifm_sd_probe(struct tifm_dev *sock)
937{
938 struct mmc_host *mmc;
939 struct tifm_sd *host;
940 int rc = -EIO;
941
2e8ce5e7
AD		 942 if (!(TIFM_SOCK_STATE_OCCUPIED
943 & readl(sock->addr + SOCK_PRESENT_STATE))) {
6606110d
JP		 944 pr_warn("%s : card gone, unexpectedly\n",
945 dev_name(&sock->dev));
4020f2d7
AD		 946 return rc;
947 }
948
949 mmc = mmc_alloc_host(sizeof(struct tifm_sd), &sock->dev);
950 if (!mmc)
951 return -ENOMEM;
952
953 host = mmc_priv(mmc);
4020f2d7 954 tifm_set_drvdata(sock, mmc);
8e02f858 955 host->dev = sock;
0b05c977
UH		 956 host->timeout_jiffies = msecs_to_jiffies(TIFM_MMCSD_REQ_TIMEOUT_MS);
957 /*
958 * We use a fixed request timeout of 1s, hence inform the core about it.
959 * A future improvement should instead respect the cmd->busy_timeout.
960 */
961 mmc->max_busy_timeout = TIFM_MMCSD_REQ_TIMEOUT_MS;
4020f2d7 962
c36dd042 963 tasklet_setup(&host->finish_tasklet, tifm_sd_end_cmd);
2ee4f620 964 timer_setup(&host->timer, tifm_sd_abort, 0);
8e02f858 965
4020f2d7
AD		 966 mmc->ops = &tifm_sd_ops;
967 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
23af6039 968 mmc->caps = MMC_CAP_4_BIT_DATA;
4020f2d7
AD		 969 mmc->f_min = 20000000 / 60;
970 mmc->f_max = 24000000;
13cdf48e
AD		 971
972 mmc->max_blk_count = 2048;
a36274e0 973 mmc->max_segs = mmc->max_blk_count;
13cdf48e
AD		 974 mmc->max_blk_size = min(TIFM_MMCSD_MAX_BLOCK_SIZE, PAGE_SIZE);
975 mmc->max_seg_size = mmc->max_blk_count * mmc->max_blk_size;
976 mmc->max_req_size = mmc->max_seg_size;
13cdf48e 977
4552f0cb
AD		 978 sock->card_event = tifm_sd_card_event;
979 sock->data_event = tifm_sd_data_event;
8e02f858 980 rc = tifm_sd_initialize_host(host);
4020f2d7 981
8e02f858
AD		 982 if (!rc)
983 rc = mmc_add_host(mmc);
91f8d011
AD		 984 if (!rc)
985 return 0;
4020f2d7 986
8e02f858 987 mmc_free_host(mmc);
4020f2d7
AD		 988 return rc;
989}
990
991static void tifm_sd_remove(struct tifm_dev *sock)
992{
993 struct mmc_host *mmc = tifm_get_drvdata(sock);
994 struct tifm_sd *host = mmc_priv(mmc);
b039d4a1 995 unsigned long flags;
4020f2d7 996
592d372a 997 spin_lock_irqsave(&sock->lock, flags);
0007d483 998 host->eject = 1;
b039d4a1 999 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
592d372a
AD		 1000 spin_unlock_irqrestore(&sock->lock, flags);
1001
1002 tasklet_kill(&host->finish_tasklet);
1003
b039d4a1 1004 spin_lock_irqsave(&sock->lock, flags);
b039d4a1
AD		 1005 if (host->req) {
1006 writel(TIFM_FIFO_INT_SETALL,
1007 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
1008 writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
17b0429d 1009 host->req->cmd->error = -ENOMEDIUM;
592d372a 1010 if (host->req->stop)
17b0429d 1011 host->req->stop->error = -ENOMEDIUM;
b039d4a1
AD		 1012 tasklet_schedule(&host->finish_tasklet);
1013 }
1014 spin_unlock_irqrestore(&sock->lock, flags);
8e02f858 1015 mmc_remove_host(mmc);
592d372a 1016 dev_dbg(&sock->dev, "after remove\n");
4020f2d7 1017
4020f2d7
AD		 1018 mmc_free_host(mmc);
1019}
1020
dba4acca
AD		 1021#ifdef CONFIG_PM
1022
1023static int tifm_sd_suspend(struct tifm_dev *sock, pm_message_t state)
1024{
ccbd4830 1025 return 0;
dba4acca
AD		 1026}
1027
1028static int tifm_sd_resume(struct tifm_dev *sock)
1029{
1030 struct mmc_host *mmc = tifm_get_drvdata(sock);
1031 struct tifm_sd *host = mmc_priv(mmc);
5897d657 1032 int rc;
dba4acca 1033
5897d657
AD		 1034 rc = tifm_sd_initialize_host(host);
1035 dev_dbg(&sock->dev, "resume initialize %d\n", rc);
1036
1037 if (rc)
1038 host->eject = 1;
5897d657
AD		 1039
1040 return rc;
dba4acca
AD		 1041}
1042
1043#else
1044
1045#define tifm_sd_suspend NULL
1046#define tifm_sd_resume NULL
1047
1048#endif /* CONFIG_PM */
1049
e23f2b8a
AD		 1050static struct tifm_device_id tifm_sd_id_tbl[] = {
1051 { TIFM_TYPE_SD }, { }
4020f2d7
AD		 1052};
1053
1054static struct tifm_driver tifm_sd_driver = {
1055 .driver = {
1056 .name = DRIVER_NAME,
1057 .owner = THIS_MODULE
1058 },
1059 .id_table = tifm_sd_id_tbl,
1060 .probe = tifm_sd_probe,
dba4acca
AD		 1061 .remove = tifm_sd_remove,
1062 .suspend = tifm_sd_suspend,
1063 .resume = tifm_sd_resume
4020f2d7
AD		 1064};
1065
1066static int __init tifm_sd_init(void)
1067{
1068 return tifm_register_driver(&tifm_sd_driver);
1069}
1070
1071static void __exit tifm_sd_exit(void)
1072{
1073 tifm_unregister_driver(&tifm_sd_driver);
1074}
1075
1076MODULE_AUTHOR("Alex Dubov");
1077MODULE_DESCRIPTION("TI FlashMedia SD driver");
1078MODULE_LICENSE("GPL");
1079MODULE_DEVICE_TABLE(tifm, tifm_sd_id_tbl);
1080MODULE_VERSION(DRIVER_VERSION);
1081
1082module_init(tifm_sd_init);
1083module_exit(tifm_sd_exit);
Linux 6.x block layer and io_uring tree(s)