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b8c86fc5 PO |
1 | /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface |
2 | * | |
3 | * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2 of the License, or (at | |
8 | * your option) any later version. | |
9 | * | |
10 | * Thanks to the following companies for their support: | |
11 | * | |
12 | * - JMicron (hardware and technical support) | |
13 | */ | |
14 | ||
15 | #include <linux/delay.h> | |
16 | #include <linux/highmem.h> | |
17 | #include <linux/pci.h> | |
18 | #include <linux/dma-mapping.h> | |
19 | ||
20 | #include <linux/mmc/host.h> | |
21 | ||
22 | #include <asm/scatterlist.h> | |
23 | #include <asm/io.h> | |
24 | ||
25 | #include "sdhci.h" | |
26 | ||
27 | /* | |
28 | * PCI registers | |
29 | */ | |
30 | ||
31 | #define PCI_SDHCI_IFPIO 0x00 | |
32 | #define PCI_SDHCI_IFDMA 0x01 | |
33 | #define PCI_SDHCI_IFVENDOR 0x02 | |
34 | ||
35 | #define PCI_SLOT_INFO 0x40 /* 8 bits */ | |
36 | #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7) | |
37 | #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07 | |
38 | ||
39 | #define MAX_SLOTS 8 | |
40 | ||
22606405 | 41 | struct sdhci_pci_chip; |
4489428a | 42 | struct sdhci_pci_slot; |
22606405 PO |
43 | |
44 | struct sdhci_pci_fixes { | |
45 | unsigned int quirks; | |
46 | ||
47 | int (*probe)(struct sdhci_pci_chip*); | |
45211e21 | 48 | |
4489428a PO |
49 | int (*probe_slot)(struct sdhci_pci_slot*); |
50 | void (*remove_slot)(struct sdhci_pci_slot*); | |
51 | ||
52 | int (*suspend)(struct sdhci_pci_chip*, | |
53 | pm_message_t); | |
45211e21 | 54 | int (*resume)(struct sdhci_pci_chip*); |
22606405 PO |
55 | }; |
56 | ||
57 | struct sdhci_pci_slot { | |
58 | struct sdhci_pci_chip *chip; | |
59 | struct sdhci_host *host; | |
b8c86fc5 | 60 | |
22606405 PO |
61 | int pci_bar; |
62 | }; | |
63 | ||
64 | struct sdhci_pci_chip { | |
65 | struct pci_dev *pdev; | |
66 | ||
67 | unsigned int quirks; | |
68 | const struct sdhci_pci_fixes *fixes; | |
69 | ||
70 | int num_slots; /* Slots on controller */ | |
71 | struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */ | |
72 | }; | |
73 | ||
74 | ||
75 | /*****************************************************************************\ | |
76 | * * | |
77 | * Hardware specific quirk handling * | |
78 | * * | |
79 | \*****************************************************************************/ | |
80 | ||
81 | static int ricoh_probe(struct sdhci_pci_chip *chip) | |
82 | { | |
83 | if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_IBM) | |
84 | chip->quirks |= SDHCI_QUIRK_CLOCK_BEFORE_RESET; | |
85 | ||
86 | if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG) | |
87 | chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET; | |
88 | ||
89 | return 0; | |
90 | } | |
91 | ||
92 | static const struct sdhci_pci_fixes sdhci_ricoh = { | |
93 | .probe = ricoh_probe, | |
94 | }; | |
95 | ||
96 | static const struct sdhci_pci_fixes sdhci_ene_712 = { | |
97 | .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE | | |
98 | SDHCI_QUIRK_BROKEN_DMA, | |
99 | }; | |
100 | ||
101 | static const struct sdhci_pci_fixes sdhci_ene_714 = { | |
102 | .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE | | |
103 | SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS | | |
104 | SDHCI_QUIRK_BROKEN_DMA, | |
105 | }; | |
106 | ||
107 | static const struct sdhci_pci_fixes sdhci_cafe = { | |
108 | .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER | | |
ee53ab5d | 109 | SDHCI_QUIRK_BROKEN_TIMEOUT_VAL, |
22606405 PO |
110 | }; |
111 | ||
45211e21 PO |
112 | static int jmicron_pmos(struct sdhci_pci_chip *chip, int on) |
113 | { | |
114 | u8 scratch; | |
115 | int ret; | |
116 | ||
117 | ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch); | |
118 | if (ret) | |
119 | return ret; | |
120 | ||
121 | /* | |
122 | * Turn PMOS on [bit 0], set over current detection to 2.4 V | |
123 | * [bit 1:2] and enable over current debouncing [bit 6]. | |
124 | */ | |
125 | if (on) | |
126 | scratch |= 0x47; | |
127 | else | |
128 | scratch &= ~0x47; | |
129 | ||
130 | ret = pci_write_config_byte(chip->pdev, 0xAE, scratch); | |
131 | if (ret) | |
132 | return ret; | |
133 | ||
134 | return 0; | |
135 | } | |
136 | ||
137 | static int jmicron_probe(struct sdhci_pci_chip *chip) | |
138 | { | |
139 | int ret; | |
140 | ||
4489428a PO |
141 | /* |
142 | * JMicron chips can have two interfaces to the same hardware | |
143 | * in order to work around limitations in Microsoft's driver. | |
144 | * We need to make sure we only bind to one of them. | |
145 | * | |
146 | * This code assumes two things: | |
147 | * | |
148 | * 1. The PCI code adds subfunctions in order. | |
149 | * | |
150 | * 2. The MMC interface has a lower subfunction number | |
151 | * than the SD interface. | |
152 | */ | |
153 | if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD) { | |
154 | struct pci_dev *sd_dev; | |
155 | ||
156 | sd_dev = NULL; | |
157 | while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON, | |
158 | PCI_DEVICE_ID_JMICRON_JMB38X_MMC, sd_dev)) != NULL) { | |
159 | if ((PCI_SLOT(chip->pdev->devfn) == | |
160 | PCI_SLOT(sd_dev->devfn)) && | |
161 | (chip->pdev->bus == sd_dev->bus)) | |
162 | break; | |
163 | } | |
164 | ||
165 | if (sd_dev) { | |
166 | pci_dev_put(sd_dev); | |
167 | dev_info(&chip->pdev->dev, "Refusing to bind to " | |
168 | "secondary interface.\n"); | |
169 | return -ENODEV; | |
170 | } | |
171 | } | |
172 | ||
45211e21 PO |
173 | /* |
174 | * JMicron chips need a bit of a nudge to enable the power | |
175 | * output pins. | |
176 | */ | |
177 | ret = jmicron_pmos(chip, 1); | |
178 | if (ret) { | |
179 | dev_err(&chip->pdev->dev, "Failure enabling card power\n"); | |
180 | return ret; | |
181 | } | |
182 | ||
183 | return 0; | |
184 | } | |
185 | ||
4489428a PO |
186 | static void jmicron_enable_mmc(struct sdhci_host *host, int on) |
187 | { | |
188 | u8 scratch; | |
189 | ||
190 | scratch = readb(host->ioaddr + 0xC0); | |
191 | ||
192 | if (on) | |
193 | scratch |= 0x01; | |
194 | else | |
195 | scratch &= ~0x01; | |
196 | ||
197 | writeb(scratch, host->ioaddr + 0xC0); | |
198 | } | |
199 | ||
200 | static int jmicron_probe_slot(struct sdhci_pci_slot *slot) | |
201 | { | |
202 | /* | |
203 | * The secondary interface requires a bit set to get the | |
204 | * interrupts. | |
205 | */ | |
206 | if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) | |
207 | jmicron_enable_mmc(slot->host, 1); | |
208 | ||
209 | return 0; | |
210 | } | |
211 | ||
212 | static void jmicron_remove_slot(struct sdhci_pci_slot *slot) | |
213 | { | |
214 | if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) | |
215 | jmicron_enable_mmc(slot->host, 0); | |
216 | } | |
217 | ||
218 | static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state) | |
219 | { | |
220 | int i; | |
221 | ||
222 | if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) { | |
223 | for (i = 0;i < chip->num_slots;i++) | |
224 | jmicron_enable_mmc(chip->slots[i]->host, 0); | |
225 | } | |
226 | ||
227 | return 0; | |
228 | } | |
229 | ||
45211e21 PO |
230 | static int jmicron_resume(struct sdhci_pci_chip *chip) |
231 | { | |
4489428a PO |
232 | int ret, i; |
233 | ||
234 | if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) { | |
235 | for (i = 0;i < chip->num_slots;i++) | |
236 | jmicron_enable_mmc(chip->slots[i]->host, 1); | |
237 | } | |
45211e21 PO |
238 | |
239 | ret = jmicron_pmos(chip, 1); | |
240 | if (ret) { | |
241 | dev_err(&chip->pdev->dev, "Failure enabling card power\n"); | |
242 | return ret; | |
243 | } | |
244 | ||
245 | return 0; | |
246 | } | |
247 | ||
22606405 PO |
248 | static const struct sdhci_pci_fixes sdhci_jmicron = { |
249 | .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | | |
250 | SDHCI_QUIRK_32BIT_DMA_SIZE | | |
251 | SDHCI_QUIRK_RESET_AFTER_REQUEST, | |
45211e21 PO |
252 | |
253 | .probe = jmicron_probe, | |
254 | ||
4489428a PO |
255 | .probe_slot = jmicron_probe_slot, |
256 | .remove_slot = jmicron_remove_slot, | |
257 | ||
258 | .suspend = jmicron_suspend, | |
45211e21 | 259 | .resume = jmicron_resume, |
22606405 PO |
260 | }; |
261 | ||
262 | static const struct pci_device_id pci_ids[] __devinitdata = { | |
b8c86fc5 PO |
263 | { |
264 | .vendor = PCI_VENDOR_ID_RICOH, | |
265 | .device = PCI_DEVICE_ID_RICOH_R5C822, | |
22606405 | 266 | .subvendor = PCI_ANY_ID, |
b8c86fc5 | 267 | .subdevice = PCI_ANY_ID, |
22606405 | 268 | .driver_data = (kernel_ulong_t)&sdhci_ricoh, |
b8c86fc5 PO |
269 | }, |
270 | ||
271 | { | |
272 | .vendor = PCI_VENDOR_ID_ENE, | |
273 | .device = PCI_DEVICE_ID_ENE_CB712_SD, | |
274 | .subvendor = PCI_ANY_ID, | |
275 | .subdevice = PCI_ANY_ID, | |
22606405 | 276 | .driver_data = (kernel_ulong_t)&sdhci_ene_712, |
b8c86fc5 PO |
277 | }, |
278 | ||
279 | { | |
280 | .vendor = PCI_VENDOR_ID_ENE, | |
281 | .device = PCI_DEVICE_ID_ENE_CB712_SD_2, | |
282 | .subvendor = PCI_ANY_ID, | |
283 | .subdevice = PCI_ANY_ID, | |
22606405 | 284 | .driver_data = (kernel_ulong_t)&sdhci_ene_712, |
b8c86fc5 PO |
285 | }, |
286 | ||
287 | { | |
288 | .vendor = PCI_VENDOR_ID_ENE, | |
289 | .device = PCI_DEVICE_ID_ENE_CB714_SD, | |
290 | .subvendor = PCI_ANY_ID, | |
291 | .subdevice = PCI_ANY_ID, | |
22606405 | 292 | .driver_data = (kernel_ulong_t)&sdhci_ene_714, |
b8c86fc5 PO |
293 | }, |
294 | ||
295 | { | |
296 | .vendor = PCI_VENDOR_ID_ENE, | |
297 | .device = PCI_DEVICE_ID_ENE_CB714_SD_2, | |
298 | .subvendor = PCI_ANY_ID, | |
299 | .subdevice = PCI_ANY_ID, | |
22606405 | 300 | .driver_data = (kernel_ulong_t)&sdhci_ene_714, |
b8c86fc5 PO |
301 | }, |
302 | ||
303 | { | |
304 | .vendor = PCI_VENDOR_ID_MARVELL, | |
305 | .device = PCI_DEVICE_ID_MARVELL_CAFE_SD, | |
306 | .subvendor = PCI_ANY_ID, | |
307 | .subdevice = PCI_ANY_ID, | |
22606405 | 308 | .driver_data = (kernel_ulong_t)&sdhci_cafe, |
b8c86fc5 PO |
309 | }, |
310 | ||
311 | { | |
312 | .vendor = PCI_VENDOR_ID_JMICRON, | |
313 | .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD, | |
314 | .subvendor = PCI_ANY_ID, | |
315 | .subdevice = PCI_ANY_ID, | |
22606405 | 316 | .driver_data = (kernel_ulong_t)&sdhci_jmicron, |
b8c86fc5 PO |
317 | }, |
318 | ||
4489428a PO |
319 | { |
320 | .vendor = PCI_VENDOR_ID_JMICRON, | |
321 | .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC, | |
322 | .subvendor = PCI_ANY_ID, | |
323 | .subdevice = PCI_ANY_ID, | |
324 | .driver_data = (kernel_ulong_t)&sdhci_jmicron, | |
325 | }, | |
326 | ||
b8c86fc5 PO |
327 | { /* Generic SD host controller */ |
328 | PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00) | |
329 | }, | |
330 | ||
331 | { /* end: all zeroes */ }, | |
332 | }; | |
333 | ||
334 | MODULE_DEVICE_TABLE(pci, pci_ids); | |
335 | ||
b8c86fc5 PO |
336 | /*****************************************************************************\ |
337 | * * | |
338 | * SDHCI core callbacks * | |
339 | * * | |
340 | \*****************************************************************************/ | |
341 | ||
342 | static int sdhci_pci_enable_dma(struct sdhci_host *host) | |
343 | { | |
344 | struct sdhci_pci_slot *slot; | |
345 | struct pci_dev *pdev; | |
346 | int ret; | |
347 | ||
348 | slot = sdhci_priv(host); | |
349 | pdev = slot->chip->pdev; | |
350 | ||
351 | if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) && | |
352 | ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) && | |
353 | (host->flags & SDHCI_USE_DMA)) { | |
354 | dev_warn(&pdev->dev, "Will use DMA mode even though HW " | |
355 | "doesn't fully claim to support it.\n"); | |
356 | } | |
357 | ||
358 | ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
359 | if (ret) | |
360 | return ret; | |
361 | ||
362 | pci_set_master(pdev); | |
363 | ||
364 | return 0; | |
365 | } | |
366 | ||
367 | static struct sdhci_ops sdhci_pci_ops = { | |
368 | .enable_dma = sdhci_pci_enable_dma, | |
369 | }; | |
370 | ||
371 | /*****************************************************************************\ | |
372 | * * | |
373 | * Suspend/resume * | |
374 | * * | |
375 | \*****************************************************************************/ | |
376 | ||
377 | #ifdef CONFIG_PM | |
378 | ||
379 | static int sdhci_pci_suspend (struct pci_dev *pdev, pm_message_t state) | |
380 | { | |
381 | struct sdhci_pci_chip *chip; | |
382 | struct sdhci_pci_slot *slot; | |
383 | int i, ret; | |
384 | ||
385 | chip = pci_get_drvdata(pdev); | |
386 | if (!chip) | |
387 | return 0; | |
388 | ||
389 | for (i = 0;i < chip->num_slots;i++) { | |
390 | slot = chip->slots[i]; | |
391 | if (!slot) | |
392 | continue; | |
393 | ||
394 | ret = sdhci_suspend_host(slot->host, state); | |
395 | ||
396 | if (ret) { | |
397 | for (i--;i >= 0;i--) | |
398 | sdhci_resume_host(chip->slots[i]->host); | |
399 | return ret; | |
400 | } | |
401 | } | |
402 | ||
4489428a PO |
403 | if (chip->fixes && chip->fixes->suspend) { |
404 | ret = chip->fixes->suspend(chip, state); | |
405 | if (ret) { | |
406 | for (i = chip->num_slots - 1;i >= 0;i--) | |
407 | sdhci_resume_host(chip->slots[i]->host); | |
408 | return ret; | |
409 | } | |
410 | } | |
411 | ||
b8c86fc5 PO |
412 | pci_save_state(pdev); |
413 | pci_enable_wake(pdev, pci_choose_state(pdev, state), 0); | |
414 | pci_disable_device(pdev); | |
415 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
416 | ||
417 | return 0; | |
418 | } | |
419 | ||
420 | static int sdhci_pci_resume (struct pci_dev *pdev) | |
421 | { | |
422 | struct sdhci_pci_chip *chip; | |
423 | struct sdhci_pci_slot *slot; | |
424 | int i, ret; | |
425 | ||
426 | chip = pci_get_drvdata(pdev); | |
427 | if (!chip) | |
428 | return 0; | |
429 | ||
430 | pci_set_power_state(pdev, PCI_D0); | |
431 | pci_restore_state(pdev); | |
432 | ret = pci_enable_device(pdev); | |
433 | if (ret) | |
434 | return ret; | |
435 | ||
45211e21 PO |
436 | if (chip->fixes && chip->fixes->resume) { |
437 | ret = chip->fixes->resume(chip); | |
438 | if (ret) | |
439 | return ret; | |
440 | } | |
441 | ||
b8c86fc5 PO |
442 | for (i = 0;i < chip->num_slots;i++) { |
443 | slot = chip->slots[i]; | |
444 | if (!slot) | |
445 | continue; | |
446 | ||
447 | ret = sdhci_resume_host(slot->host); | |
448 | if (ret) | |
449 | return ret; | |
450 | } | |
451 | ||
452 | return 0; | |
453 | } | |
454 | ||
455 | #else /* CONFIG_PM */ | |
456 | ||
457 | #define sdhci_pci_suspend NULL | |
458 | #define sdhci_pci_resume NULL | |
459 | ||
460 | #endif /* CONFIG_PM */ | |
461 | ||
462 | /*****************************************************************************\ | |
463 | * * | |
464 | * Device probing/removal * | |
465 | * * | |
466 | \*****************************************************************************/ | |
467 | ||
468 | static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot( | |
469 | struct pci_dev *pdev, struct sdhci_pci_chip *chip, int bar) | |
470 | { | |
471 | struct sdhci_pci_slot *slot; | |
472 | struct sdhci_host *host; | |
473 | ||
474 | resource_size_t addr; | |
475 | ||
476 | int ret; | |
477 | ||
478 | if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) { | |
479 | dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar); | |
480 | return ERR_PTR(-ENODEV); | |
481 | } | |
482 | ||
483 | if (pci_resource_len(pdev, bar) != 0x100) { | |
484 | dev_err(&pdev->dev, "Invalid iomem size. You may " | |
485 | "experience problems.\n"); | |
486 | } | |
487 | ||
488 | if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) { | |
489 | dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n"); | |
490 | return ERR_PTR(-ENODEV); | |
491 | } | |
492 | ||
493 | if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) { | |
494 | dev_err(&pdev->dev, "Unknown interface. Aborting.\n"); | |
495 | return ERR_PTR(-ENODEV); | |
496 | } | |
497 | ||
498 | host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot)); | |
499 | if (IS_ERR(host)) { | |
500 | ret = PTR_ERR(host); | |
501 | goto unmap; | |
502 | } | |
503 | ||
504 | slot = sdhci_priv(host); | |
505 | ||
506 | slot->chip = chip; | |
507 | slot->host = host; | |
508 | slot->pci_bar = bar; | |
509 | ||
510 | host->hw_name = "PCI"; | |
511 | host->ops = &sdhci_pci_ops; | |
512 | host->quirks = chip->quirks; | |
513 | ||
514 | host->irq = pdev->irq; | |
515 | ||
516 | ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc)); | |
517 | if (ret) { | |
518 | dev_err(&pdev->dev, "cannot request region\n"); | |
519 | return ERR_PTR(ret); | |
520 | } | |
521 | ||
522 | addr = pci_resource_start(pdev, bar); | |
523 | host->ioaddr = ioremap_nocache(addr, pci_resource_len(pdev, bar)); | |
524 | if (!host->ioaddr) { | |
525 | dev_err(&pdev->dev, "failed to remap registers\n"); | |
526 | goto release; | |
527 | } | |
528 | ||
4489428a PO |
529 | if (chip->fixes && chip->fixes->probe_slot) { |
530 | ret = chip->fixes->probe_slot(slot); | |
531 | if (ret) | |
532 | goto unmap; | |
533 | } | |
534 | ||
b8c86fc5 PO |
535 | ret = sdhci_add_host(host); |
536 | if (ret) | |
4489428a | 537 | goto remove; |
b8c86fc5 PO |
538 | |
539 | return slot; | |
540 | ||
4489428a PO |
541 | remove: |
542 | if (chip->fixes && chip->fixes->remove_slot) | |
543 | chip->fixes->remove_slot(slot); | |
544 | ||
b8c86fc5 PO |
545 | unmap: |
546 | iounmap(host->ioaddr); | |
547 | ||
548 | release: | |
549 | pci_release_region(pdev, bar); | |
550 | sdhci_free_host(host); | |
551 | ||
552 | return ERR_PTR(ret); | |
553 | } | |
554 | ||
555 | static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot) | |
556 | { | |
557 | sdhci_remove_host(slot->host); | |
4489428a PO |
558 | |
559 | if (slot->chip->fixes && slot->chip->fixes->remove_slot) | |
560 | slot->chip->fixes->remove_slot(slot); | |
561 | ||
b8c86fc5 | 562 | pci_release_region(slot->chip->pdev, slot->pci_bar); |
4489428a | 563 | |
b8c86fc5 PO |
564 | sdhci_free_host(slot->host); |
565 | } | |
566 | ||
567 | static int __devinit sdhci_pci_probe(struct pci_dev *pdev, | |
568 | const struct pci_device_id *ent) | |
569 | { | |
570 | struct sdhci_pci_chip *chip; | |
571 | struct sdhci_pci_slot *slot; | |
572 | ||
573 | u8 slots, rev, first_bar; | |
574 | int ret, i; | |
575 | ||
576 | BUG_ON(pdev == NULL); | |
577 | BUG_ON(ent == NULL); | |
578 | ||
579 | pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev); | |
580 | ||
581 | dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n", | |
582 | (int)pdev->vendor, (int)pdev->device, (int)rev); | |
583 | ||
584 | ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots); | |
585 | if (ret) | |
586 | return ret; | |
587 | ||
588 | slots = PCI_SLOT_INFO_SLOTS(slots) + 1; | |
589 | dev_dbg(&pdev->dev, "found %d slot(s)\n", slots); | |
590 | if (slots == 0) | |
591 | return -ENODEV; | |
592 | ||
593 | BUG_ON(slots > MAX_SLOTS); | |
594 | ||
595 | ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar); | |
596 | if (ret) | |
597 | return ret; | |
598 | ||
599 | first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK; | |
600 | ||
601 | if (first_bar > 5) { | |
602 | dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n"); | |
603 | return -ENODEV; | |
604 | } | |
605 | ||
606 | ret = pci_enable_device(pdev); | |
607 | if (ret) | |
608 | return ret; | |
609 | ||
610 | chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL); | |
611 | if (!chip) { | |
612 | ret = -ENOMEM; | |
613 | goto err; | |
614 | } | |
615 | ||
616 | chip->pdev = pdev; | |
22606405 PO |
617 | chip->fixes = (const struct sdhci_pci_fixes*)ent->driver_data; |
618 | if (chip->fixes) | |
619 | chip->quirks = chip->fixes->quirks; | |
b8c86fc5 PO |
620 | chip->num_slots = slots; |
621 | ||
622 | pci_set_drvdata(pdev, chip); | |
623 | ||
22606405 PO |
624 | if (chip->fixes && chip->fixes->probe) { |
625 | ret = chip->fixes->probe(chip); | |
626 | if (ret) | |
627 | goto free; | |
628 | } | |
629 | ||
b8c86fc5 PO |
630 | for (i = 0;i < slots;i++) { |
631 | slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i); | |
632 | if (IS_ERR(slot)) { | |
633 | for (i--;i >= 0;i--) | |
634 | sdhci_pci_remove_slot(chip->slots[i]); | |
635 | ret = PTR_ERR(slot); | |
636 | goto free; | |
637 | } | |
638 | ||
639 | chip->slots[i] = slot; | |
640 | } | |
641 | ||
642 | return 0; | |
643 | ||
644 | free: | |
645 | pci_set_drvdata(pdev, NULL); | |
646 | kfree(chip); | |
647 | ||
648 | err: | |
649 | pci_disable_device(pdev); | |
650 | return ret; | |
651 | } | |
652 | ||
653 | static void __devexit sdhci_pci_remove(struct pci_dev *pdev) | |
654 | { | |
655 | int i; | |
656 | struct sdhci_pci_chip *chip; | |
657 | ||
658 | chip = pci_get_drvdata(pdev); | |
659 | ||
660 | if (chip) { | |
661 | for (i = 0;i < chip->num_slots; i++) | |
662 | sdhci_pci_remove_slot(chip->slots[i]); | |
663 | ||
664 | pci_set_drvdata(pdev, NULL); | |
665 | kfree(chip); | |
666 | } | |
667 | ||
668 | pci_disable_device(pdev); | |
669 | } | |
670 | ||
671 | static struct pci_driver sdhci_driver = { | |
672 | .name = "sdhci-pci", | |
673 | .id_table = pci_ids, | |
674 | .probe = sdhci_pci_probe, | |
675 | .remove = __devexit_p(sdhci_pci_remove), | |
676 | .suspend = sdhci_pci_suspend, | |
677 | .resume = sdhci_pci_resume, | |
678 | }; | |
679 | ||
680 | /*****************************************************************************\ | |
681 | * * | |
682 | * Driver init/exit * | |
683 | * * | |
684 | \*****************************************************************************/ | |
685 | ||
686 | static int __init sdhci_drv_init(void) | |
687 | { | |
688 | return pci_register_driver(&sdhci_driver); | |
689 | } | |
690 | ||
691 | static void __exit sdhci_drv_exit(void) | |
692 | { | |
693 | pci_unregister_driver(&sdhci_driver); | |
694 | } | |
695 | ||
696 | module_init(sdhci_drv_init); | |
697 | module_exit(sdhci_drv_exit); | |
698 | ||
699 | MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>"); | |
700 | MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver"); | |
701 | MODULE_LICENSE("GPL"); |