Merge branch 'writeback' of git://git.kernel.dk/linux-2.6-block
[linux-block.git] / drivers / mmc / host / sdhci-pci.c
CommitLineData
b8c86fc5
PO
1/* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
2 *
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
9 *
10 * Thanks to the following companies for their support:
11 *
12 * - JMicron (hardware and technical support)
13 */
14
15#include <linux/delay.h>
16#include <linux/highmem.h>
17#include <linux/pci.h>
18#include <linux/dma-mapping.h>
19
20#include <linux/mmc/host.h>
21
22#include <asm/scatterlist.h>
23#include <asm/io.h>
24
25#include "sdhci.h"
26
27/*
28 * PCI registers
29 */
30
31#define PCI_SDHCI_IFPIO 0x00
32#define PCI_SDHCI_IFDMA 0x01
33#define PCI_SDHCI_IFVENDOR 0x02
34
35#define PCI_SLOT_INFO 0x40 /* 8 bits */
36#define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
37#define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
38
39#define MAX_SLOTS 8
40
22606405 41struct sdhci_pci_chip;
4489428a 42struct sdhci_pci_slot;
22606405
PO
43
44struct sdhci_pci_fixes {
45 unsigned int quirks;
46
47 int (*probe)(struct sdhci_pci_chip*);
45211e21 48
4489428a 49 int (*probe_slot)(struct sdhci_pci_slot*);
1e72859e 50 void (*remove_slot)(struct sdhci_pci_slot*, int);
4489428a
PO
51
52 int (*suspend)(struct sdhci_pci_chip*,
53 pm_message_t);
45211e21 54 int (*resume)(struct sdhci_pci_chip*);
22606405
PO
55};
56
57struct sdhci_pci_slot {
58 struct sdhci_pci_chip *chip;
59 struct sdhci_host *host;
b8c86fc5 60
22606405
PO
61 int pci_bar;
62};
63
64struct sdhci_pci_chip {
65 struct pci_dev *pdev;
66
67 unsigned int quirks;
68 const struct sdhci_pci_fixes *fixes;
69
70 int num_slots; /* Slots on controller */
71 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
72};
73
74
75/*****************************************************************************\
76 * *
77 * Hardware specific quirk handling *
78 * *
79\*****************************************************************************/
80
81static int ricoh_probe(struct sdhci_pci_chip *chip)
82{
83 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_IBM)
84 chip->quirks |= SDHCI_QUIRK_CLOCK_BEFORE_RESET;
85
c99436fb
CB
86 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
87 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
22606405
PO
88 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
89
90 return 0;
91}
92
93static const struct sdhci_pci_fixes sdhci_ricoh = {
94 .probe = ricoh_probe,
309d9736 95 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR,
22606405
PO
96};
97
98static const struct sdhci_pci_fixes sdhci_ene_712 = {
99 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
100 SDHCI_QUIRK_BROKEN_DMA,
101};
102
103static const struct sdhci_pci_fixes sdhci_ene_714 = {
104 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
105 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
106 SDHCI_QUIRK_BROKEN_DMA,
107};
108
109static const struct sdhci_pci_fixes sdhci_cafe = {
110 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
a0874897 111 SDHCI_QUIRK_NO_BUSY_IRQ |
ee53ab5d 112 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
22606405
PO
113};
114
45211e21
PO
115static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
116{
117 u8 scratch;
118 int ret;
119
120 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
121 if (ret)
122 return ret;
123
124 /*
125 * Turn PMOS on [bit 0], set over current detection to 2.4 V
126 * [bit 1:2] and enable over current debouncing [bit 6].
127 */
128 if (on)
129 scratch |= 0x47;
130 else
131 scratch &= ~0x47;
132
133 ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
134 if (ret)
135 return ret;
136
137 return 0;
138}
139
140static int jmicron_probe(struct sdhci_pci_chip *chip)
141{
142 int ret;
143
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PO
144 if (chip->pdev->revision == 0) {
145 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
146 SDHCI_QUIRK_32BIT_DMA_SIZE |
2134a922 147 SDHCI_QUIRK_32BIT_ADMA_SIZE |
4a3cba32 148 SDHCI_QUIRK_RESET_AFTER_REQUEST |
86a6a874 149 SDHCI_QUIRK_BROKEN_SMALL_PIO;
93fc48c7
PO
150 }
151
4489428a
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152 /*
153 * JMicron chips can have two interfaces to the same hardware
154 * in order to work around limitations in Microsoft's driver.
155 * We need to make sure we only bind to one of them.
156 *
157 * This code assumes two things:
158 *
159 * 1. The PCI code adds subfunctions in order.
160 *
161 * 2. The MMC interface has a lower subfunction number
162 * than the SD interface.
163 */
164 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD) {
165 struct pci_dev *sd_dev;
166
167 sd_dev = NULL;
168 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
169 PCI_DEVICE_ID_JMICRON_JMB38X_MMC, sd_dev)) != NULL) {
170 if ((PCI_SLOT(chip->pdev->devfn) ==
171 PCI_SLOT(sd_dev->devfn)) &&
172 (chip->pdev->bus == sd_dev->bus))
173 break;
174 }
175
176 if (sd_dev) {
177 pci_dev_put(sd_dev);
178 dev_info(&chip->pdev->dev, "Refusing to bind to "
179 "secondary interface.\n");
180 return -ENODEV;
181 }
182 }
183
45211e21
PO
184 /*
185 * JMicron chips need a bit of a nudge to enable the power
186 * output pins.
187 */
188 ret = jmicron_pmos(chip, 1);
189 if (ret) {
190 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
191 return ret;
192 }
193
194 return 0;
195}
196
4489428a
PO
197static void jmicron_enable_mmc(struct sdhci_host *host, int on)
198{
199 u8 scratch;
200
201 scratch = readb(host->ioaddr + 0xC0);
202
203 if (on)
204 scratch |= 0x01;
205 else
206 scratch &= ~0x01;
207
208 writeb(scratch, host->ioaddr + 0xC0);
209}
210
211static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
212{
2134a922
PO
213 if (slot->chip->pdev->revision == 0) {
214 u16 version;
215
216 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
217 version = (version & SDHCI_VENDOR_VER_MASK) >>
218 SDHCI_VENDOR_VER_SHIFT;
219
220 /*
221 * Older versions of the chip have lots of nasty glitches
222 * in the ADMA engine. It's best just to avoid it
223 * completely.
224 */
225 if (version < 0xAC)
226 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
227 }
228
4489428a
PO
229 /*
230 * The secondary interface requires a bit set to get the
231 * interrupts.
232 */
233 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
234 jmicron_enable_mmc(slot->host, 1);
235
236 return 0;
237}
238
1e72859e 239static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
4489428a 240{
1e72859e
PO
241 if (dead)
242 return;
243
4489428a
PO
244 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
245 jmicron_enable_mmc(slot->host, 0);
246}
247
248static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state)
249{
250 int i;
251
252 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
253 for (i = 0;i < chip->num_slots;i++)
254 jmicron_enable_mmc(chip->slots[i]->host, 0);
255 }
256
257 return 0;
258}
259
45211e21
PO
260static int jmicron_resume(struct sdhci_pci_chip *chip)
261{
4489428a
PO
262 int ret, i;
263
264 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
265 for (i = 0;i < chip->num_slots;i++)
266 jmicron_enable_mmc(chip->slots[i]->host, 1);
267 }
45211e21
PO
268
269 ret = jmicron_pmos(chip, 1);
270 if (ret) {
271 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
272 return ret;
273 }
274
275 return 0;
276}
277
22606405 278static const struct sdhci_pci_fixes sdhci_jmicron = {
45211e21
PO
279 .probe = jmicron_probe,
280
4489428a
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281 .probe_slot = jmicron_probe_slot,
282 .remove_slot = jmicron_remove_slot,
283
284 .suspend = jmicron_suspend,
45211e21 285 .resume = jmicron_resume,
22606405
PO
286};
287
557b0697
HW
288static int via_probe(struct sdhci_pci_chip *chip)
289{
290 if (chip->pdev->revision == 0x10)
291 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
292
293 return 0;
294}
295
296static const struct sdhci_pci_fixes sdhci_via = {
297 .probe = via_probe,
298};
299
22606405 300static const struct pci_device_id pci_ids[] __devinitdata = {
b8c86fc5
PO
301 {
302 .vendor = PCI_VENDOR_ID_RICOH,
303 .device = PCI_DEVICE_ID_RICOH_R5C822,
22606405 304 .subvendor = PCI_ANY_ID,
b8c86fc5 305 .subdevice = PCI_ANY_ID,
22606405 306 .driver_data = (kernel_ulong_t)&sdhci_ricoh,
b8c86fc5
PO
307 },
308
309 {
310 .vendor = PCI_VENDOR_ID_ENE,
311 .device = PCI_DEVICE_ID_ENE_CB712_SD,
312 .subvendor = PCI_ANY_ID,
313 .subdevice = PCI_ANY_ID,
22606405 314 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
b8c86fc5
PO
315 },
316
317 {
318 .vendor = PCI_VENDOR_ID_ENE,
319 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
320 .subvendor = PCI_ANY_ID,
321 .subdevice = PCI_ANY_ID,
22606405 322 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
b8c86fc5
PO
323 },
324
325 {
326 .vendor = PCI_VENDOR_ID_ENE,
327 .device = PCI_DEVICE_ID_ENE_CB714_SD,
328 .subvendor = PCI_ANY_ID,
329 .subdevice = PCI_ANY_ID,
22606405 330 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
b8c86fc5
PO
331 },
332
333 {
334 .vendor = PCI_VENDOR_ID_ENE,
335 .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
336 .subvendor = PCI_ANY_ID,
337 .subdevice = PCI_ANY_ID,
22606405 338 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
b8c86fc5
PO
339 },
340
341 {
342 .vendor = PCI_VENDOR_ID_MARVELL,
8c5eb880 343 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
b8c86fc5
PO
344 .subvendor = PCI_ANY_ID,
345 .subdevice = PCI_ANY_ID,
22606405 346 .driver_data = (kernel_ulong_t)&sdhci_cafe,
b8c86fc5
PO
347 },
348
349 {
350 .vendor = PCI_VENDOR_ID_JMICRON,
351 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
352 .subvendor = PCI_ANY_ID,
353 .subdevice = PCI_ANY_ID,
22606405 354 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
b8c86fc5
PO
355 },
356
4489428a
PO
357 {
358 .vendor = PCI_VENDOR_ID_JMICRON,
359 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
360 .subvendor = PCI_ANY_ID,
361 .subdevice = PCI_ANY_ID,
362 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
363 },
364
557b0697
HW
365 {
366 .vendor = PCI_VENDOR_ID_VIA,
367 .device = 0x95d0,
368 .subvendor = PCI_ANY_ID,
369 .subdevice = PCI_ANY_ID,
370 .driver_data = (kernel_ulong_t)&sdhci_via,
371 },
372
b8c86fc5
PO
373 { /* Generic SD host controller */
374 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
375 },
376
377 { /* end: all zeroes */ },
378};
379
380MODULE_DEVICE_TABLE(pci, pci_ids);
381
b8c86fc5
PO
382/*****************************************************************************\
383 * *
384 * SDHCI core callbacks *
385 * *
386\*****************************************************************************/
387
388static int sdhci_pci_enable_dma(struct sdhci_host *host)
389{
390 struct sdhci_pci_slot *slot;
391 struct pci_dev *pdev;
392 int ret;
393
394 slot = sdhci_priv(host);
395 pdev = slot->chip->pdev;
396
397 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
398 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
a13abc7b 399 (host->flags & SDHCI_USE_SDMA)) {
b8c86fc5
PO
400 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
401 "doesn't fully claim to support it.\n");
402 }
403
284901a9 404 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
b8c86fc5
PO
405 if (ret)
406 return ret;
407
408 pci_set_master(pdev);
409
410 return 0;
411}
412
413static struct sdhci_ops sdhci_pci_ops = {
414 .enable_dma = sdhci_pci_enable_dma,
415};
416
417/*****************************************************************************\
418 * *
419 * Suspend/resume *
420 * *
421\*****************************************************************************/
422
423#ifdef CONFIG_PM
424
425static int sdhci_pci_suspend (struct pci_dev *pdev, pm_message_t state)
426{
427 struct sdhci_pci_chip *chip;
428 struct sdhci_pci_slot *slot;
429 int i, ret;
430
431 chip = pci_get_drvdata(pdev);
432 if (!chip)
433 return 0;
434
435 for (i = 0;i < chip->num_slots;i++) {
436 slot = chip->slots[i];
437 if (!slot)
438 continue;
439
440 ret = sdhci_suspend_host(slot->host, state);
441
442 if (ret) {
443 for (i--;i >= 0;i--)
444 sdhci_resume_host(chip->slots[i]->host);
445 return ret;
446 }
447 }
448
4489428a
PO
449 if (chip->fixes && chip->fixes->suspend) {
450 ret = chip->fixes->suspend(chip, state);
451 if (ret) {
452 for (i = chip->num_slots - 1;i >= 0;i--)
453 sdhci_resume_host(chip->slots[i]->host);
454 return ret;
455 }
456 }
457
b8c86fc5
PO
458 pci_save_state(pdev);
459 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
460 pci_disable_device(pdev);
461 pci_set_power_state(pdev, pci_choose_state(pdev, state));
462
463 return 0;
464}
465
466static int sdhci_pci_resume (struct pci_dev *pdev)
467{
468 struct sdhci_pci_chip *chip;
469 struct sdhci_pci_slot *slot;
470 int i, ret;
471
472 chip = pci_get_drvdata(pdev);
473 if (!chip)
474 return 0;
475
476 pci_set_power_state(pdev, PCI_D0);
477 pci_restore_state(pdev);
478 ret = pci_enable_device(pdev);
479 if (ret)
480 return ret;
481
45211e21
PO
482 if (chip->fixes && chip->fixes->resume) {
483 ret = chip->fixes->resume(chip);
484 if (ret)
485 return ret;
486 }
487
b8c86fc5
PO
488 for (i = 0;i < chip->num_slots;i++) {
489 slot = chip->slots[i];
490 if (!slot)
491 continue;
492
493 ret = sdhci_resume_host(slot->host);
494 if (ret)
495 return ret;
496 }
497
498 return 0;
499}
500
501#else /* CONFIG_PM */
502
503#define sdhci_pci_suspend NULL
504#define sdhci_pci_resume NULL
505
506#endif /* CONFIG_PM */
507
508/*****************************************************************************\
509 * *
510 * Device probing/removal *
511 * *
512\*****************************************************************************/
513
514static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
515 struct pci_dev *pdev, struct sdhci_pci_chip *chip, int bar)
516{
517 struct sdhci_pci_slot *slot;
518 struct sdhci_host *host;
519
520 resource_size_t addr;
521
522 int ret;
523
524 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
525 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
526 return ERR_PTR(-ENODEV);
527 }
528
529 if (pci_resource_len(pdev, bar) != 0x100) {
530 dev_err(&pdev->dev, "Invalid iomem size. You may "
531 "experience problems.\n");
532 }
533
534 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
535 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
536 return ERR_PTR(-ENODEV);
537 }
538
539 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
540 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
541 return ERR_PTR(-ENODEV);
542 }
543
544 host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
545 if (IS_ERR(host)) {
c60a32cd
DC
546 dev_err(&pdev->dev, "cannot allocate host\n");
547 return ERR_PTR(PTR_ERR(host));
b8c86fc5
PO
548 }
549
550 slot = sdhci_priv(host);
551
552 slot->chip = chip;
553 slot->host = host;
554 slot->pci_bar = bar;
555
556 host->hw_name = "PCI";
557 host->ops = &sdhci_pci_ops;
558 host->quirks = chip->quirks;
559
560 host->irq = pdev->irq;
561
562 ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
563 if (ret) {
564 dev_err(&pdev->dev, "cannot request region\n");
c60a32cd 565 goto free;
b8c86fc5
PO
566 }
567
568 addr = pci_resource_start(pdev, bar);
092f82ed 569 host->ioaddr = pci_ioremap_bar(pdev, bar);
b8c86fc5
PO
570 if (!host->ioaddr) {
571 dev_err(&pdev->dev, "failed to remap registers\n");
572 goto release;
573 }
574
4489428a
PO
575 if (chip->fixes && chip->fixes->probe_slot) {
576 ret = chip->fixes->probe_slot(slot);
577 if (ret)
578 goto unmap;
579 }
580
b8c86fc5
PO
581 ret = sdhci_add_host(host);
582 if (ret)
4489428a 583 goto remove;
b8c86fc5
PO
584
585 return slot;
586
4489428a
PO
587remove:
588 if (chip->fixes && chip->fixes->remove_slot)
1e72859e 589 chip->fixes->remove_slot(slot, 0);
4489428a 590
b8c86fc5
PO
591unmap:
592 iounmap(host->ioaddr);
593
594release:
595 pci_release_region(pdev, bar);
c60a32cd
DC
596
597free:
b8c86fc5
PO
598 sdhci_free_host(host);
599
600 return ERR_PTR(ret);
601}
602
603static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
604{
1e72859e
PO
605 int dead;
606 u32 scratch;
607
608 dead = 0;
609 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
610 if (scratch == (u32)-1)
611 dead = 1;
612
613 sdhci_remove_host(slot->host, dead);
4489428a
PO
614
615 if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1e72859e 616 slot->chip->fixes->remove_slot(slot, dead);
4489428a 617
b8c86fc5 618 pci_release_region(slot->chip->pdev, slot->pci_bar);
4489428a 619
b8c86fc5
PO
620 sdhci_free_host(slot->host);
621}
622
623static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
624 const struct pci_device_id *ent)
625{
626 struct sdhci_pci_chip *chip;
627 struct sdhci_pci_slot *slot;
628
629 u8 slots, rev, first_bar;
630 int ret, i;
631
632 BUG_ON(pdev == NULL);
633 BUG_ON(ent == NULL);
634
635 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
636
637 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
638 (int)pdev->vendor, (int)pdev->device, (int)rev);
639
640 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
641 if (ret)
642 return ret;
643
644 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
645 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
646 if (slots == 0)
647 return -ENODEV;
648
649 BUG_ON(slots > MAX_SLOTS);
650
651 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
652 if (ret)
653 return ret;
654
655 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
656
657 if (first_bar > 5) {
658 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
659 return -ENODEV;
660 }
661
662 ret = pci_enable_device(pdev);
663 if (ret)
664 return ret;
665
666 chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
667 if (!chip) {
668 ret = -ENOMEM;
669 goto err;
670 }
671
672 chip->pdev = pdev;
22606405
PO
673 chip->fixes = (const struct sdhci_pci_fixes*)ent->driver_data;
674 if (chip->fixes)
675 chip->quirks = chip->fixes->quirks;
b8c86fc5
PO
676 chip->num_slots = slots;
677
678 pci_set_drvdata(pdev, chip);
679
22606405
PO
680 if (chip->fixes && chip->fixes->probe) {
681 ret = chip->fixes->probe(chip);
682 if (ret)
683 goto free;
684 }
685
b8c86fc5
PO
686 for (i = 0;i < slots;i++) {
687 slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i);
688 if (IS_ERR(slot)) {
689 for (i--;i >= 0;i--)
690 sdhci_pci_remove_slot(chip->slots[i]);
691 ret = PTR_ERR(slot);
692 goto free;
693 }
694
695 chip->slots[i] = slot;
696 }
697
698 return 0;
699
700free:
701 pci_set_drvdata(pdev, NULL);
702 kfree(chip);
703
704err:
705 pci_disable_device(pdev);
706 return ret;
707}
708
709static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
710{
711 int i;
712 struct sdhci_pci_chip *chip;
713
714 chip = pci_get_drvdata(pdev);
715
716 if (chip) {
717 for (i = 0;i < chip->num_slots; i++)
718 sdhci_pci_remove_slot(chip->slots[i]);
719
720 pci_set_drvdata(pdev, NULL);
721 kfree(chip);
722 }
723
724 pci_disable_device(pdev);
725}
726
727static struct pci_driver sdhci_driver = {
728 .name = "sdhci-pci",
729 .id_table = pci_ids,
730 .probe = sdhci_pci_probe,
731 .remove = __devexit_p(sdhci_pci_remove),
732 .suspend = sdhci_pci_suspend,
733 .resume = sdhci_pci_resume,
734};
735
736/*****************************************************************************\
737 * *
738 * Driver init/exit *
739 * *
740\*****************************************************************************/
741
742static int __init sdhci_drv_init(void)
743{
744 return pci_register_driver(&sdhci_driver);
745}
746
747static void __exit sdhci_drv_exit(void)
748{
749 pci_unregister_driver(&sdhci_driver);
750}
751
752module_init(sdhci_drv_init);
753module_exit(sdhci_drv_exit);
754
32710e8f 755MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
b8c86fc5
PO
756MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
757MODULE_LICENSE("GPL");