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[linux-2.6-block.git] / drivers / mmc / host / sdhci-acpi.c
CommitLineData
c4e05037
AH		 1/*
2 * Secure Digital Host Controller Interface ACPI driver.
3 *
4 * Copyright (c) 2012, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 */
20
21#include <linux/init.h>
22#include <linux/export.h>
23#include <linux/module.h>
24#include <linux/device.h>
25#include <linux/platform_device.h>
26#include <linux/ioport.h>
27#include <linux/io.h>
28#include <linux/dma-mapping.h>
29#include <linux/compiler.h>
30#include <linux/stddef.h>
31#include <linux/bitops.h>
32#include <linux/types.h>
33#include <linux/err.h>
34#include <linux/interrupt.h>
35#include <linux/acpi.h>
36#include <linux/pm.h>
37#include <linux/pm_runtime.h>
b04fa064 38#include <linux/delay.h>
c4e05037
AH		 39
40#include <linux/mmc/host.h>
41#include <linux/mmc/pm.h>
4fd4409c 42#include <linux/mmc/slot-gpio.h>
c4e05037 43
6e1c7d61
AH		 44#ifdef CONFIG_X86
45#include <asm/cpu_device_id.h>
8ba4cb53 46#include <asm/intel-family.h>
6e1c7d61 47#include <asm/iosf_mbi.h>
17753d16 48#include <linux/pci.h>
6e1c7d61
AH		 49#endif
50
c4e05037
AH		 51#include "sdhci.h"
52
53enum {
4fd4409c
AH		 54 SDHCI_ACPI_SD_CD = BIT(0),
55 SDHCI_ACPI_RUNTIME_PM = BIT(1),
56 SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL = BIT(2),
c4e05037
AH		 57};
58
59struct sdhci_acpi_chip {
60 const struct sdhci_ops *ops;
61 unsigned int quirks;
62 unsigned int quirks2;
63 unsigned long caps;
64 unsigned int caps2;
65 mmc_pm_flag_t pm_caps;
66};
67
68struct sdhci_acpi_slot {
69 const struct sdhci_acpi_chip *chip;
70 unsigned int quirks;
71 unsigned int quirks2;
72 unsigned long caps;
73 unsigned int caps2;
74 mmc_pm_flag_t pm_caps;
75 unsigned int flags;
f07b7952 76 size_t priv_size;
7dafca83 77 int (*probe_slot)(struct platform_device *, const char *, const char *);
578b36b6 78 int (*remove_slot)(struct platform_device *);
c4e05037
AH		 79};
80
81struct sdhci_acpi_host {
82 struct sdhci_host *host;
83 const struct sdhci_acpi_slot *slot;
84 struct platform_device *pdev;
85 bool use_runtime_pm;
f07b7952 86 unsigned long private[0] ____cacheline_aligned;
c4e05037
AH		 87};
88
f07b7952
AH		 89static inline void *sdhci_acpi_priv(struct sdhci_acpi_host *c)
90{
91 return (void *)c->private;
92}
93
c4e05037
AH		 94static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag)
95{
96 return c->slot && (c->slot->flags & flag);
97}
98
1c451c13
AH		 99enum {
100 INTEL_DSM_FNS = 0,
101 INTEL_DSM_V18_SWITCH = 3,
102 INTEL_DSM_V33_SWITCH = 4,
103};
104
105struct intel_host {
106 u32 dsm_fns;
107};
108
109static const guid_t intel_dsm_guid =
110 GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F,
111 0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61);
112
113static int __intel_dsm(struct intel_host *intel_host, struct device *dev,
114 unsigned int fn, u32 *result)
115{
116 union acpi_object *obj;
117 int err = 0;
118
119 obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL);
120 if (!obj)
121 return -EOPNOTSUPP;
122
123 if (obj->type == ACPI_TYPE_INTEGER) {
124 *result = obj->integer.value;
125 } else if (obj->type == ACPI_TYPE_BUFFER && obj->buffer.length > 0) {
126 size_t len = min_t(size_t, obj->buffer.length, 4);
127
128 *result = 0;
129 memcpy(result, obj->buffer.pointer, len);
130 } else {
131 dev_err(dev, "%s DSM fn %u obj->type %d obj->buffer.length %d\n",
132 __func__, fn, obj->type, obj->buffer.length);
133 err = -EINVAL;
134 }
135
136 ACPI_FREE(obj);
137
138 return err;
139}
140
141static int intel_dsm(struct intel_host *intel_host, struct device *dev,
142 unsigned int fn, u32 *result)
143{
144 if (fn > 31 || !(intel_host->dsm_fns & (1 << fn)))
145 return -EOPNOTSUPP;
146
147 return __intel_dsm(intel_host, dev, fn, result);
148}
149
150static void intel_dsm_init(struct intel_host *intel_host, struct device *dev,
151 struct mmc_host *mmc)
152{
153 int err;
154
155 err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns);
156 if (err) {
157 pr_debug("%s: DSM not supported, error %d\n",
158 mmc_hostname(mmc), err);
159 return;
160 }
161
162 pr_debug("%s: DSM function mask %#x\n",
163 mmc_hostname(mmc), intel_host->dsm_fns);
164}
165
166static int intel_start_signal_voltage_switch(struct mmc_host *mmc,
167 struct mmc_ios *ios)
168{
169 struct device *dev = mmc_dev(mmc);
170 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
171 struct intel_host *intel_host = sdhci_acpi_priv(c);
172 unsigned int fn;
173 u32 result = 0;
174 int err;
175
176 err = sdhci_start_signal_voltage_switch(mmc, ios);
177 if (err)
178 return err;
179
180 switch (ios->signal_voltage) {
181 case MMC_SIGNAL_VOLTAGE_330:
182 fn = INTEL_DSM_V33_SWITCH;
183 break;
184 case MMC_SIGNAL_VOLTAGE_180:
185 fn = INTEL_DSM_V18_SWITCH;
186 break;
187 default:
188 return 0;
189 }
190
191 err = intel_dsm(intel_host, dev, fn, &result);
192 pr_debug("%s: %s DSM fn %u error %d result %u\n",
193 mmc_hostname(mmc), __func__, fn, err, result);
194
195 return 0;
196}
197
b04fa064
AH		 198static void sdhci_acpi_int_hw_reset(struct sdhci_host *host)
199{
200 u8 reg;
201
202 reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
203 reg |= 0x10;
204 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
205 /* For eMMC, minimum is 1us but give it 9us for good measure */
206 udelay(9);
207 reg &= ~0x10;
208 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
209 /* For eMMC, minimum is 200us but give it 300us for good measure */
210 usleep_range(300, 1000);
211}
212
c4e05037 213static const struct sdhci_ops sdhci_acpi_ops_dflt = {
1771059c 214 .set_clock = sdhci_set_clock,
2317f56c 215 .set_bus_width = sdhci_set_bus_width,
03231f9b 216 .reset = sdhci_reset,
96d7b78c 217 .set_uhs_signaling = sdhci_set_uhs_signaling,
c4e05037
AH		 218};
219
b04fa064 220static const struct sdhci_ops sdhci_acpi_ops_int = {
1771059c 221 .set_clock = sdhci_set_clock,
2317f56c 222 .set_bus_width = sdhci_set_bus_width,
03231f9b 223 .reset = sdhci_reset,
96d7b78c 224 .set_uhs_signaling = sdhci_set_uhs_signaling,
b04fa064
AH		 225 .hw_reset = sdhci_acpi_int_hw_reset,
226};
227
228static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
229 .ops = &sdhci_acpi_ops_int,
230};
231
6e1c7d61
AH		 232#ifdef CONFIG_X86
233
234static bool sdhci_acpi_byt(void)
235{
236 static const struct x86_cpu_id byt[] = {
8ba4cb53 237 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1 },
6e1c7d61
AH		 238 {}
239 };
240
241 return x86_match_cpu(byt);
242}
243
17753d16
AH		 244static bool sdhci_acpi_cht(void)
245{
246 static const struct x86_cpu_id cht[] = {
247 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT },
248 {}
249 };
250
251 return x86_match_cpu(cht);
252}
253
6e1c7d61
AH		 254#define BYT_IOSF_SCCEP 0x63
255#define BYT_IOSF_OCP_NETCTRL0 0x1078
256#define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8)
257
258static void sdhci_acpi_byt_setting(struct device *dev)
259{
260 u32 val = 0;
261
262 if (!sdhci_acpi_byt())
263 return;
264
265 if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
266 &val)) {
267 dev_err(dev, "%s read error\n", __func__);
268 return;
269 }
270
271 if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
272 return;
273
274 val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
275
276 if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
277 val)) {
278 dev_err(dev, "%s write error\n", __func__);
279 return;
280 }
281
282 dev_dbg(dev, "%s completed\n", __func__);
283}
284
285static bool sdhci_acpi_byt_defer(struct device *dev)
286{
287 if (!sdhci_acpi_byt())
288 return false;
289
290 if (!iosf_mbi_available())
291 return true;
292
293 sdhci_acpi_byt_setting(dev);
294
295 return false;
296}
297
17753d16
AH		 298static bool sdhci_acpi_cht_pci_wifi(unsigned int vendor, unsigned int device,
299 unsigned int slot, unsigned int parent_slot)
300{
301 struct pci_dev *dev, *parent, *from = NULL;
302
303 while (1) {
304 dev = pci_get_device(vendor, device, from);
305 pci_dev_put(from);
306 if (!dev)
307 break;
308 parent = pci_upstream_bridge(dev);
309 if (ACPI_COMPANION(&dev->dev) && PCI_SLOT(dev->devfn) == slot &&
310 parent && PCI_SLOT(parent->devfn) == parent_slot &&
311 !pci_upstream_bridge(parent)) {
312 pci_dev_put(dev);
313 return true;
314 }
315 from = dev;
316 }
317
318 return false;
319}
320
321/*
322 * GPDwin uses PCI wifi which conflicts with SDIO's use of
323 * acpi_device_fix_up_power() on child device nodes. Identifying GPDwin is
324 * problematic, but since SDIO is only used for wifi, the presence of the PCI
325 * wifi card in the expected slot with an ACPI companion node, is used to
326 * indicate that acpi_device_fix_up_power() should be avoided.
327 */
328static inline bool sdhci_acpi_no_fixup_child_power(const char *hid,
329 const char *uid)
330{
331 return sdhci_acpi_cht() &&
332 !strcmp(hid, "80860F14") &&
333 !strcmp(uid, "2") &&
334 sdhci_acpi_cht_pci_wifi(0x14e4, 0x43ec, 0, 28);
335}
336
6e1c7d61
AH		 337#else
338
339static inline void sdhci_acpi_byt_setting(struct device *dev)
340{
341}
342
343static inline bool sdhci_acpi_byt_defer(struct device *dev)
344{
345 return false;
346}
347
17753d16
AH		 348static inline bool sdhci_acpi_no_fixup_child_power(const char *hid,
349 const char *uid)
350{
351 return false;
352}
353
6e1c7d61
AH		 354#endif
355
6a645dd8
AH		 356static int bxt_get_cd(struct mmc_host *mmc)
357{
358 int gpio_cd = mmc_gpio_get_cd(mmc);
359 struct sdhci_host *host = mmc_priv(mmc);
360 unsigned long flags;
361 int ret = 0;
362
363 if (!gpio_cd)
364 return 0;
365
6a645dd8
AH		 366 spin_lock_irqsave(&host->lock, flags);
367
368 if (host->flags & SDHCI_DEVICE_DEAD)
369 goto out;
370
371 ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
372out:
373 spin_unlock_irqrestore(&host->lock, flags);
374
6a645dd8
AH		 375 return ret;
376}
377
159cd328
AH		 378static int intel_probe_slot(struct platform_device *pdev, const char *hid,
379 const char *uid)
578b36b6
GY		 380{
381 struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
1c451c13 382 struct intel_host *intel_host = sdhci_acpi_priv(c);
159cd328 383 struct sdhci_host *host = c->host;
578b36b6 384
8024379e
AH		 385 if (hid && uid && !strcmp(hid, "80860F14") && !strcmp(uid, "1") &&
386 sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
387 sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807)
388 host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
389
d3e97407 390 if (hid && !strcmp(hid, "80865ACA"))
6a645dd8
AH		 391 host->mmc_host_ops.get_cd = bxt_get_cd;
392
1c451c13
AH		 393 intel_dsm_init(intel_host, &pdev->dev, host->mmc);
394
395 host->mmc_host_ops.start_signal_voltage_switch =
396 intel_start_signal_voltage_switch;
397
578b36b6
GY		 398 return 0;
399}
400
07a58883 401static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
b04fa064 402 .chip = &sdhci_acpi_chip_int,
f25c3372 403 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
9d65cb88 404 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
c80f275f 405 MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY,
07a58883 406 .flags = SDHCI_ACPI_RUNTIME_PM,
e1f5633a 407 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
e839b134
AH		 408 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
409 SDHCI_QUIRK2_STOP_WITH_TC |
410 SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400,
159cd328 411 .probe_slot = intel_probe_slot,
1c451c13 412 .priv_size = sizeof(struct intel_host),
07a58883
AH		 413};
414
e5571397 415static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
e1f5633a
AH		 416 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
417 SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
e5571397 418 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
9d65cb88 419 .caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD |
265984b3 420 MMC_CAP_WAIT_WHILE_BUSY,
e5571397
AH		 421 .flags = SDHCI_ACPI_RUNTIME_PM,
422 .pm_caps = MMC_PM_KEEP_POWER,
159cd328 423 .probe_slot = intel_probe_slot,
1c451c13 424 .priv_size = sizeof(struct intel_host),
e5571397
AH		 425};
426
07a58883 427static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = {
4fd4409c
AH		 428 .flags = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL |
429 SDHCI_ACPI_RUNTIME_PM,
e1f5633a 430 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
934e31b9
AH		 431 .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
432 SDHCI_QUIRK2_STOP_WITH_TC,
d3e97407 433 .caps = MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_AGGRESSIVE_PM,
159cd328 434 .probe_slot = intel_probe_slot,
1c451c13 435 .priv_size = sizeof(struct intel_host),
07a58883
AH		 436};
437
70cce2af
PE		 438static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd_3v = {
439 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
440 .quirks2 = SDHCI_QUIRK2_NO_1_8_V,
441 .caps = MMC_CAP_NONREMOVABLE,
442};
443
444static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = {
445 .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
446 .caps = MMC_CAP_NONREMOVABLE,
447};
448
07a58883
AH		 449struct sdhci_acpi_uid_slot {
450 const char *hid;
451 const char *uid;
452 const struct sdhci_acpi_slot *slot;
453};
454
455static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = {
e839b134
AH		 456 { "80865ACA", NULL, &sdhci_acpi_slot_int_sd },
457 { "80865ACC", NULL, &sdhci_acpi_slot_int_emmc },
458 { "80865AD0", NULL, &sdhci_acpi_slot_int_sdio },
07a58883 459 { "80860F14" , "1" , &sdhci_acpi_slot_int_emmc },
db52d4f8 460 { "80860F14" , "2" , &sdhci_acpi_slot_int_sdio },
07a58883 461 { "80860F14" , "3" , &sdhci_acpi_slot_int_sd },
aad95dc4 462 { "80860F16" , NULL, &sdhci_acpi_slot_int_sd },
07a58883 463 { "INT33BB" , "2" , &sdhci_acpi_slot_int_sdio },
7147eaf3 464 { "INT33BB" , "3" , &sdhci_acpi_slot_int_sd },
07a58883 465 { "INT33C6" , NULL, &sdhci_acpi_slot_int_sdio },
07c001c1 466 { "INT3436" , NULL, &sdhci_acpi_slot_int_sdio },
d0ed8e6b 467 { "INT344D" , NULL, &sdhci_acpi_slot_int_sdio },
0cd2f044 468 { "PNP0FFF" , "3" , &sdhci_acpi_slot_int_sd },
07a58883 469 { "PNP0D40" },
70cce2af
PE		 470 { "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v },
471 { "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd },
07a58883
AH		 472 { },
473};
474
c4e05037 475static const struct acpi_device_id sdhci_acpi_ids[] = {
e839b134
AH		 476 { "80865ACA" },
477 { "80865ACC" },
478 { "80865AD0" },
07a58883 479 { "80860F14" },
aad95dc4 480 { "80860F16" },
07a58883
AH		 481 { "INT33BB" },
482 { "INT33C6" },
07c001c1 483 { "INT3436" },
d0ed8e6b 484 { "INT344D" },
07a58883 485 { "PNP0D40" },
70cce2af
PE		 486 { "QCOM8051" },
487 { "QCOM8052" },
c4e05037
AH		 488 { },
489};
490MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids);
491
3db35251
AH		 492static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(const char *hid,
493 const char *uid)
c4e05037 494{
07a58883
AH		 495 const struct sdhci_acpi_uid_slot *u;
496
497 for (u = sdhci_acpi_uids; u->hid; u++) {
498 if (strcmp(u->hid, hid))
499 continue;
500 if (!u->uid)
501 return u->slot;
502 if (uid && !strcmp(u->uid, uid))
503 return u->slot;
504 }
c4e05037
AH		 505 return NULL;
506}
507
4e608e4e 508static int sdhci_acpi_probe(struct platform_device *pdev)
c4e05037
AH		 509{
510 struct device *dev = &pdev->dev;
f07b7952 511 const struct sdhci_acpi_slot *slot;
e5bbf307 512 struct acpi_device *device, *child;
c4e05037
AH		 513 struct sdhci_acpi_host *c;
514 struct sdhci_host *host;
515 struct resource *iomem;
516 resource_size_t len;
f07b7952 517 size_t priv_size;
c4e05037 518 const char *hid;
3db35251 519 const char *uid;
87875655 520 int err;
c4e05037 521
cd25c7be
AS		 522 device = ACPI_COMPANION(dev);
523 if (!device)
c4e05037
AH		 524 return -ENODEV;
525
17753d16 526 hid = acpi_device_hid(device);
a2038497 527 uid = acpi_device_uid(device);
17753d16 528
f07b7952
AH		 529 slot = sdhci_acpi_get_slot(hid, uid);
530
e5bbf307
AH		 531 /* Power on the SDHCI controller and its children */
532 acpi_device_fix_up_power(device);
17753d16
AH		 533 if (!sdhci_acpi_no_fixup_child_power(hid, uid)) {
534 list_for_each_entry(child, &device->children, node)
535 if (child->status.present && child->status.enabled)
536 acpi_device_fix_up_power(child);
537 }
e5bbf307 538
6e1c7d61
AH		 539 if (sdhci_acpi_byt_defer(dev))
540 return -EPROBE_DEFER;
541
c4e05037
AH		 542 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
543 if (!iomem)
544 return -ENOMEM;
545
546 len = resource_size(iomem);
547 if (len < 0x100)
548 dev_err(dev, "Invalid iomem size!\n");
549
550 if (!devm_request_mem_region(dev, iomem->start, len, dev_name(dev)))
551 return -ENOMEM;
552
f07b7952
AH		 553 priv_size = slot ? slot->priv_size : 0;
554 host = sdhci_alloc_host(dev, sizeof(struct sdhci_acpi_host) + priv_size);
c4e05037
AH		 555 if (IS_ERR(host))
556 return PTR_ERR(host);
557
558 c = sdhci_priv(host);
559 c->host = host;
f07b7952 560 c->slot = slot;
c4e05037
AH		 561 c->pdev = pdev;
562 c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM);
563
564 platform_set_drvdata(pdev, c);
565
566 host->hw_name = "ACPI";
567 host->ops = &sdhci_acpi_ops_dflt;
568 host->irq = platform_get_irq(pdev, 0);
569
570 host->ioaddr = devm_ioremap_nocache(dev, iomem->start,
571 resource_size(iomem));
572 if (host->ioaddr == NULL) {
573 err = -ENOMEM;
574 goto err_free;
575 }
576
c4e05037 577 if (c->slot) {
578b36b6 578 if (c->slot->probe_slot) {
7dafca83 579 err = c->slot->probe_slot(pdev, hid, uid);
578b36b6
GY		 580 if (err)
581 goto err_free;
582 }
c4e05037
AH		 583 if (c->slot->chip) {
584 host->ops = c->slot->chip->ops;
585 host->quirks |= c->slot->chip->quirks;
586 host->quirks2 |= c->slot->chip->quirks2;
587 host->mmc->caps |= c->slot->chip->caps;
588 host->mmc->caps2 |= c->slot->chip->caps2;
589 host->mmc->pm_caps |= c->slot->chip->pm_caps;
590 }
591 host->quirks |= c->slot->quirks;
592 host->quirks2 |= c->slot->quirks2;
593 host->mmc->caps |= c->slot->caps;
594 host->mmc->caps2 |= c->slot->caps2;
595 host->mmc->pm_caps |= c->slot->pm_caps;
596 }
597
0d3e3350
AH		 598 host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
599
a61abe6e 600 if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) {
4fd4409c
AH		 601 bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL);
602
e28d6f04
ZR		 603 err = mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0, NULL);
604 if (err) {
605 if (err == -EPROBE_DEFER)
606 goto err_free;
4fd4409c 607 dev_warn(dev, "failed to setup card detect gpio\n");
a61abe6e 608 c->use_runtime_pm = false;
4fd4409c 609 }
a61abe6e
AH		 610 }
611
4fd4409c
AH		 612 err = sdhci_add_host(host);
613 if (err)
614 goto err_free;
615
c4e05037 616 if (c->use_runtime_pm) {
1d1ff458 617 pm_runtime_set_active(dev);
c4e05037
AH		 618 pm_suspend_ignore_children(dev, 1);
619 pm_runtime_set_autosuspend_delay(dev, 50);
620 pm_runtime_use_autosuspend(dev);
621 pm_runtime_enable(dev);
622 }
623
4e6a2ef9
FZ		 624 device_enable_async_suspend(dev);
625
c4e05037
AH		 626 return 0;
627
628err_free:
c4e05037
AH		 629 sdhci_free_host(c->host);
630 return err;
631}
632
4e608e4e 633static int sdhci_acpi_remove(struct platform_device *pdev)
c4e05037
AH		 634{
635 struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
636 struct device *dev = &pdev->dev;
637 int dead;
638
639 if (c->use_runtime_pm) {
640 pm_runtime_get_sync(dev);
641 pm_runtime_disable(dev);
642 pm_runtime_put_noidle(dev);
643 }
644
578b36b6
GY		 645 if (c->slot && c->slot->remove_slot)
646 c->slot->remove_slot(pdev);
647
c4e05037
AH		 648 dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0);
649 sdhci_remove_host(c->host, dead);
c4e05037
AH		 650 sdhci_free_host(c->host);
651
652 return 0;
653}
654
655#ifdef CONFIG_PM_SLEEP
656
657static int sdhci_acpi_suspend(struct device *dev)
658{
659 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
d38dcad4 660 struct sdhci_host *host = c->host;
c4e05037 661
d38dcad4
AH		 662 if (host->tuning_mode != SDHCI_TUNING_MODE_3)
663 mmc_retune_needed(host->mmc);
664
665 return sdhci_suspend_host(host);
c4e05037
AH		 666}
667
668static int sdhci_acpi_resume(struct device *dev)
669{
670 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
671
6e1c7d61
AH		 672 sdhci_acpi_byt_setting(&c->pdev->dev);
673
c4e05037
AH		 674 return sdhci_resume_host(c->host);
675}
676
c4e05037
AH		 677#endif
678
162d6f98 679#ifdef CONFIG_PM
c4e05037
AH		 680
681static int sdhci_acpi_runtime_suspend(struct device *dev)
682{
683 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
d38dcad4
AH		 684 struct sdhci_host *host = c->host;
685
686 if (host->tuning_mode != SDHCI_TUNING_MODE_3)
687 mmc_retune_needed(host->mmc);
c4e05037 688
d38dcad4 689 return sdhci_runtime_suspend_host(host);
c4e05037
AH		 690}
691
692static int sdhci_acpi_runtime_resume(struct device *dev)
693{
694 struct sdhci_acpi_host *c = dev_get_drvdata(dev);
695
6e1c7d61
AH		 696 sdhci_acpi_byt_setting(&c->pdev->dev);
697
c4e05037
AH		 698 return sdhci_runtime_resume_host(c->host);
699}
700
c4e05037
AH		 701#endif
702
703static const struct dev_pm_ops sdhci_acpi_pm_ops = {
dafed447 704 SET_SYSTEM_SLEEP_PM_OPS(sdhci_acpi_suspend, sdhci_acpi_resume)
1d75f74b 705 SET_RUNTIME_PM_OPS(sdhci_acpi_runtime_suspend,
9b449e99 706 sdhci_acpi_runtime_resume, NULL)
c4e05037
AH		 707};
708
709static struct platform_driver sdhci_acpi_driver = {
710 .driver = {
711 .name = "sdhci-acpi",
c4e05037
AH		 712 .acpi_match_table = sdhci_acpi_ids,
713 .pm = &sdhci_acpi_pm_ops,
714 },
715 .probe = sdhci_acpi_probe,
4e608e4e 716 .remove = sdhci_acpi_remove,
c4e05037
AH		 717};
718
719module_platform_driver(sdhci_acpi_driver);
720
721MODULE_DESCRIPTION("Secure Digital Host Controller Interface ACPI driver");
722MODULE_AUTHOR("Adrian Hunter");
723MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)