Commit | Line | Data |
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2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
62ca8034 SH |
2 | /* |
3 | * Synopsys DesignWare Multimedia Card Interface driver | |
4 | * | |
5 | * Copyright (C) 2009 NXP Semiconductors | |
6 | * Copyright (C) 2009, 2010 Imagination Technologies Ltd. | |
62ca8034 SH |
7 | */ |
8 | ||
a3e2cd7f | 9 | #include <linux/err.h> |
62ca8034 SH |
10 | #include <linux/interrupt.h> |
11 | #include <linux/module.h> | |
12 | #include <linux/io.h> | |
13 | #include <linux/irq.h> | |
14 | #include <linux/platform_device.h> | |
ee2112be | 15 | #include <linux/pm_runtime.h> |
62ca8034 SH |
16 | #include <linux/slab.h> |
17 | #include <linux/mmc/host.h> | |
18 | #include <linux/mmc/mmc.h> | |
c91eab4b | 19 | #include <linux/of.h> |
ef87bd81 DN |
20 | #include <linux/mfd/altera-sysmgr.h> |
21 | #include <linux/regmap.h> | |
c91eab4b | 22 | |
62ca8034 | 23 | #include "dw_mmc.h" |
7725a52c | 24 | #include "dw_mmc-pltfm.h" |
62ca8034 | 25 | |
ef87bd81 DN |
26 | #define SOCFPGA_DW_MMC_CLK_PHASE_STEP 45 |
27 | #define SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel, reg_shift) \ | |
28 | ((((smplsel) & 0x7) << reg_shift) | (((drvsel) & 0x7) << 0)) | |
29 | ||
800d78bf | 30 | int dw_mci_pltfm_register(struct platform_device *pdev, |
bcc87666 | 31 | const struct dw_mci_drv_data *drv_data) |
62ca8034 SH |
32 | { |
33 | struct dw_mci *host; | |
34 | struct resource *regs; | |
62ca8034 | 35 | |
bb8bdc77 | 36 | host = devm_kzalloc(&pdev->dev, sizeof(struct dw_mci), GFP_KERNEL); |
62ca8034 SH |
37 | if (!host) |
38 | return -ENOMEM; | |
39 | ||
62ca8034 | 40 | host->irq = platform_get_irq(pdev, 0); |
bb8bdc77 TA |
41 | if (host->irq < 0) |
42 | return host->irq; | |
62ca8034 | 43 | |
800d78bf | 44 | host->drv_data = drv_data; |
4a90920c | 45 | host->dev = &pdev->dev; |
62ca8034 SH |
46 | host->irq_flags = 0; |
47 | host->pdata = pdev->dev.platform_data; | |
bcc87666 | 48 | |
220b484f | 49 | host->regs = devm_platform_get_and_ioremap_resource(pdev, 0, ®s); |
a3e2cd7f TR |
50 | if (IS_ERR(host->regs)) |
51 | return PTR_ERR(host->regs); | |
bb8bdc77 | 52 | |
45c7a490 JC |
53 | /* Get registers' physical base address */ |
54 | host->phy_regs = regs->start; | |
55 | ||
62ca8034 | 56 | platform_set_drvdata(pdev, host); |
dd369800 | 57 | return dw_mci_probe(host); |
62ca8034 | 58 | } |
17403f23 TA |
59 | EXPORT_SYMBOL_GPL(dw_mci_pltfm_register); |
60 | ||
ee2112be SL |
61 | const struct dev_pm_ops dw_mci_pltfm_pmops = { |
62 | SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, | |
63 | pm_runtime_force_resume) | |
64 | SET_RUNTIME_PM_OPS(dw_mci_runtime_suspend, | |
65 | dw_mci_runtime_resume, | |
66 | NULL) | |
67 | }; | |
17403f23 | 68 | EXPORT_SYMBOL_GPL(dw_mci_pltfm_pmops); |
62ca8034 | 69 | |
ef87bd81 DN |
70 | static int dw_mci_socfpga_priv_init(struct dw_mci *host) |
71 | { | |
72 | struct device_node *np = host->dev->of_node; | |
73 | struct regmap *sys_mgr_base_addr; | |
74 | u32 clk_phase[2] = {0}, reg_offset, reg_shift; | |
75 | int i, rc, hs_timing; | |
76 | ||
77 | rc = of_property_read_variable_u32_array(np, "clk-phase-sd-hs", &clk_phase[0], 2, 0); | |
78 | if (rc < 0) | |
79 | return 0; | |
80 | ||
81 | sys_mgr_base_addr = altr_sysmgr_regmap_lookup_by_phandle(np, "altr,sysmgr-syscon"); | |
82 | if (IS_ERR(sys_mgr_base_addr)) { | |
83 | dev_warn(host->dev, "clk-phase-sd-hs was specified, but failed to find altr,sys-mgr regmap!\n"); | |
84 | return 0; | |
85 | } | |
86 | ||
87 | of_property_read_u32_index(np, "altr,sysmgr-syscon", 1, ®_offset); | |
88 | of_property_read_u32_index(np, "altr,sysmgr-syscon", 2, ®_shift); | |
89 | ||
90 | for (i = 0; i < ARRAY_SIZE(clk_phase); i++) | |
91 | clk_phase[i] /= SOCFPGA_DW_MMC_CLK_PHASE_STEP; | |
92 | ||
93 | hs_timing = SYSMGR_SDMMC_CTRL_SET(clk_phase[0], clk_phase[1], reg_shift); | |
94 | regmap_write(sys_mgr_base_addr, reg_offset, hs_timing); | |
95 | ||
96 | return 0; | |
97 | } | |
98 | ||
99 | static const struct dw_mci_drv_data socfpga_drv_data = { | |
100 | .init = dw_mci_socfpga_priv_init, | |
101 | }; | |
102 | ||
c91eab4b TA |
103 | static const struct of_device_id dw_mci_pltfm_match[] = { |
104 | { .compatible = "snps,dw-mshc", }, | |
ef87bd81 | 105 | { .compatible = "altr,socfpga-dw-mshc", .data = &socfpga_drv_data, }, |
aaaaeb7a | 106 | { .compatible = "img,pistachio-dw-mshc", }, |
c91eab4b TA |
107 | {}, |
108 | }; | |
109 | MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match); | |
110 | ||
b177a530 HS |
111 | static int dw_mci_pltfm_probe(struct platform_device *pdev) |
112 | { | |
c73e41c8 HS |
113 | const struct dw_mci_drv_data *drv_data = NULL; |
114 | const struct of_device_id *match; | |
115 | ||
116 | if (pdev->dev.of_node) { | |
117 | match = of_match_node(dw_mci_pltfm_match, pdev->dev.of_node); | |
118 | drv_data = match->data; | |
119 | } | |
120 | ||
121 | return dw_mci_pltfm_register(pdev, drv_data); | |
b177a530 HS |
122 | } |
123 | ||
982fe2e0 | 124 | void dw_mci_pltfm_remove(struct platform_device *pdev) |
b177a530 HS |
125 | { |
126 | struct dw_mci *host = platform_get_drvdata(pdev); | |
127 | ||
128 | dw_mci_remove(host); | |
b177a530 HS |
129 | } |
130 | EXPORT_SYMBOL_GPL(dw_mci_pltfm_remove); | |
131 | ||
62ca8034 | 132 | static struct platform_driver dw_mci_pltfm_driver = { |
49480cf2 | 133 | .probe = dw_mci_pltfm_probe, |
982fe2e0 | 134 | .remove_new = dw_mci_pltfm_remove, |
62ca8034 SH |
135 | .driver = { |
136 | .name = "dw_mmc", | |
21b2cec6 | 137 | .probe_type = PROBE_PREFER_ASYNCHRONOUS, |
cf109bc0 | 138 | .of_match_table = dw_mci_pltfm_match, |
62ca8034 SH |
139 | .pm = &dw_mci_pltfm_pmops, |
140 | }, | |
141 | }; | |
142 | ||
49480cf2 | 143 | module_platform_driver(dw_mci_pltfm_driver); |
62ca8034 SH |
144 | |
145 | MODULE_DESCRIPTION("DW Multimedia Card Interface driver"); | |
146 | MODULE_AUTHOR("NXP Semiconductor VietNam"); | |
147 | MODULE_AUTHOR("Imagination Technologies Ltd"); | |
148 | MODULE_LICENSE("GPL v2"); |