[linux-2.6-block.git] / drivers / mmc / host / cavium-thunderx.c

/*
 * Driver for MMC and SSD cards for Cavium ThunderX SOCs.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2016 Cavium Inc.
 */
#include <linux/device.h>
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
#include <linux/mmc/mmc.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/pci.h>
#include "cavium.h"

static void thunder_mmc_acquire_bus(struct cvm_mmc_host *host)
{
	down(&host->mmc_serializer);
}

static void thunder_mmc_release_bus(struct cvm_mmc_host *host)
{
	up(&host->mmc_serializer);
}

static void thunder_mmc_int_enable(struct cvm_mmc_host *host, u64 val)
{
	writeq(val, host->base + MIO_EMM_INT(host));
	writeq(val, host->base + MIO_EMM_INT_EN_SET(host));
}

static int thunder_mmc_register_interrupts(struct cvm_mmc_host *host,
					   struct pci_dev *pdev)
{
	int nvec, ret, i;

	nvec = pci_alloc_irq_vectors(pdev, 1, 9, PCI_IRQ_MSIX);
	if (nvec < 0)
		return nvec;

	/* register interrupts */
	for (i = 0; i < nvec; i++) {
		ret = devm_request_irq(&pdev->dev, pci_irq_vector(pdev, i),
				       cvm_mmc_interrupt,
				       0, cvm_mmc_irq_names[i], host);
		if (ret)
			return ret;
	}
	return 0;
}

static int thunder_mmc_probe(struct pci_dev *pdev,
			     const struct pci_device_id *id)
{
	struct device_node *node = pdev->dev.of_node;
	struct device *dev = &pdev->dev;
	struct device_node *child_node;
	struct cvm_mmc_host *host;
	int ret, i = 0;

	host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
	if (!host)
		return -ENOMEM;

	pci_set_drvdata(pdev, host);
	ret = pcim_enable_device(pdev);
	if (ret)
		return ret;

	ret = pci_request_regions(pdev, KBUILD_MODNAME);
	if (ret)
		return ret;

	host->base = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));
	if (!host->base) {
		ret = -EINVAL;
		goto error;
	}

	/* On ThunderX these are identical */
	host->dma_base = host->base;

	host->reg_off = 0x2000;
	host->reg_off_dma = 0x160;

	host->clk = devm_clk_get(dev, NULL);
	if (IS_ERR(host->clk)) {
		ret = PTR_ERR(host->clk);
		goto error;
	}

	ret = clk_prepare_enable(host->clk);
	if (ret)
		goto error;
	host->sys_freq = clk_get_rate(host->clk);

	spin_lock_init(&host->irq_handler_lock);
	sema_init(&host->mmc_serializer, 1);

	host->dev = dev;
	host->acquire_bus = thunder_mmc_acquire_bus;
	host->release_bus = thunder_mmc_release_bus;
	host->int_enable = thunder_mmc_int_enable;

	host->use_sg = true;
	host->big_dma_addr = true;
	host->need_irq_handler_lock = true;
	host->last_slot = -1;

	ret = dma_set_mask(dev, DMA_BIT_MASK(48));
	if (ret)
		goto error;

	/*
	 * Clear out any pending interrupts that may be left over from
	 * bootloader. Writing 1 to the bits clears them.
	 */
	writeq(127, host->base + MIO_EMM_INT_EN(host));
	writeq(3, host->base + MIO_EMM_DMA_INT_ENA_W1C(host));
	/* Clear DMA FIFO */
	writeq(BIT_ULL(16), host->base + MIO_EMM_DMA_FIFO_CFG(host));

	ret = thunder_mmc_register_interrupts(host, pdev);
	if (ret)
		goto error;

	for_each_child_of_node(node, child_node) {
		/*
		 * mmc_of_parse and devm* require one device per slot.
		 * Create a dummy device per slot and set the node pointer to
		 * the slot. The easiest way to get this is using
		 * of_platform_device_create.
		 */
		if (of_device_is_compatible(child_node, "mmc-slot")) {
			host->slot_pdev[i] = of_platform_device_create(child_node, NULL,
								       &pdev->dev);
			if (!host->slot_pdev[i])
				continue;

			ret = cvm_mmc_of_slot_probe(&host->slot_pdev[i]->dev, host);
			if (ret)
				goto error;
		}
		i++;
	}
	dev_info(dev, "probed\n");
	return 0;

error:
	for (i = 0; i < CAVIUM_MAX_MMC; i++) {
		if (host->slot[i])
			cvm_mmc_of_slot_remove(host->slot[i]);
		if (host->slot_pdev[i]) {
			get_device(&host->slot_pdev[i]->dev);
			of_platform_device_destroy(&host->slot_pdev[i]->dev, NULL);
			put_device(&host->slot_pdev[i]->dev);
		}
	}
	clk_disable_unprepare(host->clk);
	pci_release_regions(pdev);
	return ret;
}

static void thunder_mmc_remove(struct pci_dev *pdev)
{
	struct cvm_mmc_host *host = pci_get_drvdata(pdev);
	u64 dma_cfg;
	int i;

	for (i = 0; i < CAVIUM_MAX_MMC; i++)
		if (host->slot[i])
			cvm_mmc_of_slot_remove(host->slot[i]);

	dma_cfg = readq(host->dma_base + MIO_EMM_DMA_CFG(host));
	dma_cfg &= ~MIO_EMM_DMA_CFG_EN;
	writeq(dma_cfg, host->dma_base + MIO_EMM_DMA_CFG(host));

	clk_disable_unprepare(host->clk);
	pci_release_regions(pdev);
}

static const struct pci_device_id thunder_mmc_id_table[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, 0xa010) },
	{ 0, }  /* end of table */
};

static struct pci_driver thunder_mmc_driver = {
	.name = KBUILD_MODNAME,
	.id_table = thunder_mmc_id_table,
	.probe = thunder_mmc_probe,
	.remove = thunder_mmc_remove,
};

module_pci_driver(thunder_mmc_driver);

MODULE_AUTHOR("Cavium Inc.");
MODULE_DESCRIPTION("Cavium ThunderX eMMC Driver");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, thunder_mmc_id_table);
Commit	Line	Data
166bac38 JG	1	/*
	2	* Driver for MMC and SSD cards for Cavium ThunderX SOCs.
	3	*
	4	* This file is subject to the terms and conditions of the GNU General Public
	5	* License. See the file "COPYING" in the main directory of this archive
	6	* for more details.
	7	*
	8	* Copyright (C) 2016 Cavium Inc.
	9	*/
b917c6d1	10	#include <linux/device.h>
166bac38 JG	11	#include <linux/dma-mapping.h>
	12	#include <linux/interrupt.h>
	13	#include <linux/mmc/mmc.h>
	14	#include <linux/module.h>
	15	#include <linux/of.h>
	16	#include <linux/of_platform.h>
	17	#include <linux/pci.h>
	18	#include "cavium.h"
	19
	20	static void thunder_mmc_acquire_bus(struct cvm_mmc_host *host)
	21	{
	22	down(&host->mmc_serializer);
	23	}
	24
	25	static void thunder_mmc_release_bus(struct cvm_mmc_host *host)
	26	{
	27	up(&host->mmc_serializer);
	28	}
	29
	30	static void thunder_mmc_int_enable(struct cvm_mmc_host *host, u64 val)
	31	{
	32	writeq(val, host->base + MIO_EMM_INT(host));
	33	writeq(val, host->base + MIO_EMM_INT_EN_SET(host));
	34	}
	35
	36	static int thunder_mmc_register_interrupts(struct cvm_mmc_host *host,
	37	struct pci_dev *pdev)
	38	{
	39	int nvec, ret, i;
	40
	41	nvec = pci_alloc_irq_vectors(pdev, 1, 9, PCI_IRQ_MSIX);
	42	if (nvec < 0)
	43	return nvec;
	44
	45	/* register interrupts */
	46	for (i = 0; i < nvec; i++) {
	47	ret = devm_request_irq(&pdev->dev, pci_irq_vector(pdev, i),
	48	cvm_mmc_interrupt,
	49	0, cvm_mmc_irq_names[i], host);
	50	if (ret)
	51	return ret;
	52	}
	53	return 0;
	54	}
	55
	56	static int thunder_mmc_probe(struct pci_dev *pdev,
	57	const struct pci_device_id *id)
	58	{
	59	struct device_node *node = pdev->dev.of_node;
	60	struct device *dev = &pdev->dev;
	61	struct device_node *child_node;
	62	struct cvm_mmc_host *host;
	63	int ret, i = 0;
	64
	65	host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
	66	if (!host)
	67	return -ENOMEM;
	68
	69	pci_set_drvdata(pdev, host);
	70	ret = pcim_enable_device(pdev);
	71	if (ret)
	72	return ret;
	73
	74	ret = pci_request_regions(pdev, KBUILD_MODNAME);
75	if (ret)
76	return ret;
77
78	host->base = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));
f630d011 CY	79	if (!host->base) {
	80	ret = -EINVAL;
	81	goto error;
	82	}
166bac38 JG	83
	84	/* On ThunderX these are identical */
	85	host->dma_base = host->base;
	86
	87	host->reg_off = 0x2000;
cd76e5c5	88	host->reg_off_dma = 0x160;
166bac38 JG	89
166bac38 JG	90	host->clk = devm_clk_get(dev, NULL);
f630d011 CY	91	if (IS_ERR(host->clk)) {
	92	ret = PTR_ERR(host->clk);
	93	goto error;
	94	}
166bac38 JG	95
	96	ret = clk_prepare_enable(host->clk);
	97	if (ret)
f630d011	98	goto error;
166bac38 JG	99	host->sys_freq = clk_get_rate(host->clk);
	100
	101	spin_lock_init(&host->irq_handler_lock);
	102	sema_init(&host->mmc_serializer, 1);
	103
	104	host->dev = dev;
	105	host->acquire_bus = thunder_mmc_acquire_bus;
	106	host->release_bus = thunder_mmc_release_bus;
	107	host->int_enable = thunder_mmc_int_enable;
	108
cd76e5c5	109	host->use_sg = true;
166bac38 JG	110	host->big_dma_addr = true;
	111	host->need_irq_handler_lock = true;
	112	host->last_slot = -1;
	113
	114	ret = dma_set_mask(dev, DMA_BIT_MASK(48));
	115	if (ret)
	116	goto error;
	117
	118	/*
	119	* Clear out any pending interrupts that may be left over from
	120	* bootloader. Writing 1 to the bits clears them.
	121	*/
	122	writeq(127, host->base + MIO_EMM_INT_EN(host));
	123	writeq(3, host->base + MIO_EMM_DMA_INT_ENA_W1C(host));
cd76e5c5 JG	124	/* Clear DMA FIFO */
cd76e5c5 JG	125	writeq(BIT_ULL(16), host->base + MIO_EMM_DMA_FIFO_CFG(host));
166bac38 JG	126
	127	ret = thunder_mmc_register_interrupts(host, pdev);
	128	if (ret)
	129	goto error;
	130
	131	for_each_child_of_node(node, child_node) {
	132	/*
	133	* mmc_of_parse and devm* require one device per slot.
	134	* Create a dummy device per slot and set the node pointer to
	135	* the slot. The easiest way to get this is using
	136	* of_platform_device_create.
	137	*/
	138	if (of_device_is_compatible(child_node, "mmc-slot")) {
	139	host->slot_pdev[i] = of_platform_device_create(child_node, NULL,
	140	&pdev->dev);
	141	if (!host->slot_pdev[i])
	142	continue;
	143
	144	ret = cvm_mmc_of_slot_probe(&host->slot_pdev[i]->dev, host);
	145	if (ret)
	146	goto error;
	147	}
	148	i++;
	149	}
	150	dev_info(dev, "probed\n");
	151	return 0;
	152
	153	error:
8fb83b14 JG	154	for (i = 0; i < CAVIUM_MAX_MMC; i++) {
	155	if (host->slot[i])
	156	cvm_mmc_of_slot_remove(host->slot[i]);
b917c6d1 JG	157	if (host->slot_pdev[i]) {
b917c6d1 JG	158	get_device(&host->slot_pdev[i]->dev);
8fb83b14	159	of_platform_device_destroy(&host->slot_pdev[i]->dev, NULL);
b917c6d1 JG	160	put_device(&host->slot_pdev[i]->dev);
b917c6d1 JG	161	}
8fb83b14	162	}
166bac38	163	clk_disable_unprepare(host->clk);
f630d011	164	pci_release_regions(pdev);
166bac38 JG	165	return ret;
	166	}
	167
	168	static void thunder_mmc_remove(struct pci_dev *pdev)
	169	{
	170	struct cvm_mmc_host *host = pci_get_drvdata(pdev);
	171	u64 dma_cfg;
	172	int i;
	173
	174	for (i = 0; i < CAVIUM_MAX_MMC; i++)
	175	if (host->slot[i])
	176	cvm_mmc_of_slot_remove(host->slot[i]);
	177
	178	dma_cfg = readq(host->dma_base + MIO_EMM_DMA_CFG(host));
	179	dma_cfg &= ~MIO_EMM_DMA_CFG_EN;
	180	writeq(dma_cfg, host->dma_base + MIO_EMM_DMA_CFG(host));
	181
	182	clk_disable_unprepare(host->clk);
f630d011	183	pci_release_regions(pdev);
166bac38 JG	184	}
	185
	186	static const struct pci_device_id thunder_mmc_id_table[] = {
	187	{ PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, 0xa010) },
	188	{ 0, } /* end of table */
	189	};
	190
	191	static struct pci_driver thunder_mmc_driver = {
	192	.name = KBUILD_MODNAME,
	193	.id_table = thunder_mmc_id_table,
	194	.probe = thunder_mmc_probe,
	195	.remove = thunder_mmc_remove,
	196	};
	197
dfc28b11	198	module_pci_driver(thunder_mmc_driver);
166bac38 JG	199
	200	MODULE_AUTHOR("Cavium Inc.");
	201	MODULE_DESCRIPTION("Cavium ThunderX eMMC Driver");
	202	MODULE_LICENSE("GPL");
	203	MODULE_DEVICE_TABLE(pci, thunder_mmc_id_table);