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atmel-mci: Implement tasklet as a state machine
[linux-2.6-block.git] / drivers / mmc / host / atmel-mci.c
CommitLineData
7d2be074
HS		 1/*
2 * Atmel MultiMedia Card Interface driver
3 *
4 * Copyright (C) 2004-2008 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/blkdev.h>
11#include <linux/clk.h>
deec9ae3 12#include <linux/debugfs.h>
7d2be074 13#include <linux/device.h>
fbfca4b8 14#include <linux/err.h>
3c26e170 15#include <linux/gpio.h>
7d2be074
HS		 16#include <linux/init.h>
17#include <linux/interrupt.h>
18#include <linux/ioport.h>
19#include <linux/module.h>
20#include <linux/platform_device.h>
21#include <linux/scatterlist.h>
deec9ae3
HS		 22#include <linux/seq_file.h>
23#include <linux/stat.h>
7d2be074
HS		 24
25#include <linux/mmc/host.h>
26
27#include <asm/atmel-mci.h>
28#include <asm/io.h>
29#include <asm/unaligned.h>
30
3663b736 31#include <mach/board.h>
7d2be074
HS		 32
33#include "atmel-mci-regs.h"
34
35#define ATMCI_DATA_ERROR_FLAGS (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE)
36
37enum {
38 EVENT_CMD_COMPLETE = 0,
7d2be074 39 EVENT_XFER_COMPLETE,
c06ad258
HS		 40 EVENT_DATA_COMPLETE,
41 EVENT_DATA_ERROR,
42};
43
44enum atmel_mci_state {
45 STATE_SENDING_CMD = 0,
46 STATE_SENDING_DATA,
47 STATE_DATA_BUSY,
48 STATE_SENDING_STOP,
49 STATE_DATA_ERROR,
7d2be074
HS		 50};
51
52struct atmel_mci {
53 struct mmc_host *mmc;
54 void __iomem *regs;
55
56 struct scatterlist *sg;
57 unsigned int pio_offset;
58
59 struct mmc_request *mrq;
60 struct mmc_command *cmd;
61 struct mmc_data *data;
62
63 u32 cmd_status;
64 u32 data_status;
7d2be074
HS		 65 u32 stop_cmdr;
66
67 u32 mode_reg;
68 u32 sdc_reg;
69
70 struct tasklet_struct tasklet;
71 unsigned long pending_events;
72 unsigned long completed_events;
c06ad258 73 enum atmel_mci_state state;
7d2be074
HS		 74
75 int present;
76 int detect_pin;
77 int wp_pin;
78
79 /* For detect pin debouncing */
80 struct timer_list detect_timer;
81
82 unsigned long bus_hz;
83 unsigned long mapbase;
84 struct clk *mck;
85 struct platform_device *pdev;
86};
87
7d2be074
HS		 88#define atmci_test_and_clear_pending(host, event) \
89 test_and_clear_bit(event, &host->pending_events)
7d2be074
HS		 90#define atmci_set_completed(host, event) \
91 set_bit(event, &host->completed_events)
92#define atmci_set_pending(host, event) \
93 set_bit(event, &host->pending_events)
7d2be074 94
deec9ae3
HS		 95/*
96 * The debugfs stuff below is mostly optimized away when
97 * CONFIG_DEBUG_FS is not set.
98 */
99static int atmci_req_show(struct seq_file *s, void *v)
100{
101 struct atmel_mci *host = s->private;
102 struct mmc_request *mrq = host->mrq;
103 struct mmc_command *cmd;
104 struct mmc_command *stop;
105 struct mmc_data *data;
106
107 /* Make sure we get a consistent snapshot */
108 spin_lock_irq(&host->mmc->lock);
109
110 if (mrq) {
111 cmd = mrq->cmd;
112 data = mrq->data;
113 stop = mrq->stop;
114
115 if (cmd)
116 seq_printf(s,
117 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
118 cmd->opcode, cmd->arg, cmd->flags,
119 cmd->resp[0], cmd->resp[1], cmd->resp[2],
120 cmd->resp[2], cmd->error);
121 if (data)
122 seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
123 data->bytes_xfered, data->blocks,
124 data->blksz, data->flags, data->error);
125 if (stop)
126 seq_printf(s,
127 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
128 stop->opcode, stop->arg, stop->flags,
129 stop->resp[0], stop->resp[1], stop->resp[2],
130 stop->resp[2], stop->error);
131 }
132
133 spin_unlock_irq(&host->mmc->lock);
134
135 return 0;
136}
137
138static int atmci_req_open(struct inode *inode, struct file *file)
139{
140 return single_open(file, atmci_req_show, inode->i_private);
141}
142
143static const struct file_operations atmci_req_fops = {
144 .owner = THIS_MODULE,
145 .open = atmci_req_open,
146 .read = seq_read,
147 .llseek = seq_lseek,
148 .release = single_release,
149};
150
151static void atmci_show_status_reg(struct seq_file *s,
152 const char *regname, u32 value)
153{
154 static const char *sr_bit[] = {
155 [0] = "CMDRDY",
156 [1] = "RXRDY",
157 [2] = "TXRDY",
158 [3] = "BLKE",
159 [4] = "DTIP",
160 [5] = "NOTBUSY",
161 [8] = "SDIOIRQA",
162 [9] = "SDIOIRQB",
163 [16] = "RINDE",
164 [17] = "RDIRE",
165 [18] = "RCRCE",
166 [19] = "RENDE",
167 [20] = "RTOE",
168 [21] = "DCRCE",
169 [22] = "DTOE",
170 [30] = "OVRE",
171 [31] = "UNRE",
172 };
173 unsigned int i;
174
175 seq_printf(s, "%s:\t0x%08x", regname, value);
176 for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
177 if (value & (1 << i)) {
178 if (sr_bit[i])
179 seq_printf(s, " %s", sr_bit[i]);
180 else
181 seq_puts(s, " UNKNOWN");
182 }
183 }
184 seq_putc(s, '\n');
185}
186
187static int atmci_regs_show(struct seq_file *s, void *v)
188{
189 struct atmel_mci *host = s->private;
190 u32 *buf;
191
192 buf = kmalloc(MCI_REGS_SIZE, GFP_KERNEL);
193 if (!buf)
194 return -ENOMEM;
195
196 /* Grab a more or less consistent snapshot */
197 spin_lock_irq(&host->mmc->lock);
87e60f2b 198 clk_enable(host->mck);
deec9ae3 199 memcpy_fromio(buf, host->regs, MCI_REGS_SIZE);
87e60f2b 200 clk_disable(host->mck);
deec9ae3
HS		 201 spin_unlock_irq(&host->mmc->lock);
202
203 seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n",
204 buf[MCI_MR / 4],
205 buf[MCI_MR / 4] & MCI_MR_RDPROOF ? " RDPROOF" : "",
206 buf[MCI_MR / 4] & MCI_MR_WRPROOF ? " WRPROOF" : "",
207 buf[MCI_MR / 4] & 0xff);
208 seq_printf(s, "DTOR:\t0x%08x\n", buf[MCI_DTOR / 4]);
209 seq_printf(s, "SDCR:\t0x%08x\n", buf[MCI_SDCR / 4]);
210 seq_printf(s, "ARGR:\t0x%08x\n", buf[MCI_ARGR / 4]);
211 seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
212 buf[MCI_BLKR / 4],
213 buf[MCI_BLKR / 4] & 0xffff,
214 (buf[MCI_BLKR / 4] >> 16) & 0xffff);
215
216 /* Don't read RSPR and RDR; it will consume the data there */
217
218 atmci_show_status_reg(s, "SR", buf[MCI_SR / 4]);
219 atmci_show_status_reg(s, "IMR", buf[MCI_IMR / 4]);
220
b17339a1
HS		 221 kfree(buf);
222
deec9ae3
HS		 223 return 0;
224}
225
226static int atmci_regs_open(struct inode *inode, struct file *file)
227{
228 return single_open(file, atmci_regs_show, inode->i_private);
229}
230
231static const struct file_operations atmci_regs_fops = {
232 .owner = THIS_MODULE,
233 .open = atmci_regs_open,
234 .read = seq_read,
235 .llseek = seq_lseek,
236 .release = single_release,
237};
238
239static void atmci_init_debugfs(struct atmel_mci *host)
240{
241 struct mmc_host *mmc;
242 struct dentry *root;
243 struct dentry *node;
deec9ae3
HS		 244
245 mmc = host->mmc;
246 root = mmc->debugfs_root;
247 if (!root)
248 return;
249
250 node = debugfs_create_file("regs", S_IRUSR, root, host,
251 &atmci_regs_fops);
252 if (IS_ERR(node))
253 return;
254 if (!node)
255 goto err;
256
deec9ae3
HS		 257 node = debugfs_create_file("req", S_IRUSR, root, host, &atmci_req_fops);
258 if (!node)
259 goto err;
260
c06ad258
HS		 261 node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
262 if (!node)
263 goto err;
264
deec9ae3
HS		 265 node = debugfs_create_x32("pending_events", S_IRUSR, root,
266 (u32 *)&host->pending_events);
267 if (!node)
268 goto err;
269
270 node = debugfs_create_x32("completed_events", S_IRUSR, root,
271 (u32 *)&host->completed_events);
272 if (!node)
273 goto err;
274
275 return;
276
277err:
278 dev_err(&host->pdev->dev,
279 "failed to initialize debugfs for controller\n");
280}
7d2be074
HS		 281
282static void atmci_enable(struct atmel_mci *host)
283{
284 clk_enable(host->mck);
285 mci_writel(host, CR, MCI_CR_MCIEN);
286 mci_writel(host, MR, host->mode_reg);
287 mci_writel(host, SDCR, host->sdc_reg);
288}
289
290static void atmci_disable(struct atmel_mci *host)
291{
292 mci_writel(host, CR, MCI_CR_SWRST);
293
294 /* Stall until write is complete, then disable the bus clock */
295 mci_readl(host, SR);
296 clk_disable(host->mck);
297}
298
299static inline unsigned int ns_to_clocks(struct atmel_mci *host,
300 unsigned int ns)
301{
302 return (ns * (host->bus_hz / 1000000) + 999) / 1000;
303}
304
305static void atmci_set_timeout(struct atmel_mci *host,
306 struct mmc_data *data)
307{
308 static unsigned dtomul_to_shift[] = {
309 0, 4, 7, 8, 10, 12, 16, 20
310 };
311 unsigned timeout;
312 unsigned dtocyc;
313 unsigned dtomul;
314
315 timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
316
317 for (dtomul = 0; dtomul < 8; dtomul++) {
318 unsigned shift = dtomul_to_shift[dtomul];
319 dtocyc = (timeout + (1 << shift) - 1) >> shift;
320 if (dtocyc < 15)
321 break;
322 }
323
324 if (dtomul >= 8) {
325 dtomul = 7;
326 dtocyc = 15;
327 }
328
329 dev_vdbg(&host->mmc->class_dev, "setting timeout to %u cycles\n",
330 dtocyc << dtomul_to_shift[dtomul]);
331 mci_writel(host, DTOR, (MCI_DTOMUL(dtomul) | MCI_DTOCYC(dtocyc)));
332}
333
334/*
335 * Return mask with command flags to be enabled for this command.
336 */
337static u32 atmci_prepare_command(struct mmc_host *mmc,
338 struct mmc_command *cmd)
339{
340 struct mmc_data *data;
341 u32 cmdr;
342
343 cmd->error = -EINPROGRESS;
344
345 cmdr = MCI_CMDR_CMDNB(cmd->opcode);
346
347 if (cmd->flags & MMC_RSP_PRESENT) {
348 if (cmd->flags & MMC_RSP_136)
349 cmdr |= MCI_CMDR_RSPTYP_136BIT;
350 else
351 cmdr |= MCI_CMDR_RSPTYP_48BIT;
352 }
353
354 /*
355 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
356 * it's too difficult to determine whether this is an ACMD or
357 * not. Better make it 64.
358 */
359 cmdr |= MCI_CMDR_MAXLAT_64CYC;
360
361 if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
362 cmdr |= MCI_CMDR_OPDCMD;
363
364 data = cmd->data;
365 if (data) {
366 cmdr |= MCI_CMDR_START_XFER;
367 if (data->flags & MMC_DATA_STREAM)
368 cmdr |= MCI_CMDR_STREAM;
369 else if (data->blocks > 1)
370 cmdr |= MCI_CMDR_MULTI_BLOCK;
371 else
372 cmdr |= MCI_CMDR_BLOCK;
373
374 if (data->flags & MMC_DATA_READ)
375 cmdr |= MCI_CMDR_TRDIR_READ;
376 }
377
378 return cmdr;
379}
380
381static void atmci_start_command(struct atmel_mci *host,
382 struct mmc_command *cmd,
383 u32 cmd_flags)
384{
7d2be074
HS		 385 WARN_ON(host->cmd);
386 host->cmd = cmd;
387
388 dev_vdbg(&host->mmc->class_dev,
389 "start command: ARGR=0x%08x CMDR=0x%08x\n",
390 cmd->arg, cmd_flags);
391
392 mci_writel(host, ARGR, cmd->arg);
393 mci_writel(host, CMDR, cmd_flags);
394}
395
396static void send_stop_cmd(struct mmc_host *mmc, struct mmc_data *data)
397{
398 struct atmel_mci *host = mmc_priv(mmc);
399
400 atmci_start_command(host, data->stop, host->stop_cmdr);
401 mci_writel(host, IER, MCI_CMDRDY);
402}
403
404static void atmci_request_end(struct mmc_host *mmc, struct mmc_request *mrq)
405{
406 struct atmel_mci *host = mmc_priv(mmc);
407
408 WARN_ON(host->cmd || host->data);
409 host->mrq = NULL;
410
411 atmci_disable(host);
412
413 mmc_request_done(mmc, mrq);
414}
415
416/*
417 * Returns a mask of interrupt flags to be enabled after the whole
418 * request has been prepared.
419 */
420static u32 atmci_submit_data(struct mmc_host *mmc, struct mmc_data *data)
421{
422 struct atmel_mci *host = mmc_priv(mmc);
423 u32 iflags;
424
425 data->error = -EINPROGRESS;
426
427 WARN_ON(host->data);
428 host->sg = NULL;
429 host->data = data;
430
7d2be074
HS		 431 dev_vdbg(&mmc->class_dev, "BLKR=0x%08x\n",
432 MCI_BCNT(data->blocks) | MCI_BLKLEN(data->blksz));
433
434 iflags = ATMCI_DATA_ERROR_FLAGS;
435 host->sg = data->sg;
436 host->pio_offset = 0;
437 if (data->flags & MMC_DATA_READ)
438 iflags |= MCI_RXRDY;
439 else
440 iflags |= MCI_TXRDY;
441
442 return iflags;
443}
444
445static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
446{
447 struct atmel_mci *host = mmc_priv(mmc);
448 struct mmc_data *data;
449 struct mmc_command *cmd;
450 u32 iflags;
451 u32 cmdflags = 0;
452
453 iflags = mci_readl(host, IMR);
454 if (iflags)
455 dev_warn(&mmc->class_dev, "WARNING: IMR=0x%08x\n",
456 mci_readl(host, IMR));
457
458 WARN_ON(host->mrq != NULL);
459
460 /*
461 * We may "know" the card is gone even though there's still an
462 * electrical connection. If so, we really need to communicate
463 * this to the MMC core since there won't be any more
464 * interrupts as the card is completely removed. Otherwise,
465 * the MMC core might believe the card is still there even
466 * though the card was just removed very slowly.
467 */
468 if (!host->present) {
469 mrq->cmd->error = -ENOMEDIUM;
470 mmc_request_done(mmc, mrq);
471 return;
472 }
473
474 host->mrq = mrq;
475 host->pending_events = 0;
476 host->completed_events = 0;
c06ad258 477 host->state = STATE_SENDING_CMD;
7d2be074
HS		 478
479 atmci_enable(host);
480
481 /* We don't support multiple blocks of weird lengths. */
482 data = mrq->data;
483 if (data) {
484 if (data->blocks > 1 && data->blksz & 3)
485 goto fail;
486 atmci_set_timeout(host, data);
a252e3e3
HS		 487
488 /* Must set block count/size before sending command */
489 mci_writel(host, BLKR, MCI_BCNT(data->blocks)
490 | MCI_BLKLEN(data->blksz));
7d2be074
HS		 491 }
492
493 iflags = MCI_CMDRDY;
494 cmd = mrq->cmd;
495 cmdflags = atmci_prepare_command(mmc, cmd);
496 atmci_start_command(host, cmd, cmdflags);
497
498 if (data)
499 iflags |= atmci_submit_data(mmc, data);
500
501 if (mrq->stop) {
502 host->stop_cmdr = atmci_prepare_command(mmc, mrq->stop);
503 host->stop_cmdr |= MCI_CMDR_STOP_XFER;
504 if (!(data->flags & MMC_DATA_WRITE))
505 host->stop_cmdr |= MCI_CMDR_TRDIR_READ;
506 if (data->flags & MMC_DATA_STREAM)
507 host->stop_cmdr |= MCI_CMDR_STREAM;
508 else
509 host->stop_cmdr |= MCI_CMDR_MULTI_BLOCK;
510 }
511
512 /*
513 * We could have enabled interrupts earlier, but I suspect
514 * that would open up a nice can of interesting race
515 * conditions (e.g. command and data complete, but stop not
516 * prepared yet.)
517 */
518 mci_writel(host, IER, iflags);
519
520 return;
521
522fail:
523 atmci_disable(host);
524 host->mrq = NULL;
525 mrq->cmd->error = -EINVAL;
526 mmc_request_done(mmc, mrq);
527}
528
529static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
530{
531 struct atmel_mci *host = mmc_priv(mmc);
532
533 if (ios->clock) {
534 u32 clkdiv;
535
536 /* Set clock rate */
537 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * ios->clock) - 1;
538 if (clkdiv > 255) {
539 dev_warn(&mmc->class_dev,
540 "clock %u too slow; using %lu\n",
541 ios->clock, host->bus_hz / (2 * 256));
542 clkdiv = 255;
543 }
544
545 host->mode_reg = MCI_MR_CLKDIV(clkdiv) | MCI_MR_WRPROOF
546 | MCI_MR_RDPROOF;
547 }
548
549 switch (ios->bus_width) {
550 case MMC_BUS_WIDTH_1:
551 host->sdc_reg = 0;
552 break;
553 case MMC_BUS_WIDTH_4:
554 host->sdc_reg = MCI_SDCBUS_4BIT;
555 break;
556 }
557
558 switch (ios->power_mode) {
559 case MMC_POWER_ON:
560 /* Send init sequence (74 clock cycles) */
561 atmci_enable(host);
562 mci_writel(host, CMDR, MCI_CMDR_SPCMD_INIT);
563 while (!(mci_readl(host, SR) & MCI_CMDRDY))
564 cpu_relax();
565 atmci_disable(host);
566 break;
567 default:
568 /*
569 * TODO: None of the currently available AVR32-based
570 * boards allow MMC power to be turned off. Implement
571 * power control when this can be tested properly.
572 */
573 break;
574 }
575}
576
577static int atmci_get_ro(struct mmc_host *mmc)
578{
579 int read_only = 0;
580 struct atmel_mci *host = mmc_priv(mmc);
581
3c26e170 582 if (gpio_is_valid(host->wp_pin)) {
7d2be074
HS		 583 read_only = gpio_get_value(host->wp_pin);
584 dev_dbg(&mmc->class_dev, "card is %s\n",
585 read_only ? "read-only" : "read-write");
586 } else {
587 dev_dbg(&mmc->class_dev,
588 "no pin for checking read-only switch."
589 " Assuming write-enable.\n");
590 }
591
592 return read_only;
593}
594
595static struct mmc_host_ops atmci_ops = {
596 .request = atmci_request,
597 .set_ios = atmci_set_ios,
598 .get_ro = atmci_get_ro,
599};
600
601static void atmci_command_complete(struct atmel_mci *host,
c06ad258 602 struct mmc_command *cmd)
7d2be074 603{
c06ad258
HS		 604 u32 status = host->cmd_status;
605
7d2be074
HS		 606 /* Read the response from the card (up to 16 bytes) */
607 cmd->resp[0] = mci_readl(host, RSPR);
608 cmd->resp[1] = mci_readl(host, RSPR);
609 cmd->resp[2] = mci_readl(host, RSPR);
610 cmd->resp[3] = mci_readl(host, RSPR);
611
612 if (status & MCI_RTOE)
613 cmd->error = -ETIMEDOUT;
614 else if ((cmd->flags & MMC_RSP_CRC) && (status & MCI_RCRCE))
615 cmd->error = -EILSEQ;
616 else if (status & (MCI_RINDE | MCI_RDIRE | MCI_RENDE))
617 cmd->error = -EIO;
618 else
619 cmd->error = 0;
620
621 if (cmd->error) {
622 dev_dbg(&host->mmc->class_dev,
623 "command error: status=0x%08x\n", status);
624
625 if (cmd->data) {
626 host->data = NULL;
627 mci_writel(host, IDR, MCI_NOTBUSY
628 | MCI_TXRDY | MCI_RXRDY
629 | ATMCI_DATA_ERROR_FLAGS);
630 }
631 }
632}
633
634static void atmci_detect_change(unsigned long data)
635{
636 struct atmel_mci *host = (struct atmel_mci *)data;
637 struct mmc_request *mrq = host->mrq;
638 int present;
639
640 /*
641 * atmci_remove() sets detect_pin to -1 before freeing the
642 * interrupt. We must not re-enable the interrupt if it has
643 * been freed.
644 */
645 smp_rmb();
3c26e170 646 if (!gpio_is_valid(host->detect_pin))
7d2be074
HS		 647 return;
648
649 enable_irq(gpio_to_irq(host->detect_pin));
650 present = !gpio_get_value(host->detect_pin);
651
652 dev_vdbg(&host->pdev->dev, "detect change: %d (was %d)\n",
653 present, host->present);
654
655 if (present != host->present) {
656 dev_dbg(&host->mmc->class_dev, "card %s\n",
657 present ? "inserted" : "removed");
658 host->present = present;
659
660 /* Reset controller if card is gone */
661 if (!present) {
662 mci_writel(host, CR, MCI_CR_SWRST);
663 mci_writel(host, IDR, ~0UL);
664 mci_writel(host, CR, MCI_CR_MCIEN);
665 }
666
667 /* Clean up queue if present */
668 if (mrq) {
669 /*
670 * Reset controller to terminate any ongoing
671 * commands or data transfers.
672 */
673 mci_writel(host, CR, MCI_CR_SWRST);
c06ad258 674 mci_readl(host, SR);
7d2be074 675
c06ad258
HS		 676 host->data = NULL;
677 host->cmd = NULL;
7d2be074 678
c06ad258
HS		 679 switch (host->state) {
680 case STATE_SENDING_CMD:
681 mrq->cmd->error = -ENOMEDIUM;
682 if (!mrq->data)
683 break;
684 /* fall through */
685 case STATE_SENDING_DATA:
7d2be074 686 mrq->data->error = -ENOMEDIUM;
c06ad258
HS		 687 break;
688 case STATE_DATA_BUSY:
689 case STATE_DATA_ERROR:
690 if (mrq->data->error == -EINPROGRESS)
691 mrq->data->error = -ENOMEDIUM;
692 if (!mrq->stop)
693 break;
694 /* fall through */
695 case STATE_SENDING_STOP:
7d2be074 696 mrq->stop->error = -ENOMEDIUM;
c06ad258
HS		 697 break;
698 }
7d2be074 699
7d2be074
HS		 700 atmci_request_end(host->mmc, mrq);
701 }
702
703 mmc_detect_change(host->mmc, 0);
704 }
705}
706
707static void atmci_tasklet_func(unsigned long priv)
708{
709 struct mmc_host *mmc = (struct mmc_host *)priv;
710 struct atmel_mci *host = mmc_priv(mmc);
711 struct mmc_request *mrq = host->mrq;
712 struct mmc_data *data = host->data;
c06ad258
HS		 713 struct mmc_command *cmd = host->cmd;
714 enum atmel_mci_state state = host->state;
715 enum atmel_mci_state prev_state;
716 u32 status;
717
718 state = host->state;
7d2be074
HS		 719
720 dev_vdbg(&mmc->class_dev,
c06ad258
HS		 721 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
722 state, host->pending_events, host->completed_events,
7d2be074
HS		 723 mci_readl(host, IMR));
724
c06ad258
HS		 725 do {
726 prev_state = state;
7d2be074 727
c06ad258
HS		 728 switch (state) {
729 case STATE_SENDING_CMD:
730 if (!atmci_test_and_clear_pending(host,
731 EVENT_CMD_COMPLETE))
732 break;
7d2be074 733
c06ad258
HS		 734 host->cmd = NULL;
735 atmci_set_completed(host, EVENT_CMD_COMPLETE);
736 atmci_command_complete(host, mrq->cmd);
737 if (!mrq->data || cmd->error) {
738 atmci_request_end(mmc, host->mrq);
739 break;
740 }
7d2be074 741
c06ad258
HS		 742 prev_state = state = STATE_SENDING_DATA;
743 /* fall through */
7d2be074 744
c06ad258
HS		 745 case STATE_SENDING_DATA:
746 if (atmci_test_and_clear_pending(host,
747 EVENT_DATA_ERROR)) {
748 if (data->stop)
749 send_stop_cmd(host->mmc, data);
750 state = STATE_DATA_ERROR;
751 break;
752 }
7d2be074 753
c06ad258
HS		 754 if (!atmci_test_and_clear_pending(host,
755 EVENT_XFER_COMPLETE))
756 break;
7d2be074 757
c06ad258
HS		 758 atmci_set_completed(host, EVENT_XFER_COMPLETE);
759 prev_state = state = STATE_DATA_BUSY;
760 /* fall through */
7d2be074 761
c06ad258
HS		 762 case STATE_DATA_BUSY:
763 if (!atmci_test_and_clear_pending(host,
764 EVENT_DATA_COMPLETE))
765 break;
766
767 host->data = NULL;
768 atmci_set_completed(host, EVENT_DATA_COMPLETE);
769 status = host->data_status;
770 if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) {
771 if (status & MCI_DTOE) {
772 dev_dbg(&mmc->class_dev,
773 "data timeout error\n");
774 data->error = -ETIMEDOUT;
775 } else if (status & MCI_DCRCE) {
776 dev_dbg(&mmc->class_dev,
777 "data CRC error\n");
778 data->error = -EILSEQ;
779 } else {
780 dev_dbg(&mmc->class_dev,
781 "data FIFO error (status=%08x)\n",
782 status);
783 data->error = -EIO;
784 }
785 } else {
786 data->bytes_xfered = data->blocks * data->blksz;
787 data->error = 0;
788 }
789
790 if (!data->stop) {
791 atmci_request_end(mmc, host->mrq);
792 prev_state = state;
793 break;
794 }
7d2be074 795
c06ad258
HS		 796 prev_state = state = STATE_SENDING_STOP;
797 if (!data->error)
798 send_stop_cmd(host->mmc, data);
799 /* fall through */
800
801 case STATE_SENDING_STOP:
802 if (!atmci_test_and_clear_pending(host,
803 EVENT_CMD_COMPLETE))
804 break;
805
806 host->cmd = NULL;
807 atmci_command_complete(host, mrq->stop);
808 atmci_request_end(mmc, host->mrq);
809 prev_state = state;
810 break;
811
812 case STATE_DATA_ERROR:
813 if (!atmci_test_and_clear_pending(host,
814 EVENT_XFER_COMPLETE))
815 break;
816
817 state = STATE_DATA_BUSY;
818 break;
819 }
820 } while (state != prev_state);
821
822 host->state = state;
7d2be074
HS		 823}
824
825static void atmci_read_data_pio(struct atmel_mci *host)
826{
827 struct scatterlist *sg = host->sg;
828 void *buf = sg_virt(sg);
829 unsigned int offset = host->pio_offset;
830 struct mmc_data *data = host->data;
831 u32 value;
832 u32 status;
833 unsigned int nbytes = 0;
834
835 do {
836 value = mci_readl(host, RDR);
837 if (likely(offset + 4 <= sg->length)) {
838 put_unaligned(value, (u32 *)(buf + offset));
839
840 offset += 4;
841 nbytes += 4;
842
843 if (offset == sg->length) {
844 host->sg = sg = sg_next(sg);
845 if (!sg)
846 goto done;
847
848 offset = 0;
849 buf = sg_virt(sg);
850 }
851 } else {
852 unsigned int remaining = sg->length - offset;
853 memcpy(buf + offset, &value, remaining);
854 nbytes += remaining;
855
856 flush_dcache_page(sg_page(sg));
857 host->sg = sg = sg_next(sg);
858 if (!sg)
859 goto done;
860
861 offset = 4 - remaining;
862 buf = sg_virt(sg);
863 memcpy(buf, (u8 *)&value + remaining, offset);
864 nbytes += offset;
865 }
866
867 status = mci_readl(host, SR);
868 if (status & ATMCI_DATA_ERROR_FLAGS) {
869 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_RXRDY
870 | ATMCI_DATA_ERROR_FLAGS));
871 host->data_status = status;
872 atmci_set_pending(host, EVENT_DATA_ERROR);
873 tasklet_schedule(&host->tasklet);
874 break;
875 }
876 } while (status & MCI_RXRDY);
877
878 host->pio_offset = offset;
879 data->bytes_xfered += nbytes;
880
881 return;
882
883done:
884 mci_writel(host, IDR, MCI_RXRDY);
885 mci_writel(host, IER, MCI_NOTBUSY);
886 data->bytes_xfered += nbytes;
c06ad258 887 atmci_set_pending(host, EVENT_XFER_COMPLETE);
7d2be074
HS		 888}
889
890static void atmci_write_data_pio(struct atmel_mci *host)
891{
892 struct scatterlist *sg = host->sg;
893 void *buf = sg_virt(sg);
894 unsigned int offset = host->pio_offset;
895 struct mmc_data *data = host->data;
896 u32 value;
897 u32 status;
898 unsigned int nbytes = 0;
899
900 do {
901 if (likely(offset + 4 <= sg->length)) {
902 value = get_unaligned((u32 *)(buf + offset));
903 mci_writel(host, TDR, value);
904
905 offset += 4;
906 nbytes += 4;
907 if (offset == sg->length) {
908 host->sg = sg = sg_next(sg);
909 if (!sg)
910 goto done;
911
912 offset = 0;
913 buf = sg_virt(sg);
914 }
915 } else {
916 unsigned int remaining = sg->length - offset;
917
918 value = 0;
919 memcpy(&value, buf + offset, remaining);
920 nbytes += remaining;
921
922 host->sg = sg = sg_next(sg);
923 if (!sg) {
924 mci_writel(host, TDR, value);
925 goto done;
926 }
927
928 offset = 4 - remaining;
929 buf = sg_virt(sg);
930 memcpy((u8 *)&value + remaining, buf, offset);
931 mci_writel(host, TDR, value);
932 nbytes += offset;
933 }
934
935 status = mci_readl(host, SR);
936 if (status & ATMCI_DATA_ERROR_FLAGS) {
937 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_TXRDY
938 | ATMCI_DATA_ERROR_FLAGS));
939 host->data_status = status;
940 atmci_set_pending(host, EVENT_DATA_ERROR);
941 tasklet_schedule(&host->tasklet);
942 break;
943 }
944 } while (status & MCI_TXRDY);
945
946 host->pio_offset = offset;
947 data->bytes_xfered += nbytes;
948
949 return;
950
951done:
952 mci_writel(host, IDR, MCI_TXRDY);
953 mci_writel(host, IER, MCI_NOTBUSY);
954 data->bytes_xfered += nbytes;
c06ad258 955 atmci_set_pending(host, EVENT_XFER_COMPLETE);
7d2be074
HS		 956}
957
958static void atmci_cmd_interrupt(struct mmc_host *mmc, u32 status)
959{
960 struct atmel_mci *host = mmc_priv(mmc);
961
962 mci_writel(host, IDR, MCI_CMDRDY);
963
c06ad258
HS		 964 host->cmd_status = status;
965 atmci_set_pending(host, EVENT_CMD_COMPLETE);
7d2be074
HS		 966 tasklet_schedule(&host->tasklet);
967}
968
969static irqreturn_t atmci_interrupt(int irq, void *dev_id)
970{
971 struct mmc_host *mmc = dev_id;
972 struct atmel_mci *host = mmc_priv(mmc);
973 u32 status, mask, pending;
974 unsigned int pass_count = 0;
975
976 spin_lock(&mmc->lock);
977
978 do {
979 status = mci_readl(host, SR);
980 mask = mci_readl(host, IMR);
981 pending = status & mask;
982 if (!pending)
983 break;
984
985 if (pending & ATMCI_DATA_ERROR_FLAGS) {
986 mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS
987 | MCI_RXRDY | MCI_TXRDY);
988 pending &= mci_readl(host, IMR);
989 host->data_status = status;
990 atmci_set_pending(host, EVENT_DATA_ERROR);
991 tasklet_schedule(&host->tasklet);
992 }
993 if (pending & MCI_NOTBUSY) {
c06ad258
HS		 994 mci_writel(host, IDR,
995 ATMCI_DATA_ERROR_FLAGS | MCI_NOTBUSY);
996 host->data_status = status;
7d2be074
HS		 997 atmci_set_pending(host, EVENT_DATA_COMPLETE);
998 tasklet_schedule(&host->tasklet);
999 }
1000 if (pending & MCI_RXRDY)
1001 atmci_read_data_pio(host);
1002 if (pending & MCI_TXRDY)
1003 atmci_write_data_pio(host);
1004
1005 if (pending & MCI_CMDRDY)
1006 atmci_cmd_interrupt(mmc, status);
1007 } while (pass_count++ < 5);
1008
1009 spin_unlock(&mmc->lock);
1010
1011 return pass_count ? IRQ_HANDLED : IRQ_NONE;
1012}
1013
1014static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
1015{
1016 struct mmc_host *mmc = dev_id;
1017 struct atmel_mci *host = mmc_priv(mmc);
1018
1019 /*
1020 * Disable interrupts until the pin has stabilized and check
1021 * the state then. Use mod_timer() since we may be in the
1022 * middle of the timer routine when this interrupt triggers.
1023 */
1024 disable_irq_nosync(irq);
1025 mod_timer(&host->detect_timer, jiffies + msecs_to_jiffies(20));
1026
1027 return IRQ_HANDLED;
1028}
1029
1030static int __init atmci_probe(struct platform_device *pdev)
1031{
1032 struct mci_platform_data *pdata;
1033 struct atmel_mci *host;
1034 struct mmc_host *mmc;
1035 struct resource *regs;
1036 int irq;
1037 int ret;
1038
1039 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1040 if (!regs)
1041 return -ENXIO;
1042 pdata = pdev->dev.platform_data;
1043 if (!pdata)
1044 return -ENXIO;
1045 irq = platform_get_irq(pdev, 0);
1046 if (irq < 0)
1047 return irq;
1048
1049 mmc = mmc_alloc_host(sizeof(struct atmel_mci), &pdev->dev);
1050 if (!mmc)
1051 return -ENOMEM;
1052
1053 host = mmc_priv(mmc);
1054 host->pdev = pdev;
1055 host->mmc = mmc;
1056 host->detect_pin = pdata->detect_pin;
1057 host->wp_pin = pdata->wp_pin;
1058
1059 host->mck = clk_get(&pdev->dev, "mci_clk");
1060 if (IS_ERR(host->mck)) {
1061 ret = PTR_ERR(host->mck);
1062 goto err_clk_get;
1063 }
1064
1065 ret = -ENOMEM;
1066 host->regs = ioremap(regs->start, regs->end - regs->start + 1);
1067 if (!host->regs)
1068 goto err_ioremap;
1069
1070 clk_enable(host->mck);
1071 mci_writel(host, CR, MCI_CR_SWRST);
1072 host->bus_hz = clk_get_rate(host->mck);
1073 clk_disable(host->mck);
1074
1075 host->mapbase = regs->start;
1076
1077 mmc->ops = &atmci_ops;
1078 mmc->f_min = (host->bus_hz + 511) / 512;
1079 mmc->f_max = host->bus_hz / 2;
1080 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
23af6039 1081 mmc->caps |= MMC_CAP_4_BIT_DATA;
7d2be074
HS		 1082
1083 mmc->max_hw_segs = 64;
1084 mmc->max_phys_segs = 64;
1085 mmc->max_req_size = 32768 * 512;
1086 mmc->max_blk_size = 32768;
1087 mmc->max_blk_count = 512;
1088
1089 tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)mmc);
1090
1091 ret = request_irq(irq, atmci_interrupt, 0, pdev->dev.bus_id, mmc);
1092 if (ret)
1093 goto err_request_irq;
1094
1095 /* Assume card is present if we don't have a detect pin */
1096 host->present = 1;
3c26e170 1097 if (gpio_is_valid(host->detect_pin)) {
7d2be074
HS		 1098 if (gpio_request(host->detect_pin, "mmc_detect")) {
1099 dev_dbg(&mmc->class_dev, "no detect pin available\n");
1100 host->detect_pin = -1;
1101 } else {
1102 host->present = !gpio_get_value(host->detect_pin);
1103 }
1104 }
da45b66e
HS		 1105
1106 if (!gpio_is_valid(host->detect_pin))
1107 mmc->caps |= MMC_CAP_NEEDS_POLL;
1108
3c26e170 1109 if (gpio_is_valid(host->wp_pin)) {
7d2be074
HS		 1110 if (gpio_request(host->wp_pin, "mmc_wp")) {
1111 dev_dbg(&mmc->class_dev, "no WP pin available\n");
1112 host->wp_pin = -1;
1113 }
1114 }
1115
1116 platform_set_drvdata(pdev, host);
1117
1118 mmc_add_host(mmc);
1119
3c26e170 1120 if (gpio_is_valid(host->detect_pin)) {
7d2be074
HS		 1121 setup_timer(&host->detect_timer, atmci_detect_change,
1122 (unsigned long)host);
1123
1124 ret = request_irq(gpio_to_irq(host->detect_pin),
1125 atmci_detect_interrupt,
1126 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
1127 "mmc-detect", mmc);
1128 if (ret) {
1129 dev_dbg(&mmc->class_dev,
1130 "could not request IRQ %d for detect pin\n",
1131 gpio_to_irq(host->detect_pin));
1132 gpio_free(host->detect_pin);
1133 host->detect_pin = -1;
1134 }
1135 }
1136
1137 dev_info(&mmc->class_dev,
1138 "Atmel MCI controller at 0x%08lx irq %d\n",
1139 host->mapbase, irq);
1140
deec9ae3
HS		 1141 atmci_init_debugfs(host);
1142
7d2be074
HS		 1143 return 0;
1144
1145err_request_irq:
1146 iounmap(host->regs);
1147err_ioremap:
1148 clk_put(host->mck);
1149err_clk_get:
1150 mmc_free_host(mmc);
1151 return ret;
1152}
1153
1154static int __exit atmci_remove(struct platform_device *pdev)
1155{
1156 struct atmel_mci *host = platform_get_drvdata(pdev);
1157
1158 platform_set_drvdata(pdev, NULL);
1159
1160 if (host) {
deec9ae3
HS		 1161 /* Debugfs stuff is cleaned up by mmc core */
1162
3c26e170 1163 if (gpio_is_valid(host->detect_pin)) {
7d2be074
HS		 1164 int pin = host->detect_pin;
1165
1166 /* Make sure the timer doesn't enable the interrupt */
1167 host->detect_pin = -1;
1168 smp_wmb();
1169
1170 free_irq(gpio_to_irq(pin), host->mmc);
1171 del_timer_sync(&host->detect_timer);
1172 gpio_free(pin);
1173 }
1174
1175 mmc_remove_host(host->mmc);
1176
1177 clk_enable(host->mck);
1178 mci_writel(host, IDR, ~0UL);
1179 mci_writel(host, CR, MCI_CR_MCIDIS);
1180 mci_readl(host, SR);
1181 clk_disable(host->mck);
1182
3c26e170 1183 if (gpio_is_valid(host->wp_pin))
7d2be074
HS		 1184 gpio_free(host->wp_pin);
1185
1186 free_irq(platform_get_irq(pdev, 0), host->mmc);
1187 iounmap(host->regs);
1188
1189 clk_put(host->mck);
1190
1191 mmc_free_host(host->mmc);
1192 }
1193 return 0;
1194}
1195
1196static struct platform_driver atmci_driver = {
1197 .remove = __exit_p(atmci_remove),
1198 .driver = {
1199 .name = "atmel_mci",
1200 },
1201};
1202
1203static int __init atmci_init(void)
1204{
1205 return platform_driver_probe(&atmci_driver, atmci_probe);
1206}
1207
1208static void __exit atmci_exit(void)
1209{
1210 platform_driver_unregister(&atmci_driver);
1211}
1212
1213module_init(atmci_init);
1214module_exit(atmci_exit);
1215
1216MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
1217MODULE_AUTHOR("Haavard Skinnemoen <haavard.skinnemoen@atmel.com>");
1218MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)