Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
aaac1b47 | 2 | * linux/drivers/mmc/core/core.c |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 2003-2004 Russell King, All Rights Reserved. | |
5b4fd9ae | 5 | * SD support Copyright (C) 2004 Ian Molton, All Rights Reserved. |
ad3868b2 | 6 | * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. |
bce40a36 | 7 | * MMCv4 support Copyright (C) 2006 Philip Langdale, All Rights Reserved. |
1da177e4 LT |
8 | * |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
1da177e4 LT |
13 | #include <linux/module.h> |
14 | #include <linux/init.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/completion.h> | |
17 | #include <linux/device.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/pagemap.h> | |
20 | #include <linux/err.h> | |
af8350c7 | 21 | #include <linux/leds.h> |
b57c43ad | 22 | #include <linux/scatterlist.h> |
86e8286a | 23 | #include <linux/log2.h> |
1da177e4 LT |
24 | |
25 | #include <linux/mmc/card.h> | |
26 | #include <linux/mmc/host.h> | |
da7fbe58 PO |
27 | #include <linux/mmc/mmc.h> |
28 | #include <linux/mmc/sd.h> | |
1da177e4 | 29 | |
aaac1b47 | 30 | #include "core.h" |
ffce2e7e PO |
31 | #include "bus.h" |
32 | #include "host.h" | |
e29a7d73 | 33 | #include "sdio_bus.h" |
da7fbe58 PO |
34 | |
35 | #include "mmc_ops.h" | |
36 | #include "sd_ops.h" | |
5c4e6f13 | 37 | #include "sdio_ops.h" |
1da177e4 | 38 | |
ffce2e7e PO |
39 | static struct workqueue_struct *workqueue; |
40 | ||
af517150 DB |
41 | /* |
42 | * Enabling software CRCs on the data blocks can be a significant (30%) | |
43 | * performance cost, and for other reasons may not always be desired. | |
44 | * So we allow it it to be disabled. | |
45 | */ | |
46 | int use_spi_crc = 1; | |
47 | module_param(use_spi_crc, bool, 0); | |
48 | ||
ffce2e7e PO |
49 | /* |
50 | * Internal function. Schedule delayed work in the MMC work queue. | |
51 | */ | |
52 | static int mmc_schedule_delayed_work(struct delayed_work *work, | |
53 | unsigned long delay) | |
54 | { | |
55 | return queue_delayed_work(workqueue, work, delay); | |
56 | } | |
57 | ||
58 | /* | |
59 | * Internal function. Flush all scheduled work from the MMC work queue. | |
60 | */ | |
61 | static void mmc_flush_scheduled_work(void) | |
62 | { | |
63 | flush_workqueue(workqueue); | |
64 | } | |
65 | ||
1da177e4 | 66 | /** |
fe10c6ab RK |
67 | * mmc_request_done - finish processing an MMC request |
68 | * @host: MMC host which completed request | |
69 | * @mrq: MMC request which request | |
1da177e4 LT |
70 | * |
71 | * MMC drivers should call this function when they have completed | |
fe10c6ab | 72 | * their processing of a request. |
1da177e4 LT |
73 | */ |
74 | void mmc_request_done(struct mmc_host *host, struct mmc_request *mrq) | |
75 | { | |
76 | struct mmc_command *cmd = mrq->cmd; | |
920e70c5 RK |
77 | int err = cmd->error; |
78 | ||
af517150 DB |
79 | if (err && cmd->retries && mmc_host_is_spi(host)) { |
80 | if (cmd->resp[0] & R1_SPI_ILLEGAL_COMMAND) | |
81 | cmd->retries = 0; | |
82 | } | |
83 | ||
1da177e4 | 84 | if (err && cmd->retries) { |
e4d21708 PO |
85 | pr_debug("%s: req failed (CMD%u): %d, retrying...\n", |
86 | mmc_hostname(host), cmd->opcode, err); | |
87 | ||
1da177e4 LT |
88 | cmd->retries--; |
89 | cmd->error = 0; | |
90 | host->ops->request(host, mrq); | |
e4d21708 | 91 | } else { |
af8350c7 PO |
92 | led_trigger_event(host->led, LED_OFF); |
93 | ||
e4d21708 PO |
94 | pr_debug("%s: req done (CMD%u): %d: %08x %08x %08x %08x\n", |
95 | mmc_hostname(host), cmd->opcode, err, | |
96 | cmd->resp[0], cmd->resp[1], | |
97 | cmd->resp[2], cmd->resp[3]); | |
98 | ||
99 | if (mrq->data) { | |
100 | pr_debug("%s: %d bytes transferred: %d\n", | |
101 | mmc_hostname(host), | |
102 | mrq->data->bytes_xfered, mrq->data->error); | |
103 | } | |
104 | ||
105 | if (mrq->stop) { | |
106 | pr_debug("%s: (CMD%u): %d: %08x %08x %08x %08x\n", | |
107 | mmc_hostname(host), mrq->stop->opcode, | |
108 | mrq->stop->error, | |
109 | mrq->stop->resp[0], mrq->stop->resp[1], | |
110 | mrq->stop->resp[2], mrq->stop->resp[3]); | |
111 | } | |
112 | ||
113 | if (mrq->done) | |
114 | mrq->done(mrq); | |
1da177e4 LT |
115 | } |
116 | } | |
117 | ||
118 | EXPORT_SYMBOL(mmc_request_done); | |
119 | ||
39361851 | 120 | static void |
1da177e4 LT |
121 | mmc_start_request(struct mmc_host *host, struct mmc_request *mrq) |
122 | { | |
976d9276 PO |
123 | #ifdef CONFIG_MMC_DEBUG |
124 | unsigned int i, sz; | |
a84756c5 | 125 | struct scatterlist *sg; |
976d9276 PO |
126 | #endif |
127 | ||
920e70c5 RK |
128 | pr_debug("%s: starting CMD%u arg %08x flags %08x\n", |
129 | mmc_hostname(host), mrq->cmd->opcode, | |
130 | mrq->cmd->arg, mrq->cmd->flags); | |
1da177e4 | 131 | |
e4d21708 PO |
132 | if (mrq->data) { |
133 | pr_debug("%s: blksz %d blocks %d flags %08x " | |
134 | "tsac %d ms nsac %d\n", | |
135 | mmc_hostname(host), mrq->data->blksz, | |
136 | mrq->data->blocks, mrq->data->flags, | |
ce252edd | 137 | mrq->data->timeout_ns / 1000000, |
e4d21708 PO |
138 | mrq->data->timeout_clks); |
139 | } | |
140 | ||
141 | if (mrq->stop) { | |
142 | pr_debug("%s: CMD%u arg %08x flags %08x\n", | |
143 | mmc_hostname(host), mrq->stop->opcode, | |
144 | mrq->stop->arg, mrq->stop->flags); | |
145 | } | |
146 | ||
f22ee4ed | 147 | WARN_ON(!host->claimed); |
1da177e4 | 148 | |
af8350c7 PO |
149 | led_trigger_event(host->led, LED_FULL); |
150 | ||
1da177e4 LT |
151 | mrq->cmd->error = 0; |
152 | mrq->cmd->mrq = mrq; | |
153 | if (mrq->data) { | |
fe4a3c7a | 154 | BUG_ON(mrq->data->blksz > host->max_blk_size); |
55db890a PO |
155 | BUG_ON(mrq->data->blocks > host->max_blk_count); |
156 | BUG_ON(mrq->data->blocks * mrq->data->blksz > | |
157 | host->max_req_size); | |
fe4a3c7a | 158 | |
976d9276 PO |
159 | #ifdef CONFIG_MMC_DEBUG |
160 | sz = 0; | |
a84756c5 PO |
161 | for_each_sg(mrq->data->sg, sg, mrq->data->sg_len, i) |
162 | sz += sg->length; | |
976d9276 PO |
163 | BUG_ON(sz != mrq->data->blocks * mrq->data->blksz); |
164 | #endif | |
165 | ||
1da177e4 LT |
166 | mrq->cmd->data = mrq->data; |
167 | mrq->data->error = 0; | |
168 | mrq->data->mrq = mrq; | |
169 | if (mrq->stop) { | |
170 | mrq->data->stop = mrq->stop; | |
171 | mrq->stop->error = 0; | |
172 | mrq->stop->mrq = mrq; | |
173 | } | |
174 | } | |
175 | host->ops->request(host, mrq); | |
176 | } | |
177 | ||
1da177e4 LT |
178 | static void mmc_wait_done(struct mmc_request *mrq) |
179 | { | |
180 | complete(mrq->done_data); | |
181 | } | |
182 | ||
67a61c48 PO |
183 | /** |
184 | * mmc_wait_for_req - start a request and wait for completion | |
185 | * @host: MMC host to start command | |
186 | * @mrq: MMC request to start | |
187 | * | |
188 | * Start a new MMC custom command request for a host, and wait | |
189 | * for the command to complete. Does not attempt to parse the | |
190 | * response. | |
191 | */ | |
192 | void mmc_wait_for_req(struct mmc_host *host, struct mmc_request *mrq) | |
1da177e4 | 193 | { |
0afffc72 | 194 | DECLARE_COMPLETION_ONSTACK(complete); |
1da177e4 LT |
195 | |
196 | mrq->done_data = &complete; | |
197 | mrq->done = mmc_wait_done; | |
198 | ||
199 | mmc_start_request(host, mrq); | |
200 | ||
201 | wait_for_completion(&complete); | |
1da177e4 LT |
202 | } |
203 | ||
204 | EXPORT_SYMBOL(mmc_wait_for_req); | |
205 | ||
206 | /** | |
207 | * mmc_wait_for_cmd - start a command and wait for completion | |
208 | * @host: MMC host to start command | |
209 | * @cmd: MMC command to start | |
210 | * @retries: maximum number of retries | |
211 | * | |
212 | * Start a new MMC command for a host, and wait for the command | |
213 | * to complete. Return any error that occurred while the command | |
214 | * was executing. Do not attempt to parse the response. | |
215 | */ | |
216 | int mmc_wait_for_cmd(struct mmc_host *host, struct mmc_command *cmd, int retries) | |
217 | { | |
218 | struct mmc_request mrq; | |
219 | ||
d84075c8 | 220 | WARN_ON(!host->claimed); |
1da177e4 LT |
221 | |
222 | memset(&mrq, 0, sizeof(struct mmc_request)); | |
223 | ||
224 | memset(cmd->resp, 0, sizeof(cmd->resp)); | |
225 | cmd->retries = retries; | |
226 | ||
227 | mrq.cmd = cmd; | |
228 | cmd->data = NULL; | |
229 | ||
230 | mmc_wait_for_req(host, &mrq); | |
231 | ||
232 | return cmd->error; | |
233 | } | |
234 | ||
235 | EXPORT_SYMBOL(mmc_wait_for_cmd); | |
236 | ||
d773d725 RK |
237 | /** |
238 | * mmc_set_data_timeout - set the timeout for a data command | |
239 | * @data: data phase for command | |
240 | * @card: the MMC card associated with the data transfer | |
67a61c48 PO |
241 | * |
242 | * Computes the data timeout parameters according to the | |
243 | * correct algorithm given the card type. | |
d773d725 | 244 | */ |
b146d26a | 245 | void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card) |
d773d725 RK |
246 | { |
247 | unsigned int mult; | |
248 | ||
e6f918bf PO |
249 | /* |
250 | * SDIO cards only define an upper 1 s limit on access. | |
251 | */ | |
252 | if (mmc_card_sdio(card)) { | |
253 | data->timeout_ns = 1000000000; | |
254 | data->timeout_clks = 0; | |
255 | return; | |
256 | } | |
257 | ||
d773d725 RK |
258 | /* |
259 | * SD cards use a 100 multiplier rather than 10 | |
260 | */ | |
261 | mult = mmc_card_sd(card) ? 100 : 10; | |
262 | ||
263 | /* | |
264 | * Scale up the multiplier (and therefore the timeout) by | |
265 | * the r2w factor for writes. | |
266 | */ | |
b146d26a | 267 | if (data->flags & MMC_DATA_WRITE) |
d773d725 RK |
268 | mult <<= card->csd.r2w_factor; |
269 | ||
270 | data->timeout_ns = card->csd.tacc_ns * mult; | |
271 | data->timeout_clks = card->csd.tacc_clks * mult; | |
272 | ||
273 | /* | |
274 | * SD cards also have an upper limit on the timeout. | |
275 | */ | |
276 | if (mmc_card_sd(card)) { | |
277 | unsigned int timeout_us, limit_us; | |
278 | ||
279 | timeout_us = data->timeout_ns / 1000; | |
280 | timeout_us += data->timeout_clks * 1000 / | |
281 | (card->host->ios.clock / 1000); | |
282 | ||
b146d26a | 283 | if (data->flags & MMC_DATA_WRITE) |
493890e7 PO |
284 | /* |
285 | * The limit is really 250 ms, but that is | |
286 | * insufficient for some crappy cards. | |
287 | */ | |
288 | limit_us = 300000; | |
d773d725 RK |
289 | else |
290 | limit_us = 100000; | |
291 | ||
fba68bd2 PL |
292 | /* |
293 | * SDHC cards always use these fixed values. | |
294 | */ | |
295 | if (timeout_us > limit_us || mmc_card_blockaddr(card)) { | |
d773d725 RK |
296 | data->timeout_ns = limit_us * 1000; |
297 | data->timeout_clks = 0; | |
298 | } | |
299 | } | |
300 | } | |
301 | EXPORT_SYMBOL(mmc_set_data_timeout); | |
302 | ||
ad3868b2 PO |
303 | /** |
304 | * mmc_align_data_size - pads a transfer size to a more optimal value | |
305 | * @card: the MMC card associated with the data transfer | |
306 | * @sz: original transfer size | |
307 | * | |
308 | * Pads the original data size with a number of extra bytes in | |
309 | * order to avoid controller bugs and/or performance hits | |
310 | * (e.g. some controllers revert to PIO for certain sizes). | |
311 | * | |
312 | * Returns the improved size, which might be unmodified. | |
313 | * | |
314 | * Note that this function is only relevant when issuing a | |
315 | * single scatter gather entry. | |
316 | */ | |
317 | unsigned int mmc_align_data_size(struct mmc_card *card, unsigned int sz) | |
318 | { | |
319 | /* | |
320 | * FIXME: We don't have a system for the controller to tell | |
321 | * the core about its problems yet, so for now we just 32-bit | |
322 | * align the size. | |
323 | */ | |
324 | sz = ((sz + 3) / 4) * 4; | |
325 | ||
326 | return sz; | |
327 | } | |
328 | EXPORT_SYMBOL(mmc_align_data_size); | |
329 | ||
1da177e4 | 330 | /** |
2342f332 | 331 | * __mmc_claim_host - exclusively claim a host |
1da177e4 | 332 | * @host: mmc host to claim |
2342f332 | 333 | * @abort: whether or not the operation should be aborted |
1da177e4 | 334 | * |
2342f332 NP |
335 | * Claim a host for a set of operations. If @abort is non null and |
336 | * dereference a non-zero value then this will return prematurely with | |
337 | * that non-zero value without acquiring the lock. Returns zero | |
338 | * with the lock held otherwise. | |
1da177e4 | 339 | */ |
2342f332 | 340 | int __mmc_claim_host(struct mmc_host *host, atomic_t *abort) |
1da177e4 LT |
341 | { |
342 | DECLARE_WAITQUEUE(wait, current); | |
343 | unsigned long flags; | |
2342f332 | 344 | int stop; |
1da177e4 | 345 | |
cf795bfb PO |
346 | might_sleep(); |
347 | ||
1da177e4 LT |
348 | add_wait_queue(&host->wq, &wait); |
349 | spin_lock_irqsave(&host->lock, flags); | |
350 | while (1) { | |
351 | set_current_state(TASK_UNINTERRUPTIBLE); | |
2342f332 NP |
352 | stop = abort ? atomic_read(abort) : 0; |
353 | if (stop || !host->claimed) | |
1da177e4 LT |
354 | break; |
355 | spin_unlock_irqrestore(&host->lock, flags); | |
356 | schedule(); | |
357 | spin_lock_irqsave(&host->lock, flags); | |
358 | } | |
359 | set_current_state(TASK_RUNNING); | |
2342f332 NP |
360 | if (!stop) |
361 | host->claimed = 1; | |
362 | else | |
363 | wake_up(&host->wq); | |
1da177e4 LT |
364 | spin_unlock_irqrestore(&host->lock, flags); |
365 | remove_wait_queue(&host->wq, &wait); | |
2342f332 | 366 | return stop; |
1da177e4 LT |
367 | } |
368 | ||
2342f332 | 369 | EXPORT_SYMBOL(__mmc_claim_host); |
1da177e4 LT |
370 | |
371 | /** | |
372 | * mmc_release_host - release a host | |
373 | * @host: mmc host to release | |
374 | * | |
375 | * Release a MMC host, allowing others to claim the host | |
376 | * for their operations. | |
377 | */ | |
378 | void mmc_release_host(struct mmc_host *host) | |
379 | { | |
380 | unsigned long flags; | |
381 | ||
d84075c8 | 382 | WARN_ON(!host->claimed); |
1da177e4 LT |
383 | |
384 | spin_lock_irqsave(&host->lock, flags); | |
f22ee4ed | 385 | host->claimed = 0; |
1da177e4 LT |
386 | spin_unlock_irqrestore(&host->lock, flags); |
387 | ||
388 | wake_up(&host->wq); | |
389 | } | |
390 | ||
391 | EXPORT_SYMBOL(mmc_release_host); | |
392 | ||
7ea239d9 PO |
393 | /* |
394 | * Internal function that does the actual ios call to the host driver, | |
395 | * optionally printing some debug output. | |
396 | */ | |
920e70c5 RK |
397 | static inline void mmc_set_ios(struct mmc_host *host) |
398 | { | |
399 | struct mmc_ios *ios = &host->ios; | |
400 | ||
cd9277c0 PO |
401 | pr_debug("%s: clock %uHz busmode %u powermode %u cs %u Vdd %u " |
402 | "width %u timing %u\n", | |
920e70c5 RK |
403 | mmc_hostname(host), ios->clock, ios->bus_mode, |
404 | ios->power_mode, ios->chip_select, ios->vdd, | |
cd9277c0 | 405 | ios->bus_width, ios->timing); |
fba68bd2 | 406 | |
920e70c5 RK |
407 | host->ops->set_ios(host, ios); |
408 | } | |
409 | ||
7ea239d9 PO |
410 | /* |
411 | * Control chip select pin on a host. | |
412 | */ | |
da7fbe58 | 413 | void mmc_set_chip_select(struct mmc_host *host, int mode) |
1da177e4 | 414 | { |
da7fbe58 PO |
415 | host->ios.chip_select = mode; |
416 | mmc_set_ios(host); | |
1da177e4 LT |
417 | } |
418 | ||
7ea239d9 PO |
419 | /* |
420 | * Sets the host clock to the highest possible frequency that | |
421 | * is below "hz". | |
422 | */ | |
423 | void mmc_set_clock(struct mmc_host *host, unsigned int hz) | |
424 | { | |
425 | WARN_ON(hz < host->f_min); | |
426 | ||
427 | if (hz > host->f_max) | |
428 | hz = host->f_max; | |
429 | ||
430 | host->ios.clock = hz; | |
431 | mmc_set_ios(host); | |
432 | } | |
433 | ||
434 | /* | |
435 | * Change the bus mode (open drain/push-pull) of a host. | |
436 | */ | |
437 | void mmc_set_bus_mode(struct mmc_host *host, unsigned int mode) | |
438 | { | |
439 | host->ios.bus_mode = mode; | |
440 | mmc_set_ios(host); | |
441 | } | |
442 | ||
443 | /* | |
444 | * Change data bus width of a host. | |
445 | */ | |
446 | void mmc_set_bus_width(struct mmc_host *host, unsigned int width) | |
447 | { | |
448 | host->ios.bus_width = width; | |
449 | mmc_set_ios(host); | |
450 | } | |
451 | ||
86e8286a AV |
452 | /** |
453 | * mmc_vdd_to_ocrbitnum - Convert a voltage to the OCR bit number | |
454 | * @vdd: voltage (mV) | |
455 | * @low_bits: prefer low bits in boundary cases | |
456 | * | |
457 | * This function returns the OCR bit number according to the provided @vdd | |
458 | * value. If conversion is not possible a negative errno value returned. | |
459 | * | |
460 | * Depending on the @low_bits flag the function prefers low or high OCR bits | |
461 | * on boundary voltages. For example, | |
462 | * with @low_bits = true, 3300 mV translates to ilog2(MMC_VDD_32_33); | |
463 | * with @low_bits = false, 3300 mV translates to ilog2(MMC_VDD_33_34); | |
464 | * | |
465 | * Any value in the [1951:1999] range translates to the ilog2(MMC_VDD_20_21). | |
466 | */ | |
467 | static int mmc_vdd_to_ocrbitnum(int vdd, bool low_bits) | |
468 | { | |
469 | const int max_bit = ilog2(MMC_VDD_35_36); | |
470 | int bit; | |
471 | ||
472 | if (vdd < 1650 || vdd > 3600) | |
473 | return -EINVAL; | |
474 | ||
475 | if (vdd >= 1650 && vdd <= 1950) | |
476 | return ilog2(MMC_VDD_165_195); | |
477 | ||
478 | if (low_bits) | |
479 | vdd -= 1; | |
480 | ||
481 | /* Base 2000 mV, step 100 mV, bit's base 8. */ | |
482 | bit = (vdd - 2000) / 100 + 8; | |
483 | if (bit > max_bit) | |
484 | return max_bit; | |
485 | return bit; | |
486 | } | |
487 | ||
488 | /** | |
489 | * mmc_vddrange_to_ocrmask - Convert a voltage range to the OCR mask | |
490 | * @vdd_min: minimum voltage value (mV) | |
491 | * @vdd_max: maximum voltage value (mV) | |
492 | * | |
493 | * This function returns the OCR mask bits according to the provided @vdd_min | |
494 | * and @vdd_max values. If conversion is not possible the function returns 0. | |
495 | * | |
496 | * Notes wrt boundary cases: | |
497 | * This function sets the OCR bits for all boundary voltages, for example | |
498 | * [3300:3400] range is translated to MMC_VDD_32_33 | MMC_VDD_33_34 | | |
499 | * MMC_VDD_34_35 mask. | |
500 | */ | |
501 | u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max) | |
502 | { | |
503 | u32 mask = 0; | |
504 | ||
505 | if (vdd_max < vdd_min) | |
506 | return 0; | |
507 | ||
508 | /* Prefer high bits for the boundary vdd_max values. */ | |
509 | vdd_max = mmc_vdd_to_ocrbitnum(vdd_max, false); | |
510 | if (vdd_max < 0) | |
511 | return 0; | |
512 | ||
513 | /* Prefer low bits for the boundary vdd_min values. */ | |
514 | vdd_min = mmc_vdd_to_ocrbitnum(vdd_min, true); | |
515 | if (vdd_min < 0) | |
516 | return 0; | |
517 | ||
518 | /* Fill the mask, from max bit to min bit. */ | |
519 | while (vdd_max >= vdd_min) | |
520 | mask |= 1 << vdd_max--; | |
521 | ||
522 | return mask; | |
523 | } | |
524 | EXPORT_SYMBOL(mmc_vddrange_to_ocrmask); | |
525 | ||
1da177e4 LT |
526 | /* |
527 | * Mask off any voltages we don't support and select | |
528 | * the lowest voltage | |
529 | */ | |
7ea239d9 | 530 | u32 mmc_select_voltage(struct mmc_host *host, u32 ocr) |
1da177e4 LT |
531 | { |
532 | int bit; | |
533 | ||
534 | ocr &= host->ocr_avail; | |
535 | ||
536 | bit = ffs(ocr); | |
537 | if (bit) { | |
538 | bit -= 1; | |
539 | ||
63ef731a | 540 | ocr &= 3 << bit; |
1da177e4 LT |
541 | |
542 | host->ios.vdd = bit; | |
920e70c5 | 543 | mmc_set_ios(host); |
1da177e4 | 544 | } else { |
f6e10b86 DB |
545 | pr_warning("%s: host doesn't support card's voltages\n", |
546 | mmc_hostname(host)); | |
1da177e4 LT |
547 | ocr = 0; |
548 | } | |
549 | ||
550 | return ocr; | |
551 | } | |
552 | ||
b57c43ad | 553 | /* |
7ea239d9 | 554 | * Select timing parameters for host. |
b57c43ad | 555 | */ |
7ea239d9 | 556 | void mmc_set_timing(struct mmc_host *host, unsigned int timing) |
b57c43ad | 557 | { |
7ea239d9 PO |
558 | host->ios.timing = timing; |
559 | mmc_set_ios(host); | |
b57c43ad PO |
560 | } |
561 | ||
1da177e4 | 562 | /* |
45f8245b RK |
563 | * Apply power to the MMC stack. This is a two-stage process. |
564 | * First, we enable power to the card without the clock running. | |
565 | * We then wait a bit for the power to stabilise. Finally, | |
566 | * enable the bus drivers and clock to the card. | |
567 | * | |
568 | * We must _NOT_ enable the clock prior to power stablising. | |
569 | * | |
570 | * If a host does all the power sequencing itself, ignore the | |
571 | * initial MMC_POWER_UP stage. | |
1da177e4 LT |
572 | */ |
573 | static void mmc_power_up(struct mmc_host *host) | |
574 | { | |
575 | int bit = fls(host->ocr_avail) - 1; | |
576 | ||
577 | host->ios.vdd = bit; | |
af517150 DB |
578 | if (mmc_host_is_spi(host)) { |
579 | host->ios.chip_select = MMC_CS_HIGH; | |
580 | host->ios.bus_mode = MMC_BUSMODE_PUSHPULL; | |
581 | } else { | |
582 | host->ios.chip_select = MMC_CS_DONTCARE; | |
583 | host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN; | |
584 | } | |
1da177e4 | 585 | host->ios.power_mode = MMC_POWER_UP; |
f218278a | 586 | host->ios.bus_width = MMC_BUS_WIDTH_1; |
cd9277c0 | 587 | host->ios.timing = MMC_TIMING_LEGACY; |
920e70c5 | 588 | mmc_set_ios(host); |
1da177e4 | 589 | |
f9996aee PO |
590 | /* |
591 | * This delay should be sufficient to allow the power supply | |
592 | * to reach the minimum voltage. | |
593 | */ | |
594 | mmc_delay(2); | |
1da177e4 LT |
595 | |
596 | host->ios.clock = host->f_min; | |
597 | host->ios.power_mode = MMC_POWER_ON; | |
920e70c5 | 598 | mmc_set_ios(host); |
1da177e4 | 599 | |
f9996aee PO |
600 | /* |
601 | * This delay must be at least 74 clock sizes, or 1 ms, or the | |
602 | * time required to reach a stable voltage. | |
603 | */ | |
1da177e4 LT |
604 | mmc_delay(2); |
605 | } | |
606 | ||
607 | static void mmc_power_off(struct mmc_host *host) | |
608 | { | |
609 | host->ios.clock = 0; | |
610 | host->ios.vdd = 0; | |
af517150 DB |
611 | if (!mmc_host_is_spi(host)) { |
612 | host->ios.bus_mode = MMC_BUSMODE_OPENDRAIN; | |
613 | host->ios.chip_select = MMC_CS_DONTCARE; | |
614 | } | |
1da177e4 | 615 | host->ios.power_mode = MMC_POWER_OFF; |
f218278a | 616 | host->ios.bus_width = MMC_BUS_WIDTH_1; |
cd9277c0 | 617 | host->ios.timing = MMC_TIMING_LEGACY; |
920e70c5 | 618 | mmc_set_ios(host); |
1da177e4 LT |
619 | } |
620 | ||
39361851 AB |
621 | /* |
622 | * Cleanup when the last reference to the bus operator is dropped. | |
623 | */ | |
261172fd | 624 | static void __mmc_release_bus(struct mmc_host *host) |
39361851 AB |
625 | { |
626 | BUG_ON(!host); | |
627 | BUG_ON(host->bus_refs); | |
628 | BUG_ON(!host->bus_dead); | |
629 | ||
630 | host->bus_ops = NULL; | |
631 | } | |
632 | ||
633 | /* | |
634 | * Increase reference count of bus operator | |
635 | */ | |
636 | static inline void mmc_bus_get(struct mmc_host *host) | |
637 | { | |
638 | unsigned long flags; | |
639 | ||
640 | spin_lock_irqsave(&host->lock, flags); | |
641 | host->bus_refs++; | |
642 | spin_unlock_irqrestore(&host->lock, flags); | |
643 | } | |
644 | ||
645 | /* | |
646 | * Decrease reference count of bus operator and free it if | |
647 | * it is the last reference. | |
648 | */ | |
649 | static inline void mmc_bus_put(struct mmc_host *host) | |
650 | { | |
651 | unsigned long flags; | |
652 | ||
653 | spin_lock_irqsave(&host->lock, flags); | |
654 | host->bus_refs--; | |
655 | if ((host->bus_refs == 0) && host->bus_ops) | |
656 | __mmc_release_bus(host); | |
657 | spin_unlock_irqrestore(&host->lock, flags); | |
658 | } | |
659 | ||
1da177e4 | 660 | /* |
7ea239d9 PO |
661 | * Assign a mmc bus handler to a host. Only one bus handler may control a |
662 | * host at any given time. | |
1da177e4 | 663 | */ |
7ea239d9 | 664 | void mmc_attach_bus(struct mmc_host *host, const struct mmc_bus_ops *ops) |
1da177e4 | 665 | { |
7ea239d9 | 666 | unsigned long flags; |
e45a1bd2 | 667 | |
7ea239d9 PO |
668 | BUG_ON(!host); |
669 | BUG_ON(!ops); | |
b855885e | 670 | |
d84075c8 | 671 | WARN_ON(!host->claimed); |
bce40a36 | 672 | |
7ea239d9 | 673 | spin_lock_irqsave(&host->lock, flags); |
bce40a36 | 674 | |
7ea239d9 PO |
675 | BUG_ON(host->bus_ops); |
676 | BUG_ON(host->bus_refs); | |
b57c43ad | 677 | |
7ea239d9 PO |
678 | host->bus_ops = ops; |
679 | host->bus_refs = 1; | |
680 | host->bus_dead = 0; | |
b57c43ad | 681 | |
7ea239d9 | 682 | spin_unlock_irqrestore(&host->lock, flags); |
b57c43ad PO |
683 | } |
684 | ||
7ea239d9 PO |
685 | /* |
686 | * Remove the current bus handler from a host. Assumes that there are | |
687 | * no interesting cards left, so the bus is powered down. | |
688 | */ | |
689 | void mmc_detach_bus(struct mmc_host *host) | |
7ccd266e | 690 | { |
7ea239d9 | 691 | unsigned long flags; |
7ccd266e | 692 | |
7ea239d9 | 693 | BUG_ON(!host); |
7ccd266e | 694 | |
d84075c8 PO |
695 | WARN_ON(!host->claimed); |
696 | WARN_ON(!host->bus_ops); | |
cd9277c0 | 697 | |
7ea239d9 | 698 | spin_lock_irqsave(&host->lock, flags); |
7ccd266e | 699 | |
7ea239d9 | 700 | host->bus_dead = 1; |
7ccd266e | 701 | |
7ea239d9 | 702 | spin_unlock_irqrestore(&host->lock, flags); |
1da177e4 | 703 | |
7ea239d9 | 704 | mmc_power_off(host); |
1da177e4 | 705 | |
7ea239d9 | 706 | mmc_bus_put(host); |
1da177e4 LT |
707 | } |
708 | ||
1da177e4 LT |
709 | /** |
710 | * mmc_detect_change - process change of state on a MMC socket | |
711 | * @host: host which changed state. | |
8dc00335 | 712 | * @delay: optional delay to wait before detection (jiffies) |
1da177e4 | 713 | * |
67a61c48 PO |
714 | * MMC drivers should call this when they detect a card has been |
715 | * inserted or removed. The MMC layer will confirm that any | |
716 | * present card is still functional, and initialize any newly | |
717 | * inserted. | |
1da177e4 | 718 | */ |
8dc00335 | 719 | void mmc_detect_change(struct mmc_host *host, unsigned long delay) |
1da177e4 | 720 | { |
3b91e550 | 721 | #ifdef CONFIG_MMC_DEBUG |
1efd48b3 | 722 | unsigned long flags; |
01f41ec7 | 723 | spin_lock_irqsave(&host->lock, flags); |
d84075c8 | 724 | WARN_ON(host->removed); |
01f41ec7 | 725 | spin_unlock_irqrestore(&host->lock, flags); |
3b91e550 PO |
726 | #endif |
727 | ||
c4028958 | 728 | mmc_schedule_delayed_work(&host->detect, delay); |
1da177e4 LT |
729 | } |
730 | ||
731 | EXPORT_SYMBOL(mmc_detect_change); | |
732 | ||
733 | ||
b93931a6 | 734 | void mmc_rescan(struct work_struct *work) |
1da177e4 | 735 | { |
c4028958 DH |
736 | struct mmc_host *host = |
737 | container_of(work, struct mmc_host, detect.work); | |
7ea239d9 PO |
738 | u32 ocr; |
739 | int err; | |
1da177e4 | 740 | |
7ea239d9 | 741 | mmc_bus_get(host); |
b855885e | 742 | |
7ea239d9 | 743 | if (host->bus_ops == NULL) { |
1da177e4 | 744 | /* |
7ea239d9 PO |
745 | * Only we can add a new handler, so it's safe to |
746 | * release the lock here. | |
1da177e4 | 747 | */ |
7ea239d9 | 748 | mmc_bus_put(host); |
1da177e4 | 749 | |
28f52482 AV |
750 | if (host->ops->get_cd && host->ops->get_cd(host) == 0) |
751 | goto out; | |
752 | ||
7ea239d9 | 753 | mmc_claim_host(host); |
1da177e4 | 754 | |
7ea239d9 PO |
755 | mmc_power_up(host); |
756 | mmc_go_idle(host); | |
1da177e4 | 757 | |
7ea239d9 | 758 | mmc_send_if_cond(host, host->ocr_avail); |
1da177e4 | 759 | |
5c4e6f13 PO |
760 | /* |
761 | * First we search for SDIO... | |
762 | */ | |
763 | err = mmc_send_io_op_cond(host, 0, &ocr); | |
764 | if (!err) { | |
765 | if (mmc_attach_sdio(host, ocr)) | |
766 | mmc_power_off(host); | |
28f52482 | 767 | goto out; |
5c4e6f13 PO |
768 | } |
769 | ||
770 | /* | |
771 | * ...then normal SD... | |
772 | */ | |
7ea239d9 | 773 | err = mmc_send_app_op_cond(host, 0, &ocr); |
17b0429d | 774 | if (!err) { |
7ea239d9 PO |
775 | if (mmc_attach_sd(host, ocr)) |
776 | mmc_power_off(host); | |
28f52482 | 777 | goto out; |
5c4e6f13 PO |
778 | } |
779 | ||
780 | /* | |
781 | * ...and finally MMC. | |
782 | */ | |
783 | err = mmc_send_op_cond(host, 0, &ocr); | |
784 | if (!err) { | |
785 | if (mmc_attach_mmc(host, ocr)) | |
7ea239d9 | 786 | mmc_power_off(host); |
28f52482 | 787 | goto out; |
7ea239d9 | 788 | } |
5c4e6f13 PO |
789 | |
790 | mmc_release_host(host); | |
791 | mmc_power_off(host); | |
7ea239d9 PO |
792 | } else { |
793 | if (host->bus_ops->detect && !host->bus_dead) | |
794 | host->bus_ops->detect(host); | |
795 | ||
796 | mmc_bus_put(host); | |
797 | } | |
28f52482 AV |
798 | out: |
799 | if (host->caps & MMC_CAP_NEEDS_POLL) | |
800 | mmc_schedule_delayed_work(&host->detect, HZ); | |
1da177e4 LT |
801 | } |
802 | ||
b93931a6 | 803 | void mmc_start_host(struct mmc_host *host) |
1da177e4 | 804 | { |
b93931a6 PO |
805 | mmc_power_off(host); |
806 | mmc_detect_change(host, 0); | |
1da177e4 LT |
807 | } |
808 | ||
b93931a6 | 809 | void mmc_stop_host(struct mmc_host *host) |
1da177e4 | 810 | { |
3b91e550 | 811 | #ifdef CONFIG_MMC_DEBUG |
1efd48b3 PO |
812 | unsigned long flags; |
813 | spin_lock_irqsave(&host->lock, flags); | |
3b91e550 | 814 | host->removed = 1; |
1efd48b3 | 815 | spin_unlock_irqrestore(&host->lock, flags); |
3b91e550 PO |
816 | #endif |
817 | ||
818 | mmc_flush_scheduled_work(); | |
819 | ||
7ea239d9 PO |
820 | mmc_bus_get(host); |
821 | if (host->bus_ops && !host->bus_dead) { | |
822 | if (host->bus_ops->remove) | |
823 | host->bus_ops->remove(host); | |
824 | ||
825 | mmc_claim_host(host); | |
826 | mmc_detach_bus(host); | |
827 | mmc_release_host(host); | |
1da177e4 | 828 | } |
7ea239d9 PO |
829 | mmc_bus_put(host); |
830 | ||
831 | BUG_ON(host->card); | |
1da177e4 LT |
832 | |
833 | mmc_power_off(host); | |
834 | } | |
835 | ||
1da177e4 LT |
836 | #ifdef CONFIG_PM |
837 | ||
838 | /** | |
839 | * mmc_suspend_host - suspend a host | |
840 | * @host: mmc host | |
841 | * @state: suspend mode (PM_SUSPEND_xxx) | |
842 | */ | |
e5378ca8 | 843 | int mmc_suspend_host(struct mmc_host *host, pm_message_t state) |
1da177e4 | 844 | { |
b5af25be PO |
845 | mmc_flush_scheduled_work(); |
846 | ||
7ea239d9 PO |
847 | mmc_bus_get(host); |
848 | if (host->bus_ops && !host->bus_dead) { | |
6abaa0c9 PO |
849 | if (host->bus_ops->suspend) |
850 | host->bus_ops->suspend(host); | |
851 | if (!host->bus_ops->resume) { | |
852 | if (host->bus_ops->remove) | |
853 | host->bus_ops->remove(host); | |
854 | ||
855 | mmc_claim_host(host); | |
856 | mmc_detach_bus(host); | |
857 | mmc_release_host(host); | |
858 | } | |
b5af25be | 859 | } |
7ea239d9 PO |
860 | mmc_bus_put(host); |
861 | ||
1da177e4 | 862 | mmc_power_off(host); |
1da177e4 LT |
863 | |
864 | return 0; | |
865 | } | |
866 | ||
867 | EXPORT_SYMBOL(mmc_suspend_host); | |
868 | ||
869 | /** | |
870 | * mmc_resume_host - resume a previously suspended host | |
871 | * @host: mmc host | |
872 | */ | |
873 | int mmc_resume_host(struct mmc_host *host) | |
874 | { | |
6abaa0c9 PO |
875 | mmc_bus_get(host); |
876 | if (host->bus_ops && !host->bus_dead) { | |
877 | mmc_power_up(host); | |
878 | BUG_ON(!host->bus_ops->resume); | |
879 | host->bus_ops->resume(host); | |
880 | } | |
881 | mmc_bus_put(host); | |
882 | ||
883 | /* | |
884 | * We add a slight delay here so that resume can progress | |
885 | * in parallel. | |
886 | */ | |
887 | mmc_detect_change(host, 1); | |
1da177e4 LT |
888 | |
889 | return 0; | |
890 | } | |
891 | ||
892 | EXPORT_SYMBOL(mmc_resume_host); | |
893 | ||
894 | #endif | |
895 | ||
ffce2e7e PO |
896 | static int __init mmc_init(void) |
897 | { | |
898 | int ret; | |
899 | ||
900 | workqueue = create_singlethread_workqueue("kmmcd"); | |
901 | if (!workqueue) | |
902 | return -ENOMEM; | |
903 | ||
904 | ret = mmc_register_bus(); | |
e29a7d73 PO |
905 | if (ret) |
906 | goto destroy_workqueue; | |
907 | ||
908 | ret = mmc_register_host_class(); | |
909 | if (ret) | |
910 | goto unregister_bus; | |
911 | ||
912 | ret = sdio_register_bus(); | |
913 | if (ret) | |
914 | goto unregister_host_class; | |
915 | ||
916 | return 0; | |
917 | ||
918 | unregister_host_class: | |
919 | mmc_unregister_host_class(); | |
920 | unregister_bus: | |
921 | mmc_unregister_bus(); | |
922 | destroy_workqueue: | |
923 | destroy_workqueue(workqueue); | |
924 | ||
ffce2e7e PO |
925 | return ret; |
926 | } | |
927 | ||
928 | static void __exit mmc_exit(void) | |
929 | { | |
e29a7d73 | 930 | sdio_unregister_bus(); |
ffce2e7e PO |
931 | mmc_unregister_host_class(); |
932 | mmc_unregister_bus(); | |
933 | destroy_workqueue(workqueue); | |
934 | } | |
935 | ||
26074962 | 936 | subsys_initcall(mmc_init); |
ffce2e7e PO |
937 | module_exit(mmc_exit); |
938 | ||
1da177e4 | 939 | MODULE_LICENSE("GPL"); |