Commit | Line | Data |
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78cf1de4 JS |
1 | /* |
2 | * SN Platform GRU Driver | |
3 | * | |
4 | * FILE OPERATIONS & DRIVER INITIALIZATION | |
5 | * | |
6 | * This file supports the user system call for file open, close, mmap, etc. | |
7 | * This also incudes the driver initialization code. | |
8 | * | |
9 | * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, | |
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | * GNU General Public License for more details. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License | |
22 | * along with this program; if not, write to the Free Software | |
23 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #include <linux/module.h> | |
27 | #include <linux/kernel.h> | |
28 | #include <linux/errno.h> | |
29 | #include <linux/slab.h> | |
30 | #include <linux/mm.h> | |
31 | #include <linux/io.h> | |
78cf1de4 JS |
32 | #include <linux/spinlock.h> |
33 | #include <linux/device.h> | |
34 | #include <linux/miscdevice.h> | |
35 | #include <linux/interrupt.h> | |
36 | #include <linux/proc_fs.h> | |
37 | #include <linux/uaccess.h> | |
1c004004 | 38 | #include <asm/uv/uv.h> |
78cf1de4 JS |
39 | #include "gru.h" |
40 | #include "grulib.h" | |
41 | #include "grutables.h" | |
42 | ||
78cf1de4 JS |
43 | #include <asm/uv/uv_hub.h> |
44 | #include <asm/uv/uv_mmrs.h> | |
45 | ||
46 | struct gru_blade_state *gru_base[GRU_MAX_BLADES] __read_mostly; | |
fe5bb6b0 | 47 | unsigned long gru_start_paddr __read_mostly; |
1a2c09e3 | 48 | void *gru_start_vaddr __read_mostly; |
fe5bb6b0 | 49 | unsigned long gru_end_paddr __read_mostly; |
e1c3219d | 50 | unsigned int gru_max_gids __read_mostly; |
78cf1de4 JS |
51 | struct gru_stats_s gru_stats; |
52 | ||
53 | /* Guaranteed user available resources on each node */ | |
54 | static int max_user_cbrs, max_user_dsr_bytes; | |
55 | ||
56 | static struct file_operations gru_fops; | |
57 | static struct miscdevice gru_miscdev; | |
58 | ||
59 | ||
60 | /* | |
61 | * gru_vma_close | |
62 | * | |
63 | * Called when unmapping a device mapping. Frees all gru resources | |
64 | * and tables belonging to the vma. | |
65 | */ | |
66 | static void gru_vma_close(struct vm_area_struct *vma) | |
67 | { | |
68 | struct gru_vma_data *vdata; | |
69 | struct gru_thread_state *gts; | |
70 | struct list_head *entry, *next; | |
71 | ||
72 | if (!vma->vm_private_data) | |
73 | return; | |
74 | ||
75 | vdata = vma->vm_private_data; | |
76 | vma->vm_private_data = NULL; | |
77 | gru_dbg(grudev, "vma %p, file %p, vdata %p\n", vma, vma->vm_file, | |
78 | vdata); | |
79 | list_for_each_safe(entry, next, &vdata->vd_head) { | |
80 | gts = | |
81 | list_entry(entry, struct gru_thread_state, ts_next); | |
82 | list_del(>s->ts_next); | |
83 | mutex_lock(>s->ts_ctxlock); | |
84 | if (gts->ts_gru) | |
85 | gru_unload_context(gts, 0); | |
86 | mutex_unlock(>s->ts_ctxlock); | |
87 | gts_drop(gts); | |
88 | } | |
89 | kfree(vdata); | |
90 | STAT(vdata_free); | |
91 | } | |
92 | ||
93 | /* | |
94 | * gru_file_mmap | |
95 | * | |
96 | * Called when mmaping the device. Initializes the vma with a fault handler | |
97 | * and private data structure necessary to allocate, track, and free the | |
98 | * underlying pages. | |
99 | */ | |
100 | static int gru_file_mmap(struct file *file, struct vm_area_struct *vma) | |
101 | { | |
102 | if ((vma->vm_flags & (VM_SHARED | VM_WRITE)) != (VM_SHARED | VM_WRITE)) | |
103 | return -EPERM; | |
104 | ||
9ca8e40c | 105 | if (vma->vm_start & (GRU_GSEG_PAGESIZE - 1) || |
fe5bb6b0 | 106 | vma->vm_end & (GRU_GSEG_PAGESIZE - 1)) |
9ca8e40c JS |
107 | return -EINVAL; |
108 | ||
78cf1de4 JS |
109 | vma->vm_flags |= |
110 | (VM_IO | VM_DONTCOPY | VM_LOCKED | VM_DONTEXPAND | VM_PFNMAP | | |
111 | VM_RESERVED); | |
112 | vma->vm_page_prot = PAGE_SHARED; | |
113 | vma->vm_ops = &gru_vm_ops; | |
114 | ||
115 | vma->vm_private_data = gru_alloc_vma_data(vma, 0); | |
116 | if (!vma->vm_private_data) | |
117 | return -ENOMEM; | |
118 | ||
119 | gru_dbg(grudev, "file %p, vaddr 0x%lx, vma %p, vdata %p\n", | |
120 | file, vma->vm_start, vma, vma->vm_private_data); | |
121 | return 0; | |
122 | } | |
123 | ||
124 | /* | |
125 | * Create a new GRU context | |
126 | */ | |
127 | static int gru_create_new_context(unsigned long arg) | |
128 | { | |
129 | struct gru_create_context_req req; | |
130 | struct vm_area_struct *vma; | |
131 | struct gru_vma_data *vdata; | |
132 | int ret = -EINVAL; | |
133 | ||
134 | ||
135 | if (copy_from_user(&req, (void __user *)arg, sizeof(req))) | |
136 | return -EFAULT; | |
137 | ||
3eac2e95 | 138 | if (req.data_segment_bytes > max_user_dsr_bytes) |
78cf1de4 | 139 | return -EINVAL; |
3eac2e95 | 140 | if (req.control_blocks > max_user_cbrs || !req.maximum_thread_count) |
78cf1de4 JS |
141 | return -EINVAL; |
142 | ||
143 | if (!(req.options & GRU_OPT_MISS_MASK)) | |
144 | req.options |= GRU_OPT_MISS_FMM_INTR; | |
145 | ||
146 | down_write(¤t->mm->mmap_sem); | |
147 | vma = gru_find_vma(req.gseg); | |
148 | if (vma) { | |
149 | vdata = vma->vm_private_data; | |
150 | vdata->vd_user_options = req.options; | |
151 | vdata->vd_dsr_au_count = | |
152 | GRU_DS_BYTES_TO_AU(req.data_segment_bytes); | |
153 | vdata->vd_cbr_au_count = GRU_CB_COUNT_TO_AU(req.control_blocks); | |
154 | ret = 0; | |
155 | } | |
156 | up_write(¤t->mm->mmap_sem); | |
157 | ||
158 | return ret; | |
159 | } | |
160 | ||
161 | /* | |
162 | * Get GRU configuration info (temp - for emulator testing) | |
163 | */ | |
164 | static long gru_get_config_info(unsigned long arg) | |
165 | { | |
166 | struct gru_config_info info; | |
167 | int nodesperblade; | |
168 | ||
169 | if (num_online_nodes() > 1 && | |
170 | (uv_node_to_blade_id(1) == uv_node_to_blade_id(0))) | |
171 | nodesperblade = 2; | |
172 | else | |
173 | nodesperblade = 1; | |
174 | info.cpus = num_online_cpus(); | |
175 | info.nodes = num_online_nodes(); | |
176 | info.blades = info.nodes / nodesperblade; | |
177 | info.chiplets = GRU_CHIPLETS_PER_BLADE * info.blades; | |
178 | ||
179 | if (copy_to_user((void __user *)arg, &info, sizeof(info))) | |
180 | return -EFAULT; | |
181 | return 0; | |
182 | } | |
183 | ||
78cf1de4 JS |
184 | /* |
185 | * gru_file_unlocked_ioctl | |
186 | * | |
187 | * Called to update file attributes via IOCTL calls. | |
188 | */ | |
189 | static long gru_file_unlocked_ioctl(struct file *file, unsigned int req, | |
190 | unsigned long arg) | |
191 | { | |
192 | int err = -EBADRQC; | |
193 | ||
194 | gru_dbg(grudev, "file %p\n", file); | |
195 | ||
196 | switch (req) { | |
197 | case GRU_CREATE_CONTEXT: | |
198 | err = gru_create_new_context(arg); | |
199 | break; | |
92b39388 JS |
200 | case GRU_SET_CONTEXT_OPTION: |
201 | err = gru_set_context_option(arg); | |
78cf1de4 JS |
202 | break; |
203 | case GRU_USER_GET_EXCEPTION_DETAIL: | |
204 | err = gru_get_exception_detail(arg); | |
205 | break; | |
206 | case GRU_USER_UNLOAD_CONTEXT: | |
207 | err = gru_user_unload_context(arg); | |
208 | break; | |
78cf1de4 JS |
209 | case GRU_USER_FLUSH_TLB: |
210 | err = gru_user_flush_tlb(arg); | |
211 | break; | |
212 | case GRU_USER_CALL_OS: | |
213 | err = gru_handle_user_call_os(arg); | |
214 | break; | |
7e796a72 JS |
215 | case GRU_GET_GSEG_STATISTICS: |
216 | err = gru_get_gseg_statistics(arg); | |
217 | break; | |
eb5bd5e5 JS |
218 | case GRU_KTEST: |
219 | err = gru_ktest(arg); | |
220 | break; | |
78cf1de4 JS |
221 | case GRU_GET_CONFIG_INFO: |
222 | err = gru_get_config_info(arg); | |
223 | break; | |
9cc9b056 JS |
224 | case GRU_DUMP_CHIPLET_STATE: |
225 | err = gru_dump_chiplet_request(arg); | |
226 | break; | |
78cf1de4 JS |
227 | } |
228 | return err; | |
229 | } | |
230 | ||
231 | /* | |
232 | * Called at init time to build tables for all GRUs that are present in the | |
233 | * system. | |
234 | */ | |
235 | static void gru_init_chiplet(struct gru_state *gru, unsigned long paddr, | |
236 | void *vaddr, int nid, int bid, int grunum) | |
237 | { | |
238 | spin_lock_init(&gru->gs_lock); | |
239 | spin_lock_init(&gru->gs_asid_lock); | |
240 | gru->gs_gru_base_paddr = paddr; | |
241 | gru->gs_gru_base_vaddr = vaddr; | |
242 | gru->gs_gid = bid * GRU_CHIPLETS_PER_BLADE + grunum; | |
243 | gru->gs_blade = gru_base[bid]; | |
244 | gru->gs_blade_id = bid; | |
245 | gru->gs_cbr_map = (GRU_CBR_AU == 64) ? ~0 : (1UL << GRU_CBR_AU) - 1; | |
246 | gru->gs_dsr_map = (1UL << GRU_DSR_AU) - 1; | |
87419412 | 247 | gru->gs_asid_limit = MAX_ASID; |
78cf1de4 | 248 | gru_tgh_flush_init(gru); |
e1c3219d JS |
249 | if (gru->gs_gid >= gru_max_gids) |
250 | gru_max_gids = gru->gs_gid + 1; | |
43884604 | 251 | gru_dbg(grudev, "bid %d, nid %d, gid %d, vaddr %p (0x%lx)\n", |
78cf1de4 JS |
252 | bid, nid, gru->gs_gid, gru->gs_gru_base_vaddr, |
253 | gru->gs_gru_base_paddr); | |
78cf1de4 JS |
254 | } |
255 | ||
256 | static int gru_init_tables(unsigned long gru_base_paddr, void *gru_base_vaddr) | |
257 | { | |
258 | int pnode, nid, bid, chip; | |
259 | int cbrs, dsrbytes, n; | |
260 | int order = get_order(sizeof(struct gru_blade_state)); | |
261 | struct page *page; | |
262 | struct gru_state *gru; | |
263 | unsigned long paddr; | |
264 | void *vaddr; | |
265 | ||
266 | max_user_cbrs = GRU_NUM_CB; | |
267 | max_user_dsr_bytes = GRU_NUM_DSR_BYTES; | |
268 | for_each_online_node(nid) { | |
269 | bid = uv_node_to_blade_id(nid); | |
270 | pnode = uv_node_to_pnode(nid); | |
fe5bb6b0 | 271 | if (bid < 0 || gru_base[bid]) |
78cf1de4 | 272 | continue; |
6484eb3e | 273 | page = alloc_pages_exact_node(nid, GFP_KERNEL, order); |
78cf1de4 JS |
274 | if (!page) |
275 | goto fail; | |
276 | gru_base[bid] = page_address(page); | |
277 | memset(gru_base[bid], 0, sizeof(struct gru_blade_state)); | |
278 | gru_base[bid]->bs_lru_gru = &gru_base[bid]->bs_grus[0]; | |
279 | spin_lock_init(&gru_base[bid]->bs_lock); | |
d5826dd6 | 280 | init_rwsem(&gru_base[bid]->bs_kgts_sema); |
78cf1de4 JS |
281 | |
282 | dsrbytes = 0; | |
283 | cbrs = 0; | |
284 | for (gru = gru_base[bid]->bs_grus, chip = 0; | |
fe5bb6b0 | 285 | chip < GRU_CHIPLETS_PER_BLADE; |
78cf1de4 JS |
286 | chip++, gru++) { |
287 | paddr = gru_chiplet_paddr(gru_base_paddr, pnode, chip); | |
288 | vaddr = gru_chiplet_vaddr(gru_base_vaddr, pnode, chip); | |
fe5bb6b0 | 289 | gru_init_chiplet(gru, paddr, vaddr, nid, bid, chip); |
78cf1de4 JS |
290 | n = hweight64(gru->gs_cbr_map) * GRU_CBR_AU_SIZE; |
291 | cbrs = max(cbrs, n); | |
292 | n = hweight64(gru->gs_dsr_map) * GRU_DSR_AU_BYTES; | |
293 | dsrbytes = max(dsrbytes, n); | |
294 | } | |
295 | max_user_cbrs = min(max_user_cbrs, cbrs); | |
296 | max_user_dsr_bytes = min(max_user_dsr_bytes, dsrbytes); | |
297 | } | |
298 | ||
299 | return 0; | |
300 | ||
301 | fail: | |
302 | for (nid--; nid >= 0; nid--) | |
303 | free_pages((unsigned long)gru_base[nid], order); | |
304 | return -ENOMEM; | |
305 | } | |
306 | ||
307 | #ifdef CONFIG_IA64 | |
308 | ||
309 | static int get_base_irq(void) | |
310 | { | |
311 | return IRQ_GRU; | |
312 | } | |
313 | ||
314 | #elif defined CONFIG_X86_64 | |
315 | ||
316 | static void noop(unsigned int irq) | |
317 | { | |
318 | } | |
319 | ||
320 | static struct irq_chip gru_chip = { | |
321 | .name = "gru", | |
322 | .mask = noop, | |
323 | .unmask = noop, | |
324 | .ack = noop, | |
325 | }; | |
326 | ||
327 | static int get_base_irq(void) | |
328 | { | |
329 | set_irq_chip(IRQ_GRU, &gru_chip); | |
330 | set_irq_chip(IRQ_GRU + 1, &gru_chip); | |
331 | return IRQ_GRU; | |
332 | } | |
333 | #endif | |
334 | ||
335 | /* | |
336 | * gru_init | |
337 | * | |
338 | * Called at boot or module load time to initialize the GRUs. | |
339 | */ | |
340 | static int __init gru_init(void) | |
341 | { | |
342 | int ret, irq, chip; | |
343 | char id[10]; | |
78cf1de4 | 344 | |
1c004004 | 345 | if (!is_uv_system()) |
e873cff0 | 346 | return 0; |
78cf1de4 JS |
347 | |
348 | #if defined CONFIG_IA64 | |
349 | gru_start_paddr = 0xd000000000UL; /* ZZZZZZZZZZZZZZZZZZZ fixme */ | |
350 | #else | |
351 | gru_start_paddr = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR) & | |
352 | 0x7fffffffffffUL; | |
78cf1de4 JS |
353 | #endif |
354 | gru_start_vaddr = __va(gru_start_paddr); | |
fe5bb6b0 | 355 | gru_end_paddr = gru_start_paddr + GRU_MAX_BLADES * GRU_SIZE; |
78cf1de4 JS |
356 | printk(KERN_INFO "GRU space: 0x%lx - 0x%lx\n", |
357 | gru_start_paddr, gru_end_paddr); | |
358 | irq = get_base_irq(); | |
359 | for (chip = 0; chip < GRU_CHIPLETS_PER_BLADE; chip++) { | |
360 | ret = request_irq(irq + chip, gru_intr, 0, id, NULL); | |
fe5bb6b0 | 361 | /* TODO: fix irq handling on x86. For now ignore failure because |
923f7f69 JS |
362 | * interrupts are not required & not yet fully supported */ |
363 | if (ret) { | |
fe5bb6b0 JS |
364 | printk(KERN_WARNING |
365 | "!!!WARNING: GRU ignoring request failure!!!\n"); | |
923f7f69 JS |
366 | ret = 0; |
367 | } | |
78cf1de4 JS |
368 | if (ret) { |
369 | printk(KERN_ERR "%s: request_irq failed\n", | |
370 | GRU_DRIVER_ID_STR); | |
371 | goto exit1; | |
372 | } | |
373 | } | |
374 | ||
375 | ret = misc_register(&gru_miscdev); | |
376 | if (ret) { | |
377 | printk(KERN_ERR "%s: misc_register failed\n", | |
378 | GRU_DRIVER_ID_STR); | |
379 | goto exit1; | |
380 | } | |
381 | ||
382 | ret = gru_proc_init(); | |
383 | if (ret) { | |
384 | printk(KERN_ERR "%s: proc init failed\n", GRU_DRIVER_ID_STR); | |
385 | goto exit2; | |
386 | } | |
387 | ||
388 | ret = gru_init_tables(gru_start_paddr, gru_start_vaddr); | |
389 | if (ret) { | |
390 | printk(KERN_ERR "%s: init tables failed\n", GRU_DRIVER_ID_STR); | |
391 | goto exit3; | |
392 | } | |
d5826dd6 | 393 | gru_kservices_init(); |
78cf1de4 JS |
394 | |
395 | printk(KERN_INFO "%s: v%s\n", GRU_DRIVER_ID_STR, | |
396 | GRU_DRIVER_VERSION_STR); | |
397 | return 0; | |
398 | ||
399 | exit3: | |
400 | gru_proc_exit(); | |
401 | exit2: | |
402 | misc_deregister(&gru_miscdev); | |
403 | exit1: | |
404 | for (--chip; chip >= 0; chip--) | |
405 | free_irq(irq + chip, NULL); | |
406 | return ret; | |
407 | ||
408 | } | |
409 | ||
410 | static void __exit gru_exit(void) | |
411 | { | |
d5826dd6 | 412 | int i, bid; |
78cf1de4 JS |
413 | int order = get_order(sizeof(struct gru_state) * |
414 | GRU_CHIPLETS_PER_BLADE); | |
415 | ||
1c004004 | 416 | if (!is_uv_system()) |
8275d102 RH |
417 | return; |
418 | ||
78cf1de4 JS |
419 | for (i = 0; i < GRU_CHIPLETS_PER_BLADE; i++) |
420 | free_irq(IRQ_GRU + i, NULL); | |
d5826dd6 | 421 | gru_kservices_exit(); |
78cf1de4 JS |
422 | for (bid = 0; bid < GRU_MAX_BLADES; bid++) |
423 | free_pages((unsigned long)gru_base[bid], order); | |
424 | ||
425 | misc_deregister(&gru_miscdev); | |
426 | gru_proc_exit(); | |
427 | } | |
428 | ||
429 | static struct file_operations gru_fops = { | |
430 | .owner = THIS_MODULE, | |
431 | .unlocked_ioctl = gru_file_unlocked_ioctl, | |
432 | .mmap = gru_file_mmap, | |
433 | }; | |
434 | ||
435 | static struct miscdevice gru_miscdev = { | |
436 | .minor = MISC_DYNAMIC_MINOR, | |
437 | .name = "gru", | |
438 | .fops = &gru_fops, | |
439 | }; | |
440 | ||
441 | struct vm_operations_struct gru_vm_ops = { | |
442 | .close = gru_vma_close, | |
443 | .fault = gru_fault, | |
444 | }; | |
445 | ||
fe5bb6b0 | 446 | #ifndef MODULE |
026bde12 | 447 | fs_initcall(gru_init); |
fe5bb6b0 JS |
448 | #else |
449 | module_init(gru_init); | |
450 | #endif | |
78cf1de4 JS |
451 | module_exit(gru_exit); |
452 | ||
9ca8e40c JS |
453 | module_param(gru_options, ulong, 0644); |
454 | MODULE_PARM_DESC(gru_options, "Various debug options"); | |
78cf1de4 JS |
455 | |
456 | MODULE_AUTHOR("Silicon Graphics, Inc."); | |
457 | MODULE_LICENSE("GPL"); | |
458 | MODULE_DESCRIPTION(GRU_DRIVER_ID_STR GRU_DRIVER_VERSION_STR); | |
459 | MODULE_VERSION(GRU_DRIVER_VERSION_STR); | |
460 |