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97fb5e8d | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1f26d1c1 TB |
2 | /* Copyright (c) 2013, The Linux Foundation. All rights reserved. |
3 | * Copyright (c) 2015, Sony Mobile Communications Inc. | |
1f26d1c1 TB |
4 | */ |
5 | ||
6 | #include <linux/kernel.h> | |
7 | #include <linux/module.h> | |
8 | #include <linux/slab.h> | |
9 | #include <linux/of.h> | |
10 | #include <linux/regmap.h> | |
1f26d1c1 TB |
11 | #include <linux/platform_device.h> |
12 | ||
13 | struct qcom_coincell { | |
14 | struct device *dev; | |
15 | struct regmap *regmap; | |
16 | u32 base_addr; | |
17 | }; | |
18 | ||
19 | #define QCOM_COINCELL_REG_RSET 0x44 | |
20 | #define QCOM_COINCELL_REG_VSET 0x45 | |
21 | #define QCOM_COINCELL_REG_ENABLE 0x46 | |
22 | ||
23 | #define QCOM_COINCELL_ENABLE BIT(7) | |
24 | ||
25 | static const int qcom_rset_map[] = { 2100, 1700, 1200, 800 }; | |
26 | static const int qcom_vset_map[] = { 2500, 3200, 3100, 3000 }; | |
27 | /* NOTE: for pm8921 and others, voltage of 2500 is 16 (10000b), not 0 */ | |
28 | ||
29 | /* if enable==0, rset and vset are ignored */ | |
30 | static int qcom_coincell_chgr_config(struct qcom_coincell *chgr, int rset, | |
31 | int vset, bool enable) | |
32 | { | |
33 | int i, j, rc; | |
34 | ||
35 | /* if disabling, just do that and skip other operations */ | |
36 | if (!enable) | |
37 | return regmap_write(chgr->regmap, | |
38 | chgr->base_addr + QCOM_COINCELL_REG_ENABLE, 0); | |
39 | ||
40 | /* find index for current-limiting resistor */ | |
41 | for (i = 0; i < ARRAY_SIZE(qcom_rset_map); i++) | |
42 | if (rset == qcom_rset_map[i]) | |
43 | break; | |
44 | ||
45 | if (i >= ARRAY_SIZE(qcom_rset_map)) { | |
46 | dev_err(chgr->dev, "invalid rset-ohms value %d\n", rset); | |
47 | return -EINVAL; | |
48 | } | |
49 | ||
50 | /* find index for charge voltage */ | |
51 | for (j = 0; j < ARRAY_SIZE(qcom_vset_map); j++) | |
52 | if (vset == qcom_vset_map[j]) | |
53 | break; | |
54 | ||
55 | if (j >= ARRAY_SIZE(qcom_vset_map)) { | |
56 | dev_err(chgr->dev, "invalid vset-millivolts value %d\n", vset); | |
57 | return -EINVAL; | |
58 | } | |
59 | ||
60 | rc = regmap_write(chgr->regmap, | |
61 | chgr->base_addr + QCOM_COINCELL_REG_RSET, i); | |
62 | if (rc) { | |
63 | /* | |
64 | * This is mainly to flag a bad base_addr (reg) from dts. | |
65 | * Other failures writing to the registers should be | |
66 | * extremely rare, or indicative of problems that | |
67 | * should be reported elsewhere (eg. spmi failure). | |
68 | */ | |
69 | dev_err(chgr->dev, "could not write to RSET register\n"); | |
70 | return rc; | |
71 | } | |
72 | ||
73 | rc = regmap_write(chgr->regmap, | |
74 | chgr->base_addr + QCOM_COINCELL_REG_VSET, j); | |
75 | if (rc) | |
76 | return rc; | |
77 | ||
78 | /* set 'enable' register */ | |
79 | return regmap_write(chgr->regmap, | |
80 | chgr->base_addr + QCOM_COINCELL_REG_ENABLE, | |
81 | QCOM_COINCELL_ENABLE); | |
82 | } | |
83 | ||
84 | static int qcom_coincell_probe(struct platform_device *pdev) | |
85 | { | |
86 | struct device_node *node = pdev->dev.of_node; | |
87 | struct qcom_coincell chgr; | |
66b58edf DC |
88 | u32 rset = 0; |
89 | u32 vset = 0; | |
1f26d1c1 TB |
90 | bool enable; |
91 | int rc; | |
92 | ||
93 | chgr.dev = &pdev->dev; | |
94 | ||
95 | chgr.regmap = dev_get_regmap(pdev->dev.parent, NULL); | |
96 | if (!chgr.regmap) { | |
97 | dev_err(chgr.dev, "Unable to get regmap\n"); | |
98 | return -EINVAL; | |
99 | } | |
100 | ||
101 | rc = of_property_read_u32(node, "reg", &chgr.base_addr); | |
102 | if (rc) | |
103 | return rc; | |
104 | ||
105 | enable = !of_property_read_bool(node, "qcom,charger-disable"); | |
106 | ||
107 | if (enable) { | |
108 | rc = of_property_read_u32(node, "qcom,rset-ohms", &rset); | |
109 | if (rc) { | |
110 | dev_err(chgr.dev, | |
111 | "can't find 'qcom,rset-ohms' in DT block"); | |
112 | return rc; | |
113 | } | |
114 | ||
115 | rc = of_property_read_u32(node, "qcom,vset-millivolts", &vset); | |
116 | if (rc) { | |
117 | dev_err(chgr.dev, | |
118 | "can't find 'qcom,vset-millivolts' in DT block"); | |
119 | return rc; | |
120 | } | |
121 | } | |
122 | ||
123 | return qcom_coincell_chgr_config(&chgr, rset, vset, enable); | |
124 | } | |
125 | ||
126 | static const struct of_device_id qcom_coincell_match_table[] = { | |
127 | { .compatible = "qcom,pm8941-coincell", }, | |
128 | {} | |
129 | }; | |
130 | ||
131 | MODULE_DEVICE_TABLE(of, qcom_coincell_match_table); | |
132 | ||
133 | static struct platform_driver qcom_coincell_driver = { | |
134 | .driver = { | |
135 | .name = "qcom-spmi-coincell", | |
136 | .of_match_table = qcom_coincell_match_table, | |
137 | }, | |
138 | .probe = qcom_coincell_probe, | |
139 | }; | |
140 | ||
141 | module_platform_driver(qcom_coincell_driver); | |
142 | ||
143 | MODULE_DESCRIPTION("Qualcomm PMIC coincell charger driver"); | |
144 | MODULE_LICENSE("GPL v2"); |