Commit | Line | Data |
---|---|---|
9fff0425 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
ab841160 | 2 | /* |
95953618 | 3 | * Copyright (c) 2003-2022, Intel Corporation. All rights reserved. |
ab841160 | 4 | * Intel Management Engine Interface (Intel MEI) Linux driver |
ab841160 OW |
5 | */ |
6 | ||
7 | #ifndef _MEI_DEV_H_ | |
8 | #define _MEI_DEV_H_ | |
9 | ||
10 | #include <linux/types.h> | |
fdd9b865 | 11 | #include <linux/cdev.h> |
744f0f2f | 12 | #include <linux/poll.h> |
4f3afe1d | 13 | #include <linux/mei.h> |
e5354107 | 14 | #include <linux/mei_cl_bus.h> |
66ef5ea9 | 15 | |
f5b3c341 AS |
16 | static inline int uuid_le_cmp(const uuid_le u1, const uuid_le u2) |
17 | { | |
18 | return memcmp(&u1, &u2, sizeof(uuid_le)); | |
19 | } | |
20 | ||
ab841160 | 21 | #include "hw.h" |
9b0d5efc | 22 | #include "hbm.h" |
ab841160 | 23 | |
9fc5f0f8 TW |
24 | #define MEI_SLOT_SIZE sizeof(u32) |
25 | #define MEI_RD_MSG_BUF_SIZE (128 * MEI_SLOT_SIZE) | |
26 | ||
1e2776c3 TW |
27 | /* |
28 | * Number of Maximum MEI Clients | |
29 | */ | |
30 | #define MEI_CLIENTS_MAX 256 | |
31 | ||
6adb8efb TW |
32 | /* |
33 | * maximum number of consecutive resets | |
34 | */ | |
35 | #define MEI_MAX_CONSEC_RESET 3 | |
36 | ||
ab841160 OW |
37 | /* |
38 | * Number of File descriptors/handles | |
39 | * that can be opened to the driver. | |
40 | * | |
781d0d89 | 41 | * Limit to 255: 256 Total Clients |
83ce0741 | 42 | * minus internal client for MEI Bus Messages |
ab841160 | 43 | */ |
781d0d89 | 44 | #define MEI_MAX_OPEN_HANDLE_COUNT (MEI_CLIENTS_MAX - 1) |
ab841160 | 45 | |
ab841160 OW |
46 | /* File state */ |
47 | enum file_state { | |
bd47b526 AU |
48 | MEI_FILE_UNINITIALIZED = 0, |
49 | MEI_FILE_INITIALIZING, | |
ab841160 OW |
50 | MEI_FILE_CONNECTING, |
51 | MEI_FILE_CONNECTED, | |
52 | MEI_FILE_DISCONNECTING, | |
3c666182 | 53 | MEI_FILE_DISCONNECT_REPLY, |
18901357 | 54 | MEI_FILE_DISCONNECT_REQUIRED, |
3c666182 | 55 | MEI_FILE_DISCONNECTED, |
ab841160 OW |
56 | }; |
57 | ||
58 | /* MEI device states */ | |
b210d750 TW |
59 | enum mei_dev_state { |
60 | MEI_DEV_INITIALIZING = 0, | |
61 | MEI_DEV_INIT_CLIENTS, | |
62 | MEI_DEV_ENABLED, | |
0cfee51c | 63 | MEI_DEV_RESETTING, |
b210d750 | 64 | MEI_DEV_DISABLED, |
36edb140 | 65 | MEI_DEV_POWERING_DOWN, |
b210d750 TW |
66 | MEI_DEV_POWER_DOWN, |
67 | MEI_DEV_POWER_UP | |
ab841160 OW |
68 | }; |
69 | ||
342e4c7e TW |
70 | /** |
71 | * enum mei_dev_pxp_mode - MEI PXP mode state | |
72 | * | |
ae4cb6bd | 73 | * @MEI_DEV_PXP_DEFAULT: PCH based device, no initialization required |
342e4c7e | 74 | * @MEI_DEV_PXP_INIT: device requires initialization, send setup message to firmware |
ae4cb6bd | 75 | * @MEI_DEV_PXP_SETUP: device is in setup stage, waiting for firmware response |
342e4c7e TW |
76 | * @MEI_DEV_PXP_READY: device initialized |
77 | */ | |
78 | enum mei_dev_pxp_mode { | |
79 | MEI_DEV_PXP_DEFAULT = 0, | |
80 | MEI_DEV_PXP_INIT = 1, | |
81 | MEI_DEV_PXP_SETUP = 2, | |
82 | MEI_DEV_PXP_READY = 3, | |
83 | }; | |
84 | ||
34a674e9 VL |
85 | /** |
86 | * enum mei_dev_reset_to_pxp - reset to PXP mode performed | |
87 | * | |
88 | * @MEI_DEV_RESET_TO_PXP_DEFAULT: before reset | |
89 | * @MEI_DEV_RESET_TO_PXP_PERFORMED: reset performed | |
90 | * @MEI_DEV_RESET_TO_PXP_DONE: reset processed | |
91 | */ | |
92 | enum mei_dev_reset_to_pxp { | |
93 | MEI_DEV_RESET_TO_PXP_DEFAULT = 0, | |
94 | MEI_DEV_RESET_TO_PXP_PERFORMED = 1, | |
95 | MEI_DEV_RESET_TO_PXP_DONE = 2, | |
96 | }; | |
97 | ||
b210d750 TW |
98 | const char *mei_dev_state_str(int state); |
99 | ||
ab841160 OW |
100 | enum mei_file_transaction_states { |
101 | MEI_IDLE, | |
102 | MEI_WRITING, | |
103 | MEI_WRITE_COMPLETE, | |
ab841160 OW |
104 | }; |
105 | ||
4b8960b4 TW |
106 | /** |
107 | * enum mei_cb_file_ops - file operation associated with the callback | |
ce23139c AU |
108 | * @MEI_FOP_READ: read |
109 | * @MEI_FOP_WRITE: write | |
110 | * @MEI_FOP_CONNECT: connect | |
111 | * @MEI_FOP_DISCONNECT: disconnect | |
112 | * @MEI_FOP_DISCONNECT_RSP: disconnect response | |
965ae37a TW |
113 | * @MEI_FOP_NOTIFY_START: start notification |
114 | * @MEI_FOP_NOTIFY_STOP: stop notification | |
369aea84 AU |
115 | * @MEI_FOP_DMA_MAP: request client dma map |
116 | * @MEI_FOP_DMA_UNMAP: request client dma unmap | |
4b8960b4 TW |
117 | */ |
118 | enum mei_cb_file_ops { | |
119 | MEI_FOP_READ = 0, | |
120 | MEI_FOP_WRITE, | |
02a7eecc | 121 | MEI_FOP_CONNECT, |
5a8373fb | 122 | MEI_FOP_DISCONNECT, |
6bb948c9 | 123 | MEI_FOP_DISCONNECT_RSP, |
965ae37a TW |
124 | MEI_FOP_NOTIFY_START, |
125 | MEI_FOP_NOTIFY_STOP, | |
369aea84 AU |
126 | MEI_FOP_DMA_MAP, |
127 | MEI_FOP_DMA_UNMAP, | |
ab841160 OW |
128 | }; |
129 | ||
e0cb6b2f AU |
130 | /** |
131 | * enum mei_cl_io_mode - io mode between driver and fw | |
132 | * | |
133 | * @MEI_CL_IO_TX_BLOCKING: send is blocking | |
134 | * @MEI_CL_IO_TX_INTERNAL: internal communication between driver and FW | |
076802d0 AU |
135 | * |
136 | * @MEI_CL_IO_RX_NONBLOCK: recv is non-blocking | |
5d5bc189 TW |
137 | * |
138 | * @MEI_CL_IO_SGL: send command with sgl list. | |
e0cb6b2f AU |
139 | */ |
140 | enum mei_cl_io_mode { | |
141 | MEI_CL_IO_TX_BLOCKING = BIT(0), | |
142 | MEI_CL_IO_TX_INTERNAL = BIT(1), | |
076802d0 AU |
143 | |
144 | MEI_CL_IO_RX_NONBLOCK = BIT(2), | |
5d5bc189 TW |
145 | |
146 | MEI_CL_IO_SGL = BIT(3), | |
e0cb6b2f AU |
147 | }; |
148 | ||
ab841160 OW |
149 | /* |
150 | * Intel MEI message data struct | |
151 | */ | |
4234a6de | 152 | struct mei_msg_data { |
f862b6b2 | 153 | size_t size; |
edf1eed4 | 154 | unsigned char *data; |
f060939d | 155 | }; |
ab841160 | 156 | |
369aea84 AU |
157 | struct mei_dma_data { |
158 | u8 buffer_id; | |
159 | void *vaddr; | |
160 | dma_addr_t daddr; | |
161 | size_t size; | |
162 | }; | |
163 | ||
ce0925e8 TW |
164 | /** |
165 | * struct mei_dma_dscr - dma address descriptor | |
166 | * | |
167 | * @vaddr: dma buffer virtual address | |
168 | * @daddr: dma buffer physical address | |
169 | * @size : dma buffer size | |
170 | */ | |
171 | struct mei_dma_dscr { | |
172 | void *vaddr; | |
173 | dma_addr_t daddr; | |
174 | size_t size; | |
175 | }; | |
176 | ||
04dd3661 | 177 | /* Maximum number of processed FW status registers */ |
edca5ea3 AU |
178 | #define MEI_FW_STATUS_MAX 6 |
179 | /* Minimal buffer for FW status string (8 bytes in dw + space or '\0') */ | |
180 | #define MEI_FW_STATUS_STR_SZ (MEI_FW_STATUS_MAX * (8 + 1)) | |
181 | ||
04dd3661 AU |
182 | |
183 | /* | |
184 | * struct mei_fw_status - storage of FW status data | |
185 | * | |
a8605ea2 AU |
186 | * @count: number of actually available elements in array |
187 | * @status: FW status registers | |
04dd3661 AU |
188 | */ |
189 | struct mei_fw_status { | |
190 | int count; | |
191 | u32 status[MEI_FW_STATUS_MAX]; | |
192 | }; | |
193 | ||
db7da79d TW |
194 | /** |
195 | * struct mei_me_client - representation of me (fw) client | |
196 | * | |
a8605ea2 | 197 | * @list: link in me client list |
79563db9 | 198 | * @refcnt: struct reference count |
a8605ea2 AU |
199 | * @props: client properties |
200 | * @client_id: me client id | |
4034b81b | 201 | * @tx_flow_ctrl_creds: flow control credits |
a03d77f6 | 202 | * @connect_count: number connections to this client |
0ff0a8d8 | 203 | * @bus_added: added to bus |
db7da79d TW |
204 | */ |
205 | struct mei_me_client { | |
5ca2d388 | 206 | struct list_head list; |
79563db9 | 207 | struct kref refcnt; |
db7da79d TW |
208 | struct mei_client_properties props; |
209 | u8 client_id; | |
4034b81b | 210 | u8 tx_flow_ctrl_creds; |
a03d77f6 | 211 | u8 connect_count; |
0ff0a8d8 | 212 | u8 bus_added; |
db7da79d TW |
213 | }; |
214 | ||
ab841160 | 215 | |
db3ed431 TW |
216 | struct mei_cl; |
217 | ||
4b8960b4 | 218 | /** |
db3ed431 TW |
219 | * struct mei_cl_cb - file operation callback structure |
220 | * | |
a8605ea2 AU |
221 | * @list: link in callback queue |
222 | * @cl: file client who is running this operation | |
223 | * @fop_type: file operation type | |
5db7514d | 224 | * @buf: buffer for data associated with the callback |
ce23139c | 225 | * @buf_idx: last read index |
0cd7c01a | 226 | * @vtag: virtual tag |
62e8e6ad | 227 | * @fp: pointer to file structure |
3d33ff24 | 228 | * @status: io status of the cb |
ce23139c | 229 | * @internal: communication between driver and FW flag |
e0cb6b2f | 230 | * @blocking: transmission blocking mode |
4ed1cc99 | 231 | * @ext_hdr: extended header |
db3ed431 | 232 | */ |
ab841160 | 233 | struct mei_cl_cb { |
fb601adb | 234 | struct list_head list; |
db3ed431 | 235 | struct mei_cl *cl; |
4b8960b4 | 236 | enum mei_cb_file_ops fop_type; |
5db7514d | 237 | struct mei_msg_data buf; |
f862b6b2 | 238 | size_t buf_idx; |
0cd7c01a | 239 | u8 vtag; |
62e8e6ad | 240 | const struct file *fp; |
3d33ff24 | 241 | int status; |
479327fc | 242 | u32 internal:1; |
e0cb6b2f | 243 | u32 blocking:1; |
4ed1cc99 | 244 | struct mei_ext_hdr *ext_hdr; |
ab841160 OW |
245 | }; |
246 | ||
f35fe5f4 AU |
247 | /** |
248 | * struct mei_cl_vtag - file pointer to vtag mapping structure | |
249 | * | |
250 | * @list: link in map queue | |
251 | * @fp: file pointer | |
252 | * @vtag: corresponding vtag | |
253 | * @pending_read: the read is pending on this file | |
254 | */ | |
255 | struct mei_cl_vtag { | |
256 | struct list_head list; | |
257 | const struct file *fp; | |
258 | u8 vtag; | |
259 | u8 pending_read:1; | |
260 | }; | |
261 | ||
ce23139c AU |
262 | /** |
263 | * struct mei_cl - me client host representation | |
264 | * carried in file->private_data | |
265 | * | |
266 | * @link: link in the clients list | |
267 | * @dev: mei parent device | |
268 | * @state: file operation state | |
269 | * @tx_wait: wait queue for tx completion | |
270 | * @rx_wait: wait queue for rx completion | |
271 | * @wait: wait queue for management operation | |
b38a362f | 272 | * @ev_wait: notification wait queue |
237092bf | 273 | * @ev_async: event async notification |
ce23139c | 274 | * @status: connection status |
d49ed64a | 275 | * @me_cl: fw client connected |
97d549b4 | 276 | * @fp: file associated with client |
ce23139c | 277 | * @host_client_id: host id |
f35fe5f4 | 278 | * @vtag_map: vtag map |
4034b81b | 279 | * @tx_flow_ctrl_creds: transmit flow credentials |
46978ada | 280 | * @rx_flow_ctrl_creds: receive flow credentials |
ce23139c | 281 | * @timer_count: watchdog timer for operation completion |
965ae37a TW |
282 | * @notify_en: notification - enabled/disabled |
283 | * @notify_ev: pending notification event | |
af336cab | 284 | * @tx_cb_queued: number of tx callbacks in queue |
ce23139c | 285 | * @writing_state: state of the tx |
a9bed610 | 286 | * @rd_pending: pending read credits |
d1376f3d | 287 | * @rd_completed_lock: protects rd_completed queue |
a9bed610 | 288 | * @rd_completed: completed read |
369aea84 AU |
289 | * @dma: dma settings |
290 | * @dma_mapped: dma buffer is currently mapped. | |
ce23139c | 291 | * |
b37719c3 | 292 | * @cldev: device on the mei client bus |
ce23139c | 293 | */ |
ab841160 OW |
294 | struct mei_cl { |
295 | struct list_head link; | |
296 | struct mei_device *dev; | |
297 | enum file_state state; | |
298 | wait_queue_head_t tx_wait; | |
299 | wait_queue_head_t rx_wait; | |
300 | wait_queue_head_t wait; | |
b38a362f | 301 | wait_queue_head_t ev_wait; |
237092bf | 302 | struct fasync_struct *ev_async; |
ab841160 | 303 | int status; |
d49ed64a | 304 | struct mei_me_client *me_cl; |
97d549b4 | 305 | const struct file *fp; |
ab841160 | 306 | u8 host_client_id; |
f35fe5f4 | 307 | struct list_head vtag_map; |
4034b81b | 308 | u8 tx_flow_ctrl_creds; |
46978ada | 309 | u8 rx_flow_ctrl_creds; |
ab841160 | 310 | u8 timer_count; |
965ae37a TW |
311 | u8 notify_en; |
312 | u8 notify_ev; | |
af336cab | 313 | u8 tx_cb_queued; |
ab841160 | 314 | enum mei_file_transaction_states writing_state; |
a9bed610 | 315 | struct list_head rd_pending; |
d1376f3d | 316 | spinlock_t rd_completed_lock; /* protects rd_completed queue */ |
a9bed610 | 317 | struct list_head rd_completed; |
369aea84 AU |
318 | struct mei_dma_data dma; |
319 | u8 dma_mapped; | |
a7b71bc0 | 320 | |
b37719c3 | 321 | struct mei_cl_device *cldev; |
ab841160 OW |
322 | }; |
323 | ||
af336cab AU |
324 | #define MEI_TX_QUEUE_LIMIT_DEFAULT 50 |
325 | #define MEI_TX_QUEUE_LIMIT_MAX 255 | |
326 | #define MEI_TX_QUEUE_LIMIT_MIN 30 | |
327 | ||
99c2658f AU |
328 | /** |
329 | * struct mei_hw_ops - hw specific ops | |
827eef51 | 330 | * |
a8605ea2 | 331 | * @host_is_ready : query for host readiness |
99c2658f | 332 | * |
a8605ea2 AU |
333 | * @hw_is_ready : query if hw is ready |
334 | * @hw_reset : reset hw | |
335 | * @hw_start : start hw after reset | |
336 | * @hw_config : configure hw | |
99c2658f | 337 | * |
a8605ea2 | 338 | * @fw_status : get fw status registers |
52f6efdf | 339 | * @trc_status : get trc status register |
a8605ea2 | 340 | * @pg_state : power gating state of the device |
3dc196ea | 341 | * @pg_in_transition : is device now in pg transition |
a8605ea2 | 342 | * @pg_is_enabled : is power gating enabled |
99c2658f | 343 | * |
a8605ea2 AU |
344 | * @intr_clear : clear pending interrupts |
345 | * @intr_enable : enable interrupts | |
346 | * @intr_disable : disable interrupts | |
4a8efd4a | 347 | * @synchronize_irq : synchronize irqs |
99c2658f | 348 | * |
a8605ea2 AU |
349 | * @hbuf_free_slots : query for write buffer empty slots |
350 | * @hbuf_is_ready : query if write buffer is empty | |
8c8d964c | 351 | * @hbuf_depth : query for write buffer depth |
99c2658f | 352 | * |
a8605ea2 | 353 | * @write : write a message to FW |
99c2658f | 354 | * |
a8605ea2 | 355 | * @rdbuf_full_slots : query how many slots are filled |
99c2658f | 356 | * |
a8605ea2 AU |
357 | * @read_hdr : get first 4 bytes (header) |
358 | * @read : read a buffer from the FW | |
827eef51 TW |
359 | */ |
360 | struct mei_hw_ops { | |
361 | ||
d63b3095 | 362 | bool (*host_is_ready)(struct mei_device *dev); |
827eef51 | 363 | |
d63b3095 TW |
364 | bool (*hw_is_ready)(struct mei_device *dev); |
365 | int (*hw_reset)(struct mei_device *dev, bool enable); | |
366 | int (*hw_start)(struct mei_device *dev); | |
261e071a | 367 | int (*hw_config)(struct mei_device *dev); |
827eef51 | 368 | |
1bd30b6a | 369 | int (*fw_status)(struct mei_device *dev, struct mei_fw_status *fw_sts); |
52f6efdf AU |
370 | int (*trc_status)(struct mei_device *dev, u32 *trc); |
371 | ||
964a2331 | 372 | enum mei_pg_state (*pg_state)(struct mei_device *dev); |
3dc196ea | 373 | bool (*pg_in_transition)(struct mei_device *dev); |
ee7e5afd TW |
374 | bool (*pg_is_enabled)(struct mei_device *dev); |
375 | ||
d63b3095 TW |
376 | void (*intr_clear)(struct mei_device *dev); |
377 | void (*intr_enable)(struct mei_device *dev); | |
378 | void (*intr_disable)(struct mei_device *dev); | |
4a8efd4a | 379 | void (*synchronize_irq)(struct mei_device *dev); |
827eef51 | 380 | |
d63b3095 TW |
381 | int (*hbuf_free_slots)(struct mei_device *dev); |
382 | bool (*hbuf_is_ready)(struct mei_device *dev); | |
8c8d964c | 383 | u32 (*hbuf_depth)(const struct mei_device *dev); |
827eef51 | 384 | int (*write)(struct mei_device *dev, |
98e70866 TW |
385 | const void *hdr, size_t hdr_len, |
386 | const void *data, size_t data_len); | |
827eef51 TW |
387 | |
388 | int (*rdbuf_full_slots)(struct mei_device *dev); | |
389 | ||
390 | u32 (*read_hdr)(const struct mei_device *dev); | |
d63b3095 | 391 | int (*read)(struct mei_device *dev, |
827eef51 TW |
392 | unsigned char *buf, unsigned long len); |
393 | }; | |
394 | ||
e5354107 | 395 | /* MEI bus API*/ |
a816a00e | 396 | void mei_cl_bus_rescan_work(struct work_struct *work); |
ae48d74d | 397 | void mei_cl_bus_dev_fixup(struct mei_cl_device *dev); |
0912ef48 | 398 | ssize_t __mei_cl_send(struct mei_cl *cl, const u8 *buf, size_t length, u8 vtag, |
e0cb6b2f | 399 | unsigned int mode); |
83f47eea AU |
400 | ssize_t __mei_cl_send_timeout(struct mei_cl *cl, const u8 *buf, size_t length, u8 vtag, |
401 | unsigned int mode, unsigned long timeout); | |
85261c1f | 402 | ssize_t __mei_cl_recv(struct mei_cl *cl, u8 *buf, size_t length, u8 *vtag, |
9a7c0b69 | 403 | unsigned int mode, unsigned long timeout); |
a1f9ae2b | 404 | bool mei_cl_bus_rx_event(struct mei_cl *cl); |
850f8940 | 405 | bool mei_cl_bus_notify_event(struct mei_cl *cl); |
b37719c3 | 406 | void mei_cl_bus_remove_devices(struct mei_device *bus); |
cf3baefb SO |
407 | int mei_cl_bus_init(void); |
408 | void mei_cl_bus_exit(void); | |
409 | ||
ce23139c | 410 | /** |
964a2331 TW |
411 | * enum mei_pg_event - power gating transition events |
412 | * | |
413 | * @MEI_PG_EVENT_IDLE: the driver is not in power gating transition | |
414 | * @MEI_PG_EVENT_WAIT: the driver is waiting for a pg event to complete | |
415 | * @MEI_PG_EVENT_RECEIVED: the driver received pg event | |
3dc196ea AU |
416 | * @MEI_PG_EVENT_INTR_WAIT: the driver is waiting for a pg event interrupt |
417 | * @MEI_PG_EVENT_INTR_RECEIVED: the driver received pg event interrupt | |
964a2331 TW |
418 | */ |
419 | enum mei_pg_event { | |
420 | MEI_PG_EVENT_IDLE, | |
421 | MEI_PG_EVENT_WAIT, | |
422 | MEI_PG_EVENT_RECEIVED, | |
3dc196ea AU |
423 | MEI_PG_EVENT_INTR_WAIT, |
424 | MEI_PG_EVENT_INTR_RECEIVED, | |
964a2331 TW |
425 | }; |
426 | ||
427 | /** | |
428 | * enum mei_pg_state - device internal power gating state | |
429 | * | |
430 | * @MEI_PG_OFF: device is not power gated - it is active | |
431 | * @MEI_PG_ON: device is power gated - it is in lower power state | |
432 | */ | |
433 | enum mei_pg_state { | |
434 | MEI_PG_OFF = 0, | |
435 | MEI_PG_ON = 1, | |
436 | }; | |
437 | ||
1beeb4b9 AU |
438 | const char *mei_pg_state_str(enum mei_pg_state state); |
439 | ||
3cfaeb33 AU |
440 | /** |
441 | * struct mei_fw_version - MEI FW version struct | |
442 | * | |
443 | * @platform: platform identifier | |
444 | * @major: major version field | |
445 | * @minor: minor version field | |
446 | * @buildno: build number version field | |
447 | * @hotfix: hotfix number version field | |
448 | */ | |
449 | struct mei_fw_version { | |
450 | u8 platform; | |
451 | u8 major; | |
452 | u16 minor; | |
453 | u16 buildno; | |
454 | u16 hotfix; | |
455 | }; | |
456 | ||
457 | #define MEI_MAX_FW_VER_BLOCKS 3 | |
458 | ||
95953618 AU |
459 | struct mei_dev_timeouts { |
460 | unsigned long hw_ready; /* Timeout on ready message, in jiffies */ | |
461 | int connect; /* HPS: at least 2 seconds, in seconds */ | |
462 | unsigned long cl_connect; /* HPS: Client Connect Timeout, in jiffies */ | |
463 | int client_init; /* HPS: Clients Enumeration Timeout, in seconds */ | |
464 | unsigned long pgi; /* PG Isolation time response, in jiffies */ | |
465 | unsigned int d0i3; /* D0i3 set/unset max response time, in jiffies */ | |
466 | unsigned long hbm; /* HBM operation timeout, in jiffies */ | |
467 | unsigned long mkhi_recv; /* receive timeout, in jiffies */ | |
468 | }; | |
469 | ||
24aadc80 | 470 | /** |
5fb54fb4 | 471 | * struct mei_device - MEI private device struct |
ce23139c | 472 | * |
a8605ea2 AU |
473 | * @dev : device on a bus |
474 | * @cdev : character device | |
475 | * @minor : minor number allocated for device | |
f3d8e878 | 476 | * |
ce23139c AU |
477 | * @write_list : write pending list |
478 | * @write_waiting_list : write completion list | |
479 | * @ctrl_wr_list : pending control write list | |
480 | * @ctrl_rd_list : pending control read list | |
af336cab | 481 | * @tx_queue_limit: tx queues per client linit |
bae1cc7d | 482 | * |
ce23139c AU |
483 | * @file_list : list of opened handles |
484 | * @open_handle_count: number of opened handles | |
485 | * | |
486 | * @device_lock : big device lock | |
487 | * @timer_work : MEI timer delayed work (timeouts) | |
488 | * | |
489 | * @recvd_hw_ready : hw ready message received flag | |
490 | * | |
491 | * @wait_hw_ready : wait queue for receive HW ready message form FW | |
492 | * @wait_pg : wait queue for receive PG message from FW | |
493 | * @wait_hbm_start : wait queue for receive HBM start message from FW | |
ce23139c AU |
494 | * |
495 | * @reset_count : number of consecutive resets | |
496 | * @dev_state : device state | |
497 | * @hbm_state : state of host bus message protocol | |
342e4c7e | 498 | * @pxp_mode : PXP device mode |
ce23139c | 499 | * @init_clients_timer : HBM init handshake timeout |
bae1cc7d | 500 | * |
a8605ea2 | 501 | * @pg_event : power gating event |
ce23139c AU |
502 | * @pg_domain : runtime PM domain |
503 | * | |
504 | * @rd_msg_buf : control messages buffer | |
505 | * @rd_msg_hdr : read message header storage | |
0cd7c01a | 506 | * @rd_msg_hdr_count : how many dwords were already read from header |
ce23139c | 507 | * |
a8605ea2 | 508 | * @hbuf_is_ready : query if the host host/write buffer is ready |
ce0925e8 | 509 | * @dr_dscr: DMA ring descriptors: TX, RX, and CTRL |
ce23139c AU |
510 | * |
511 | * @version : HBM protocol version in use | |
18901357 AU |
512 | * @hbm_f_pg_supported : hbm feature pgi protocol |
513 | * @hbm_f_dc_supported : hbm feature dynamic clients | |
514 | * @hbm_f_dot_supported : hbm feature disconnect on timeout | |
4d99877d | 515 | * @hbm_f_ev_supported : hbm feature event notification |
f4e06246 | 516 | * @hbm_f_fa_supported : hbm feature fixed address client |
27f476ea | 517 | * @hbm_f_ie_supported : hbm feature immediate reply to enum request |
7ee7f45a | 518 | * @hbm_f_os_supported : hbm feature support OS ver message |
c2bd9fc1 | 519 | * @hbm_f_dr_supported : hbm feature dma ring supported |
beb4e1e5 | 520 | * @hbm_f_vt_supported : hbm feature vtag supported |
e5cab1f9 | 521 | * @hbm_f_cap_supported : hbm feature capabilities message supported |
b7a48041 | 522 | * @hbm_f_cd_supported : hbm feature client dma supported |
4ed1cc99 | 523 | * @hbm_f_gsc_supported : hbm feature gsc supported |
ce23139c | 524 | * |
3cfaeb33 AU |
525 | * @fw_ver : FW versions |
526 | * | |
f8204f0d | 527 | * @fw_f_fw_ver_supported : fw feature: fw version supported |
6549b2b7 | 528 | * @fw_ver_received : fw version received |
f8204f0d | 529 | * |
b7d88514 | 530 | * @me_clients_rwsem: rw lock over me_clients list |
ce23139c AU |
531 | * @me_clients : list of FW clients |
532 | * @me_clients_map : FW clients bit map | |
533 | * @host_clients_map : host clients id pool | |
ce23139c | 534 | * |
eeabfcf5 | 535 | * @allow_fixed_address: allow user space to connect a fixed client |
f4e06246 | 536 | * @override_fixed_address: force allow fixed address behavior |
eeabfcf5 | 537 | * |
95953618 AU |
538 | * @timeouts: actual timeout values |
539 | * | |
ce23139c | 540 | * @reset_work : work item for the device reset |
a816a00e | 541 | * @bus_rescan_work : work item for the bus rescan |
ce23139c AU |
542 | * |
543 | * @device_list : mei client bus list | |
0ff0a8d8 | 544 | * @cl_bus_lock : client bus list lock |
ce23139c | 545 | * |
2f79d3d1 AU |
546 | * @kind : kind of mei device |
547 | * | |
ce23139c AU |
548 | * @dbgfs_dir : debugfs mei root directory |
549 | * | |
34a674e9 VL |
550 | * @saved_fw_status : saved firmware status |
551 | * @saved_dev_state : saved device state | |
552 | * @saved_fw_status_flag : flag indicating that firmware status was saved | |
553 | * @gsc_reset_to_pxp : state of reset to the PXP mode | |
554 | * | |
ce23139c AU |
555 | * @ops: : hw specific operations |
556 | * @hw : hw specific data | |
24aadc80 | 557 | */ |
ab841160 | 558 | struct mei_device { |
3a7e9b6c | 559 | struct device *dev; |
f3d8e878 AU |
560 | struct cdev cdev; |
561 | int minor; | |
562 | ||
962ff7bc AU |
563 | struct list_head write_list; |
564 | struct list_head write_waiting_list; | |
565 | struct list_head ctrl_wr_list; | |
566 | struct list_head ctrl_rd_list; | |
af336cab | 567 | u8 tx_queue_limit; |
ab841160 | 568 | |
ab841160 | 569 | struct list_head file_list; |
eb9af0ac | 570 | long open_handle_count; |
fecb0d58 | 571 | |
ce23139c AU |
572 | struct mutex device_lock; |
573 | struct delayed_work timer_work; | |
aafae7ec TW |
574 | |
575 | bool recvd_hw_ready; | |
ab841160 OW |
576 | /* |
577 | * waiting queue for receive message from FW | |
578 | */ | |
aafae7ec | 579 | wait_queue_head_t wait_hw_ready; |
4fcbc99b | 580 | wait_queue_head_t wait_pg; |
cb02efc3 | 581 | wait_queue_head_t wait_hbm_start; |
ab841160 OW |
582 | |
583 | /* | |
584 | * mei device states | |
585 | */ | |
6adb8efb | 586 | unsigned long reset_count; |
b210d750 | 587 | enum mei_dev_state dev_state; |
9b0d5efc | 588 | enum mei_hbm_state hbm_state; |
342e4c7e | 589 | enum mei_dev_pxp_mode pxp_mode; |
ab841160 | 590 | u16 init_clients_timer; |
ab841160 | 591 | |
964a2331 TW |
592 | /* |
593 | * Power Gating support | |
594 | */ | |
595 | enum mei_pg_event pg_event; | |
bbd6d050 | 596 | #ifdef CONFIG_PM |
e13fa90c | 597 | struct dev_pm_domain pg_domain; |
bbd6d050 | 598 | #endif /* CONFIG_PM */ |
964a2331 | 599 | |
ce23139c | 600 | unsigned char rd_msg_buf[MEI_RD_MSG_BUF_SIZE]; |
0cd7c01a TW |
601 | u32 rd_msg_hdr[MEI_RD_MSG_BUF_SIZE]; |
602 | int rd_msg_hdr_count; | |
e46f1874 | 603 | |
330dd7da | 604 | /* write buffer */ |
330dd7da TW |
605 | bool hbuf_is_ready; |
606 | ||
ce0925e8 TW |
607 | struct mei_dma_dscr dr_dscr[DMA_DSCR_NUM]; |
608 | ||
ab841160 | 609 | struct hbm_version version; |
bae1cc7d | 610 | unsigned int hbm_f_pg_supported:1; |
70ef835c | 611 | unsigned int hbm_f_dc_supported:1; |
18901357 | 612 | unsigned int hbm_f_dot_supported:1; |
4d99877d | 613 | unsigned int hbm_f_ev_supported:1; |
f4e06246 | 614 | unsigned int hbm_f_fa_supported:1; |
27f476ea | 615 | unsigned int hbm_f_ie_supported:1; |
7ee7f45a | 616 | unsigned int hbm_f_os_supported:1; |
c2bd9fc1 | 617 | unsigned int hbm_f_dr_supported:1; |
beb4e1e5 | 618 | unsigned int hbm_f_vt_supported:1; |
e5cab1f9 | 619 | unsigned int hbm_f_cap_supported:1; |
b7a48041 | 620 | unsigned int hbm_f_cd_supported:1; |
4ed1cc99 | 621 | unsigned int hbm_f_gsc_supported:1; |
ab841160 | 622 | |
3cfaeb33 AU |
623 | struct mei_fw_version fw_ver[MEI_MAX_FW_VER_BLOCKS]; |
624 | ||
f8204f0d | 625 | unsigned int fw_f_fw_ver_supported:1; |
6549b2b7 | 626 | unsigned int fw_ver_received:1; |
f8204f0d | 627 | |
b7d88514 | 628 | struct rw_semaphore me_clients_rwsem; |
5ca2d388 | 629 | struct list_head me_clients; |
ab841160 OW |
630 | DECLARE_BITMAP(me_clients_map, MEI_CLIENTS_MAX); |
631 | DECLARE_BITMAP(host_clients_map, MEI_CLIENTS_MAX); | |
ab841160 | 632 | |
621a5f7a | 633 | bool allow_fixed_address; |
f4e06246 | 634 | bool override_fixed_address; |
eeabfcf5 | 635 | |
95953618 AU |
636 | struct mei_dev_timeouts timeouts; |
637 | ||
544f9460 | 638 | struct work_struct reset_work; |
a816a00e | 639 | struct work_struct bus_rescan_work; |
827eef51 | 640 | |
a7b71bc0 SO |
641 | /* List of bus devices */ |
642 | struct list_head device_list; | |
0ff0a8d8 | 643 | struct mutex cl_bus_lock; |
a7b71bc0 | 644 | |
2f79d3d1 AU |
645 | const char *kind; |
646 | ||
30e53bb8 TW |
647 | #if IS_ENABLED(CONFIG_DEBUG_FS) |
648 | struct dentry *dbgfs_dir; | |
649 | #endif /* CONFIG_DEBUG_FS */ | |
650 | ||
34a674e9 VL |
651 | struct mei_fw_status saved_fw_status; |
652 | enum mei_dev_state saved_dev_state; | |
653 | bool saved_fw_status_flag; | |
654 | enum mei_dev_reset_to_pxp gsc_reset_to_pxp; | |
655 | ||
827eef51 | 656 | const struct mei_hw_ops *ops; |
f490e8ae | 657 | char hw[] __aligned(sizeof(void *)); |
ab841160 OW |
658 | }; |
659 | ||
3870c320 TW |
660 | static inline unsigned long mei_secs_to_jiffies(unsigned long sec) |
661 | { | |
662 | return msecs_to_jiffies(sec * MSEC_PER_SEC); | |
663 | } | |
664 | ||
c8c8d080 | 665 | /** |
98e70866 | 666 | * mei_data2slots - get slots number from a message length |
ce23139c | 667 | * |
a8605ea2 AU |
668 | * @length: size of the messages in bytes |
669 | * | |
670 | * Return: number of slots | |
c8c8d080 TW |
671 | */ |
672 | static inline u32 mei_data2slots(size_t length) | |
98e70866 TW |
673 | { |
674 | return DIV_ROUND_UP(length, MEI_SLOT_SIZE); | |
675 | } | |
676 | ||
677 | /** | |
678 | * mei_hbm2slots - get slots number from a hbm message length | |
679 | * length + size of the mei message header | |
680 | * | |
681 | * @length: size of the messages in bytes | |
682 | * | |
683 | * Return: number of slots | |
684 | */ | |
685 | static inline u32 mei_hbm2slots(size_t length) | |
c8c8d080 | 686 | { |
9fc5f0f8 | 687 | return DIV_ROUND_UP(sizeof(struct mei_msg_hdr) + length, MEI_SLOT_SIZE); |
c8c8d080 TW |
688 | } |
689 | ||
10ee9074 | 690 | /** |
ce23139c AU |
691 | * mei_slots2data - get data in slots - bytes from slots |
692 | * | |
a8605ea2 | 693 | * @slots: number of available slots |
ce23139c | 694 | * |
a8605ea2 | 695 | * Return: number of bytes in slots |
10ee9074 TW |
696 | */ |
697 | static inline u32 mei_slots2data(int slots) | |
698 | { | |
9fc5f0f8 | 699 | return slots * MEI_SLOT_SIZE; |
10ee9074 TW |
700 | } |
701 | ||
ab841160 OW |
702 | /* |
703 | * mei init function prototypes | |
704 | */ | |
3a7e9b6c TW |
705 | void mei_device_init(struct mei_device *dev, |
706 | struct device *device, | |
95953618 | 707 | bool slow_fw, |
3a7e9b6c | 708 | const struct mei_hw_ops *hw_ops); |
33ec0826 | 709 | int mei_reset(struct mei_device *dev); |
c4d589be | 710 | int mei_start(struct mei_device *dev); |
33ec0826 | 711 | int mei_restart(struct mei_device *dev); |
7cb035d9 | 712 | void mei_stop(struct mei_device *dev); |
dc844b0d | 713 | void mei_cancel_work(struct mei_device *dev); |
c95efb74 | 714 | |
43b8a7ed AU |
715 | void mei_set_devstate(struct mei_device *dev, enum mei_dev_state state); |
716 | ||
ce0925e8 TW |
717 | int mei_dmam_ring_alloc(struct mei_device *dev); |
718 | void mei_dmam_ring_free(struct mei_device *dev); | |
719 | bool mei_dma_ring_is_allocated(struct mei_device *dev); | |
2513eb0d | 720 | void mei_dma_ring_reset(struct mei_device *dev); |
6316321f | 721 | void mei_dma_ring_read(struct mei_device *dev, unsigned char *buf, u32 len); |
c30362cc TW |
722 | void mei_dma_ring_write(struct mei_device *dev, unsigned char *buf, u32 len); |
723 | u32 mei_dma_ring_empty_slots(struct mei_device *dev); | |
ce0925e8 | 724 | |
c95efb74 TW |
725 | /* |
726 | * MEI interrupt functions prototype | |
ab841160 | 727 | */ |
06ecd645 | 728 | |
a61c6530 | 729 | void mei_timer(struct work_struct *work); |
1892fc2e | 730 | void mei_schedule_stall_timer(struct mei_device *dev); |
06ecd645 | 731 | int mei_irq_read_handler(struct mei_device *dev, |
962ff7bc | 732 | struct list_head *cmpl_list, s32 *slots); |
06ecd645 | 733 | |
962ff7bc AU |
734 | int mei_irq_write_handler(struct mei_device *dev, struct list_head *cmpl_list); |
735 | void mei_irq_compl_handler(struct mei_device *dev, struct list_head *cmpl_list); | |
ab841160 | 736 | |
ab841160 OW |
737 | /* |
738 | * Register Access Function | |
739 | */ | |
740 | ||
8d929d48 | 741 | |
261e071a | 742 | static inline int mei_hw_config(struct mei_device *dev) |
827eef51 | 743 | { |
261e071a | 744 | return dev->ops->hw_config(dev); |
827eef51 | 745 | } |
ee7e5afd | 746 | |
964a2331 TW |
747 | static inline enum mei_pg_state mei_pg_state(struct mei_device *dev) |
748 | { | |
749 | return dev->ops->pg_state(dev); | |
750 | } | |
751 | ||
3dc196ea AU |
752 | static inline bool mei_pg_in_transition(struct mei_device *dev) |
753 | { | |
754 | return dev->ops->pg_in_transition(dev); | |
755 | } | |
756 | ||
ee7e5afd TW |
757 | static inline bool mei_pg_is_enabled(struct mei_device *dev) |
758 | { | |
759 | return dev->ops->pg_is_enabled(dev); | |
760 | } | |
761 | ||
c20c68d5 | 762 | static inline int mei_hw_reset(struct mei_device *dev, bool enable) |
827eef51 | 763 | { |
c20c68d5 | 764 | return dev->ops->hw_reset(dev, enable); |
827eef51 TW |
765 | } |
766 | ||
9049f793 | 767 | static inline int mei_hw_start(struct mei_device *dev) |
aafae7ec | 768 | { |
9049f793 | 769 | return dev->ops->hw_start(dev); |
aafae7ec TW |
770 | } |
771 | ||
827eef51 TW |
772 | static inline void mei_clear_interrupts(struct mei_device *dev) |
773 | { | |
774 | dev->ops->intr_clear(dev); | |
775 | } | |
776 | ||
777 | static inline void mei_enable_interrupts(struct mei_device *dev) | |
778 | { | |
779 | dev->ops->intr_enable(dev); | |
780 | } | |
ab841160 | 781 | |
827eef51 TW |
782 | static inline void mei_disable_interrupts(struct mei_device *dev) |
783 | { | |
784 | dev->ops->intr_disable(dev); | |
785 | } | |
ab841160 | 786 | |
4a8efd4a TW |
787 | static inline void mei_synchronize_irq(struct mei_device *dev) |
788 | { | |
789 | dev->ops->synchronize_irq(dev); | |
790 | } | |
791 | ||
827eef51 TW |
792 | static inline bool mei_host_is_ready(struct mei_device *dev) |
793 | { | |
794 | return dev->ops->host_is_ready(dev); | |
795 | } | |
796 | static inline bool mei_hw_is_ready(struct mei_device *dev) | |
797 | { | |
798 | return dev->ops->hw_is_ready(dev); | |
799 | } | |
e7e0c231 | 800 | |
827eef51 TW |
801 | static inline bool mei_hbuf_is_ready(struct mei_device *dev) |
802 | { | |
803 | return dev->ops->hbuf_is_ready(dev); | |
804 | } | |
ab841160 | 805 | |
827eef51 TW |
806 | static inline int mei_hbuf_empty_slots(struct mei_device *dev) |
807 | { | |
808 | return dev->ops->hbuf_free_slots(dev); | |
809 | } | |
115ba28c | 810 | |
8c8d964c | 811 | static inline u32 mei_hbuf_depth(const struct mei_device *dev) |
827eef51 | 812 | { |
8c8d964c | 813 | return dev->ops->hbuf_depth(dev); |
827eef51 | 814 | } |
3a65dd4e | 815 | |
827eef51 | 816 | static inline int mei_write_message(struct mei_device *dev, |
98e70866 TW |
817 | const void *hdr, size_t hdr_len, |
818 | const void *data, size_t data_len) | |
827eef51 | 819 | { |
98e70866 | 820 | return dev->ops->write(dev, hdr, hdr_len, data, data_len); |
827eef51 TW |
821 | } |
822 | ||
823 | static inline u32 mei_read_hdr(const struct mei_device *dev) | |
824 | { | |
825 | return dev->ops->read_hdr(dev); | |
826 | } | |
827 | ||
828 | static inline void mei_read_slots(struct mei_device *dev, | |
829 | unsigned char *buf, unsigned long len) | |
830 | { | |
831 | dev->ops->read(dev, buf, len); | |
832 | } | |
833 | ||
834 | static inline int mei_count_full_read_slots(struct mei_device *dev) | |
835 | { | |
836 | return dev->ops->rdbuf_full_slots(dev); | |
837 | } | |
5bd64714 | 838 | |
52f6efdf AU |
839 | static inline int mei_trc_status(struct mei_device *dev, u32 *trc) |
840 | { | |
841 | if (dev->ops->trc_status) | |
842 | return dev->ops->trc_status(dev, trc); | |
843 | return -EOPNOTSUPP; | |
844 | } | |
845 | ||
1bd30b6a TW |
846 | static inline int mei_fw_status(struct mei_device *dev, |
847 | struct mei_fw_status *fw_status) | |
848 | { | |
849 | return dev->ops->fw_status(dev, fw_status); | |
850 | } | |
04dd3661 | 851 | |
6aae48ff TW |
852 | bool mei_hbuf_acquire(struct mei_device *dev); |
853 | ||
a532bbed TW |
854 | bool mei_write_is_idle(struct mei_device *dev); |
855 | ||
30e53bb8 | 856 | #if IS_ENABLED(CONFIG_DEBUG_FS) |
5666d896 | 857 | void mei_dbgfs_register(struct mei_device *dev, const char *name); |
30e53bb8 TW |
858 | void mei_dbgfs_deregister(struct mei_device *dev); |
859 | #else | |
5666d896 | 860 | static inline void mei_dbgfs_register(struct mei_device *dev, const char *name) {} |
30e53bb8 TW |
861 | static inline void mei_dbgfs_deregister(struct mei_device *dev) {} |
862 | #endif /* CONFIG_DEBUG_FS */ | |
863 | ||
f3d8e878 | 864 | int mei_register(struct mei_device *dev, struct device *parent); |
30e53bb8 | 865 | void mei_deregister(struct mei_device *dev); |
2703d4b2 | 866 | |
0cd7c01a | 867 | #define MEI_HDR_FMT "hdr:host=%02d me=%02d len=%d dma=%1d ext=%1d internal=%1d comp=%1d" |
15d4acc5 TW |
868 | #define MEI_HDR_PRM(hdr) \ |
869 | (hdr)->host_addr, (hdr)->me_addr, \ | |
0cd7c01a TW |
870 | (hdr)->length, (hdr)->dma_ring, (hdr)->extended, \ |
871 | (hdr)->internal, (hdr)->msg_complete | |
15d4acc5 | 872 | |
edca5ea3 AU |
873 | ssize_t mei_fw_status2str(struct mei_fw_status *fw_sts, char *buf, size_t len); |
874 | /** | |
875 | * mei_fw_status_str - fetch and convert fw status registers to printable string | |
876 | * | |
877 | * @dev: the device structure | |
878 | * @buf: string buffer at minimal size MEI_FW_STATUS_STR_SZ | |
879 | * @len: buffer len must be >= MEI_FW_STATUS_STR_SZ | |
880 | * | |
881 | * Return: number of bytes written or < 0 on failure | |
882 | */ | |
883 | static inline ssize_t mei_fw_status_str(struct mei_device *dev, | |
884 | char *buf, size_t len) | |
885 | { | |
886 | struct mei_fw_status fw_status; | |
887 | int ret; | |
888 | ||
889 | buf[0] = '\0'; | |
890 | ||
891 | ret = mei_fw_status(dev, &fw_status); | |
892 | if (ret) | |
893 | return ret; | |
894 | ||
895 | ret = mei_fw_status2str(&fw_status, buf, MEI_FW_STATUS_STR_SZ); | |
896 | ||
897 | return ret; | |
898 | } | |
899 | ||
34a674e9 VL |
900 | /** |
901 | * kind_is_gsc - checks whether the device is gsc | |
902 | * | |
903 | * @dev: the device structure | |
904 | * | |
905 | * Return: whether the device is gsc | |
906 | */ | |
907 | static inline bool kind_is_gsc(struct mei_device *dev) | |
908 | { | |
909 | /* check kind for NULL because it may be not set, like at the fist call to hw_start */ | |
910 | return dev->kind && (strcmp(dev->kind, "gsc") == 0); | |
911 | } | |
edca5ea3 | 912 | |
34a674e9 VL |
913 | /** |
914 | * kind_is_gscfi - checks whether the device is gscfi | |
915 | * | |
916 | * @dev: the device structure | |
917 | * | |
918 | * Return: whether the device is gscfi | |
919 | */ | |
920 | static inline bool kind_is_gscfi(struct mei_device *dev) | |
921 | { | |
922 | /* check kind for NULL because it may be not set, like at the fist call to hw_start */ | |
923 | return dev->kind && (strcmp(dev->kind, "gscfi") == 0); | |
924 | } | |
ab841160 | 925 | #endif |