Commit | Line | Data |
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c4d66343 OG |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | ||
3 | /* | |
4 | * Copyright 2016-2019 HabanaLabs, Ltd. | |
5 | * All Rights Reserved. | |
6 | */ | |
7 | ||
e00dac3d TT |
8 | #define pr_fmt(fmt) "habanalabs: " fmt |
9 | ||
c4d66343 OG |
10 | #include "habanalabs.h" |
11 | ||
12 | #include <linux/pci.h> | |
f8c8c7d5 | 13 | #include <linux/sched/signal.h> |
d91389bc | 14 | #include <linux/hwmon.h> |
aa957088 | 15 | #include <uapi/misc/habanalabs.h> |
c4d66343 | 16 | |
f650a95b OS |
17 | #define HL_PLDM_PENDING_RESET_PER_SEC (HL_PENDING_RESET_PER_SEC * 10) |
18 | ||
f8c8c7d5 OG |
19 | bool hl_device_disabled_or_in_reset(struct hl_device *hdev) |
20 | { | |
21 | if ((hdev->disabled) || (atomic_read(&hdev->in_reset))) | |
22 | return true; | |
23 | else | |
24 | return false; | |
25 | } | |
26 | ||
aa957088 DBZ |
27 | enum hl_device_status hl_device_status(struct hl_device *hdev) |
28 | { | |
29 | enum hl_device_status status; | |
30 | ||
31 | if (hdev->disabled) | |
32 | status = HL_DEVICE_STATUS_MALFUNCTION; | |
33 | else if (atomic_read(&hdev->in_reset)) | |
34 | status = HL_DEVICE_STATUS_IN_RESET; | |
35 | else | |
36 | status = HL_DEVICE_STATUS_OPERATIONAL; | |
37 | ||
38 | return status; | |
39 | }; | |
40 | ||
c4d66343 OG |
41 | static void hpriv_release(struct kref *ref) |
42 | { | |
43 | struct hl_fpriv *hpriv; | |
44 | struct hl_device *hdev; | |
45 | ||
46 | hpriv = container_of(ref, struct hl_fpriv, refcount); | |
47 | ||
48 | hdev = hpriv->hdev; | |
49 | ||
50 | put_pid(hpriv->taskpid); | |
51 | ||
c2164773 OG |
52 | hl_debugfs_remove_file(hpriv); |
53 | ||
eff6f4a0 OG |
54 | mutex_destroy(&hpriv->restore_phase_mutex); |
55 | ||
c4d66343 | 56 | kfree(hpriv); |
0861e41d OG |
57 | |
58 | /* Now the FD is really closed */ | |
59 | atomic_dec(&hdev->fd_open_cnt); | |
60 | ||
61 | /* This allows a new user context to open the device */ | |
62 | hdev->user_ctx = NULL; | |
c4d66343 OG |
63 | } |
64 | ||
65 | void hl_hpriv_get(struct hl_fpriv *hpriv) | |
66 | { | |
67 | kref_get(&hpriv->refcount); | |
68 | } | |
69 | ||
70 | void hl_hpriv_put(struct hl_fpriv *hpriv) | |
71 | { | |
72 | kref_put(&hpriv->refcount, hpriv_release); | |
73 | } | |
74 | ||
75 | /* | |
76 | * hl_device_release - release function for habanalabs device | |
77 | * | |
78 | * @inode: pointer to inode structure | |
79 | * @filp: pointer to file structure | |
80 | * | |
81 | * Called when process closes an habanalabs device | |
82 | */ | |
83 | static int hl_device_release(struct inode *inode, struct file *filp) | |
84 | { | |
85 | struct hl_fpriv *hpriv = filp->private_data; | |
86 | ||
be5d926b | 87 | hl_cb_mgr_fini(hpriv->hdev, &hpriv->cb_mgr); |
0861e41d OG |
88 | hl_ctx_mgr_fini(hpriv->hdev, &hpriv->ctx_mgr); |
89 | ||
c4d66343 OG |
90 | filp->private_data = NULL; |
91 | ||
92 | hl_hpriv_put(hpriv); | |
93 | ||
94 | return 0; | |
95 | } | |
96 | ||
be5d926b OG |
97 | /* |
98 | * hl_mmap - mmap function for habanalabs device | |
99 | * | |
100 | * @*filp: pointer to file structure | |
101 | * @*vma: pointer to vm_area_struct of the process | |
102 | * | |
103 | * Called when process does an mmap on habanalabs device. Call the device's mmap | |
104 | * function at the end of the common code. | |
105 | */ | |
106 | static int hl_mmap(struct file *filp, struct vm_area_struct *vma) | |
107 | { | |
108 | struct hl_fpriv *hpriv = filp->private_data; | |
109 | ||
110 | if ((vma->vm_pgoff & HL_MMAP_CB_MASK) == HL_MMAP_CB_MASK) { | |
111 | vma->vm_pgoff ^= HL_MMAP_CB_MASK; | |
112 | return hl_cb_mmap(hpriv, vma); | |
113 | } | |
114 | ||
5e6e0239 | 115 | return -EINVAL; |
be5d926b OG |
116 | } |
117 | ||
c4d66343 OG |
118 | static const struct file_operations hl_ops = { |
119 | .owner = THIS_MODULE, | |
120 | .open = hl_device_open, | |
be5d926b OG |
121 | .release = hl_device_release, |
122 | .mmap = hl_mmap, | |
123 | .unlocked_ioctl = hl_ioctl, | |
124 | .compat_ioctl = hl_ioctl | |
c4d66343 OG |
125 | }; |
126 | ||
127 | /* | |
128 | * device_setup_cdev - setup cdev and device for habanalabs device | |
129 | * | |
130 | * @hdev: pointer to habanalabs device structure | |
131 | * @hclass: pointer to the class object of the device | |
132 | * @minor: minor number of the specific device | |
133 | * @fpos : file operations to install for this device | |
134 | * | |
135 | * Create a cdev and a Linux device for habanalabs's device. Need to be | |
136 | * called at the end of the habanalabs device initialization process, | |
137 | * because this function exposes the device to the user | |
138 | */ | |
139 | static int device_setup_cdev(struct hl_device *hdev, struct class *hclass, | |
140 | int minor, const struct file_operations *fops) | |
141 | { | |
142 | int err, devno = MKDEV(hdev->major, minor); | |
143 | struct cdev *hdev_cdev = &hdev->cdev; | |
144 | char *name; | |
145 | ||
146 | name = kasprintf(GFP_KERNEL, "hl%d", hdev->id); | |
147 | if (!name) | |
148 | return -ENOMEM; | |
149 | ||
150 | cdev_init(hdev_cdev, fops); | |
151 | hdev_cdev->owner = THIS_MODULE; | |
152 | err = cdev_add(hdev_cdev, devno, 1); | |
153 | if (err) { | |
154 | pr_err("Failed to add char device %s\n", name); | |
155 | goto err_cdev_add; | |
156 | } | |
157 | ||
158 | hdev->dev = device_create(hclass, NULL, devno, NULL, "%s", name); | |
159 | if (IS_ERR(hdev->dev)) { | |
160 | pr_err("Failed to create device %s\n", name); | |
161 | err = PTR_ERR(hdev->dev); | |
162 | goto err_device_create; | |
163 | } | |
164 | ||
165 | dev_set_drvdata(hdev->dev, hdev); | |
166 | ||
167 | kfree(name); | |
168 | ||
169 | return 0; | |
170 | ||
171 | err_device_create: | |
172 | cdev_del(hdev_cdev); | |
173 | err_cdev_add: | |
174 | kfree(name); | |
175 | return err; | |
176 | } | |
177 | ||
178 | /* | |
179 | * device_early_init - do some early initialization for the habanalabs device | |
180 | * | |
181 | * @hdev: pointer to habanalabs device structure | |
182 | * | |
183 | * Install the relevant function pointers and call the early_init function, | |
184 | * if such a function exists | |
185 | */ | |
186 | static int device_early_init(struct hl_device *hdev) | |
187 | { | |
99b9d7b4 OG |
188 | int rc; |
189 | ||
c4d66343 OG |
190 | switch (hdev->asic_type) { |
191 | case ASIC_GOYA: | |
99b9d7b4 | 192 | goya_set_asic_funcs(hdev); |
c4d66343 OG |
193 | strlcpy(hdev->asic_name, "GOYA", sizeof(hdev->asic_name)); |
194 | break; | |
195 | default: | |
196 | dev_err(hdev->dev, "Unrecognized ASIC type %d\n", | |
197 | hdev->asic_type); | |
198 | return -EINVAL; | |
199 | } | |
200 | ||
99b9d7b4 OG |
201 | rc = hdev->asic_funcs->early_init(hdev); |
202 | if (rc) | |
203 | return rc; | |
204 | ||
0861e41d OG |
205 | rc = hl_asid_init(hdev); |
206 | if (rc) | |
207 | goto early_fini; | |
208 | ||
9494a8dd OG |
209 | hdev->cq_wq = alloc_workqueue("hl-free-jobs", WQ_UNBOUND, 0); |
210 | if (hdev->cq_wq == NULL) { | |
211 | dev_err(hdev->dev, "Failed to allocate CQ workqueue\n"); | |
212 | rc = -ENOMEM; | |
213 | goto asid_fini; | |
214 | } | |
215 | ||
1251f23a OG |
216 | hdev->eq_wq = alloc_workqueue("hl-events", WQ_UNBOUND, 0); |
217 | if (hdev->eq_wq == NULL) { | |
218 | dev_err(hdev->dev, "Failed to allocate EQ workqueue\n"); | |
219 | rc = -ENOMEM; | |
220 | goto free_cq_wq; | |
221 | } | |
222 | ||
d91389bc OG |
223 | hdev->hl_chip_info = kzalloc(sizeof(struct hwmon_chip_info), |
224 | GFP_KERNEL); | |
225 | if (!hdev->hl_chip_info) { | |
226 | rc = -ENOMEM; | |
227 | goto free_eq_wq; | |
228 | } | |
229 | ||
be5d926b OG |
230 | hl_cb_mgr_init(&hdev->kernel_cb_mgr); |
231 | ||
0861e41d | 232 | mutex_init(&hdev->fd_open_cnt_lock); |
9494a8dd | 233 | mutex_init(&hdev->send_cpu_message_lock); |
19734970 | 234 | mutex_init(&hdev->debug_lock); |
8d45f1de | 235 | mutex_init(&hdev->mmu_cache_lock); |
eff6f4a0 OG |
236 | INIT_LIST_HEAD(&hdev->hw_queues_mirror_list); |
237 | spin_lock_init(&hdev->hw_queues_mirror_lock); | |
f8c8c7d5 | 238 | atomic_set(&hdev->in_reset, 0); |
0861e41d | 239 | atomic_set(&hdev->fd_open_cnt, 0); |
cbaa99ed | 240 | atomic_set(&hdev->cs_active_cnt, 0); |
0861e41d | 241 | |
c4d66343 | 242 | return 0; |
0861e41d | 243 | |
d91389bc OG |
244 | free_eq_wq: |
245 | destroy_workqueue(hdev->eq_wq); | |
1251f23a OG |
246 | free_cq_wq: |
247 | destroy_workqueue(hdev->cq_wq); | |
9494a8dd OG |
248 | asid_fini: |
249 | hl_asid_fini(hdev); | |
0861e41d OG |
250 | early_fini: |
251 | if (hdev->asic_funcs->early_fini) | |
252 | hdev->asic_funcs->early_fini(hdev); | |
253 | ||
254 | return rc; | |
c4d66343 OG |
255 | } |
256 | ||
257 | /* | |
258 | * device_early_fini - finalize all that was done in device_early_init | |
259 | * | |
260 | * @hdev: pointer to habanalabs device structure | |
261 | * | |
262 | */ | |
263 | static void device_early_fini(struct hl_device *hdev) | |
264 | { | |
8d45f1de | 265 | mutex_destroy(&hdev->mmu_cache_lock); |
19734970 | 266 | mutex_destroy(&hdev->debug_lock); |
9494a8dd | 267 | mutex_destroy(&hdev->send_cpu_message_lock); |
99b9d7b4 | 268 | |
be5d926b OG |
269 | hl_cb_mgr_fini(hdev, &hdev->kernel_cb_mgr); |
270 | ||
d91389bc OG |
271 | kfree(hdev->hl_chip_info); |
272 | ||
1251f23a | 273 | destroy_workqueue(hdev->eq_wq); |
9494a8dd OG |
274 | destroy_workqueue(hdev->cq_wq); |
275 | ||
0861e41d OG |
276 | hl_asid_fini(hdev); |
277 | ||
99b9d7b4 OG |
278 | if (hdev->asic_funcs->early_fini) |
279 | hdev->asic_funcs->early_fini(hdev); | |
280 | ||
0861e41d | 281 | mutex_destroy(&hdev->fd_open_cnt_lock); |
c4d66343 OG |
282 | } |
283 | ||
d91389bc OG |
284 | static void set_freq_to_low_job(struct work_struct *work) |
285 | { | |
286 | struct hl_device *hdev = container_of(work, struct hl_device, | |
287 | work_freq.work); | |
288 | ||
289 | if (atomic_read(&hdev->fd_open_cnt) == 0) | |
290 | hl_device_set_frequency(hdev, PLL_LOW); | |
291 | ||
292 | schedule_delayed_work(&hdev->work_freq, | |
293 | usecs_to_jiffies(HL_PLL_LOW_JOB_FREQ_USEC)); | |
294 | } | |
295 | ||
f8c8c7d5 OG |
296 | static void hl_device_heartbeat(struct work_struct *work) |
297 | { | |
298 | struct hl_device *hdev = container_of(work, struct hl_device, | |
299 | work_heartbeat.work); | |
300 | ||
301 | if (hl_device_disabled_or_in_reset(hdev)) | |
302 | goto reschedule; | |
303 | ||
304 | if (!hdev->asic_funcs->send_heartbeat(hdev)) | |
305 | goto reschedule; | |
306 | ||
307 | dev_err(hdev->dev, "Device heartbeat failed!\n"); | |
308 | hl_device_reset(hdev, true, false); | |
309 | ||
310 | return; | |
311 | ||
312 | reschedule: | |
313 | schedule_delayed_work(&hdev->work_heartbeat, | |
314 | usecs_to_jiffies(HL_HEARTBEAT_PER_USEC)); | |
315 | } | |
316 | ||
d91389bc OG |
317 | /* |
318 | * device_late_init - do late stuff initialization for the habanalabs device | |
319 | * | |
320 | * @hdev: pointer to habanalabs device structure | |
321 | * | |
322 | * Do stuff that either needs the device H/W queues to be active or needs | |
323 | * to happen after all the rest of the initialization is finished | |
324 | */ | |
325 | static int device_late_init(struct hl_device *hdev) | |
326 | { | |
327 | int rc; | |
328 | ||
0b28d26b OG |
329 | if (hdev->asic_funcs->late_init) { |
330 | rc = hdev->asic_funcs->late_init(hdev); | |
331 | if (rc) { | |
332 | dev_err(hdev->dev, | |
333 | "failed late initialization for the H/W\n"); | |
334 | return rc; | |
335 | } | |
336 | } | |
337 | ||
d91389bc OG |
338 | hdev->high_pll = hdev->asic_prop.high_pll; |
339 | ||
340 | /* force setting to low frequency */ | |
341 | atomic_set(&hdev->curr_pll_profile, PLL_LOW); | |
342 | ||
343 | if (hdev->pm_mng_profile == PM_AUTO) | |
344 | hdev->asic_funcs->set_pll_profile(hdev, PLL_LOW); | |
345 | else | |
346 | hdev->asic_funcs->set_pll_profile(hdev, PLL_LAST); | |
347 | ||
0b28d26b | 348 | INIT_DELAYED_WORK(&hdev->work_freq, set_freq_to_low_job); |
d91389bc | 349 | schedule_delayed_work(&hdev->work_freq, |
0b28d26b | 350 | usecs_to_jiffies(HL_PLL_LOW_JOB_FREQ_USEC)); |
d91389bc | 351 | |
f8c8c7d5 OG |
352 | if (hdev->heartbeat) { |
353 | INIT_DELAYED_WORK(&hdev->work_heartbeat, hl_device_heartbeat); | |
354 | schedule_delayed_work(&hdev->work_heartbeat, | |
355 | usecs_to_jiffies(HL_HEARTBEAT_PER_USEC)); | |
356 | } | |
357 | ||
d91389bc OG |
358 | hdev->late_init_done = true; |
359 | ||
360 | return 0; | |
361 | } | |
362 | ||
363 | /* | |
364 | * device_late_fini - finalize all that was done in device_late_init | |
365 | * | |
366 | * @hdev: pointer to habanalabs device structure | |
367 | * | |
368 | */ | |
369 | static void device_late_fini(struct hl_device *hdev) | |
370 | { | |
371 | if (!hdev->late_init_done) | |
372 | return; | |
373 | ||
374 | cancel_delayed_work_sync(&hdev->work_freq); | |
f8c8c7d5 OG |
375 | if (hdev->heartbeat) |
376 | cancel_delayed_work_sync(&hdev->work_heartbeat); | |
d91389bc OG |
377 | |
378 | if (hdev->asic_funcs->late_fini) | |
379 | hdev->asic_funcs->late_fini(hdev); | |
380 | ||
381 | hdev->late_init_done = false; | |
382 | } | |
383 | ||
384 | /* | |
385 | * hl_device_set_frequency - set the frequency of the device | |
386 | * | |
387 | * @hdev: pointer to habanalabs device structure | |
388 | * @freq: the new frequency value | |
389 | * | |
390 | * Change the frequency if needed. | |
391 | * We allose to set PLL to low only if there is no user process | |
392 | * Returns 0 if no change was done, otherwise returns 1; | |
393 | */ | |
394 | int hl_device_set_frequency(struct hl_device *hdev, enum hl_pll_frequency freq) | |
395 | { | |
396 | enum hl_pll_frequency old_freq = | |
397 | (freq == PLL_HIGH) ? PLL_LOW : PLL_HIGH; | |
398 | int ret; | |
399 | ||
400 | if (hdev->pm_mng_profile == PM_MANUAL) | |
401 | return 0; | |
402 | ||
403 | ret = atomic_cmpxchg(&hdev->curr_pll_profile, old_freq, freq); | |
404 | if (ret == freq) | |
405 | return 0; | |
406 | ||
407 | /* | |
408 | * in case we want to lower frequency, check if device is not | |
409 | * opened. We must have a check here to workaround race condition with | |
410 | * hl_device_open | |
411 | */ | |
412 | if ((freq == PLL_LOW) && (atomic_read(&hdev->fd_open_cnt) > 0)) { | |
413 | atomic_set(&hdev->curr_pll_profile, PLL_HIGH); | |
414 | return 0; | |
415 | } | |
416 | ||
417 | dev_dbg(hdev->dev, "Changing device frequency to %s\n", | |
418 | freq == PLL_HIGH ? "high" : "low"); | |
419 | ||
420 | hdev->asic_funcs->set_pll_profile(hdev, freq); | |
421 | ||
422 | return 1; | |
423 | } | |
424 | ||
19734970 OG |
425 | int hl_device_set_debug_mode(struct hl_device *hdev, bool enable) |
426 | { | |
427 | int rc = 0; | |
428 | ||
429 | mutex_lock(&hdev->debug_lock); | |
430 | ||
431 | if (!enable) { | |
432 | if (!hdev->in_debug) { | |
433 | dev_err(hdev->dev, | |
434 | "Failed to disable debug mode because device was not in debug mode\n"); | |
435 | rc = -EFAULT; | |
436 | goto out; | |
437 | } | |
438 | ||
439 | hdev->asic_funcs->halt_coresight(hdev); | |
440 | hdev->in_debug = 0; | |
441 | ||
442 | goto out; | |
443 | } | |
444 | ||
445 | if (hdev->in_debug) { | |
446 | dev_err(hdev->dev, | |
447 | "Failed to enable debug mode because device is already in debug mode\n"); | |
448 | rc = -EFAULT; | |
449 | goto out; | |
450 | } | |
451 | ||
452 | mutex_lock(&hdev->fd_open_cnt_lock); | |
453 | ||
454 | if (atomic_read(&hdev->fd_open_cnt) > 1) { | |
455 | dev_err(hdev->dev, | |
456 | "Failed to enable debug mode. More then a single user is using the device\n"); | |
457 | rc = -EPERM; | |
458 | goto unlock_fd_open_lock; | |
459 | } | |
460 | ||
461 | hdev->in_debug = 1; | |
462 | ||
463 | unlock_fd_open_lock: | |
464 | mutex_unlock(&hdev->fd_open_cnt_lock); | |
465 | out: | |
466 | mutex_unlock(&hdev->debug_lock); | |
467 | ||
468 | return rc; | |
469 | } | |
470 | ||
c4d66343 OG |
471 | /* |
472 | * hl_device_suspend - initiate device suspend | |
473 | * | |
474 | * @hdev: pointer to habanalabs device structure | |
475 | * | |
476 | * Puts the hw in the suspend state (all asics). | |
477 | * Returns 0 for success or an error on failure. | |
478 | * Called at driver suspend. | |
479 | */ | |
480 | int hl_device_suspend(struct hl_device *hdev) | |
481 | { | |
99b9d7b4 OG |
482 | int rc; |
483 | ||
c4d66343 OG |
484 | pci_save_state(hdev->pdev); |
485 | ||
7cb5101e OG |
486 | /* Block future CS/VM/JOB completion operations */ |
487 | rc = atomic_cmpxchg(&hdev->in_reset, 0, 1); | |
488 | if (rc) { | |
489 | dev_err(hdev->dev, "Can't suspend while in reset\n"); | |
490 | return -EIO; | |
491 | } | |
492 | ||
493 | /* This blocks all other stuff that is not blocked by in_reset */ | |
494 | hdev->disabled = true; | |
495 | ||
496 | /* | |
497 | * Flush anyone that is inside the critical section of enqueue | |
498 | * jobs to the H/W | |
499 | */ | |
500 | hdev->asic_funcs->hw_queues_lock(hdev); | |
501 | hdev->asic_funcs->hw_queues_unlock(hdev); | |
502 | ||
503 | /* Flush processes that are sending message to CPU */ | |
504 | mutex_lock(&hdev->send_cpu_message_lock); | |
505 | mutex_unlock(&hdev->send_cpu_message_lock); | |
506 | ||
99b9d7b4 OG |
507 | rc = hdev->asic_funcs->suspend(hdev); |
508 | if (rc) | |
509 | dev_err(hdev->dev, | |
510 | "Failed to disable PCI access of device CPU\n"); | |
511 | ||
c4d66343 OG |
512 | /* Shut down the device */ |
513 | pci_disable_device(hdev->pdev); | |
514 | pci_set_power_state(hdev->pdev, PCI_D3hot); | |
515 | ||
516 | return 0; | |
517 | } | |
518 | ||
519 | /* | |
520 | * hl_device_resume - initiate device resume | |
521 | * | |
522 | * @hdev: pointer to habanalabs device structure | |
523 | * | |
524 | * Bring the hw back to operating state (all asics). | |
525 | * Returns 0 for success or an error on failure. | |
526 | * Called at driver resume. | |
527 | */ | |
528 | int hl_device_resume(struct hl_device *hdev) | |
529 | { | |
530 | int rc; | |
531 | ||
532 | pci_set_power_state(hdev->pdev, PCI_D0); | |
533 | pci_restore_state(hdev->pdev); | |
7cb5101e | 534 | rc = pci_enable_device_mem(hdev->pdev); |
c4d66343 OG |
535 | if (rc) { |
536 | dev_err(hdev->dev, | |
537 | "Failed to enable PCI device in resume\n"); | |
538 | return rc; | |
539 | } | |
540 | ||
7cb5101e OG |
541 | pci_set_master(hdev->pdev); |
542 | ||
99b9d7b4 OG |
543 | rc = hdev->asic_funcs->resume(hdev); |
544 | if (rc) { | |
7cb5101e OG |
545 | dev_err(hdev->dev, "Failed to resume device after suspend\n"); |
546 | goto disable_device; | |
547 | } | |
548 | ||
549 | ||
550 | hdev->disabled = false; | |
551 | atomic_set(&hdev->in_reset, 0); | |
552 | ||
553 | rc = hl_device_reset(hdev, true, false); | |
554 | if (rc) { | |
555 | dev_err(hdev->dev, "Failed to reset device during resume\n"); | |
556 | goto disable_device; | |
99b9d7b4 OG |
557 | } |
558 | ||
c4d66343 | 559 | return 0; |
7cb5101e OG |
560 | |
561 | disable_device: | |
562 | pci_clear_master(hdev->pdev); | |
563 | pci_disable_device(hdev->pdev); | |
564 | ||
565 | return rc; | |
c4d66343 OG |
566 | } |
567 | ||
caa3c8e5 | 568 | static void device_kill_open_processes(struct hl_device *hdev) |
f8c8c7d5 | 569 | { |
f650a95b | 570 | u16 pending_total, pending_cnt; |
f8c8c7d5 OG |
571 | struct task_struct *task = NULL; |
572 | ||
f650a95b OS |
573 | if (hdev->pldm) |
574 | pending_total = HL_PLDM_PENDING_RESET_PER_SEC; | |
575 | else | |
576 | pending_total = HL_PENDING_RESET_PER_SEC; | |
577 | ||
578 | pending_cnt = pending_total; | |
579 | ||
f8c8c7d5 OG |
580 | /* Flush all processes that are inside hl_open */ |
581 | mutex_lock(&hdev->fd_open_cnt_lock); | |
582 | ||
583 | while ((atomic_read(&hdev->fd_open_cnt)) && (pending_cnt)) { | |
584 | ||
585 | pending_cnt--; | |
586 | ||
587 | dev_info(hdev->dev, | |
588 | "Can't HARD reset, waiting for user to close FD\n"); | |
589 | ssleep(1); | |
590 | } | |
591 | ||
592 | if (atomic_read(&hdev->fd_open_cnt)) { | |
593 | task = get_pid_task(hdev->user_ctx->hpriv->taskpid, | |
594 | PIDTYPE_PID); | |
595 | if (task) { | |
596 | dev_info(hdev->dev, "Killing user processes\n"); | |
597 | send_sig(SIGKILL, task, 1); | |
598 | msleep(100); | |
599 | ||
600 | put_task_struct(task); | |
601 | } | |
602 | } | |
603 | ||
caa3c8e5 OG |
604 | /* We killed the open users, but because the driver cleans up after the |
605 | * user contexts are closed (e.g. mmu mappings), we need to wait again | |
606 | * to make sure the cleaning phase is finished before continuing with | |
607 | * the reset | |
608 | */ | |
609 | ||
f650a95b OS |
610 | pending_cnt = pending_total; |
611 | ||
612 | while ((atomic_read(&hdev->fd_open_cnt)) && (pending_cnt)) { | |
613 | ||
614 | pending_cnt--; | |
615 | ||
616 | ssleep(1); | |
617 | } | |
618 | ||
619 | if (atomic_read(&hdev->fd_open_cnt)) | |
620 | dev_crit(hdev->dev, | |
621 | "Going to hard reset with open user contexts\n"); | |
622 | ||
f8c8c7d5 OG |
623 | mutex_unlock(&hdev->fd_open_cnt_lock); |
624 | ||
caa3c8e5 OG |
625 | } |
626 | ||
627 | static void device_hard_reset_pending(struct work_struct *work) | |
628 | { | |
629 | struct hl_device_reset_work *device_reset_work = | |
630 | container_of(work, struct hl_device_reset_work, reset_work); | |
631 | struct hl_device *hdev = device_reset_work->hdev; | |
632 | ||
633 | device_kill_open_processes(hdev); | |
634 | ||
f8c8c7d5 OG |
635 | hl_device_reset(hdev, true, true); |
636 | ||
637 | kfree(device_reset_work); | |
638 | } | |
639 | ||
640 | /* | |
641 | * hl_device_reset - reset the device | |
642 | * | |
643 | * @hdev: pointer to habanalabs device structure | |
644 | * @hard_reset: should we do hard reset to all engines or just reset the | |
645 | * compute/dma engines | |
646 | * | |
647 | * Block future CS and wait for pending CS to be enqueued | |
648 | * Call ASIC H/W fini | |
649 | * Flush all completions | |
650 | * Re-initialize all internal data structures | |
651 | * Call ASIC H/W init, late_init | |
652 | * Test queues | |
653 | * Enable device | |
654 | * | |
655 | * Returns 0 for success or an error on failure. | |
656 | */ | |
657 | int hl_device_reset(struct hl_device *hdev, bool hard_reset, | |
658 | bool from_hard_reset_thread) | |
659 | { | |
660 | int i, rc; | |
661 | ||
662 | if (!hdev->init_done) { | |
663 | dev_err(hdev->dev, | |
664 | "Can't reset before initialization is done\n"); | |
665 | return 0; | |
666 | } | |
667 | ||
668 | /* | |
669 | * Prevent concurrency in this function - only one reset should be | |
670 | * done at any given time. Only need to perform this if we didn't | |
671 | * get from the dedicated hard reset thread | |
672 | */ | |
673 | if (!from_hard_reset_thread) { | |
674 | /* Block future CS/VM/JOB completion operations */ | |
675 | rc = atomic_cmpxchg(&hdev->in_reset, 0, 1); | |
676 | if (rc) | |
677 | return 0; | |
678 | ||
679 | /* This also blocks future CS/VM/JOB completion operations */ | |
680 | hdev->disabled = true; | |
681 | ||
682 | /* | |
683 | * Flush anyone that is inside the critical section of enqueue | |
684 | * jobs to the H/W | |
685 | */ | |
686 | hdev->asic_funcs->hw_queues_lock(hdev); | |
687 | hdev->asic_funcs->hw_queues_unlock(hdev); | |
688 | ||
689 | dev_err(hdev->dev, "Going to RESET device!\n"); | |
690 | } | |
691 | ||
692 | again: | |
693 | if ((hard_reset) && (!from_hard_reset_thread)) { | |
694 | struct hl_device_reset_work *device_reset_work; | |
695 | ||
3f5398cf OG |
696 | hdev->hard_reset_pending = true; |
697 | ||
f8c8c7d5 OG |
698 | device_reset_work = kzalloc(sizeof(*device_reset_work), |
699 | GFP_ATOMIC); | |
700 | if (!device_reset_work) { | |
701 | rc = -ENOMEM; | |
702 | goto out_err; | |
703 | } | |
704 | ||
705 | /* | |
706 | * Because the reset function can't run from interrupt or | |
707 | * from heartbeat work, we need to call the reset function | |
708 | * from a dedicated work | |
709 | */ | |
710 | INIT_WORK(&device_reset_work->reset_work, | |
caa3c8e5 | 711 | device_hard_reset_pending); |
f8c8c7d5 OG |
712 | device_reset_work->hdev = hdev; |
713 | schedule_work(&device_reset_work->reset_work); | |
714 | ||
715 | return 0; | |
716 | } | |
717 | ||
718 | if (hard_reset) { | |
719 | device_late_fini(hdev); | |
720 | ||
721 | /* | |
722 | * Now that the heartbeat thread is closed, flush processes | |
723 | * which are sending messages to CPU | |
724 | */ | |
725 | mutex_lock(&hdev->send_cpu_message_lock); | |
726 | mutex_unlock(&hdev->send_cpu_message_lock); | |
727 | } | |
728 | ||
729 | /* | |
730 | * Halt the engines and disable interrupts so we won't get any more | |
731 | * completions from H/W and we won't have any accesses from the | |
732 | * H/W to the host machine | |
733 | */ | |
734 | hdev->asic_funcs->halt_engines(hdev, hard_reset); | |
735 | ||
eff6f4a0 OG |
736 | /* Go over all the queues, release all CS and their jobs */ |
737 | hl_cs_rollback_all(hdev); | |
738 | ||
0878a420 OG |
739 | /* Release kernel context */ |
740 | if ((hard_reset) && (hl_ctx_put(hdev->kernel_ctx) == 1)) | |
f8c8c7d5 | 741 | hdev->kernel_ctx = NULL; |
f8c8c7d5 OG |
742 | |
743 | /* Reset the H/W. It will be in idle state after this returns */ | |
744 | hdev->asic_funcs->hw_fini(hdev, hard_reset); | |
745 | ||
0feaf86d OS |
746 | if (hard_reset) { |
747 | hl_vm_fini(hdev); | |
37d68ce5 | 748 | hl_mmu_fini(hdev); |
f8c8c7d5 | 749 | hl_eq_reset(hdev, &hdev->event_queue); |
0feaf86d | 750 | } |
f8c8c7d5 OG |
751 | |
752 | /* Re-initialize PI,CI to 0 in all queues (hw queue, cq) */ | |
753 | hl_hw_queue_reset(hdev, hard_reset); | |
754 | for (i = 0 ; i < hdev->asic_prop.completion_queues_count ; i++) | |
755 | hl_cq_reset(hdev, &hdev->completion_queue[i]); | |
756 | ||
027d35d0 | 757 | /* Make sure the context switch phase will run again */ |
eff6f4a0 | 758 | if (hdev->user_ctx) { |
027d35d0 OG |
759 | atomic_set(&hdev->user_ctx->thread_ctx_switch_token, 1); |
760 | hdev->user_ctx->thread_ctx_switch_wait_token = 0; | |
eff6f4a0 OG |
761 | } |
762 | ||
f8c8c7d5 OG |
763 | /* Finished tear-down, starting to re-initialize */ |
764 | ||
765 | if (hard_reset) { | |
a28ce422 | 766 | hdev->device_cpu_disabled = false; |
3f5398cf | 767 | hdev->hard_reset_pending = false; |
a28ce422 | 768 | |
0878a420 OG |
769 | if (hdev->kernel_ctx) { |
770 | dev_crit(hdev->dev, | |
771 | "kernel ctx was alive during hard reset, something is terribly wrong\n"); | |
772 | rc = -EBUSY; | |
773 | goto out_err; | |
774 | } | |
775 | ||
37d68ce5 OG |
776 | rc = hl_mmu_init(hdev); |
777 | if (rc) { | |
778 | dev_err(hdev->dev, | |
779 | "Failed to initialize MMU S/W after hard reset\n"); | |
780 | goto out_err; | |
781 | } | |
782 | ||
f8c8c7d5 OG |
783 | /* Allocate the kernel context */ |
784 | hdev->kernel_ctx = kzalloc(sizeof(*hdev->kernel_ctx), | |
785 | GFP_KERNEL); | |
786 | if (!hdev->kernel_ctx) { | |
787 | rc = -ENOMEM; | |
788 | goto out_err; | |
789 | } | |
790 | ||
791 | hdev->user_ctx = NULL; | |
792 | ||
793 | rc = hl_ctx_init(hdev, hdev->kernel_ctx, true); | |
794 | if (rc) { | |
795 | dev_err(hdev->dev, | |
796 | "failed to init kernel ctx in hard reset\n"); | |
797 | kfree(hdev->kernel_ctx); | |
798 | hdev->kernel_ctx = NULL; | |
799 | goto out_err; | |
800 | } | |
801 | } | |
802 | ||
803 | rc = hdev->asic_funcs->hw_init(hdev); | |
804 | if (rc) { | |
805 | dev_err(hdev->dev, | |
806 | "failed to initialize the H/W after reset\n"); | |
807 | goto out_err; | |
808 | } | |
809 | ||
810 | hdev->disabled = false; | |
811 | ||
812 | /* Check that the communication with the device is working */ | |
813 | rc = hdev->asic_funcs->test_queues(hdev); | |
814 | if (rc) { | |
815 | dev_err(hdev->dev, | |
816 | "Failed to detect if device is alive after reset\n"); | |
817 | goto out_err; | |
818 | } | |
819 | ||
820 | if (hard_reset) { | |
821 | rc = device_late_init(hdev); | |
822 | if (rc) { | |
823 | dev_err(hdev->dev, | |
824 | "Failed late init after hard reset\n"); | |
825 | goto out_err; | |
826 | } | |
827 | ||
0feaf86d OS |
828 | rc = hl_vm_init(hdev); |
829 | if (rc) { | |
830 | dev_err(hdev->dev, | |
831 | "Failed to init memory module after hard reset\n"); | |
832 | goto out_err; | |
833 | } | |
834 | ||
f8c8c7d5 | 835 | hl_set_max_power(hdev, hdev->max_power); |
f8c8c7d5 OG |
836 | } else { |
837 | rc = hdev->asic_funcs->soft_reset_late_init(hdev); | |
838 | if (rc) { | |
839 | dev_err(hdev->dev, | |
840 | "Failed late init after soft reset\n"); | |
841 | goto out_err; | |
842 | } | |
843 | } | |
844 | ||
845 | atomic_set(&hdev->in_reset, 0); | |
846 | ||
847 | if (hard_reset) | |
848 | hdev->hard_reset_cnt++; | |
849 | else | |
850 | hdev->soft_reset_cnt++; | |
851 | ||
852 | return 0; | |
853 | ||
854 | out_err: | |
855 | hdev->disabled = true; | |
856 | ||
857 | if (hard_reset) { | |
858 | dev_err(hdev->dev, | |
859 | "Failed to reset! Device is NOT usable\n"); | |
860 | hdev->hard_reset_cnt++; | |
861 | } else { | |
862 | dev_err(hdev->dev, | |
863 | "Failed to do soft-reset, trying hard reset\n"); | |
864 | hdev->soft_reset_cnt++; | |
865 | hard_reset = true; | |
866 | goto again; | |
867 | } | |
868 | ||
869 | atomic_set(&hdev->in_reset, 0); | |
870 | ||
871 | return rc; | |
872 | } | |
873 | ||
c4d66343 OG |
874 | /* |
875 | * hl_device_init - main initialization function for habanalabs device | |
876 | * | |
877 | * @hdev: pointer to habanalabs device structure | |
878 | * | |
879 | * Allocate an id for the device, do early initialization and then call the | |
880 | * ASIC specific initialization functions. Finally, create the cdev and the | |
881 | * Linux device to expose it to the user | |
882 | */ | |
883 | int hl_device_init(struct hl_device *hdev, struct class *hclass) | |
884 | { | |
9494a8dd | 885 | int i, rc, cq_ready_cnt; |
c4d66343 OG |
886 | |
887 | /* Create device */ | |
888 | rc = device_setup_cdev(hdev, hclass, hdev->id, &hl_ops); | |
889 | ||
890 | if (rc) | |
891 | goto out_disabled; | |
892 | ||
893 | /* Initialize ASIC function pointers and perform early init */ | |
894 | rc = device_early_init(hdev); | |
895 | if (rc) | |
896 | goto release_device; | |
897 | ||
99b9d7b4 OG |
898 | /* |
899 | * Start calling ASIC initialization. First S/W then H/W and finally | |
900 | * late init | |
901 | */ | |
902 | rc = hdev->asic_funcs->sw_init(hdev); | |
903 | if (rc) | |
904 | goto early_fini; | |
905 | ||
9494a8dd OG |
906 | /* |
907 | * Initialize the H/W queues. Must be done before hw_init, because | |
908 | * there the addresses of the kernel queue are being written to the | |
909 | * registers of the device | |
910 | */ | |
911 | rc = hl_hw_queues_create(hdev); | |
912 | if (rc) { | |
913 | dev_err(hdev->dev, "failed to initialize kernel queues\n"); | |
914 | goto sw_fini; | |
915 | } | |
916 | ||
917 | /* | |
918 | * Initialize the completion queues. Must be done before hw_init, | |
919 | * because there the addresses of the completion queues are being | |
920 | * passed as arguments to request_irq | |
921 | */ | |
922 | hdev->completion_queue = | |
923 | kcalloc(hdev->asic_prop.completion_queues_count, | |
924 | sizeof(*hdev->completion_queue), GFP_KERNEL); | |
925 | ||
926 | if (!hdev->completion_queue) { | |
927 | dev_err(hdev->dev, "failed to allocate completion queues\n"); | |
928 | rc = -ENOMEM; | |
929 | goto hw_queues_destroy; | |
930 | } | |
931 | ||
932 | for (i = 0, cq_ready_cnt = 0; | |
933 | i < hdev->asic_prop.completion_queues_count; | |
934 | i++, cq_ready_cnt++) { | |
935 | rc = hl_cq_init(hdev, &hdev->completion_queue[i], i); | |
936 | if (rc) { | |
937 | dev_err(hdev->dev, | |
938 | "failed to initialize completion queue\n"); | |
939 | goto cq_fini; | |
940 | } | |
941 | } | |
942 | ||
1251f23a OG |
943 | /* |
944 | * Initialize the event queue. Must be done before hw_init, | |
945 | * because there the address of the event queue is being | |
946 | * passed as argument to request_irq | |
947 | */ | |
948 | rc = hl_eq_init(hdev, &hdev->event_queue); | |
949 | if (rc) { | |
950 | dev_err(hdev->dev, "failed to initialize event queue\n"); | |
951 | goto cq_fini; | |
952 | } | |
953 | ||
37d68ce5 OG |
954 | /* MMU S/W must be initialized before kernel context is created */ |
955 | rc = hl_mmu_init(hdev); | |
956 | if (rc) { | |
957 | dev_err(hdev->dev, "Failed to initialize MMU S/W structures\n"); | |
958 | goto eq_fini; | |
959 | } | |
960 | ||
0861e41d OG |
961 | /* Allocate the kernel context */ |
962 | hdev->kernel_ctx = kzalloc(sizeof(*hdev->kernel_ctx), GFP_KERNEL); | |
963 | if (!hdev->kernel_ctx) { | |
964 | rc = -ENOMEM; | |
37d68ce5 | 965 | goto mmu_fini; |
0861e41d OG |
966 | } |
967 | ||
968 | hdev->user_ctx = NULL; | |
969 | ||
970 | rc = hl_ctx_init(hdev, hdev->kernel_ctx, true); | |
971 | if (rc) { | |
972 | dev_err(hdev->dev, "failed to initialize kernel context\n"); | |
508c5849 TT |
973 | kfree(hdev->kernel_ctx); |
974 | goto mmu_fini; | |
0861e41d OG |
975 | } |
976 | ||
be5d926b OG |
977 | rc = hl_cb_pool_init(hdev); |
978 | if (rc) { | |
979 | dev_err(hdev->dev, "failed to initialize CB pool\n"); | |
980 | goto release_ctx; | |
981 | } | |
982 | ||
d91389bc OG |
983 | rc = hl_sysfs_init(hdev); |
984 | if (rc) { | |
985 | dev_err(hdev->dev, "failed to initialize sysfs\n"); | |
986 | goto free_cb_pool; | |
987 | } | |
988 | ||
c2164773 OG |
989 | hl_debugfs_add_device(hdev); |
990 | ||
f8c8c7d5 OG |
991 | if (hdev->asic_funcs->get_hw_state(hdev) == HL_DEVICE_HW_STATE_DIRTY) { |
992 | dev_info(hdev->dev, | |
993 | "H/W state is dirty, must reset before initializing\n"); | |
994 | hdev->asic_funcs->hw_fini(hdev, true); | |
995 | } | |
996 | ||
839c4803 OG |
997 | rc = hdev->asic_funcs->hw_init(hdev); |
998 | if (rc) { | |
999 | dev_err(hdev->dev, "failed to initialize the H/W\n"); | |
1000 | rc = 0; | |
1001 | goto out_disabled; | |
1002 | } | |
1003 | ||
1004 | hdev->disabled = false; | |
1005 | ||
9494a8dd OG |
1006 | /* Check that the communication with the device is working */ |
1007 | rc = hdev->asic_funcs->test_queues(hdev); | |
1008 | if (rc) { | |
1009 | dev_err(hdev->dev, "Failed to detect if device is alive\n"); | |
1010 | rc = 0; | |
1011 | goto out_disabled; | |
1012 | } | |
1013 | ||
d91389bc OG |
1014 | rc = device_late_init(hdev); |
1015 | if (rc) { | |
1016 | dev_err(hdev->dev, "Failed late initialization\n"); | |
1017 | rc = 0; | |
1018 | goto out_disabled; | |
1019 | } | |
1020 | ||
1021 | dev_info(hdev->dev, "Found %s device with %lluGB DRAM\n", | |
1022 | hdev->asic_name, | |
1023 | hdev->asic_prop.dram_size / 1024 / 1024 / 1024); | |
1024 | ||
0feaf86d OS |
1025 | rc = hl_vm_init(hdev); |
1026 | if (rc) { | |
1027 | dev_err(hdev->dev, "Failed to initialize memory module\n"); | |
1028 | rc = 0; | |
1029 | goto out_disabled; | |
1030 | } | |
1031 | ||
d91389bc OG |
1032 | /* |
1033 | * hl_hwmon_init must be called after device_late_init, because only | |
1034 | * there we get the information from the device about which | |
1035 | * hwmon-related sensors the device supports | |
1036 | */ | |
1037 | rc = hl_hwmon_init(hdev); | |
1038 | if (rc) { | |
1039 | dev_err(hdev->dev, "Failed to initialize hwmon\n"); | |
1040 | rc = 0; | |
1041 | goto out_disabled; | |
1042 | } | |
1043 | ||
c4d66343 OG |
1044 | dev_notice(hdev->dev, |
1045 | "Successfully added device to habanalabs driver\n"); | |
1046 | ||
f8c8c7d5 OG |
1047 | hdev->init_done = true; |
1048 | ||
c4d66343 OG |
1049 | return 0; |
1050 | ||
d91389bc OG |
1051 | free_cb_pool: |
1052 | hl_cb_pool_fini(hdev); | |
be5d926b OG |
1053 | release_ctx: |
1054 | if (hl_ctx_put(hdev->kernel_ctx) != 1) | |
1055 | dev_err(hdev->dev, | |
1056 | "kernel ctx is still alive on initialization failure\n"); | |
37d68ce5 OG |
1057 | mmu_fini: |
1058 | hl_mmu_fini(hdev); | |
1251f23a OG |
1059 | eq_fini: |
1060 | hl_eq_fini(hdev, &hdev->event_queue); | |
9494a8dd OG |
1061 | cq_fini: |
1062 | for (i = 0 ; i < cq_ready_cnt ; i++) | |
1063 | hl_cq_fini(hdev, &hdev->completion_queue[i]); | |
1064 | kfree(hdev->completion_queue); | |
1065 | hw_queues_destroy: | |
1066 | hl_hw_queues_destroy(hdev); | |
0861e41d OG |
1067 | sw_fini: |
1068 | hdev->asic_funcs->sw_fini(hdev); | |
99b9d7b4 OG |
1069 | early_fini: |
1070 | device_early_fini(hdev); | |
c4d66343 OG |
1071 | release_device: |
1072 | device_destroy(hclass, hdev->dev->devt); | |
1073 | cdev_del(&hdev->cdev); | |
1074 | out_disabled: | |
1075 | hdev->disabled = true; | |
1076 | if (hdev->pdev) | |
1077 | dev_err(&hdev->pdev->dev, | |
1078 | "Failed to initialize hl%d. Device is NOT usable !\n", | |
1079 | hdev->id); | |
1080 | else | |
1081 | pr_err("Failed to initialize hl%d. Device is NOT usable !\n", | |
1082 | hdev->id); | |
1083 | ||
1084 | return rc; | |
1085 | } | |
1086 | ||
1087 | /* | |
1088 | * hl_device_fini - main tear-down function for habanalabs device | |
1089 | * | |
1090 | * @hdev: pointer to habanalabs device structure | |
1091 | * | |
1092 | * Destroy the device, call ASIC fini functions and release the id | |
1093 | */ | |
1094 | void hl_device_fini(struct hl_device *hdev) | |
1095 | { | |
f8c8c7d5 OG |
1096 | int i, rc; |
1097 | ktime_t timeout; | |
1098 | ||
c4d66343 OG |
1099 | dev_info(hdev->dev, "Removing device\n"); |
1100 | ||
f8c8c7d5 OG |
1101 | /* |
1102 | * This function is competing with the reset function, so try to | |
1103 | * take the reset atomic and if we are already in middle of reset, | |
1104 | * wait until reset function is finished. Reset function is designed | |
1105 | * to always finish (could take up to a few seconds in worst case). | |
1106 | */ | |
1107 | ||
1108 | timeout = ktime_add_us(ktime_get(), | |
1109 | HL_PENDING_RESET_PER_SEC * 1000 * 1000 * 4); | |
1110 | rc = atomic_cmpxchg(&hdev->in_reset, 0, 1); | |
1111 | while (rc) { | |
1112 | usleep_range(50, 200); | |
1113 | rc = atomic_cmpxchg(&hdev->in_reset, 0, 1); | |
1114 | if (ktime_compare(ktime_get(), timeout) > 0) { | |
1115 | WARN(1, "Failed to remove device because reset function did not finish\n"); | |
1116 | return; | |
1117 | } | |
a1c92d1c | 1118 | } |
f8c8c7d5 | 1119 | |
c4d66343 OG |
1120 | /* Mark device as disabled */ |
1121 | hdev->disabled = true; | |
1122 | ||
caa3c8e5 OG |
1123 | /* |
1124 | * Flush anyone that is inside the critical section of enqueue | |
1125 | * jobs to the H/W | |
1126 | */ | |
1127 | hdev->asic_funcs->hw_queues_lock(hdev); | |
1128 | hdev->asic_funcs->hw_queues_unlock(hdev); | |
1129 | ||
3f5398cf OG |
1130 | hdev->hard_reset_pending = true; |
1131 | ||
caa3c8e5 OG |
1132 | device_kill_open_processes(hdev); |
1133 | ||
d91389bc OG |
1134 | hl_hwmon_fini(hdev); |
1135 | ||
1136 | device_late_fini(hdev); | |
1137 | ||
c2164773 OG |
1138 | hl_debugfs_remove_device(hdev); |
1139 | ||
d91389bc OG |
1140 | hl_sysfs_fini(hdev); |
1141 | ||
1251f23a OG |
1142 | /* |
1143 | * Halt the engines and disable interrupts so we won't get any more | |
1144 | * completions from H/W and we won't have any accesses from the | |
1145 | * H/W to the host machine | |
1146 | */ | |
1147 | hdev->asic_funcs->halt_engines(hdev, true); | |
1148 | ||
eff6f4a0 OG |
1149 | /* Go over all the queues, release all CS and their jobs */ |
1150 | hl_cs_rollback_all(hdev); | |
1151 | ||
be5d926b OG |
1152 | hl_cb_pool_fini(hdev); |
1153 | ||
0861e41d OG |
1154 | /* Release kernel context */ |
1155 | if ((hdev->kernel_ctx) && (hl_ctx_put(hdev->kernel_ctx) != 1)) | |
1156 | dev_err(hdev->dev, "kernel ctx is still alive\n"); | |
1157 | ||
839c4803 OG |
1158 | /* Reset the H/W. It will be in idle state after this returns */ |
1159 | hdev->asic_funcs->hw_fini(hdev, true); | |
1160 | ||
0feaf86d OS |
1161 | hl_vm_fini(hdev); |
1162 | ||
37d68ce5 OG |
1163 | hl_mmu_fini(hdev); |
1164 | ||
1251f23a OG |
1165 | hl_eq_fini(hdev, &hdev->event_queue); |
1166 | ||
9494a8dd OG |
1167 | for (i = 0 ; i < hdev->asic_prop.completion_queues_count ; i++) |
1168 | hl_cq_fini(hdev, &hdev->completion_queue[i]); | |
1169 | kfree(hdev->completion_queue); | |
1170 | ||
1171 | hl_hw_queues_destroy(hdev); | |
1172 | ||
99b9d7b4 OG |
1173 | /* Call ASIC S/W finalize function */ |
1174 | hdev->asic_funcs->sw_fini(hdev); | |
1175 | ||
c4d66343 OG |
1176 | device_early_fini(hdev); |
1177 | ||
1178 | /* Hide device from user */ | |
1179 | device_destroy(hdev->dev->class, hdev->dev->devt); | |
1180 | cdev_del(&hdev->cdev); | |
1181 | ||
1182 | pr_info("removed device successfully\n"); | |
1183 | } | |
1184 | ||
99b9d7b4 OG |
1185 | /* |
1186 | * MMIO register access helper functions. | |
1187 | */ | |
1188 | ||
1189 | /* | |
1190 | * hl_rreg - Read an MMIO register | |
1191 | * | |
1192 | * @hdev: pointer to habanalabs device structure | |
1193 | * @reg: MMIO register offset (in bytes) | |
1194 | * | |
1195 | * Returns the value of the MMIO register we are asked to read | |
1196 | * | |
1197 | */ | |
1198 | inline u32 hl_rreg(struct hl_device *hdev, u32 reg) | |
1199 | { | |
1200 | return readl(hdev->rmmio + reg); | |
1201 | } | |
1202 | ||
1203 | /* | |
1204 | * hl_wreg - Write to an MMIO register | |
1205 | * | |
1206 | * @hdev: pointer to habanalabs device structure | |
1207 | * @reg: MMIO register offset (in bytes) | |
1208 | * @val: 32-bit value | |
1209 | * | |
1210 | * Writes the 32-bit value into the MMIO register | |
1211 | * | |
1212 | */ | |
1213 | inline void hl_wreg(struct hl_device *hdev, u32 reg, u32 val) | |
1214 | { | |
1215 | writel(val, hdev->rmmio + reg); | |
1216 | } |