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2b7a5056 WS |
1 | /* |
2 | * at24.c - handle most I2C EEPROMs | |
3 | * | |
4 | * Copyright (C) 2005-2007 David Brownell | |
5 | * Copyright (C) 2008 Wolfram Sang, Pengutronix | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | */ | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/module.h> | |
7f2a2f0d | 15 | #include <linux/of_device.h> |
2b7a5056 WS |
16 | #include <linux/slab.h> |
17 | #include <linux/delay.h> | |
18 | #include <linux/mutex.h> | |
2b7a5056 WS |
19 | #include <linux/mod_devicetable.h> |
20 | #include <linux/log2.h> | |
21 | #include <linux/bitops.h> | |
22 | #include <linux/jiffies.h> | |
dd905a61 | 23 | #include <linux/property.h> |
40d8edc9 | 24 | #include <linux/acpi.h> |
2b7a5056 | 25 | #include <linux/i2c.h> |
57d15550 | 26 | #include <linux/nvmem-provider.h> |
5c015258 | 27 | #include <linux/regmap.h> |
25f73ed5 | 28 | #include <linux/platform_data/at24.h> |
98e82010 | 29 | #include <linux/pm_runtime.h> |
6ce261e8 | 30 | #include <linux/gpio/consumer.h> |
2b7a5056 WS |
31 | |
32 | /* | |
33 | * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. | |
34 | * Differences between different vendor product lines (like Atmel AT24C or | |
35 | * MicroChip 24LC, etc) won't much matter for typical read/write access. | |
36 | * There are also I2C RAM chips, likewise interchangeable. One example | |
37 | * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). | |
38 | * | |
39 | * However, misconfiguration can lose data. "Set 16-bit memory address" | |
40 | * to a part with 8-bit addressing will overwrite data. Writing with too | |
41 | * big a page size also loses data. And it's not safe to assume that the | |
42 | * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC | |
43 | * uses 0x51, for just one example. | |
44 | * | |
45 | * Accordingly, explicit board-specific configuration data should be used | |
46 | * in almost all cases. (One partial exception is an SMBus used to access | |
47 | * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) | |
48 | * | |
49 | * So this driver uses "new style" I2C driver binding, expecting to be | |
50 | * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or | |
51 | * similar kernel-resident tables; or, configuration data coming from | |
52 | * a bootloader. | |
53 | * | |
54 | * Other than binding model, current differences from "eeprom" driver are | |
55 | * that this one handles write access and isn't restricted to 24c02 devices. | |
56 | * It also handles larger devices (32 kbit and up) with two-byte addresses, | |
57 | * which won't work on pure SMBus systems. | |
58 | */ | |
59 | ||
5c015258 HK |
60 | struct at24_client { |
61 | struct i2c_client *client; | |
62 | struct regmap *regmap; | |
63 | }; | |
64 | ||
2b7a5056 WS |
65 | struct at24_data { |
66 | struct at24_platform_data chip; | |
318aa9c6 | 67 | |
2b7a5056 WS |
68 | /* |
69 | * Lock protects against activities from other Linux tasks, | |
70 | * but not from changes by other I2C masters. | |
71 | */ | |
72 | struct mutex lock; | |
2b7a5056 | 73 | |
aa4ce228 BG |
74 | unsigned int write_max; |
75 | unsigned int num_addresses; | |
4bb5c13c | 76 | unsigned int offset_adj; |
2b7a5056 | 77 | |
57d15550 AL |
78 | struct nvmem_device *nvmem; |
79 | ||
6ce261e8 BG |
80 | struct gpio_desc *wp_gpio; |
81 | ||
2b7a5056 WS |
82 | /* |
83 | * Some chips tie up multiple I2C addresses; dummy devices reserve | |
84 | * them for us, and we'll use them with SMBus calls. | |
85 | */ | |
5c015258 | 86 | struct at24_client client[]; |
2b7a5056 WS |
87 | }; |
88 | ||
89 | /* | |
90 | * This parameter is to help this driver avoid blocking other drivers out | |
91 | * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C | |
92 | * clock, one 256 byte read takes about 1/43 second which is excessive; | |
93 | * but the 1/170 second it takes at 400 kHz may be quite reasonable; and | |
94 | * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. | |
95 | * | |
96 | * This value is forced to be a power of two so that writes align on pages. | |
97 | */ | |
ec3c2d51 BG |
98 | static unsigned int at24_io_limit = 128; |
99 | module_param_named(io_limit, at24_io_limit, uint, 0); | |
100 | MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)"); | |
2b7a5056 WS |
101 | |
102 | /* | |
103 | * Specs often allow 5 msec for a page write, sometimes 20 msec; | |
104 | * it's important to recover from write timeouts. | |
105 | */ | |
ec3c2d51 BG |
106 | static unsigned int at24_write_timeout = 25; |
107 | module_param_named(write_timeout, at24_write_timeout, uint, 0); | |
108 | MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)"); | |
2b7a5056 | 109 | |
9344a81e BG |
110 | /* |
111 | * Both reads and writes fail if the previous write didn't complete yet. This | |
112 | * macro loops a few times waiting at least long enough for one entire page | |
24da3cc0 BG |
113 | * write to work while making sure that at least one iteration is run before |
114 | * checking the break condition. | |
9344a81e BG |
115 | * |
116 | * It takes two parameters: a variable in which the future timeout in jiffies | |
117 | * will be stored and a temporary variable holding the time of the last | |
118 | * iteration of processing the request. Both should be unsigned integers | |
119 | * holding at least 32 bits. | |
120 | */ | |
ec3c2d51 BG |
121 | #define at24_loop_until_timeout(tout, op_time) \ |
122 | for (tout = jiffies + msecs_to_jiffies(at24_write_timeout), \ | |
123 | op_time = 0; \ | |
24da3cc0 | 124 | op_time ? time_before(op_time, tout) : true; \ |
9344a81e BG |
125 | usleep_range(1000, 1500), op_time = jiffies) |
126 | ||
b680f4fa SVA |
127 | struct at24_chip_data { |
128 | /* | |
129 | * these fields mirror their equivalents in | |
130 | * struct at24_platform_data | |
131 | */ | |
132 | u32 byte_len; | |
133 | u8 flags; | |
134 | }; | |
135 | ||
136 | #define AT24_CHIP_DATA(_name, _len, _flags) \ | |
137 | static const struct at24_chip_data _name = { \ | |
138 | .byte_len = _len, .flags = _flags, \ | |
139 | } | |
140 | ||
141 | /* needs 8 addresses as A0-A2 are ignored */ | |
142 | AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR); | |
143 | /* old variants can't be handled with this generic entry! */ | |
144 | AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0); | |
145 | AT24_CHIP_DATA(at24_data_24cs01, 16, | |
146 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
147 | AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0); | |
148 | AT24_CHIP_DATA(at24_data_24cs02, 16, | |
149 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
150 | AT24_CHIP_DATA(at24_data_24mac402, 48 / 8, | |
151 | AT24_FLAG_MAC | AT24_FLAG_READONLY); | |
152 | AT24_CHIP_DATA(at24_data_24mac602, 64 / 8, | |
153 | AT24_FLAG_MAC | AT24_FLAG_READONLY); | |
154 | /* spd is a 24c02 in memory DIMMs */ | |
155 | AT24_CHIP_DATA(at24_data_spd, 2048 / 8, | |
156 | AT24_FLAG_READONLY | AT24_FLAG_IRUGO); | |
157 | AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0); | |
158 | AT24_CHIP_DATA(at24_data_24cs04, 16, | |
159 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
160 | /* 24rf08 quirk is handled at i2c-core */ | |
161 | AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0); | |
162 | AT24_CHIP_DATA(at24_data_24cs08, 16, | |
163 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
164 | AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0); | |
165 | AT24_CHIP_DATA(at24_data_24cs16, 16, | |
166 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
167 | AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16); | |
168 | AT24_CHIP_DATA(at24_data_24cs32, 16, | |
169 | AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
170 | AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16); | |
171 | AT24_CHIP_DATA(at24_data_24cs64, 16, | |
172 | AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
173 | AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16); | |
174 | AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16); | |
175 | AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16); | |
176 | AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16); | |
177 | /* identical to 24c08 ? */ | |
178 | AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0); | |
179 | ||
2b7a5056 | 180 | static const struct i2c_device_id at24_ids[] = { |
b680f4fa SVA |
181 | { "24c00", (kernel_ulong_t)&at24_data_24c00 }, |
182 | { "24c01", (kernel_ulong_t)&at24_data_24c01 }, | |
183 | { "24cs01", (kernel_ulong_t)&at24_data_24cs01 }, | |
184 | { "24c02", (kernel_ulong_t)&at24_data_24c02 }, | |
185 | { "24cs02", (kernel_ulong_t)&at24_data_24cs02 }, | |
186 | { "24mac402", (kernel_ulong_t)&at24_data_24mac402 }, | |
187 | { "24mac602", (kernel_ulong_t)&at24_data_24mac602 }, | |
188 | { "spd", (kernel_ulong_t)&at24_data_spd }, | |
189 | { "24c04", (kernel_ulong_t)&at24_data_24c04 }, | |
190 | { "24cs04", (kernel_ulong_t)&at24_data_24cs04 }, | |
191 | { "24c08", (kernel_ulong_t)&at24_data_24c08 }, | |
192 | { "24cs08", (kernel_ulong_t)&at24_data_24cs08 }, | |
193 | { "24c16", (kernel_ulong_t)&at24_data_24c16 }, | |
194 | { "24cs16", (kernel_ulong_t)&at24_data_24cs16 }, | |
195 | { "24c32", (kernel_ulong_t)&at24_data_24c32 }, | |
196 | { "24cs32", (kernel_ulong_t)&at24_data_24cs32 }, | |
197 | { "24c64", (kernel_ulong_t)&at24_data_24c64 }, | |
198 | { "24cs64", (kernel_ulong_t)&at24_data_24cs64 }, | |
199 | { "24c128", (kernel_ulong_t)&at24_data_24c128 }, | |
200 | { "24c256", (kernel_ulong_t)&at24_data_24c256 }, | |
201 | { "24c512", (kernel_ulong_t)&at24_data_24c512 }, | |
202 | { "24c1024", (kernel_ulong_t)&at24_data_24c1024 }, | |
203 | { "at24", 0 }, | |
2b7a5056 WS |
204 | { /* END OF LIST */ } |
205 | }; | |
206 | MODULE_DEVICE_TABLE(i2c, at24_ids); | |
207 | ||
7f2a2f0d | 208 | static const struct of_device_id at24_of_match[] = { |
b680f4fa SVA |
209 | { .compatible = "atmel,24c00", .data = &at24_data_24c00 }, |
210 | { .compatible = "atmel,24c01", .data = &at24_data_24c01 }, | |
0f30aca7 | 211 | { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 }, |
b680f4fa | 212 | { .compatible = "atmel,24c02", .data = &at24_data_24c02 }, |
0f30aca7 BG |
213 | { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 }, |
214 | { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 }, | |
215 | { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 }, | |
b680f4fa SVA |
216 | { .compatible = "atmel,spd", .data = &at24_data_spd }, |
217 | { .compatible = "atmel,24c04", .data = &at24_data_24c04 }, | |
0f30aca7 | 218 | { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 }, |
b680f4fa | 219 | { .compatible = "atmel,24c08", .data = &at24_data_24c08 }, |
0f30aca7 | 220 | { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 }, |
b680f4fa | 221 | { .compatible = "atmel,24c16", .data = &at24_data_24c16 }, |
0f30aca7 | 222 | { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 }, |
b680f4fa | 223 | { .compatible = "atmel,24c32", .data = &at24_data_24c32 }, |
0f30aca7 | 224 | { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 }, |
b680f4fa | 225 | { .compatible = "atmel,24c64", .data = &at24_data_24c64 }, |
0f30aca7 | 226 | { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 }, |
b680f4fa SVA |
227 | { .compatible = "atmel,24c128", .data = &at24_data_24c128 }, |
228 | { .compatible = "atmel,24c256", .data = &at24_data_24c256 }, | |
229 | { .compatible = "atmel,24c512", .data = &at24_data_24c512 }, | |
230 | { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 }, | |
231 | { /* END OF LIST */ }, | |
7f2a2f0d JMC |
232 | }; |
233 | MODULE_DEVICE_TABLE(of, at24_of_match); | |
234 | ||
40d8edc9 | 235 | static const struct acpi_device_id at24_acpi_ids[] = { |
b680f4fa SVA |
236 | { "INT3499", (kernel_ulong_t)&at24_data_INT3499 }, |
237 | { /* END OF LIST */ } | |
40d8edc9 AS |
238 | }; |
239 | MODULE_DEVICE_TABLE(acpi, at24_acpi_ids); | |
240 | ||
2b7a5056 WS |
241 | /* |
242 | * This routine supports chips which consume multiple I2C addresses. It | |
243 | * computes the addressing information to be used for a given r/w request. | |
244 | * Assumes that sanity checks for offset happened at sysfs-layer. | |
9afd6866 BG |
245 | * |
246 | * Slave address and byte offset derive from the offset. Always | |
247 | * set the byte address; on a multi-master board, another master | |
248 | * may have changed the chip's "current" address pointer. | |
2b7a5056 | 249 | */ |
46049486 HK |
250 | static struct at24_client *at24_translate_offset(struct at24_data *at24, |
251 | unsigned int *offset) | |
2b7a5056 | 252 | { |
aa4ce228 | 253 | unsigned int i; |
2b7a5056 WS |
254 | |
255 | if (at24->chip.flags & AT24_FLAG_ADDR16) { | |
256 | i = *offset >> 16; | |
257 | *offset &= 0xffff; | |
258 | } else { | |
259 | i = *offset >> 8; | |
260 | *offset &= 0xff; | |
261 | } | |
262 | ||
46049486 | 263 | return &at24->client[i]; |
2b7a5056 WS |
264 | } |
265 | ||
f1a640c5 BG |
266 | static struct device *at24_base_client_dev(struct at24_data *at24) |
267 | { | |
268 | return &at24->client[0].client->dev; | |
269 | } | |
270 | ||
e32213fb SVA |
271 | static size_t at24_adjust_read_count(struct at24_data *at24, |
272 | unsigned int offset, size_t count) | |
273 | { | |
274 | unsigned int bits; | |
275 | size_t remainder; | |
276 | ||
277 | /* | |
278 | * In case of multi-address chips that don't rollover reads to | |
279 | * the next slave address: truncate the count to the slave boundary, | |
280 | * so that the read never straddles slaves. | |
281 | */ | |
282 | if (at24->chip.flags & AT24_FLAG_NO_RDROL) { | |
283 | bits = (at24->chip.flags & AT24_FLAG_ADDR16) ? 16 : 8; | |
284 | remainder = BIT(bits) - offset; | |
285 | if (count > remainder) | |
286 | count = remainder; | |
287 | } | |
288 | ||
ec3c2d51 BG |
289 | if (count > at24_io_limit) |
290 | count = at24_io_limit; | |
e32213fb SVA |
291 | |
292 | return count; | |
293 | } | |
294 | ||
4bb5c13c HK |
295 | static ssize_t at24_regmap_read(struct at24_data *at24, char *buf, |
296 | unsigned int offset, size_t count) | |
297 | { | |
298 | unsigned long timeout, read_time; | |
299 | struct at24_client *at24_client; | |
300 | struct i2c_client *client; | |
301 | struct regmap *regmap; | |
302 | int ret; | |
303 | ||
304 | at24_client = at24_translate_offset(at24, &offset); | |
305 | regmap = at24_client->regmap; | |
306 | client = at24_client->client; | |
e32213fb | 307 | count = at24_adjust_read_count(at24, offset, count); |
4bb5c13c HK |
308 | |
309 | /* adjust offset for mac and serial read ops */ | |
310 | offset += at24->offset_adj; | |
311 | ||
ec3c2d51 | 312 | at24_loop_until_timeout(timeout, read_time) { |
4bb5c13c HK |
313 | ret = regmap_bulk_read(regmap, offset, buf, count); |
314 | dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", | |
315 | count, offset, ret, jiffies); | |
316 | if (!ret) | |
317 | return count; | |
318 | } | |
319 | ||
320 | return -ETIMEDOUT; | |
321 | } | |
322 | ||
2b7a5056 WS |
323 | /* |
324 | * Note that if the hardware write-protect pin is pulled high, the whole | |
325 | * chip is normally write protected. But there are plenty of product | |
326 | * variants here, including OTP fuses and partial chip protect. | |
327 | * | |
cd0c8615 BG |
328 | * We only use page mode writes; the alternative is sloooow. These routines |
329 | * write at most one page. | |
2b7a5056 | 330 | */ |
cd0c8615 BG |
331 | |
332 | static size_t at24_adjust_write_count(struct at24_data *at24, | |
333 | unsigned int offset, size_t count) | |
2b7a5056 | 334 | { |
aa4ce228 | 335 | unsigned int next_page; |
2b7a5056 | 336 | |
2b7a5056 WS |
337 | /* write_max is at most a page */ |
338 | if (count > at24->write_max) | |
339 | count = at24->write_max; | |
340 | ||
341 | /* Never roll over backwards, to the start of this page */ | |
342 | next_page = roundup(offset + 1, at24->chip.page_size); | |
343 | if (offset + count > next_page) | |
344 | count = next_page - offset; | |
345 | ||
cd0c8615 BG |
346 | return count; |
347 | } | |
348 | ||
8e5888e1 HK |
349 | static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf, |
350 | unsigned int offset, size_t count) | |
351 | { | |
352 | unsigned long timeout, write_time; | |
353 | struct at24_client *at24_client; | |
354 | struct i2c_client *client; | |
355 | struct regmap *regmap; | |
356 | int ret; | |
357 | ||
358 | at24_client = at24_translate_offset(at24, &offset); | |
359 | regmap = at24_client->regmap; | |
360 | client = at24_client->client; | |
361 | count = at24_adjust_write_count(at24, offset, count); | |
362 | ||
ec3c2d51 | 363 | at24_loop_until_timeout(timeout, write_time) { |
8e5888e1 HK |
364 | ret = regmap_bulk_write(regmap, offset, buf, count); |
365 | dev_dbg(&client->dev, "write %zu@%d --> %d (%ld)\n", | |
366 | count, offset, ret, jiffies); | |
367 | if (!ret) | |
368 | return count; | |
369 | } | |
370 | ||
371 | return -ETIMEDOUT; | |
372 | } | |
373 | ||
d5bc0047 BG |
374 | static int at24_read(void *priv, unsigned int off, void *val, size_t count) |
375 | { | |
5ca2b5b7 BG |
376 | struct at24_data *at24; |
377 | struct device *dev; | |
d5bc0047 | 378 | char *buf = val; |
98e82010 | 379 | int ret; |
d5bc0047 | 380 | |
5ca2b5b7 | 381 | at24 = priv; |
f1a640c5 | 382 | dev = at24_base_client_dev(at24); |
5ca2b5b7 | 383 | |
d5bc0047 BG |
384 | if (unlikely(!count)) |
385 | return count; | |
386 | ||
d9bcd462 HK |
387 | if (off + count > at24->chip.byte_len) |
388 | return -EINVAL; | |
389 | ||
f9ecc83f | 390 | ret = pm_runtime_get_sync(dev); |
98e82010 | 391 | if (ret < 0) { |
f9ecc83f | 392 | pm_runtime_put_noidle(dev); |
98e82010 DM |
393 | return ret; |
394 | } | |
395 | ||
d5bc0047 BG |
396 | /* |
397 | * Read data from chip, protecting against concurrent updates | |
398 | * from this host, but not from other I2C masters. | |
399 | */ | |
400 | mutex_lock(&at24->lock); | |
401 | ||
402 | while (count) { | |
eb27fde2 BG |
403 | ret = at24_regmap_read(at24, buf, off, count); |
404 | if (ret < 0) { | |
d5bc0047 | 405 | mutex_unlock(&at24->lock); |
f9ecc83f | 406 | pm_runtime_put(dev); |
eb27fde2 | 407 | return ret; |
d5bc0047 | 408 | } |
eb27fde2 BG |
409 | buf += ret; |
410 | off += ret; | |
411 | count -= ret; | |
d5bc0047 BG |
412 | } |
413 | ||
414 | mutex_unlock(&at24->lock); | |
415 | ||
f9ecc83f | 416 | pm_runtime_put(dev); |
98e82010 | 417 | |
d5bc0047 BG |
418 | return 0; |
419 | } | |
420 | ||
cf0361a2 | 421 | static int at24_write(void *priv, unsigned int off, void *val, size_t count) |
2b7a5056 | 422 | { |
5ca2b5b7 BG |
423 | struct at24_data *at24; |
424 | struct device *dev; | |
cf0361a2 | 425 | char *buf = val; |
98e82010 | 426 | int ret; |
2b7a5056 | 427 | |
5ca2b5b7 | 428 | at24 = priv; |
f1a640c5 | 429 | dev = at24_base_client_dev(at24); |
5ca2b5b7 | 430 | |
2b7a5056 | 431 | if (unlikely(!count)) |
cf0361a2 | 432 | return -EINVAL; |
2b7a5056 | 433 | |
d9bcd462 HK |
434 | if (off + count > at24->chip.byte_len) |
435 | return -EINVAL; | |
436 | ||
f9ecc83f | 437 | ret = pm_runtime_get_sync(dev); |
98e82010 | 438 | if (ret < 0) { |
f9ecc83f | 439 | pm_runtime_put_noidle(dev); |
98e82010 DM |
440 | return ret; |
441 | } | |
442 | ||
2b7a5056 WS |
443 | /* |
444 | * Write data to chip, protecting against concurrent updates | |
445 | * from this host, but not from other I2C masters. | |
446 | */ | |
447 | mutex_lock(&at24->lock); | |
6ce261e8 | 448 | gpiod_set_value_cansleep(at24->wp_gpio, 0); |
2b7a5056 WS |
449 | |
450 | while (count) { | |
c4fee330 BG |
451 | ret = at24_regmap_write(at24, buf, off, count); |
452 | if (ret < 0) { | |
6ce261e8 | 453 | gpiod_set_value_cansleep(at24->wp_gpio, 1); |
cf0361a2 | 454 | mutex_unlock(&at24->lock); |
f9ecc83f | 455 | pm_runtime_put(dev); |
c4fee330 | 456 | return ret; |
2b7a5056 | 457 | } |
c4fee330 BG |
458 | buf += ret; |
459 | off += ret; | |
460 | count -= ret; | |
2b7a5056 WS |
461 | } |
462 | ||
6ce261e8 | 463 | gpiod_set_value_cansleep(at24->wp_gpio, 1); |
2b7a5056 WS |
464 | mutex_unlock(&at24->lock); |
465 | ||
f9ecc83f | 466 | pm_runtime_put(dev); |
98e82010 | 467 | |
57d15550 AL |
468 | return 0; |
469 | } | |
470 | ||
1f77d185 BG |
471 | static void at24_properties_to_pdata(struct device *dev, |
472 | struct at24_platform_data *chip) | |
9ed030d7 | 473 | { |
dd905a61 BG |
474 | int err; |
475 | u32 val; | |
476 | ||
477 | if (device_property_present(dev, "read-only")) | |
478 | chip->flags |= AT24_FLAG_READONLY; | |
e32213fb SVA |
479 | if (device_property_present(dev, "no-read-rollover")) |
480 | chip->flags |= AT24_FLAG_NO_RDROL; | |
dd905a61 | 481 | |
dbc1ab9c DM |
482 | err = device_property_read_u32(dev, "size", &val); |
483 | if (!err) | |
484 | chip->byte_len = val; | |
485 | ||
dd905a61 BG |
486 | err = device_property_read_u32(dev, "pagesize", &val); |
487 | if (!err) { | |
488 | chip->page_size = val; | |
489 | } else { | |
490 | /* | |
491 | * This is slow, but we can't know all eeproms, so we better | |
492 | * play safe. Specifying custom eeprom-types via platform_data | |
493 | * is recommended anyhow. | |
494 | */ | |
495 | chip->page_size = 1; | |
9ed030d7 WS |
496 | } |
497 | } | |
9ed030d7 | 498 | |
feb2f19b BG |
499 | static int at24_get_pdata(struct device *dev, struct at24_platform_data *pdata) |
500 | { | |
501 | struct device_node *of_node = dev->of_node; | |
502 | const struct at24_chip_data *cdata; | |
503 | const struct i2c_device_id *id; | |
504 | struct at24_platform_data *pd; | |
505 | ||
506 | pd = dev_get_platdata(dev); | |
507 | if (pd) { | |
508 | memcpy(pdata, pd, sizeof(*pdata)); | |
509 | return 0; | |
510 | } | |
511 | ||
512 | id = i2c_match_id(at24_ids, to_i2c_client(dev)); | |
513 | ||
514 | /* | |
515 | * The I2C core allows OF nodes compatibles to match against the | |
516 | * I2C device ID table as a fallback, so check not only if an OF | |
517 | * node is present but also if it matches an OF device ID entry. | |
518 | */ | |
519 | if (of_node && of_match_device(at24_of_match, dev)) | |
520 | cdata = of_device_get_match_data(dev); | |
521 | else if (id) | |
522 | cdata = (void *)&id->driver_data; | |
523 | else | |
524 | cdata = acpi_device_get_match_data(dev); | |
525 | ||
526 | if (!cdata) | |
527 | return -ENODEV; | |
528 | ||
529 | pdata->byte_len = cdata->byte_len; | |
530 | pdata->flags = cdata->flags; | |
531 | at24_properties_to_pdata(dev, pdata); | |
532 | ||
533 | return 0; | |
534 | } | |
535 | ||
4bb5c13c HK |
536 | static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len) |
537 | { | |
538 | if (flags & AT24_FLAG_MAC) { | |
539 | /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */ | |
540 | return 0xa0 - byte_len; | |
541 | } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) { | |
542 | /* | |
543 | * For 16 bit address pointers, the word address must contain | |
544 | * a '10' sequence in bits 11 and 10 regardless of the | |
545 | * intended position of the address pointer. | |
546 | */ | |
547 | return 0x0800; | |
548 | } else if (flags & AT24_FLAG_SERIAL) { | |
549 | /* | |
550 | * Otherwise the word address must begin with a '10' sequence, | |
551 | * regardless of the intended address. | |
552 | */ | |
553 | return 0x0080; | |
554 | } else { | |
555 | return 0; | |
556 | } | |
557 | } | |
558 | ||
48b6a7d1 | 559 | static int at24_probe(struct i2c_client *client) |
2b7a5056 | 560 | { |
eef69398 | 561 | struct regmap_config regmap_config = { }; |
8cdc4e7e | 562 | struct nvmem_config nvmem_config = { }; |
f2adff66 | 563 | struct at24_platform_data pdata = { }; |
021c7d7b | 564 | struct device *dev = &client->dev; |
5ca2b5b7 BG |
565 | unsigned int i, num_addresses; |
566 | struct at24_data *at24; | |
11288b7c | 567 | size_t at24_size; |
5ca2b5b7 | 568 | bool writable; |
00f0ea70 | 569 | u8 test_byte; |
5ca2b5b7 | 570 | int err; |
2b7a5056 | 571 | |
feb2f19b BG |
572 | err = at24_get_pdata(dev, &pdata); |
573 | if (err) | |
574 | return err; | |
2b7a5056 | 575 | |
f2adff66 | 576 | if (!pdata.page_size) { |
021c7d7b | 577 | dev_err(dev, "page_size must not be 0!\n"); |
f0ac2363 | 578 | return -EINVAL; |
45efe847 | 579 | } |
f2adff66 | 580 | if (!is_power_of_2(pdata.page_size)) |
021c7d7b | 581 | dev_warn(dev, "page_size looks suspicious (no power of 2)!\n"); |
2b7a5056 | 582 | |
a23727cb HK |
583 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C) && |
584 | !i2c_check_functionality(client->adapter, | |
585 | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) | |
f2adff66 | 586 | pdata.page_size = 1; |
a839ce66 | 587 | |
f2adff66 | 588 | if (pdata.flags & AT24_FLAG_TAKE8ADDR) |
2b7a5056 WS |
589 | num_addresses = 8; |
590 | else | |
f2adff66 BG |
591 | num_addresses = DIV_ROUND_UP(pdata.byte_len, |
592 | (pdata.flags & AT24_FLAG_ADDR16) ? 65536 : 256); | |
2b7a5056 | 593 | |
eef69398 | 594 | regmap_config.val_bits = 8; |
f2adff66 | 595 | regmap_config.reg_bits = (pdata.flags & AT24_FLAG_ADDR16) ? 16 : 8; |
d154316d | 596 | regmap_config.disable_locking = true; |
5c015258 | 597 | |
11288b7c BG |
598 | at24_size = sizeof(*at24) + num_addresses * sizeof(struct at24_client); |
599 | at24 = devm_kzalloc(dev, at24_size, GFP_KERNEL); | |
f0ac2363 NB |
600 | if (!at24) |
601 | return -ENOMEM; | |
2b7a5056 WS |
602 | |
603 | mutex_init(&at24->lock); | |
f2adff66 | 604 | at24->chip = pdata; |
2b7a5056 | 605 | at24->num_addresses = num_addresses; |
f2adff66 | 606 | at24->offset_adj = at24_get_offset_adj(pdata.flags, pdata.byte_len); |
2b7a5056 | 607 | |
021c7d7b | 608 | at24->wp_gpio = devm_gpiod_get_optional(dev, "wp", GPIOD_OUT_HIGH); |
6ce261e8 BG |
609 | if (IS_ERR(at24->wp_gpio)) |
610 | return PTR_ERR(at24->wp_gpio); | |
611 | ||
5c015258 | 612 | at24->client[0].client = client; |
eef69398 | 613 | at24->client[0].regmap = devm_regmap_init_i2c(client, ®map_config); |
5c015258 HK |
614 | if (IS_ERR(at24->client[0].regmap)) |
615 | return PTR_ERR(at24->client[0].regmap); | |
616 | ||
f2adff66 | 617 | if ((pdata.flags & AT24_FLAG_SERIAL) && (pdata.flags & AT24_FLAG_MAC)) { |
021c7d7b | 618 | dev_err(dev, |
0b813658 BG |
619 | "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC."); |
620 | return -EINVAL; | |
621 | } | |
622 | ||
f2adff66 | 623 | writable = !(pdata.flags & AT24_FLAG_READONLY); |
2b7a5056 | 624 | if (writable) { |
ec3c2d51 | 625 | at24->write_max = min_t(unsigned int, |
f2adff66 | 626 | pdata.page_size, at24_io_limit); |
a23727cb HK |
627 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C) && |
628 | at24->write_max > I2C_SMBUS_BLOCK_MAX) | |
629 | at24->write_max = I2C_SMBUS_BLOCK_MAX; | |
2b7a5056 WS |
630 | } |
631 | ||
2b7a5056 WS |
632 | /* use dummy devices for multiple-address chips */ |
633 | for (i = 1; i < num_addresses; i++) { | |
5c015258 HK |
634 | at24->client[i].client = i2c_new_dummy(client->adapter, |
635 | client->addr + i); | |
636 | if (!at24->client[i].client) { | |
021c7d7b BG |
637 | dev_err(dev, "address 0x%02x unavailable\n", |
638 | client->addr + i); | |
2b7a5056 WS |
639 | err = -EADDRINUSE; |
640 | goto err_clients; | |
641 | } | |
5c015258 | 642 | at24->client[i].regmap = devm_regmap_init_i2c( |
eef69398 BG |
643 | at24->client[i].client, |
644 | ®map_config); | |
5c015258 HK |
645 | if (IS_ERR(at24->client[i].regmap)) { |
646 | err = PTR_ERR(at24->client[i].regmap); | |
647 | goto err_clients; | |
648 | } | |
2b7a5056 WS |
649 | } |
650 | ||
00f0ea70 BG |
651 | i2c_set_clientdata(client, at24); |
652 | ||
98e82010 | 653 | /* enable runtime pm */ |
021c7d7b BG |
654 | pm_runtime_set_active(dev); |
655 | pm_runtime_enable(dev); | |
98e82010 | 656 | |
00f0ea70 BG |
657 | /* |
658 | * Perform a one-byte test read to verify that the | |
659 | * chip is functional. | |
660 | */ | |
661 | err = at24_read(at24, 0, &test_byte, 1); | |
021c7d7b | 662 | pm_runtime_idle(dev); |
00f0ea70 BG |
663 | if (err) { |
664 | err = -ENODEV; | |
665 | goto err_clients; | |
666 | } | |
667 | ||
021c7d7b BG |
668 | nvmem_config.name = dev_name(dev); |
669 | nvmem_config.dev = dev; | |
8cdc4e7e BG |
670 | nvmem_config.read_only = !writable; |
671 | nvmem_config.root_only = true; | |
672 | nvmem_config.owner = THIS_MODULE; | |
673 | nvmem_config.compat = true; | |
021c7d7b | 674 | nvmem_config.base_dev = dev; |
8cdc4e7e BG |
675 | nvmem_config.reg_read = at24_read; |
676 | nvmem_config.reg_write = at24_write; | |
677 | nvmem_config.priv = at24; | |
678 | nvmem_config.stride = 1; | |
679 | nvmem_config.word_size = 1; | |
f2adff66 | 680 | nvmem_config.size = pdata.byte_len; |
8cdc4e7e BG |
681 | |
682 | at24->nvmem = nvmem_register(&nvmem_config); | |
57d15550 AL |
683 | |
684 | if (IS_ERR(at24->nvmem)) { | |
685 | err = PTR_ERR(at24->nvmem); | |
686 | goto err_clients; | |
687 | } | |
2b7a5056 | 688 | |
021c7d7b | 689 | dev_info(dev, "%u byte %s EEPROM, %s, %u bytes/write\n", |
f2adff66 | 690 | pdata.byte_len, client->name, |
9ed030d7 | 691 | writable ? "writable" : "read-only", at24->write_max); |
2b7a5056 | 692 | |
7274ec8b | 693 | /* export data to kernel code */ |
f2adff66 BG |
694 | if (pdata.setup) |
695 | pdata.setup(at24->nvmem, pdata.context); | |
7274ec8b | 696 | |
2b7a5056 WS |
697 | return 0; |
698 | ||
699 | err_clients: | |
700 | for (i = 1; i < num_addresses; i++) | |
5c015258 HK |
701 | if (at24->client[i].client) |
702 | i2c_unregister_device(at24->client[i].client); | |
2b7a5056 | 703 | |
021c7d7b | 704 | pm_runtime_disable(dev); |
98e82010 | 705 | |
2b7a5056 WS |
706 | return err; |
707 | } | |
708 | ||
486a5c28 | 709 | static int at24_remove(struct i2c_client *client) |
2b7a5056 WS |
710 | { |
711 | struct at24_data *at24; | |
712 | int i; | |
713 | ||
714 | at24 = i2c_get_clientdata(client); | |
57d15550 AL |
715 | |
716 | nvmem_unregister(at24->nvmem); | |
2b7a5056 WS |
717 | |
718 | for (i = 1; i < at24->num_addresses; i++) | |
5c015258 | 719 | i2c_unregister_device(at24->client[i].client); |
2b7a5056 | 720 | |
98e82010 DM |
721 | pm_runtime_disable(&client->dev); |
722 | pm_runtime_set_suspended(&client->dev); | |
723 | ||
2b7a5056 WS |
724 | return 0; |
725 | } | |
726 | ||
2b7a5056 WS |
727 | static struct i2c_driver at24_driver = { |
728 | .driver = { | |
729 | .name = "at24", | |
7f2a2f0d | 730 | .of_match_table = at24_of_match, |
40d8edc9 | 731 | .acpi_match_table = ACPI_PTR(at24_acpi_ids), |
2b7a5056 | 732 | }, |
48b6a7d1 | 733 | .probe_new = at24_probe, |
2d6bed9c | 734 | .remove = at24_remove, |
2b7a5056 WS |
735 | .id_table = at24_ids, |
736 | }; | |
737 | ||
738 | static int __init at24_init(void) | |
739 | { | |
ec3c2d51 BG |
740 | if (!at24_io_limit) { |
741 | pr_err("at24: at24_io_limit must not be 0!\n"); | |
45efe847 WS |
742 | return -EINVAL; |
743 | } | |
744 | ||
ec3c2d51 | 745 | at24_io_limit = rounddown_pow_of_two(at24_io_limit); |
2b7a5056 WS |
746 | return i2c_add_driver(&at24_driver); |
747 | } | |
748 | module_init(at24_init); | |
749 | ||
750 | static void __exit at24_exit(void) | |
751 | { | |
752 | i2c_del_driver(&at24_driver); | |
753 | } | |
754 | module_exit(at24_exit); | |
755 | ||
756 | MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); | |
757 | MODULE_AUTHOR("David Brownell and Wolfram Sang"); | |
758 | MODULE_LICENSE("GPL"); |