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2b7a5056 WS |
1 | /* |
2 | * at24.c - handle most I2C EEPROMs | |
3 | * | |
4 | * Copyright (C) 2005-2007 David Brownell | |
5 | * Copyright (C) 2008 Wolfram Sang, Pengutronix | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | */ | |
12 | #include <linux/kernel.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/module.h> | |
7f2a2f0d | 15 | #include <linux/of_device.h> |
2b7a5056 WS |
16 | #include <linux/slab.h> |
17 | #include <linux/delay.h> | |
18 | #include <linux/mutex.h> | |
2b7a5056 WS |
19 | #include <linux/mod_devicetable.h> |
20 | #include <linux/log2.h> | |
21 | #include <linux/bitops.h> | |
22 | #include <linux/jiffies.h> | |
dd905a61 | 23 | #include <linux/property.h> |
40d8edc9 | 24 | #include <linux/acpi.h> |
2b7a5056 | 25 | #include <linux/i2c.h> |
57d15550 | 26 | #include <linux/nvmem-provider.h> |
5c015258 | 27 | #include <linux/regmap.h> |
25f73ed5 | 28 | #include <linux/platform_data/at24.h> |
98e82010 | 29 | #include <linux/pm_runtime.h> |
6ce261e8 | 30 | #include <linux/gpio/consumer.h> |
2b7a5056 WS |
31 | |
32 | /* | |
33 | * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. | |
34 | * Differences between different vendor product lines (like Atmel AT24C or | |
35 | * MicroChip 24LC, etc) won't much matter for typical read/write access. | |
36 | * There are also I2C RAM chips, likewise interchangeable. One example | |
37 | * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). | |
38 | * | |
39 | * However, misconfiguration can lose data. "Set 16-bit memory address" | |
40 | * to a part with 8-bit addressing will overwrite data. Writing with too | |
41 | * big a page size also loses data. And it's not safe to assume that the | |
42 | * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC | |
43 | * uses 0x51, for just one example. | |
44 | * | |
45 | * Accordingly, explicit board-specific configuration data should be used | |
46 | * in almost all cases. (One partial exception is an SMBus used to access | |
47 | * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) | |
48 | * | |
49 | * So this driver uses "new style" I2C driver binding, expecting to be | |
50 | * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or | |
51 | * similar kernel-resident tables; or, configuration data coming from | |
52 | * a bootloader. | |
53 | * | |
54 | * Other than binding model, current differences from "eeprom" driver are | |
55 | * that this one handles write access and isn't restricted to 24c02 devices. | |
56 | * It also handles larger devices (32 kbit and up) with two-byte addresses, | |
57 | * which won't work on pure SMBus systems. | |
58 | */ | |
59 | ||
5c015258 HK |
60 | struct at24_client { |
61 | struct i2c_client *client; | |
62 | struct regmap *regmap; | |
63 | }; | |
64 | ||
2b7a5056 WS |
65 | struct at24_data { |
66 | struct at24_platform_data chip; | |
318aa9c6 | 67 | |
2b7a5056 WS |
68 | /* |
69 | * Lock protects against activities from other Linux tasks, | |
70 | * but not from changes by other I2C masters. | |
71 | */ | |
72 | struct mutex lock; | |
2b7a5056 | 73 | |
aa4ce228 BG |
74 | unsigned int write_max; |
75 | unsigned int num_addresses; | |
4bb5c13c | 76 | unsigned int offset_adj; |
2b7a5056 | 77 | |
57d15550 AL |
78 | struct nvmem_config nvmem_config; |
79 | struct nvmem_device *nvmem; | |
80 | ||
6ce261e8 BG |
81 | struct gpio_desc *wp_gpio; |
82 | ||
2b7a5056 WS |
83 | /* |
84 | * Some chips tie up multiple I2C addresses; dummy devices reserve | |
85 | * them for us, and we'll use them with SMBus calls. | |
86 | */ | |
5c015258 | 87 | struct at24_client client[]; |
2b7a5056 WS |
88 | }; |
89 | ||
90 | /* | |
91 | * This parameter is to help this driver avoid blocking other drivers out | |
92 | * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C | |
93 | * clock, one 256 byte read takes about 1/43 second which is excessive; | |
94 | * but the 1/170 second it takes at 400 kHz may be quite reasonable; and | |
95 | * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. | |
96 | * | |
97 | * This value is forced to be a power of two so that writes align on pages. | |
98 | */ | |
ec3c2d51 BG |
99 | static unsigned int at24_io_limit = 128; |
100 | module_param_named(io_limit, at24_io_limit, uint, 0); | |
101 | MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)"); | |
2b7a5056 WS |
102 | |
103 | /* | |
104 | * Specs often allow 5 msec for a page write, sometimes 20 msec; | |
105 | * it's important to recover from write timeouts. | |
106 | */ | |
ec3c2d51 BG |
107 | static unsigned int at24_write_timeout = 25; |
108 | module_param_named(write_timeout, at24_write_timeout, uint, 0); | |
109 | MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)"); | |
2b7a5056 | 110 | |
9344a81e BG |
111 | /* |
112 | * Both reads and writes fail if the previous write didn't complete yet. This | |
113 | * macro loops a few times waiting at least long enough for one entire page | |
24da3cc0 BG |
114 | * write to work while making sure that at least one iteration is run before |
115 | * checking the break condition. | |
9344a81e BG |
116 | * |
117 | * It takes two parameters: a variable in which the future timeout in jiffies | |
118 | * will be stored and a temporary variable holding the time of the last | |
119 | * iteration of processing the request. Both should be unsigned integers | |
120 | * holding at least 32 bits. | |
121 | */ | |
ec3c2d51 BG |
122 | #define at24_loop_until_timeout(tout, op_time) \ |
123 | for (tout = jiffies + msecs_to_jiffies(at24_write_timeout), \ | |
124 | op_time = 0; \ | |
24da3cc0 | 125 | op_time ? time_before(op_time, tout) : true; \ |
9344a81e BG |
126 | usleep_range(1000, 1500), op_time = jiffies) |
127 | ||
b680f4fa SVA |
128 | struct at24_chip_data { |
129 | /* | |
130 | * these fields mirror their equivalents in | |
131 | * struct at24_platform_data | |
132 | */ | |
133 | u32 byte_len; | |
134 | u8 flags; | |
135 | }; | |
136 | ||
137 | #define AT24_CHIP_DATA(_name, _len, _flags) \ | |
138 | static const struct at24_chip_data _name = { \ | |
139 | .byte_len = _len, .flags = _flags, \ | |
140 | } | |
141 | ||
142 | /* needs 8 addresses as A0-A2 are ignored */ | |
143 | AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR); | |
144 | /* old variants can't be handled with this generic entry! */ | |
145 | AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0); | |
146 | AT24_CHIP_DATA(at24_data_24cs01, 16, | |
147 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
148 | AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0); | |
149 | AT24_CHIP_DATA(at24_data_24cs02, 16, | |
150 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
151 | AT24_CHIP_DATA(at24_data_24mac402, 48 / 8, | |
152 | AT24_FLAG_MAC | AT24_FLAG_READONLY); | |
153 | AT24_CHIP_DATA(at24_data_24mac602, 64 / 8, | |
154 | AT24_FLAG_MAC | AT24_FLAG_READONLY); | |
155 | /* spd is a 24c02 in memory DIMMs */ | |
156 | AT24_CHIP_DATA(at24_data_spd, 2048 / 8, | |
157 | AT24_FLAG_READONLY | AT24_FLAG_IRUGO); | |
158 | AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0); | |
159 | AT24_CHIP_DATA(at24_data_24cs04, 16, | |
160 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
161 | /* 24rf08 quirk is handled at i2c-core */ | |
162 | AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0); | |
163 | AT24_CHIP_DATA(at24_data_24cs08, 16, | |
164 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
165 | AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0); | |
166 | AT24_CHIP_DATA(at24_data_24cs16, 16, | |
167 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
168 | AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16); | |
169 | AT24_CHIP_DATA(at24_data_24cs32, 16, | |
170 | AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
171 | AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16); | |
172 | AT24_CHIP_DATA(at24_data_24cs64, 16, | |
173 | AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
174 | AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16); | |
175 | AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16); | |
176 | AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16); | |
177 | AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16); | |
178 | /* identical to 24c08 ? */ | |
179 | AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0); | |
180 | ||
2b7a5056 | 181 | static const struct i2c_device_id at24_ids[] = { |
b680f4fa SVA |
182 | { "24c00", (kernel_ulong_t)&at24_data_24c00 }, |
183 | { "24c01", (kernel_ulong_t)&at24_data_24c01 }, | |
184 | { "24cs01", (kernel_ulong_t)&at24_data_24cs01 }, | |
185 | { "24c02", (kernel_ulong_t)&at24_data_24c02 }, | |
186 | { "24cs02", (kernel_ulong_t)&at24_data_24cs02 }, | |
187 | { "24mac402", (kernel_ulong_t)&at24_data_24mac402 }, | |
188 | { "24mac602", (kernel_ulong_t)&at24_data_24mac602 }, | |
189 | { "spd", (kernel_ulong_t)&at24_data_spd }, | |
190 | { "24c04", (kernel_ulong_t)&at24_data_24c04 }, | |
191 | { "24cs04", (kernel_ulong_t)&at24_data_24cs04 }, | |
192 | { "24c08", (kernel_ulong_t)&at24_data_24c08 }, | |
193 | { "24cs08", (kernel_ulong_t)&at24_data_24cs08 }, | |
194 | { "24c16", (kernel_ulong_t)&at24_data_24c16 }, | |
195 | { "24cs16", (kernel_ulong_t)&at24_data_24cs16 }, | |
196 | { "24c32", (kernel_ulong_t)&at24_data_24c32 }, | |
197 | { "24cs32", (kernel_ulong_t)&at24_data_24cs32 }, | |
198 | { "24c64", (kernel_ulong_t)&at24_data_24c64 }, | |
199 | { "24cs64", (kernel_ulong_t)&at24_data_24cs64 }, | |
200 | { "24c128", (kernel_ulong_t)&at24_data_24c128 }, | |
201 | { "24c256", (kernel_ulong_t)&at24_data_24c256 }, | |
202 | { "24c512", (kernel_ulong_t)&at24_data_24c512 }, | |
203 | { "24c1024", (kernel_ulong_t)&at24_data_24c1024 }, | |
204 | { "at24", 0 }, | |
2b7a5056 WS |
205 | { /* END OF LIST */ } |
206 | }; | |
207 | MODULE_DEVICE_TABLE(i2c, at24_ids); | |
208 | ||
7f2a2f0d | 209 | static const struct of_device_id at24_of_match[] = { |
b680f4fa SVA |
210 | { .compatible = "atmel,24c00", .data = &at24_data_24c00 }, |
211 | { .compatible = "atmel,24c01", .data = &at24_data_24c01 }, | |
0f30aca7 | 212 | { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 }, |
b680f4fa | 213 | { .compatible = "atmel,24c02", .data = &at24_data_24c02 }, |
0f30aca7 BG |
214 | { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 }, |
215 | { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 }, | |
216 | { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 }, | |
b680f4fa SVA |
217 | { .compatible = "atmel,spd", .data = &at24_data_spd }, |
218 | { .compatible = "atmel,24c04", .data = &at24_data_24c04 }, | |
0f30aca7 | 219 | { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 }, |
b680f4fa | 220 | { .compatible = "atmel,24c08", .data = &at24_data_24c08 }, |
0f30aca7 | 221 | { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 }, |
b680f4fa | 222 | { .compatible = "atmel,24c16", .data = &at24_data_24c16 }, |
0f30aca7 | 223 | { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 }, |
b680f4fa | 224 | { .compatible = "atmel,24c32", .data = &at24_data_24c32 }, |
0f30aca7 | 225 | { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 }, |
b680f4fa | 226 | { .compatible = "atmel,24c64", .data = &at24_data_24c64 }, |
0f30aca7 | 227 | { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 }, |
b680f4fa SVA |
228 | { .compatible = "atmel,24c128", .data = &at24_data_24c128 }, |
229 | { .compatible = "atmel,24c256", .data = &at24_data_24c256 }, | |
230 | { .compatible = "atmel,24c512", .data = &at24_data_24c512 }, | |
231 | { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 }, | |
232 | { /* END OF LIST */ }, | |
7f2a2f0d JMC |
233 | }; |
234 | MODULE_DEVICE_TABLE(of, at24_of_match); | |
235 | ||
40d8edc9 | 236 | static const struct acpi_device_id at24_acpi_ids[] = { |
b680f4fa SVA |
237 | { "INT3499", (kernel_ulong_t)&at24_data_INT3499 }, |
238 | { /* END OF LIST */ } | |
40d8edc9 AS |
239 | }; |
240 | MODULE_DEVICE_TABLE(acpi, at24_acpi_ids); | |
241 | ||
2b7a5056 WS |
242 | /*-------------------------------------------------------------------------*/ |
243 | ||
244 | /* | |
245 | * This routine supports chips which consume multiple I2C addresses. It | |
246 | * computes the addressing information to be used for a given r/w request. | |
247 | * Assumes that sanity checks for offset happened at sysfs-layer. | |
9afd6866 BG |
248 | * |
249 | * Slave address and byte offset derive from the offset. Always | |
250 | * set the byte address; on a multi-master board, another master | |
251 | * may have changed the chip's "current" address pointer. | |
2b7a5056 | 252 | */ |
46049486 HK |
253 | static struct at24_client *at24_translate_offset(struct at24_data *at24, |
254 | unsigned int *offset) | |
2b7a5056 | 255 | { |
aa4ce228 | 256 | unsigned int i; |
2b7a5056 WS |
257 | |
258 | if (at24->chip.flags & AT24_FLAG_ADDR16) { | |
259 | i = *offset >> 16; | |
260 | *offset &= 0xffff; | |
261 | } else { | |
262 | i = *offset >> 8; | |
263 | *offset &= 0xff; | |
264 | } | |
265 | ||
46049486 | 266 | return &at24->client[i]; |
2b7a5056 WS |
267 | } |
268 | ||
e32213fb SVA |
269 | static size_t at24_adjust_read_count(struct at24_data *at24, |
270 | unsigned int offset, size_t count) | |
271 | { | |
272 | unsigned int bits; | |
273 | size_t remainder; | |
274 | ||
275 | /* | |
276 | * In case of multi-address chips that don't rollover reads to | |
277 | * the next slave address: truncate the count to the slave boundary, | |
278 | * so that the read never straddles slaves. | |
279 | */ | |
280 | if (at24->chip.flags & AT24_FLAG_NO_RDROL) { | |
281 | bits = (at24->chip.flags & AT24_FLAG_ADDR16) ? 16 : 8; | |
282 | remainder = BIT(bits) - offset; | |
283 | if (count > remainder) | |
284 | count = remainder; | |
285 | } | |
286 | ||
ec3c2d51 BG |
287 | if (count > at24_io_limit) |
288 | count = at24_io_limit; | |
e32213fb SVA |
289 | |
290 | return count; | |
291 | } | |
292 | ||
4bb5c13c HK |
293 | static ssize_t at24_regmap_read(struct at24_data *at24, char *buf, |
294 | unsigned int offset, size_t count) | |
295 | { | |
296 | unsigned long timeout, read_time; | |
297 | struct at24_client *at24_client; | |
298 | struct i2c_client *client; | |
299 | struct regmap *regmap; | |
300 | int ret; | |
301 | ||
302 | at24_client = at24_translate_offset(at24, &offset); | |
303 | regmap = at24_client->regmap; | |
304 | client = at24_client->client; | |
e32213fb | 305 | count = at24_adjust_read_count(at24, offset, count); |
4bb5c13c HK |
306 | |
307 | /* adjust offset for mac and serial read ops */ | |
308 | offset += at24->offset_adj; | |
309 | ||
ec3c2d51 | 310 | at24_loop_until_timeout(timeout, read_time) { |
4bb5c13c HK |
311 | ret = regmap_bulk_read(regmap, offset, buf, count); |
312 | dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", | |
313 | count, offset, ret, jiffies); | |
314 | if (!ret) | |
315 | return count; | |
316 | } | |
317 | ||
318 | return -ETIMEDOUT; | |
319 | } | |
320 | ||
2b7a5056 WS |
321 | /* |
322 | * Note that if the hardware write-protect pin is pulled high, the whole | |
323 | * chip is normally write protected. But there are plenty of product | |
324 | * variants here, including OTP fuses and partial chip protect. | |
325 | * | |
cd0c8615 BG |
326 | * We only use page mode writes; the alternative is sloooow. These routines |
327 | * write at most one page. | |
2b7a5056 | 328 | */ |
cd0c8615 BG |
329 | |
330 | static size_t at24_adjust_write_count(struct at24_data *at24, | |
331 | unsigned int offset, size_t count) | |
2b7a5056 | 332 | { |
aa4ce228 | 333 | unsigned int next_page; |
2b7a5056 | 334 | |
2b7a5056 WS |
335 | /* write_max is at most a page */ |
336 | if (count > at24->write_max) | |
337 | count = at24->write_max; | |
338 | ||
339 | /* Never roll over backwards, to the start of this page */ | |
340 | next_page = roundup(offset + 1, at24->chip.page_size); | |
341 | if (offset + count > next_page) | |
342 | count = next_page - offset; | |
343 | ||
cd0c8615 BG |
344 | return count; |
345 | } | |
346 | ||
8e5888e1 HK |
347 | static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf, |
348 | unsigned int offset, size_t count) | |
349 | { | |
350 | unsigned long timeout, write_time; | |
351 | struct at24_client *at24_client; | |
352 | struct i2c_client *client; | |
353 | struct regmap *regmap; | |
354 | int ret; | |
355 | ||
356 | at24_client = at24_translate_offset(at24, &offset); | |
357 | regmap = at24_client->regmap; | |
358 | client = at24_client->client; | |
359 | count = at24_adjust_write_count(at24, offset, count); | |
360 | ||
ec3c2d51 | 361 | at24_loop_until_timeout(timeout, write_time) { |
8e5888e1 HK |
362 | ret = regmap_bulk_write(regmap, offset, buf, count); |
363 | dev_dbg(&client->dev, "write %zu@%d --> %d (%ld)\n", | |
364 | count, offset, ret, jiffies); | |
365 | if (!ret) | |
366 | return count; | |
367 | } | |
368 | ||
369 | return -ETIMEDOUT; | |
370 | } | |
371 | ||
d5bc0047 BG |
372 | static int at24_read(void *priv, unsigned int off, void *val, size_t count) |
373 | { | |
374 | struct at24_data *at24 = priv; | |
5c015258 | 375 | struct device *dev = &at24->client[0].client->dev; |
d5bc0047 | 376 | char *buf = val; |
98e82010 | 377 | int ret; |
d5bc0047 BG |
378 | |
379 | if (unlikely(!count)) | |
380 | return count; | |
381 | ||
d9bcd462 HK |
382 | if (off + count > at24->chip.byte_len) |
383 | return -EINVAL; | |
384 | ||
f9ecc83f | 385 | ret = pm_runtime_get_sync(dev); |
98e82010 | 386 | if (ret < 0) { |
f9ecc83f | 387 | pm_runtime_put_noidle(dev); |
98e82010 DM |
388 | return ret; |
389 | } | |
390 | ||
d5bc0047 BG |
391 | /* |
392 | * Read data from chip, protecting against concurrent updates | |
393 | * from this host, but not from other I2C masters. | |
394 | */ | |
395 | mutex_lock(&at24->lock); | |
396 | ||
397 | while (count) { | |
398 | int status; | |
399 | ||
4bb5c13c | 400 | status = at24_regmap_read(at24, buf, off, count); |
d5bc0047 BG |
401 | if (status < 0) { |
402 | mutex_unlock(&at24->lock); | |
f9ecc83f | 403 | pm_runtime_put(dev); |
d5bc0047 BG |
404 | return status; |
405 | } | |
406 | buf += status; | |
407 | off += status; | |
408 | count -= status; | |
409 | } | |
410 | ||
411 | mutex_unlock(&at24->lock); | |
412 | ||
f9ecc83f | 413 | pm_runtime_put(dev); |
98e82010 | 414 | |
d5bc0047 BG |
415 | return 0; |
416 | } | |
417 | ||
cf0361a2 | 418 | static int at24_write(void *priv, unsigned int off, void *val, size_t count) |
2b7a5056 | 419 | { |
cf0361a2 | 420 | struct at24_data *at24 = priv; |
5c015258 | 421 | struct device *dev = &at24->client[0].client->dev; |
cf0361a2 | 422 | char *buf = val; |
98e82010 | 423 | int ret; |
2b7a5056 | 424 | |
2b7a5056 | 425 | if (unlikely(!count)) |
cf0361a2 | 426 | return -EINVAL; |
2b7a5056 | 427 | |
d9bcd462 HK |
428 | if (off + count > at24->chip.byte_len) |
429 | return -EINVAL; | |
430 | ||
f9ecc83f | 431 | ret = pm_runtime_get_sync(dev); |
98e82010 | 432 | if (ret < 0) { |
f9ecc83f | 433 | pm_runtime_put_noidle(dev); |
98e82010 DM |
434 | return ret; |
435 | } | |
436 | ||
2b7a5056 WS |
437 | /* |
438 | * Write data to chip, protecting against concurrent updates | |
439 | * from this host, but not from other I2C masters. | |
440 | */ | |
441 | mutex_lock(&at24->lock); | |
6ce261e8 | 442 | gpiod_set_value_cansleep(at24->wp_gpio, 0); |
2b7a5056 WS |
443 | |
444 | while (count) { | |
cf0361a2 | 445 | int status; |
2b7a5056 | 446 | |
8e5888e1 | 447 | status = at24_regmap_write(at24, buf, off, count); |
cf0361a2 | 448 | if (status < 0) { |
6ce261e8 | 449 | gpiod_set_value_cansleep(at24->wp_gpio, 1); |
cf0361a2 | 450 | mutex_unlock(&at24->lock); |
f9ecc83f | 451 | pm_runtime_put(dev); |
cf0361a2 | 452 | return status; |
2b7a5056 WS |
453 | } |
454 | buf += status; | |
455 | off += status; | |
456 | count -= status; | |
2b7a5056 WS |
457 | } |
458 | ||
6ce261e8 | 459 | gpiod_set_value_cansleep(at24->wp_gpio, 1); |
2b7a5056 WS |
460 | mutex_unlock(&at24->lock); |
461 | ||
f9ecc83f | 462 | pm_runtime_put(dev); |
98e82010 | 463 | |
57d15550 AL |
464 | return 0; |
465 | } | |
466 | ||
dd905a61 | 467 | static void at24_get_pdata(struct device *dev, struct at24_platform_data *chip) |
9ed030d7 | 468 | { |
dd905a61 BG |
469 | int err; |
470 | u32 val; | |
471 | ||
472 | if (device_property_present(dev, "read-only")) | |
473 | chip->flags |= AT24_FLAG_READONLY; | |
e32213fb SVA |
474 | if (device_property_present(dev, "no-read-rollover")) |
475 | chip->flags |= AT24_FLAG_NO_RDROL; | |
dd905a61 | 476 | |
dbc1ab9c DM |
477 | err = device_property_read_u32(dev, "size", &val); |
478 | if (!err) | |
479 | chip->byte_len = val; | |
480 | ||
dd905a61 BG |
481 | err = device_property_read_u32(dev, "pagesize", &val); |
482 | if (!err) { | |
483 | chip->page_size = val; | |
484 | } else { | |
485 | /* | |
486 | * This is slow, but we can't know all eeproms, so we better | |
487 | * play safe. Specifying custom eeprom-types via platform_data | |
488 | * is recommended anyhow. | |
489 | */ | |
490 | chip->page_size = 1; | |
9ed030d7 WS |
491 | } |
492 | } | |
9ed030d7 | 493 | |
4bb5c13c HK |
494 | static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len) |
495 | { | |
496 | if (flags & AT24_FLAG_MAC) { | |
497 | /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */ | |
498 | return 0xa0 - byte_len; | |
499 | } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) { | |
500 | /* | |
501 | * For 16 bit address pointers, the word address must contain | |
502 | * a '10' sequence in bits 11 and 10 regardless of the | |
503 | * intended position of the address pointer. | |
504 | */ | |
505 | return 0x0800; | |
506 | } else if (flags & AT24_FLAG_SERIAL) { | |
507 | /* | |
508 | * Otherwise the word address must begin with a '10' sequence, | |
509 | * regardless of the intended address. | |
510 | */ | |
511 | return 0x0080; | |
512 | } else { | |
513 | return 0; | |
514 | } | |
515 | } | |
516 | ||
2b7a5056 WS |
517 | static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id) |
518 | { | |
b680f4fa SVA |
519 | struct at24_platform_data chip = { 0 }; |
520 | const struct at24_chip_data *cd = NULL; | |
2b7a5056 | 521 | bool writable; |
2b7a5056 WS |
522 | struct at24_data *at24; |
523 | int err; | |
aa4ce228 | 524 | unsigned int i, num_addresses; |
eef69398 | 525 | struct regmap_config regmap_config = { }; |
00f0ea70 | 526 | u8 test_byte; |
2b7a5056 WS |
527 | |
528 | if (client->dev.platform_data) { | |
529 | chip = *(struct at24_platform_data *)client->dev.platform_data; | |
530 | } else { | |
7f2a2f0d JMC |
531 | /* |
532 | * The I2C core allows OF nodes compatibles to match against the | |
533 | * I2C device ID table as a fallback, so check not only if an OF | |
534 | * node is present but also if it matches an OF device ID entry. | |
535 | */ | |
536 | if (client->dev.of_node && | |
537 | of_match_device(at24_of_match, &client->dev)) { | |
b680f4fa | 538 | cd = of_device_get_match_data(&client->dev); |
7f2a2f0d | 539 | } else if (id) { |
b680f4fa | 540 | cd = (void *)id->driver_data; |
40d8edc9 AS |
541 | } else { |
542 | const struct acpi_device_id *aid; | |
543 | ||
544 | aid = acpi_match_device(at24_acpi_ids, &client->dev); | |
545 | if (aid) | |
b680f4fa | 546 | cd = (void *)aid->driver_data; |
40d8edc9 | 547 | } |
b680f4fa | 548 | if (!cd) |
f0ac2363 NB |
549 | return -ENODEV; |
550 | ||
b680f4fa SVA |
551 | chip.byte_len = cd->byte_len; |
552 | chip.flags = cd->flags; | |
dd905a61 | 553 | at24_get_pdata(&client->dev, &chip); |
2b7a5056 WS |
554 | } |
555 | ||
556 | if (!is_power_of_2(chip.byte_len)) | |
557 | dev_warn(&client->dev, | |
558 | "byte_len looks suspicious (no power of 2)!\n"); | |
45efe847 WS |
559 | if (!chip.page_size) { |
560 | dev_err(&client->dev, "page_size must not be 0!\n"); | |
f0ac2363 | 561 | return -EINVAL; |
45efe847 | 562 | } |
2b7a5056 WS |
563 | if (!is_power_of_2(chip.page_size)) |
564 | dev_warn(&client->dev, | |
565 | "page_size looks suspicious (no power of 2)!\n"); | |
566 | ||
a23727cb HK |
567 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C) && |
568 | !i2c_check_functionality(client->adapter, | |
569 | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) | |
570 | chip.page_size = 1; | |
a839ce66 | 571 | |
2b7a5056 WS |
572 | if (chip.flags & AT24_FLAG_TAKE8ADDR) |
573 | num_addresses = 8; | |
574 | else | |
575 | num_addresses = DIV_ROUND_UP(chip.byte_len, | |
576 | (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256); | |
577 | ||
eef69398 BG |
578 | regmap_config.val_bits = 8; |
579 | regmap_config.reg_bits = (chip.flags & AT24_FLAG_ADDR16) ? 16 : 8; | |
d154316d | 580 | regmap_config.disable_locking = true; |
5c015258 | 581 | |
f0ac2363 | 582 | at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) + |
5c015258 | 583 | num_addresses * sizeof(struct at24_client), GFP_KERNEL); |
f0ac2363 NB |
584 | if (!at24) |
585 | return -ENOMEM; | |
2b7a5056 WS |
586 | |
587 | mutex_init(&at24->lock); | |
2b7a5056 WS |
588 | at24->chip = chip; |
589 | at24->num_addresses = num_addresses; | |
4bb5c13c | 590 | at24->offset_adj = at24_get_offset_adj(chip.flags, chip.byte_len); |
2b7a5056 | 591 | |
6ce261e8 BG |
592 | at24->wp_gpio = devm_gpiod_get_optional(&client->dev, |
593 | "wp", GPIOD_OUT_HIGH); | |
594 | if (IS_ERR(at24->wp_gpio)) | |
595 | return PTR_ERR(at24->wp_gpio); | |
596 | ||
5c015258 | 597 | at24->client[0].client = client; |
eef69398 | 598 | at24->client[0].regmap = devm_regmap_init_i2c(client, ®map_config); |
5c015258 HK |
599 | if (IS_ERR(at24->client[0].regmap)) |
600 | return PTR_ERR(at24->client[0].regmap); | |
601 | ||
0b813658 BG |
602 | if ((chip.flags & AT24_FLAG_SERIAL) && (chip.flags & AT24_FLAG_MAC)) { |
603 | dev_err(&client->dev, | |
604 | "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC."); | |
605 | return -EINVAL; | |
606 | } | |
607 | ||
2b7a5056 WS |
608 | writable = !(chip.flags & AT24_FLAG_READONLY); |
609 | if (writable) { | |
ec3c2d51 BG |
610 | at24->write_max = min_t(unsigned int, |
611 | chip.page_size, at24_io_limit); | |
a23727cb HK |
612 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C) && |
613 | at24->write_max > I2C_SMBUS_BLOCK_MAX) | |
614 | at24->write_max = I2C_SMBUS_BLOCK_MAX; | |
2b7a5056 WS |
615 | } |
616 | ||
2b7a5056 WS |
617 | /* use dummy devices for multiple-address chips */ |
618 | for (i = 1; i < num_addresses; i++) { | |
5c015258 HK |
619 | at24->client[i].client = i2c_new_dummy(client->adapter, |
620 | client->addr + i); | |
621 | if (!at24->client[i].client) { | |
2b7a5056 WS |
622 | dev_err(&client->dev, "address 0x%02x unavailable\n", |
623 | client->addr + i); | |
624 | err = -EADDRINUSE; | |
625 | goto err_clients; | |
626 | } | |
5c015258 | 627 | at24->client[i].regmap = devm_regmap_init_i2c( |
eef69398 BG |
628 | at24->client[i].client, |
629 | ®map_config); | |
5c015258 HK |
630 | if (IS_ERR(at24->client[i].regmap)) { |
631 | err = PTR_ERR(at24->client[i].regmap); | |
632 | goto err_clients; | |
633 | } | |
2b7a5056 WS |
634 | } |
635 | ||
00f0ea70 BG |
636 | i2c_set_clientdata(client, at24); |
637 | ||
98e82010 DM |
638 | /* enable runtime pm */ |
639 | pm_runtime_set_active(&client->dev); | |
640 | pm_runtime_enable(&client->dev); | |
641 | ||
00f0ea70 BG |
642 | /* |
643 | * Perform a one-byte test read to verify that the | |
644 | * chip is functional. | |
645 | */ | |
646 | err = at24_read(at24, 0, &test_byte, 1); | |
98e82010 | 647 | pm_runtime_idle(&client->dev); |
00f0ea70 BG |
648 | if (err) { |
649 | err = -ENODEV; | |
650 | goto err_clients; | |
651 | } | |
652 | ||
57d15550 AL |
653 | at24->nvmem_config.name = dev_name(&client->dev); |
654 | at24->nvmem_config.dev = &client->dev; | |
655 | at24->nvmem_config.read_only = !writable; | |
656 | at24->nvmem_config.root_only = true; | |
657 | at24->nvmem_config.owner = THIS_MODULE; | |
658 | at24->nvmem_config.compat = true; | |
659 | at24->nvmem_config.base_dev = &client->dev; | |
cf0361a2 SK |
660 | at24->nvmem_config.reg_read = at24_read; |
661 | at24->nvmem_config.reg_write = at24_write; | |
662 | at24->nvmem_config.priv = at24; | |
7f6d2ecd | 663 | at24->nvmem_config.stride = 1; |
cf0361a2 SK |
664 | at24->nvmem_config.word_size = 1; |
665 | at24->nvmem_config.size = chip.byte_len; | |
57d15550 AL |
666 | |
667 | at24->nvmem = nvmem_register(&at24->nvmem_config); | |
668 | ||
669 | if (IS_ERR(at24->nvmem)) { | |
670 | err = PTR_ERR(at24->nvmem); | |
671 | goto err_clients; | |
672 | } | |
2b7a5056 | 673 | |
57d15550 AL |
674 | dev_info(&client->dev, "%u byte %s EEPROM, %s, %u bytes/write\n", |
675 | chip.byte_len, client->name, | |
9ed030d7 | 676 | writable ? "writable" : "read-only", at24->write_max); |
2b7a5056 | 677 | |
7274ec8b KH |
678 | /* export data to kernel code */ |
679 | if (chip.setup) | |
bec3c11b | 680 | chip.setup(at24->nvmem, chip.context); |
7274ec8b | 681 | |
2b7a5056 WS |
682 | return 0; |
683 | ||
684 | err_clients: | |
685 | for (i = 1; i < num_addresses; i++) | |
5c015258 HK |
686 | if (at24->client[i].client) |
687 | i2c_unregister_device(at24->client[i].client); | |
2b7a5056 | 688 | |
98e82010 DM |
689 | pm_runtime_disable(&client->dev); |
690 | ||
2b7a5056 WS |
691 | return err; |
692 | } | |
693 | ||
486a5c28 | 694 | static int at24_remove(struct i2c_client *client) |
2b7a5056 WS |
695 | { |
696 | struct at24_data *at24; | |
697 | int i; | |
698 | ||
699 | at24 = i2c_get_clientdata(client); | |
57d15550 AL |
700 | |
701 | nvmem_unregister(at24->nvmem); | |
2b7a5056 WS |
702 | |
703 | for (i = 1; i < at24->num_addresses; i++) | |
5c015258 | 704 | i2c_unregister_device(at24->client[i].client); |
2b7a5056 | 705 | |
98e82010 DM |
706 | pm_runtime_disable(&client->dev); |
707 | pm_runtime_set_suspended(&client->dev); | |
708 | ||
2b7a5056 WS |
709 | return 0; |
710 | } | |
711 | ||
712 | /*-------------------------------------------------------------------------*/ | |
713 | ||
714 | static struct i2c_driver at24_driver = { | |
715 | .driver = { | |
716 | .name = "at24", | |
7f2a2f0d | 717 | .of_match_table = at24_of_match, |
40d8edc9 | 718 | .acpi_match_table = ACPI_PTR(at24_acpi_ids), |
2b7a5056 WS |
719 | }, |
720 | .probe = at24_probe, | |
2d6bed9c | 721 | .remove = at24_remove, |
2b7a5056 WS |
722 | .id_table = at24_ids, |
723 | }; | |
724 | ||
725 | static int __init at24_init(void) | |
726 | { | |
ec3c2d51 BG |
727 | if (!at24_io_limit) { |
728 | pr_err("at24: at24_io_limit must not be 0!\n"); | |
45efe847 WS |
729 | return -EINVAL; |
730 | } | |
731 | ||
ec3c2d51 | 732 | at24_io_limit = rounddown_pow_of_two(at24_io_limit); |
2b7a5056 WS |
733 | return i2c_add_driver(&at24_driver); |
734 | } | |
735 | module_init(at24_init); | |
736 | ||
737 | static void __exit at24_exit(void) | |
738 | { | |
739 | i2c_del_driver(&at24_driver); | |
740 | } | |
741 | module_exit(at24_exit); | |
742 | ||
743 | MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); | |
744 | MODULE_AUTHOR("David Brownell and Wolfram Sang"); | |
745 | MODULE_LICENSE("GPL"); |