Commit | Line | Data |
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567ec716 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
2b7a5056 WS |
2 | /* |
3 | * at24.c - handle most I2C EEPROMs | |
4 | * | |
5 | * Copyright (C) 2005-2007 David Brownell | |
6 | * Copyright (C) 2008 Wolfram Sang, Pengutronix | |
2b7a5056 | 7 | */ |
4ac0d3fb | 8 | |
69afc4b6 BG |
9 | #include <linux/acpi.h> |
10 | #include <linux/bitops.h> | |
a4423ced | 11 | #include <linux/capability.h> |
69afc4b6 | 12 | #include <linux/delay.h> |
69afc4b6 | 13 | #include <linux/i2c.h> |
2b7a5056 | 14 | #include <linux/init.h> |
69afc4b6 BG |
15 | #include <linux/jiffies.h> |
16 | #include <linux/kernel.h> | |
17 | #include <linux/mod_devicetable.h> | |
2b7a5056 | 18 | #include <linux/module.h> |
2b7a5056 | 19 | #include <linux/mutex.h> |
57d15550 | 20 | #include <linux/nvmem-provider.h> |
69afc4b6 | 21 | #include <linux/of_device.h> |
98e82010 | 22 | #include <linux/pm_runtime.h> |
69afc4b6 BG |
23 | #include <linux/property.h> |
24 | #include <linux/regmap.h> | |
cd5676db | 25 | #include <linux/regulator/consumer.h> |
69afc4b6 | 26 | #include <linux/slab.h> |
2b7a5056 | 27 | |
4fa882c9 BG |
28 | /* Address pointer is 16 bit. */ |
29 | #define AT24_FLAG_ADDR16 BIT(7) | |
30 | /* sysfs-entry will be read-only. */ | |
31 | #define AT24_FLAG_READONLY BIT(6) | |
32 | /* sysfs-entry will be world-readable. */ | |
33 | #define AT24_FLAG_IRUGO BIT(5) | |
34 | /* Take always 8 addresses (24c00). */ | |
35 | #define AT24_FLAG_TAKE8ADDR BIT(4) | |
36 | /* Factory-programmed serial number. */ | |
37 | #define AT24_FLAG_SERIAL BIT(3) | |
38 | /* Factory-programmed mac address. */ | |
39 | #define AT24_FLAG_MAC BIT(2) | |
40 | /* Does not auto-rollover reads to the next slave address. */ | |
41 | #define AT24_FLAG_NO_RDROL BIT(1) | |
42 | ||
2b7a5056 WS |
43 | /* |
44 | * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. | |
45 | * Differences between different vendor product lines (like Atmel AT24C or | |
46 | * MicroChip 24LC, etc) won't much matter for typical read/write access. | |
47 | * There are also I2C RAM chips, likewise interchangeable. One example | |
48 | * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). | |
49 | * | |
50 | * However, misconfiguration can lose data. "Set 16-bit memory address" | |
51 | * to a part with 8-bit addressing will overwrite data. Writing with too | |
52 | * big a page size also loses data. And it's not safe to assume that the | |
53 | * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC | |
54 | * uses 0x51, for just one example. | |
55 | * | |
56 | * Accordingly, explicit board-specific configuration data should be used | |
57 | * in almost all cases. (One partial exception is an SMBus used to access | |
58 | * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) | |
59 | * | |
60 | * So this driver uses "new style" I2C driver binding, expecting to be | |
61 | * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or | |
62 | * similar kernel-resident tables; or, configuration data coming from | |
63 | * a bootloader. | |
64 | * | |
65 | * Other than binding model, current differences from "eeprom" driver are | |
66 | * that this one handles write access and isn't restricted to 24c02 devices. | |
67 | * It also handles larger devices (32 kbit and up) with two-byte addresses, | |
68 | * which won't work on pure SMBus systems. | |
69 | */ | |
70 | ||
5c015258 HK |
71 | struct at24_client { |
72 | struct i2c_client *client; | |
73 | struct regmap *regmap; | |
74 | }; | |
75 | ||
2b7a5056 | 76 | struct at24_data { |
2b7a5056 WS |
77 | /* |
78 | * Lock protects against activities from other Linux tasks, | |
79 | * but not from changes by other I2C masters. | |
80 | */ | |
81 | struct mutex lock; | |
2b7a5056 | 82 | |
aa4ce228 BG |
83 | unsigned int write_max; |
84 | unsigned int num_addresses; | |
4bb5c13c | 85 | unsigned int offset_adj; |
2b7a5056 | 86 | |
7c280664 BG |
87 | u32 byte_len; |
88 | u16 page_size; | |
89 | u8 flags; | |
90 | ||
57d15550 | 91 | struct nvmem_device *nvmem; |
cd5676db | 92 | struct regulator *vcc_reg; |
a4423ced | 93 | void (*read_post)(unsigned int off, char *buf, size_t count); |
57d15550 | 94 | |
2b7a5056 WS |
95 | /* |
96 | * Some chips tie up multiple I2C addresses; dummy devices reserve | |
97 | * them for us, and we'll use them with SMBus calls. | |
98 | */ | |
5c015258 | 99 | struct at24_client client[]; |
2b7a5056 WS |
100 | }; |
101 | ||
102 | /* | |
103 | * This parameter is to help this driver avoid blocking other drivers out | |
104 | * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C | |
105 | * clock, one 256 byte read takes about 1/43 second which is excessive; | |
106 | * but the 1/170 second it takes at 400 kHz may be quite reasonable; and | |
107 | * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. | |
108 | * | |
109 | * This value is forced to be a power of two so that writes align on pages. | |
110 | */ | |
ec3c2d51 BG |
111 | static unsigned int at24_io_limit = 128; |
112 | module_param_named(io_limit, at24_io_limit, uint, 0); | |
113 | MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)"); | |
2b7a5056 WS |
114 | |
115 | /* | |
116 | * Specs often allow 5 msec for a page write, sometimes 20 msec; | |
117 | * it's important to recover from write timeouts. | |
118 | */ | |
ec3c2d51 BG |
119 | static unsigned int at24_write_timeout = 25; |
120 | module_param_named(write_timeout, at24_write_timeout, uint, 0); | |
121 | MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)"); | |
2b7a5056 | 122 | |
b680f4fa | 123 | struct at24_chip_data { |
b680f4fa SVA |
124 | u32 byte_len; |
125 | u8 flags; | |
a4423ced | 126 | void (*read_post)(unsigned int off, char *buf, size_t count); |
b680f4fa SVA |
127 | }; |
128 | ||
129 | #define AT24_CHIP_DATA(_name, _len, _flags) \ | |
130 | static const struct at24_chip_data _name = { \ | |
131 | .byte_len = _len, .flags = _flags, \ | |
132 | } | |
133 | ||
a4423ced JD |
134 | #define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post) \ |
135 | static const struct at24_chip_data _name = { \ | |
136 | .byte_len = _len, .flags = _flags, \ | |
137 | .read_post = _read_post, \ | |
138 | } | |
139 | ||
140 | static void at24_read_post_vaio(unsigned int off, char *buf, size_t count) | |
141 | { | |
142 | int i; | |
143 | ||
144 | if (capable(CAP_SYS_ADMIN)) | |
145 | return; | |
146 | ||
147 | /* | |
148 | * Hide VAIO private settings to regular users: | |
149 | * - BIOS passwords: bytes 0x00 to 0x0f | |
150 | * - UUID: bytes 0x10 to 0x1f | |
151 | * - Serial number: 0xc0 to 0xdf | |
152 | */ | |
153 | for (i = 0; i < count; i++) { | |
154 | if ((off + i <= 0x1f) || | |
155 | (off + i >= 0xc0 && off + i <= 0xdf)) | |
156 | buf[i] = 0; | |
157 | } | |
158 | } | |
159 | ||
b680f4fa SVA |
160 | /* needs 8 addresses as A0-A2 are ignored */ |
161 | AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR); | |
162 | /* old variants can't be handled with this generic entry! */ | |
163 | AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0); | |
164 | AT24_CHIP_DATA(at24_data_24cs01, 16, | |
165 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
166 | AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0); | |
167 | AT24_CHIP_DATA(at24_data_24cs02, 16, | |
168 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
169 | AT24_CHIP_DATA(at24_data_24mac402, 48 / 8, | |
170 | AT24_FLAG_MAC | AT24_FLAG_READONLY); | |
171 | AT24_CHIP_DATA(at24_data_24mac602, 64 / 8, | |
172 | AT24_FLAG_MAC | AT24_FLAG_READONLY); | |
173 | /* spd is a 24c02 in memory DIMMs */ | |
174 | AT24_CHIP_DATA(at24_data_spd, 2048 / 8, | |
175 | AT24_FLAG_READONLY | AT24_FLAG_IRUGO); | |
a4423ced JD |
176 | /* 24c02_vaio is a 24c02 on some Sony laptops */ |
177 | AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8, | |
178 | AT24_FLAG_READONLY | AT24_FLAG_IRUGO, | |
179 | at24_read_post_vaio); | |
b680f4fa SVA |
180 | AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0); |
181 | AT24_CHIP_DATA(at24_data_24cs04, 16, | |
182 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
183 | /* 24rf08 quirk is handled at i2c-core */ | |
184 | AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0); | |
185 | AT24_CHIP_DATA(at24_data_24cs08, 16, | |
186 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
187 | AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0); | |
188 | AT24_CHIP_DATA(at24_data_24cs16, 16, | |
189 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
190 | AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16); | |
191 | AT24_CHIP_DATA(at24_data_24cs32, 16, | |
192 | AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
193 | AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16); | |
194 | AT24_CHIP_DATA(at24_data_24cs64, 16, | |
195 | AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); | |
196 | AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16); | |
197 | AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16); | |
198 | AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16); | |
199 | AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16); | |
37cf28d3 | 200 | AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16); |
b680f4fa SVA |
201 | /* identical to 24c08 ? */ |
202 | AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0); | |
203 | ||
2b7a5056 | 204 | static const struct i2c_device_id at24_ids[] = { |
b680f4fa SVA |
205 | { "24c00", (kernel_ulong_t)&at24_data_24c00 }, |
206 | { "24c01", (kernel_ulong_t)&at24_data_24c01 }, | |
207 | { "24cs01", (kernel_ulong_t)&at24_data_24cs01 }, | |
208 | { "24c02", (kernel_ulong_t)&at24_data_24c02 }, | |
209 | { "24cs02", (kernel_ulong_t)&at24_data_24cs02 }, | |
210 | { "24mac402", (kernel_ulong_t)&at24_data_24mac402 }, | |
211 | { "24mac602", (kernel_ulong_t)&at24_data_24mac602 }, | |
212 | { "spd", (kernel_ulong_t)&at24_data_spd }, | |
a4423ced | 213 | { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio }, |
b680f4fa SVA |
214 | { "24c04", (kernel_ulong_t)&at24_data_24c04 }, |
215 | { "24cs04", (kernel_ulong_t)&at24_data_24cs04 }, | |
216 | { "24c08", (kernel_ulong_t)&at24_data_24c08 }, | |
217 | { "24cs08", (kernel_ulong_t)&at24_data_24cs08 }, | |
218 | { "24c16", (kernel_ulong_t)&at24_data_24c16 }, | |
219 | { "24cs16", (kernel_ulong_t)&at24_data_24cs16 }, | |
220 | { "24c32", (kernel_ulong_t)&at24_data_24c32 }, | |
221 | { "24cs32", (kernel_ulong_t)&at24_data_24cs32 }, | |
222 | { "24c64", (kernel_ulong_t)&at24_data_24c64 }, | |
223 | { "24cs64", (kernel_ulong_t)&at24_data_24cs64 }, | |
224 | { "24c128", (kernel_ulong_t)&at24_data_24c128 }, | |
225 | { "24c256", (kernel_ulong_t)&at24_data_24c256 }, | |
226 | { "24c512", (kernel_ulong_t)&at24_data_24c512 }, | |
227 | { "24c1024", (kernel_ulong_t)&at24_data_24c1024 }, | |
37cf28d3 | 228 | { "24c2048", (kernel_ulong_t)&at24_data_24c2048 }, |
b680f4fa | 229 | { "at24", 0 }, |
2b7a5056 WS |
230 | { /* END OF LIST */ } |
231 | }; | |
232 | MODULE_DEVICE_TABLE(i2c, at24_ids); | |
233 | ||
7f2a2f0d | 234 | static const struct of_device_id at24_of_match[] = { |
b680f4fa SVA |
235 | { .compatible = "atmel,24c00", .data = &at24_data_24c00 }, |
236 | { .compatible = "atmel,24c01", .data = &at24_data_24c01 }, | |
0f30aca7 | 237 | { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 }, |
b680f4fa | 238 | { .compatible = "atmel,24c02", .data = &at24_data_24c02 }, |
0f30aca7 BG |
239 | { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 }, |
240 | { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 }, | |
241 | { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 }, | |
b680f4fa SVA |
242 | { .compatible = "atmel,spd", .data = &at24_data_spd }, |
243 | { .compatible = "atmel,24c04", .data = &at24_data_24c04 }, | |
0f30aca7 | 244 | { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 }, |
b680f4fa | 245 | { .compatible = "atmel,24c08", .data = &at24_data_24c08 }, |
0f30aca7 | 246 | { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 }, |
b680f4fa | 247 | { .compatible = "atmel,24c16", .data = &at24_data_24c16 }, |
0f30aca7 | 248 | { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 }, |
b680f4fa | 249 | { .compatible = "atmel,24c32", .data = &at24_data_24c32 }, |
0f30aca7 | 250 | { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 }, |
b680f4fa | 251 | { .compatible = "atmel,24c64", .data = &at24_data_24c64 }, |
0f30aca7 | 252 | { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 }, |
b680f4fa SVA |
253 | { .compatible = "atmel,24c128", .data = &at24_data_24c128 }, |
254 | { .compatible = "atmel,24c256", .data = &at24_data_24c256 }, | |
255 | { .compatible = "atmel,24c512", .data = &at24_data_24c512 }, | |
256 | { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 }, | |
37cf28d3 | 257 | { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 }, |
b680f4fa | 258 | { /* END OF LIST */ }, |
7f2a2f0d JMC |
259 | }; |
260 | MODULE_DEVICE_TABLE(of, at24_of_match); | |
261 | ||
8965930c | 262 | static const struct acpi_device_id __maybe_unused at24_acpi_ids[] = { |
b680f4fa | 263 | { "INT3499", (kernel_ulong_t)&at24_data_INT3499 }, |
4837621c | 264 | { "TPF0001", (kernel_ulong_t)&at24_data_24c1024 }, |
b680f4fa | 265 | { /* END OF LIST */ } |
40d8edc9 AS |
266 | }; |
267 | MODULE_DEVICE_TABLE(acpi, at24_acpi_ids); | |
268 | ||
2b7a5056 WS |
269 | /* |
270 | * This routine supports chips which consume multiple I2C addresses. It | |
271 | * computes the addressing information to be used for a given r/w request. | |
272 | * Assumes that sanity checks for offset happened at sysfs-layer. | |
9afd6866 BG |
273 | * |
274 | * Slave address and byte offset derive from the offset. Always | |
275 | * set the byte address; on a multi-master board, another master | |
276 | * may have changed the chip's "current" address pointer. | |
2b7a5056 | 277 | */ |
46049486 HK |
278 | static struct at24_client *at24_translate_offset(struct at24_data *at24, |
279 | unsigned int *offset) | |
2b7a5056 | 280 | { |
aa4ce228 | 281 | unsigned int i; |
2b7a5056 | 282 | |
7c280664 | 283 | if (at24->flags & AT24_FLAG_ADDR16) { |
2b7a5056 WS |
284 | i = *offset >> 16; |
285 | *offset &= 0xffff; | |
286 | } else { | |
287 | i = *offset >> 8; | |
288 | *offset &= 0xff; | |
289 | } | |
290 | ||
46049486 | 291 | return &at24->client[i]; |
2b7a5056 WS |
292 | } |
293 | ||
f1a640c5 BG |
294 | static struct device *at24_base_client_dev(struct at24_data *at24) |
295 | { | |
296 | return &at24->client[0].client->dev; | |
297 | } | |
298 | ||
e32213fb SVA |
299 | static size_t at24_adjust_read_count(struct at24_data *at24, |
300 | unsigned int offset, size_t count) | |
301 | { | |
302 | unsigned int bits; | |
303 | size_t remainder; | |
304 | ||
305 | /* | |
306 | * In case of multi-address chips that don't rollover reads to | |
307 | * the next slave address: truncate the count to the slave boundary, | |
308 | * so that the read never straddles slaves. | |
309 | */ | |
7c280664 BG |
310 | if (at24->flags & AT24_FLAG_NO_RDROL) { |
311 | bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8; | |
e32213fb SVA |
312 | remainder = BIT(bits) - offset; |
313 | if (count > remainder) | |
314 | count = remainder; | |
315 | } | |
316 | ||
ec3c2d51 BG |
317 | if (count > at24_io_limit) |
318 | count = at24_io_limit; | |
e32213fb SVA |
319 | |
320 | return count; | |
321 | } | |
322 | ||
4bb5c13c HK |
323 | static ssize_t at24_regmap_read(struct at24_data *at24, char *buf, |
324 | unsigned int offset, size_t count) | |
325 | { | |
326 | unsigned long timeout, read_time; | |
327 | struct at24_client *at24_client; | |
328 | struct i2c_client *client; | |
329 | struct regmap *regmap; | |
330 | int ret; | |
331 | ||
332 | at24_client = at24_translate_offset(at24, &offset); | |
333 | regmap = at24_client->regmap; | |
334 | client = at24_client->client; | |
e32213fb | 335 | count = at24_adjust_read_count(at24, offset, count); |
4bb5c13c HK |
336 | |
337 | /* adjust offset for mac and serial read ops */ | |
338 | offset += at24->offset_adj; | |
339 | ||
9a9e295e WX |
340 | timeout = jiffies + msecs_to_jiffies(at24_write_timeout); |
341 | do { | |
342 | /* | |
343 | * The timestamp shall be taken before the actual operation | |
344 | * to avoid a premature timeout in case of high CPU load. | |
345 | */ | |
346 | read_time = jiffies; | |
347 | ||
4bb5c13c HK |
348 | ret = regmap_bulk_read(regmap, offset, buf, count); |
349 | dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", | |
350 | count, offset, ret, jiffies); | |
351 | if (!ret) | |
352 | return count; | |
9a9e295e WX |
353 | |
354 | usleep_range(1000, 1500); | |
355 | } while (time_before(read_time, timeout)); | |
4bb5c13c HK |
356 | |
357 | return -ETIMEDOUT; | |
358 | } | |
359 | ||
2b7a5056 WS |
360 | /* |
361 | * Note that if the hardware write-protect pin is pulled high, the whole | |
362 | * chip is normally write protected. But there are plenty of product | |
363 | * variants here, including OTP fuses and partial chip protect. | |
364 | * | |
cd0c8615 BG |
365 | * We only use page mode writes; the alternative is sloooow. These routines |
366 | * write at most one page. | |
2b7a5056 | 367 | */ |
cd0c8615 BG |
368 | |
369 | static size_t at24_adjust_write_count(struct at24_data *at24, | |
370 | unsigned int offset, size_t count) | |
2b7a5056 | 371 | { |
aa4ce228 | 372 | unsigned int next_page; |
2b7a5056 | 373 | |
2b7a5056 WS |
374 | /* write_max is at most a page */ |
375 | if (count > at24->write_max) | |
376 | count = at24->write_max; | |
377 | ||
378 | /* Never roll over backwards, to the start of this page */ | |
7c280664 | 379 | next_page = roundup(offset + 1, at24->page_size); |
2b7a5056 WS |
380 | if (offset + count > next_page) |
381 | count = next_page - offset; | |
382 | ||
cd0c8615 BG |
383 | return count; |
384 | } | |
385 | ||
8e5888e1 HK |
386 | static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf, |
387 | unsigned int offset, size_t count) | |
388 | { | |
389 | unsigned long timeout, write_time; | |
390 | struct at24_client *at24_client; | |
391 | struct i2c_client *client; | |
392 | struct regmap *regmap; | |
393 | int ret; | |
394 | ||
395 | at24_client = at24_translate_offset(at24, &offset); | |
396 | regmap = at24_client->regmap; | |
397 | client = at24_client->client; | |
398 | count = at24_adjust_write_count(at24, offset, count); | |
9a9e295e WX |
399 | timeout = jiffies + msecs_to_jiffies(at24_write_timeout); |
400 | ||
401 | do { | |
402 | /* | |
403 | * The timestamp shall be taken before the actual operation | |
404 | * to avoid a premature timeout in case of high CPU load. | |
405 | */ | |
406 | write_time = jiffies; | |
8e5888e1 | 407 | |
8e5888e1 HK |
408 | ret = regmap_bulk_write(regmap, offset, buf, count); |
409 | dev_dbg(&client->dev, "write %zu@%d --> %d (%ld)\n", | |
410 | count, offset, ret, jiffies); | |
411 | if (!ret) | |
412 | return count; | |
9a9e295e WX |
413 | |
414 | usleep_range(1000, 1500); | |
415 | } while (time_before(write_time, timeout)); | |
8e5888e1 HK |
416 | |
417 | return -ETIMEDOUT; | |
418 | } | |
419 | ||
d5bc0047 BG |
420 | static int at24_read(void *priv, unsigned int off, void *val, size_t count) |
421 | { | |
5ca2b5b7 BG |
422 | struct at24_data *at24; |
423 | struct device *dev; | |
d5bc0047 | 424 | char *buf = val; |
99363d1c | 425 | int i, ret; |
d5bc0047 | 426 | |
5ca2b5b7 | 427 | at24 = priv; |
f1a640c5 | 428 | dev = at24_base_client_dev(at24); |
5ca2b5b7 | 429 | |
d5bc0047 BG |
430 | if (unlikely(!count)) |
431 | return count; | |
432 | ||
7c280664 | 433 | if (off + count > at24->byte_len) |
d9bcd462 HK |
434 | return -EINVAL; |
435 | ||
f9ecc83f | 436 | ret = pm_runtime_get_sync(dev); |
98e82010 | 437 | if (ret < 0) { |
f9ecc83f | 438 | pm_runtime_put_noidle(dev); |
98e82010 DM |
439 | return ret; |
440 | } | |
441 | ||
d5bc0047 BG |
442 | /* |
443 | * Read data from chip, protecting against concurrent updates | |
444 | * from this host, but not from other I2C masters. | |
445 | */ | |
446 | mutex_lock(&at24->lock); | |
447 | ||
99363d1c JD |
448 | for (i = 0; count; i += ret, count -= ret) { |
449 | ret = at24_regmap_read(at24, buf + i, off + i, count); | |
eb27fde2 | 450 | if (ret < 0) { |
d5bc0047 | 451 | mutex_unlock(&at24->lock); |
f9ecc83f | 452 | pm_runtime_put(dev); |
eb27fde2 | 453 | return ret; |
d5bc0047 | 454 | } |
d5bc0047 BG |
455 | } |
456 | ||
457 | mutex_unlock(&at24->lock); | |
458 | ||
f9ecc83f | 459 | pm_runtime_put(dev); |
98e82010 | 460 | |
a4423ced | 461 | if (unlikely(at24->read_post)) |
99363d1c | 462 | at24->read_post(off, buf, i); |
a4423ced | 463 | |
d5bc0047 BG |
464 | return 0; |
465 | } | |
466 | ||
cf0361a2 | 467 | static int at24_write(void *priv, unsigned int off, void *val, size_t count) |
2b7a5056 | 468 | { |
5ca2b5b7 BG |
469 | struct at24_data *at24; |
470 | struct device *dev; | |
cf0361a2 | 471 | char *buf = val; |
98e82010 | 472 | int ret; |
2b7a5056 | 473 | |
5ca2b5b7 | 474 | at24 = priv; |
f1a640c5 | 475 | dev = at24_base_client_dev(at24); |
5ca2b5b7 | 476 | |
2b7a5056 | 477 | if (unlikely(!count)) |
cf0361a2 | 478 | return -EINVAL; |
2b7a5056 | 479 | |
7c280664 | 480 | if (off + count > at24->byte_len) |
d9bcd462 HK |
481 | return -EINVAL; |
482 | ||
f9ecc83f | 483 | ret = pm_runtime_get_sync(dev); |
98e82010 | 484 | if (ret < 0) { |
f9ecc83f | 485 | pm_runtime_put_noidle(dev); |
98e82010 DM |
486 | return ret; |
487 | } | |
488 | ||
2b7a5056 WS |
489 | /* |
490 | * Write data to chip, protecting against concurrent updates | |
491 | * from this host, but not from other I2C masters. | |
492 | */ | |
493 | mutex_lock(&at24->lock); | |
494 | ||
495 | while (count) { | |
c4fee330 BG |
496 | ret = at24_regmap_write(at24, buf, off, count); |
497 | if (ret < 0) { | |
cf0361a2 | 498 | mutex_unlock(&at24->lock); |
f9ecc83f | 499 | pm_runtime_put(dev); |
c4fee330 | 500 | return ret; |
2b7a5056 | 501 | } |
c4fee330 BG |
502 | buf += ret; |
503 | off += ret; | |
504 | count -= ret; | |
2b7a5056 WS |
505 | } |
506 | ||
507 | mutex_unlock(&at24->lock); | |
508 | ||
f9ecc83f | 509 | pm_runtime_put(dev); |
98e82010 | 510 | |
57d15550 AL |
511 | return 0; |
512 | } | |
513 | ||
4fa882c9 | 514 | static const struct at24_chip_data *at24_get_chip_data(struct device *dev) |
feb2f19b BG |
515 | { |
516 | struct device_node *of_node = dev->of_node; | |
517 | const struct at24_chip_data *cdata; | |
518 | const struct i2c_device_id *id; | |
feb2f19b BG |
519 | |
520 | id = i2c_match_id(at24_ids, to_i2c_client(dev)); | |
521 | ||
522 | /* | |
523 | * The I2C core allows OF nodes compatibles to match against the | |
524 | * I2C device ID table as a fallback, so check not only if an OF | |
525 | * node is present but also if it matches an OF device ID entry. | |
526 | */ | |
527 | if (of_node && of_match_device(at24_of_match, dev)) | |
528 | cdata = of_device_get_match_data(dev); | |
529 | else if (id) | |
5fa4d14e | 530 | cdata = (void *)id->driver_data; |
feb2f19b BG |
531 | else |
532 | cdata = acpi_device_get_match_data(dev); | |
533 | ||
534 | if (!cdata) | |
4fa882c9 | 535 | return ERR_PTR(-ENODEV); |
feb2f19b | 536 | |
4fa882c9 | 537 | return cdata; |
feb2f19b BG |
538 | } |
539 | ||
73b0d922 BG |
540 | static int at24_make_dummy_client(struct at24_data *at24, unsigned int index, |
541 | struct regmap_config *regmap_config) | |
542 | { | |
543 | struct i2c_client *base_client, *dummy_client; | |
73b0d922 BG |
544 | struct regmap *regmap; |
545 | struct device *dev; | |
546 | ||
547 | base_client = at24->client[0].client; | |
548 | dev = &base_client->dev; | |
73b0d922 | 549 | |
e7308628 BG |
550 | dummy_client = devm_i2c_new_dummy_device(dev, base_client->adapter, |
551 | base_client->addr + index); | |
552 | if (IS_ERR(dummy_client)) | |
553 | return PTR_ERR(dummy_client); | |
73b0d922 BG |
554 | |
555 | regmap = devm_regmap_init_i2c(dummy_client, regmap_config); | |
e7308628 | 556 | if (IS_ERR(regmap)) |
73b0d922 | 557 | return PTR_ERR(regmap); |
73b0d922 BG |
558 | |
559 | at24->client[index].client = dummy_client; | |
560 | at24->client[index].regmap = regmap; | |
561 | ||
562 | return 0; | |
563 | } | |
564 | ||
4bb5c13c HK |
565 | static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len) |
566 | { | |
567 | if (flags & AT24_FLAG_MAC) { | |
568 | /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */ | |
569 | return 0xa0 - byte_len; | |
570 | } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) { | |
571 | /* | |
572 | * For 16 bit address pointers, the word address must contain | |
573 | * a '10' sequence in bits 11 and 10 regardless of the | |
574 | * intended position of the address pointer. | |
575 | */ | |
576 | return 0x0800; | |
577 | } else if (flags & AT24_FLAG_SERIAL) { | |
578 | /* | |
579 | * Otherwise the word address must begin with a '10' sequence, | |
580 | * regardless of the intended address. | |
581 | */ | |
582 | return 0x0080; | |
583 | } else { | |
584 | return 0; | |
585 | } | |
586 | } | |
587 | ||
48b6a7d1 | 588 | static int at24_probe(struct i2c_client *client) |
2b7a5056 | 589 | { |
eef69398 | 590 | struct regmap_config regmap_config = { }; |
8cdc4e7e | 591 | struct nvmem_config nvmem_config = { }; |
4fa882c9 BG |
592 | u32 byte_len, page_size, flags, addrw; |
593 | const struct at24_chip_data *cdata; | |
021c7d7b | 594 | struct device *dev = &client->dev; |
34d43faf | 595 | bool i2c_fn_i2c, i2c_fn_block; |
5ca2b5b7 BG |
596 | unsigned int i, num_addresses; |
597 | struct at24_data *at24; | |
551a1266 | 598 | struct regmap *regmap; |
5ca2b5b7 | 599 | bool writable; |
00f0ea70 | 600 | u8 test_byte; |
5ca2b5b7 | 601 | int err; |
2b7a5056 | 602 | |
34d43faf BG |
603 | i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C); |
604 | i2c_fn_block = i2c_check_functionality(client->adapter, | |
605 | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK); | |
606 | ||
4fa882c9 BG |
607 | cdata = at24_get_chip_data(dev); |
608 | if (IS_ERR(cdata)) | |
609 | return PTR_ERR(cdata); | |
610 | ||
611 | err = device_property_read_u32(dev, "pagesize", &page_size); | |
feb2f19b | 612 | if (err) |
4fa882c9 BG |
613 | /* |
614 | * This is slow, but we can't know all eeproms, so we better | |
dce91ba3 BG |
615 | * play safe. Specifying custom eeprom-types via device tree |
616 | * or properties is recommended anyhow. | |
4fa882c9 BG |
617 | */ |
618 | page_size = 1; | |
619 | ||
620 | flags = cdata->flags; | |
621 | if (device_property_present(dev, "read-only")) | |
622 | flags |= AT24_FLAG_READONLY; | |
623 | if (device_property_present(dev, "no-read-rollover")) | |
624 | flags |= AT24_FLAG_NO_RDROL; | |
625 | ||
626 | err = device_property_read_u32(dev, "address-width", &addrw); | |
627 | if (!err) { | |
628 | switch (addrw) { | |
629 | case 8: | |
630 | if (flags & AT24_FLAG_ADDR16) | |
631 | dev_warn(dev, | |
632 | "Override address width to be 8, while default is 16\n"); | |
633 | flags &= ~AT24_FLAG_ADDR16; | |
634 | break; | |
635 | case 16: | |
636 | flags |= AT24_FLAG_ADDR16; | |
637 | break; | |
638 | default: | |
639 | dev_warn(dev, "Bad \"address-width\" property: %u\n", | |
640 | addrw); | |
641 | } | |
642 | } | |
643 | ||
644 | err = device_property_read_u32(dev, "size", &byte_len); | |
645 | if (err) | |
646 | byte_len = cdata->byte_len; | |
2b7a5056 | 647 | |
34d43faf | 648 | if (!i2c_fn_i2c && !i2c_fn_block) |
4fa882c9 | 649 | page_size = 1; |
551a1266 | 650 | |
4fa882c9 | 651 | if (!page_size) { |
021c7d7b | 652 | dev_err(dev, "page_size must not be 0!\n"); |
f0ac2363 | 653 | return -EINVAL; |
45efe847 | 654 | } |
de5db101 | 655 | |
4fa882c9 | 656 | if (!is_power_of_2(page_size)) |
021c7d7b | 657 | dev_warn(dev, "page_size looks suspicious (no power of 2)!\n"); |
2b7a5056 | 658 | |
950bcbbe BG |
659 | err = device_property_read_u32(dev, "num-addresses", &num_addresses); |
660 | if (err) { | |
661 | if (flags & AT24_FLAG_TAKE8ADDR) | |
662 | num_addresses = 8; | |
663 | else | |
664 | num_addresses = DIV_ROUND_UP(byte_len, | |
665 | (flags & AT24_FLAG_ADDR16) ? 65536 : 256); | |
666 | } | |
2b7a5056 | 667 | |
4fa882c9 | 668 | if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) { |
551a1266 BG |
669 | dev_err(dev, |
670 | "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC."); | |
671 | return -EINVAL; | |
672 | } | |
673 | ||
eef69398 | 674 | regmap_config.val_bits = 8; |
4fa882c9 | 675 | regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8; |
d154316d | 676 | regmap_config.disable_locking = true; |
5c015258 | 677 | |
551a1266 BG |
678 | regmap = devm_regmap_init_i2c(client, ®map_config); |
679 | if (IS_ERR(regmap)) | |
680 | return PTR_ERR(regmap); | |
681 | ||
9ae9d9bf GS |
682 | at24 = devm_kzalloc(dev, struct_size(at24, client, num_addresses), |
683 | GFP_KERNEL); | |
f0ac2363 NB |
684 | if (!at24) |
685 | return -ENOMEM; | |
2b7a5056 WS |
686 | |
687 | mutex_init(&at24->lock); | |
4fa882c9 BG |
688 | at24->byte_len = byte_len; |
689 | at24->page_size = page_size; | |
690 | at24->flags = flags; | |
a4423ced | 691 | at24->read_post = cdata->read_post; |
2b7a5056 | 692 | at24->num_addresses = num_addresses; |
4fa882c9 | 693 | at24->offset_adj = at24_get_offset_adj(flags, byte_len); |
551a1266 BG |
694 | at24->client[0].client = client; |
695 | at24->client[0].regmap = regmap; | |
2b7a5056 | 696 | |
cd5676db BH |
697 | at24->vcc_reg = devm_regulator_get(dev, "vcc"); |
698 | if (IS_ERR(at24->vcc_reg)) | |
699 | return PTR_ERR(at24->vcc_reg); | |
6ce261e8 | 700 | |
4fa882c9 | 701 | writable = !(flags & AT24_FLAG_READONLY); |
2b7a5056 | 702 | if (writable) { |
ec3c2d51 | 703 | at24->write_max = min_t(unsigned int, |
4fa882c9 | 704 | page_size, at24_io_limit); |
34d43faf | 705 | if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX) |
a23727cb | 706 | at24->write_max = I2C_SMBUS_BLOCK_MAX; |
2b7a5056 WS |
707 | } |
708 | ||
2b7a5056 WS |
709 | /* use dummy devices for multiple-address chips */ |
710 | for (i = 1; i < num_addresses; i++) { | |
73b0d922 | 711 | err = at24_make_dummy_client(at24, i, ®map_config); |
e7308628 | 712 | if (err) |
73b0d922 | 713 | return err; |
2b7a5056 WS |
714 | } |
715 | ||
774b9f43 | 716 | nvmem_config.type = NVMEM_TYPE_EEPROM; |
021c7d7b BG |
717 | nvmem_config.name = dev_name(dev); |
718 | nvmem_config.dev = dev; | |
f434f9b7 | 719 | nvmem_config.id = NVMEM_DEVID_AUTO; |
8cdc4e7e | 720 | nvmem_config.read_only = !writable; |
25e5ef30 | 721 | nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO); |
8cdc4e7e BG |
722 | nvmem_config.owner = THIS_MODULE; |
723 | nvmem_config.compat = true; | |
021c7d7b | 724 | nvmem_config.base_dev = dev; |
8cdc4e7e BG |
725 | nvmem_config.reg_read = at24_read; |
726 | nvmem_config.reg_write = at24_write; | |
727 | nvmem_config.priv = at24; | |
728 | nvmem_config.stride = 1; | |
729 | nvmem_config.word_size = 1; | |
4fa882c9 | 730 | nvmem_config.size = byte_len; |
8cdc4e7e | 731 | |
bbe69841 | 732 | at24->nvmem = devm_nvmem_register(dev, &nvmem_config); |
b20eb4c1 BG |
733 | if (IS_ERR(at24->nvmem)) |
734 | return PTR_ERR(at24->nvmem); | |
735 | ||
736 | i2c_set_clientdata(client, at24); | |
737 | ||
cd5676db BH |
738 | err = regulator_enable(at24->vcc_reg); |
739 | if (err) { | |
740 | dev_err(dev, "Failed to enable vcc regulator\n"); | |
741 | return err; | |
742 | } | |
743 | ||
b20eb4c1 BG |
744 | /* enable runtime pm */ |
745 | pm_runtime_set_active(dev); | |
746 | pm_runtime_enable(dev); | |
747 | ||
748 | /* | |
749 | * Perform a one-byte test read to verify that the | |
750 | * chip is functional. | |
751 | */ | |
752 | err = at24_read(at24, 0, &test_byte, 1); | |
b20eb4c1 BG |
753 | if (err) { |
754 | pm_runtime_disable(dev); | |
cd5676db | 755 | regulator_disable(at24->vcc_reg); |
b20eb4c1 | 756 | return -ENODEV; |
57d15550 | 757 | } |
2b7a5056 | 758 | |
58d6fee5 MA |
759 | pm_runtime_idle(dev); |
760 | ||
285be87c JD |
761 | if (writable) |
762 | dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n", | |
763 | byte_len, client->name, at24->write_max); | |
764 | else | |
765 | dev_info(dev, "%u byte %s EEPROM, read-only\n", | |
766 | byte_len, client->name); | |
2b7a5056 WS |
767 | |
768 | return 0; | |
2b7a5056 WS |
769 | } |
770 | ||
486a5c28 | 771 | static int at24_remove(struct i2c_client *client) |
2b7a5056 | 772 | { |
cd5676db BH |
773 | struct at24_data *at24 = i2c_get_clientdata(client); |
774 | ||
98e82010 | 775 | pm_runtime_disable(&client->dev); |
cd5676db BH |
776 | if (!pm_runtime_status_suspended(&client->dev)) |
777 | regulator_disable(at24->vcc_reg); | |
98e82010 DM |
778 | pm_runtime_set_suspended(&client->dev); |
779 | ||
2b7a5056 WS |
780 | return 0; |
781 | } | |
782 | ||
cd5676db BH |
783 | static int __maybe_unused at24_suspend(struct device *dev) |
784 | { | |
785 | struct i2c_client *client = to_i2c_client(dev); | |
786 | struct at24_data *at24 = i2c_get_clientdata(client); | |
787 | ||
788 | return regulator_disable(at24->vcc_reg); | |
789 | } | |
790 | ||
791 | static int __maybe_unused at24_resume(struct device *dev) | |
792 | { | |
793 | struct i2c_client *client = to_i2c_client(dev); | |
794 | struct at24_data *at24 = i2c_get_clientdata(client); | |
795 | ||
796 | return regulator_enable(at24->vcc_reg); | |
797 | } | |
798 | ||
799 | static const struct dev_pm_ops at24_pm_ops = { | |
800 | SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, | |
801 | pm_runtime_force_resume) | |
802 | SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL) | |
803 | }; | |
804 | ||
2b7a5056 WS |
805 | static struct i2c_driver at24_driver = { |
806 | .driver = { | |
807 | .name = "at24", | |
cd5676db | 808 | .pm = &at24_pm_ops, |
7f2a2f0d | 809 | .of_match_table = at24_of_match, |
40d8edc9 | 810 | .acpi_match_table = ACPI_PTR(at24_acpi_ids), |
2b7a5056 | 811 | }, |
48b6a7d1 | 812 | .probe_new = at24_probe, |
2d6bed9c | 813 | .remove = at24_remove, |
2b7a5056 WS |
814 | .id_table = at24_ids, |
815 | }; | |
816 | ||
817 | static int __init at24_init(void) | |
818 | { | |
ec3c2d51 BG |
819 | if (!at24_io_limit) { |
820 | pr_err("at24: at24_io_limit must not be 0!\n"); | |
45efe847 WS |
821 | return -EINVAL; |
822 | } | |
823 | ||
ec3c2d51 | 824 | at24_io_limit = rounddown_pow_of_two(at24_io_limit); |
2b7a5056 WS |
825 | return i2c_add_driver(&at24_driver); |
826 | } | |
827 | module_init(at24_init); | |
828 | ||
829 | static void __exit at24_exit(void) | |
830 | { | |
831 | i2c_del_driver(&at24_driver); | |
832 | } | |
833 | module_exit(at24_exit); | |
834 | ||
835 | MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); | |
836 | MODULE_AUTHOR("David Brownell and Wolfram Sang"); | |
837 | MODULE_LICENSE("GPL"); |