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1 | /* |
2 | * CARMA DATA-FPGA Access Driver | |
3 | * | |
4 | * Copyright (c) 2009-2011 Ira W. Snyder <iws@ovro.caltech.edu> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License as published by the | |
8 | * Free Software Foundation; either version 2 of the License, or (at your | |
9 | * option) any later version. | |
10 | */ | |
11 | ||
12 | /* | |
13 | * FPGA Memory Dump Format | |
14 | * | |
15 | * FPGA #0 control registers (32 x 32-bit words) | |
16 | * FPGA #1 control registers (32 x 32-bit words) | |
17 | * FPGA #2 control registers (32 x 32-bit words) | |
18 | * FPGA #3 control registers (32 x 32-bit words) | |
19 | * SYSFPGA control registers (32 x 32-bit words) | |
20 | * FPGA #0 correlation array (NUM_CORL0 correlation blocks) | |
21 | * FPGA #1 correlation array (NUM_CORL1 correlation blocks) | |
22 | * FPGA #2 correlation array (NUM_CORL2 correlation blocks) | |
23 | * FPGA #3 correlation array (NUM_CORL3 correlation blocks) | |
24 | * | |
25 | * Each correlation array consists of: | |
26 | * | |
27 | * Correlation Data (2 x NUM_LAGSn x 32-bit words) | |
28 | * Pipeline Metadata (2 x NUM_METAn x 32-bit words) | |
29 | * Quantization Counters (2 x NUM_QCNTn x 32-bit words) | |
30 | * | |
31 | * The NUM_CORLn, NUM_LAGSn, NUM_METAn, and NUM_QCNTn values come from | |
32 | * the FPGA configuration registers. They do not change once the FPGA's | |
33 | * have been programmed, they only change on re-programming. | |
34 | */ | |
35 | ||
36 | /* | |
37 | * Basic Description: | |
38 | * | |
39 | * This driver is used to capture correlation spectra off of the four data | |
40 | * processing FPGAs. The FPGAs are often reprogrammed at runtime, therefore | |
41 | * this driver supports dynamic enable/disable of capture while the device | |
42 | * remains open. | |
43 | * | |
44 | * The nominal capture rate is 64Hz (every 15.625ms). To facilitate this fast | |
45 | * capture rate, all buffers are pre-allocated to avoid any potentially long | |
46 | * running memory allocations while capturing. | |
47 | * | |
48 | * There are two lists and one pointer which are used to keep track of the | |
49 | * different states of data buffers. | |
50 | * | |
51 | * 1) free list | |
52 | * This list holds all empty data buffers which are ready to receive data. | |
53 | * | |
54 | * 2) inflight pointer | |
55 | * This pointer holds the currently inflight data buffer. This buffer is having | |
56 | * data copied into it by the DMA engine. | |
57 | * | |
58 | * 3) used list | |
59 | * This list holds data buffers which have been filled, and are waiting to be | |
60 | * read by userspace. | |
61 | * | |
62 | * All buffers start life on the free list, then move successively to the | |
63 | * inflight pointer, and then to the used list. After they have been read by | |
64 | * userspace, they are moved back to the free list. The cycle repeats as long | |
65 | * as necessary. | |
66 | * | |
67 | * It should be noted that all buffers are mapped and ready for DMA when they | |
68 | * are on any of the three lists. They are only unmapped when they are in the | |
69 | * process of being read by userspace. | |
70 | */ | |
71 | ||
72 | /* | |
73 | * Notes on the IRQ masking scheme: | |
74 | * | |
75 | * The IRQ masking scheme here is different than most other hardware. The only | |
76 | * way for the DATA-FPGAs to detect if the kernel has taken too long to copy | |
77 | * the data is if the status registers are not cleared before the next | |
78 | * correlation data dump is ready. | |
79 | * | |
80 | * The interrupt line is connected to the status registers, such that when they | |
81 | * are cleared, the interrupt is de-asserted. Therein lies our problem. We need | |
82 | * to schedule a long-running DMA operation and return from the interrupt | |
83 | * handler quickly, but we cannot clear the status registers. | |
84 | * | |
85 | * To handle this, the system controller FPGA has the capability to connect the | |
86 | * interrupt line to a user-controlled GPIO pin. This pin is driven high | |
87 | * (unasserted) and left that way. To mask the interrupt, we change the | |
88 | * interrupt source to the GPIO pin. Tada, we hid the interrupt. :) | |
89 | */ | |
90 | ||
91 | #include <linux/of_platform.h> | |
92 | #include <linux/dma-mapping.h> | |
93 | #include <linux/miscdevice.h> | |
94 | #include <linux/interrupt.h> | |
95 | #include <linux/dmaengine.h> | |
96 | #include <linux/seq_file.h> | |
97 | #include <linux/highmem.h> | |
98 | #include <linux/debugfs.h> | |
99 | #include <linux/kernel.h> | |
100 | #include <linux/module.h> | |
101 | #include <linux/poll.h> | |
102 | #include <linux/init.h> | |
103 | #include <linux/slab.h> | |
104 | #include <linux/kref.h> | |
105 | #include <linux/io.h> | |
106 | ||
107 | #include <media/videobuf-dma-sg.h> | |
108 | ||
109 | /* system controller registers */ | |
110 | #define SYS_IRQ_SOURCE_CTL 0x24 | |
111 | #define SYS_IRQ_OUTPUT_EN 0x28 | |
112 | #define SYS_IRQ_OUTPUT_DATA 0x2C | |
113 | #define SYS_IRQ_INPUT_DATA 0x30 | |
114 | #define SYS_FPGA_CONFIG_STATUS 0x44 | |
115 | ||
116 | /* GPIO IRQ line assignment */ | |
117 | #define IRQ_CORL_DONE 0x10 | |
118 | ||
119 | /* FPGA registers */ | |
120 | #define MMAP_REG_VERSION 0x00 | |
121 | #define MMAP_REG_CORL_CONF1 0x08 | |
122 | #define MMAP_REG_CORL_CONF2 0x0C | |
123 | #define MMAP_REG_STATUS 0x48 | |
124 | ||
125 | #define SYS_FPGA_BLOCK 0xF0000000 | |
126 | ||
127 | #define DATA_FPGA_START 0x400000 | |
128 | #define DATA_FPGA_SIZE 0x80000 | |
129 | ||
130 | static const char drv_name[] = "carma-fpga"; | |
131 | ||
132 | #define NUM_FPGA 4 | |
133 | ||
134 | #define MIN_DATA_BUFS 8 | |
135 | #define MAX_DATA_BUFS 64 | |
136 | ||
137 | struct fpga_info { | |
138 | unsigned int num_lag_ram; | |
139 | unsigned int blk_size; | |
140 | }; | |
141 | ||
142 | struct data_buf { | |
143 | struct list_head entry; | |
144 | struct videobuf_dmabuf vb; | |
145 | size_t size; | |
146 | }; | |
147 | ||
148 | struct fpga_device { | |
149 | /* character device */ | |
150 | struct miscdevice miscdev; | |
151 | struct device *dev; | |
152 | struct mutex mutex; | |
153 | ||
154 | /* reference count */ | |
155 | struct kref ref; | |
156 | ||
157 | /* FPGA registers and information */ | |
158 | struct fpga_info info[NUM_FPGA]; | |
159 | void __iomem *regs; | |
160 | int irq; | |
161 | ||
162 | /* FPGA Physical Address/Size Information */ | |
163 | resource_size_t phys_addr; | |
164 | size_t phys_size; | |
165 | ||
166 | /* DMA structures */ | |
167 | struct sg_table corl_table; | |
168 | unsigned int corl_nents; | |
169 | struct dma_chan *chan; | |
170 | ||
171 | /* Protection for all members below */ | |
172 | spinlock_t lock; | |
173 | ||
174 | /* Device enable/disable flag */ | |
175 | bool enabled; | |
176 | ||
177 | /* Correlation data buffers */ | |
178 | wait_queue_head_t wait; | |
179 | struct list_head free; | |
180 | struct list_head used; | |
181 | struct data_buf *inflight; | |
182 | ||
183 | /* Information about data buffers */ | |
184 | unsigned int num_dropped; | |
185 | unsigned int num_buffers; | |
186 | size_t bufsize; | |
187 | struct dentry *dbg_entry; | |
188 | }; | |
189 | ||
190 | struct fpga_reader { | |
191 | struct fpga_device *priv; | |
192 | struct data_buf *buf; | |
193 | off_t buf_start; | |
194 | }; | |
195 | ||
196 | static void fpga_device_release(struct kref *ref) | |
197 | { | |
198 | struct fpga_device *priv = container_of(ref, struct fpga_device, ref); | |
199 | ||
200 | /* the last reader has exited, cleanup the last bits */ | |
201 | mutex_destroy(&priv->mutex); | |
202 | kfree(priv); | |
203 | } | |
204 | ||
205 | /* | |
206 | * Data Buffer Allocation Helpers | |
207 | */ | |
208 | ||
209 | /** | |
210 | * data_free_buffer() - free a single data buffer and all allocated memory | |
211 | * @buf: the buffer to free | |
212 | * | |
213 | * This will free all of the pages allocated to the given data buffer, and | |
214 | * then free the structure itself | |
215 | */ | |
216 | static void data_free_buffer(struct data_buf *buf) | |
217 | { | |
218 | /* It is ok to free a NULL buffer */ | |
219 | if (!buf) | |
220 | return; | |
221 | ||
222 | /* free all memory */ | |
223 | videobuf_dma_free(&buf->vb); | |
224 | kfree(buf); | |
225 | } | |
226 | ||
227 | /** | |
228 | * data_alloc_buffer() - allocate and fill a data buffer with pages | |
229 | * @bytes: the number of bytes required | |
230 | * | |
231 | * This allocates all space needed for a data buffer. It must be mapped before | |
232 | * use in a DMA transaction using videobuf_dma_map(). | |
233 | * | |
234 | * Returns NULL on failure | |
235 | */ | |
236 | static struct data_buf *data_alloc_buffer(const size_t bytes) | |
237 | { | |
238 | unsigned int nr_pages; | |
239 | struct data_buf *buf; | |
240 | int ret; | |
241 | ||
242 | /* calculate the number of pages necessary */ | |
243 | nr_pages = DIV_ROUND_UP(bytes, PAGE_SIZE); | |
244 | ||
245 | /* allocate the buffer structure */ | |
246 | buf = kzalloc(sizeof(*buf), GFP_KERNEL); | |
247 | if (!buf) | |
248 | goto out_return; | |
249 | ||
250 | /* initialize internal fields */ | |
251 | INIT_LIST_HEAD(&buf->entry); | |
252 | buf->size = bytes; | |
253 | ||
254 | /* allocate the videobuf */ | |
255 | videobuf_dma_init(&buf->vb); | |
256 | ret = videobuf_dma_init_kernel(&buf->vb, DMA_FROM_DEVICE, nr_pages); | |
257 | if (ret) | |
258 | goto out_free_buf; | |
259 | ||
260 | return buf; | |
261 | ||
262 | out_free_buf: | |
263 | kfree(buf); | |
264 | out_return: | |
265 | return NULL; | |
266 | } | |
267 | ||
268 | /** | |
269 | * data_free_buffers() - free all allocated buffers | |
270 | * @priv: the driver's private data structure | |
271 | * | |
272 | * Free all buffers allocated by the driver (except those currently in the | |
273 | * process of being read by userspace). | |
274 | * | |
275 | * LOCKING: must hold dev->mutex | |
276 | * CONTEXT: user | |
277 | */ | |
278 | static void data_free_buffers(struct fpga_device *priv) | |
279 | { | |
280 | struct data_buf *buf, *tmp; | |
281 | ||
282 | /* the device should be stopped, no DMA in progress */ | |
283 | BUG_ON(priv->inflight != NULL); | |
284 | ||
285 | list_for_each_entry_safe(buf, tmp, &priv->free, entry) { | |
286 | list_del_init(&buf->entry); | |
287 | videobuf_dma_unmap(priv->dev, &buf->vb); | |
288 | data_free_buffer(buf); | |
289 | } | |
290 | ||
291 | list_for_each_entry_safe(buf, tmp, &priv->used, entry) { | |
292 | list_del_init(&buf->entry); | |
293 | videobuf_dma_unmap(priv->dev, &buf->vb); | |
294 | data_free_buffer(buf); | |
295 | } | |
296 | ||
297 | priv->num_buffers = 0; | |
298 | priv->bufsize = 0; | |
299 | } | |
300 | ||
301 | /** | |
302 | * data_alloc_buffers() - allocate 1 seconds worth of data buffers | |
303 | * @priv: the driver's private data structure | |
304 | * | |
305 | * Allocate enough buffers for a whole second worth of data | |
306 | * | |
307 | * This routine will attempt to degrade nicely by succeeding even if a full | |
308 | * second worth of data buffers could not be allocated, as long as a minimum | |
309 | * number were allocated. In this case, it will print a message to the kernel | |
310 | * log. | |
311 | * | |
312 | * The device must not be modifying any lists when this is called. | |
313 | * | |
314 | * CONTEXT: user | |
315 | * LOCKING: must hold dev->mutex | |
316 | * | |
317 | * Returns 0 on success, -ERRNO otherwise | |
318 | */ | |
319 | static int data_alloc_buffers(struct fpga_device *priv) | |
320 | { | |
321 | struct data_buf *buf; | |
322 | int i, ret; | |
323 | ||
324 | for (i = 0; i < MAX_DATA_BUFS; i++) { | |
325 | ||
326 | /* allocate a buffer */ | |
327 | buf = data_alloc_buffer(priv->bufsize); | |
328 | if (!buf) | |
329 | break; | |
330 | ||
331 | /* map it for DMA */ | |
332 | ret = videobuf_dma_map(priv->dev, &buf->vb); | |
333 | if (ret) { | |
334 | data_free_buffer(buf); | |
335 | break; | |
336 | } | |
337 | ||
338 | /* add it to the list of free buffers */ | |
339 | list_add_tail(&buf->entry, &priv->free); | |
340 | priv->num_buffers++; | |
341 | } | |
342 | ||
343 | /* Make sure we allocated the minimum required number of buffers */ | |
344 | if (priv->num_buffers < MIN_DATA_BUFS) { | |
345 | dev_err(priv->dev, "Unable to allocate enough data buffers\n"); | |
346 | data_free_buffers(priv); | |
347 | return -ENOMEM; | |
348 | } | |
349 | ||
350 | /* Warn if we are running in a degraded state, but do not fail */ | |
351 | if (priv->num_buffers < MAX_DATA_BUFS) { | |
352 | dev_warn(priv->dev, | |
353 | "Unable to allocate %d buffers, using %d buffers instead\n", | |
354 | MAX_DATA_BUFS, i); | |
355 | } | |
356 | ||
357 | return 0; | |
358 | } | |
359 | ||
360 | /* | |
361 | * DMA Operations Helpers | |
362 | */ | |
363 | ||
364 | /** | |
365 | * fpga_start_addr() - get the physical address a DATA-FPGA | |
366 | * @priv: the driver's private data structure | |
367 | * @fpga: the DATA-FPGA number (zero based) | |
368 | */ | |
369 | static dma_addr_t fpga_start_addr(struct fpga_device *priv, unsigned int fpga) | |
370 | { | |
371 | return priv->phys_addr + 0x400000 + (0x80000 * fpga); | |
372 | } | |
373 | ||
374 | /** | |
375 | * fpga_block_addr() - get the physical address of a correlation data block | |
376 | * @priv: the driver's private data structure | |
377 | * @fpga: the DATA-FPGA number (zero based) | |
378 | * @blknum: the correlation block number (zero based) | |
379 | */ | |
380 | static dma_addr_t fpga_block_addr(struct fpga_device *priv, unsigned int fpga, | |
381 | unsigned int blknum) | |
382 | { | |
383 | return fpga_start_addr(priv, fpga) + (0x10000 * (1 + blknum)); | |
384 | } | |
385 | ||
386 | #define REG_BLOCK_SIZE (32 * 4) | |
387 | ||
388 | /** | |
389 | * data_setup_corl_table() - create the scatterlist for correlation dumps | |
390 | * @priv: the driver's private data structure | |
391 | * | |
392 | * Create the scatterlist for transferring a correlation dump from the | |
393 | * DATA FPGAs. This structure will be reused for each buffer than needs | |
394 | * to be filled with correlation data. | |
395 | * | |
396 | * Returns 0 on success, -ERRNO otherwise | |
397 | */ | |
398 | static int data_setup_corl_table(struct fpga_device *priv) | |
399 | { | |
400 | struct sg_table *table = &priv->corl_table; | |
401 | struct scatterlist *sg; | |
402 | struct fpga_info *info; | |
403 | int i, j, ret; | |
404 | ||
405 | /* Calculate the number of entries needed */ | |
406 | priv->corl_nents = (1 + NUM_FPGA) * REG_BLOCK_SIZE; | |
407 | for (i = 0; i < NUM_FPGA; i++) | |
408 | priv->corl_nents += priv->info[i].num_lag_ram; | |
409 | ||
410 | /* Allocate the scatterlist table */ | |
411 | ret = sg_alloc_table(table, priv->corl_nents, GFP_KERNEL); | |
412 | if (ret) { | |
413 | dev_err(priv->dev, "unable to allocate DMA table\n"); | |
414 | return ret; | |
415 | } | |
416 | ||
417 | /* Add the DATA FPGA registers to the scatterlist */ | |
418 | sg = table->sgl; | |
419 | for (i = 0; i < NUM_FPGA; i++) { | |
420 | sg_dma_address(sg) = fpga_start_addr(priv, i); | |
421 | sg_dma_len(sg) = REG_BLOCK_SIZE; | |
422 | sg = sg_next(sg); | |
423 | } | |
424 | ||
425 | /* Add the SYS-FPGA registers to the scatterlist */ | |
426 | sg_dma_address(sg) = SYS_FPGA_BLOCK; | |
427 | sg_dma_len(sg) = REG_BLOCK_SIZE; | |
428 | sg = sg_next(sg); | |
429 | ||
430 | /* Add the FPGA correlation data blocks to the scatterlist */ | |
431 | for (i = 0; i < NUM_FPGA; i++) { | |
432 | info = &priv->info[i]; | |
433 | for (j = 0; j < info->num_lag_ram; j++) { | |
434 | sg_dma_address(sg) = fpga_block_addr(priv, i, j); | |
435 | sg_dma_len(sg) = info->blk_size; | |
436 | sg = sg_next(sg); | |
437 | } | |
438 | } | |
439 | ||
440 | /* | |
441 | * All physical addresses and lengths are present in the structure | |
442 | * now. It can be reused for every FPGA DATA interrupt | |
443 | */ | |
444 | return 0; | |
445 | } | |
446 | ||
447 | /* | |
448 | * FPGA Register Access Helpers | |
449 | */ | |
450 | ||
451 | static void fpga_write_reg(struct fpga_device *priv, unsigned int fpga, | |
452 | unsigned int reg, u32 val) | |
453 | { | |
454 | const int fpga_start = DATA_FPGA_START + (fpga * DATA_FPGA_SIZE); | |
455 | iowrite32be(val, priv->regs + fpga_start + reg); | |
456 | } | |
457 | ||
458 | static u32 fpga_read_reg(struct fpga_device *priv, unsigned int fpga, | |
459 | unsigned int reg) | |
460 | { | |
461 | const int fpga_start = DATA_FPGA_START + (fpga * DATA_FPGA_SIZE); | |
462 | return ioread32be(priv->regs + fpga_start + reg); | |
463 | } | |
464 | ||
465 | /** | |
466 | * data_calculate_bufsize() - calculate the data buffer size required | |
467 | * @priv: the driver's private data structure | |
468 | * | |
469 | * Calculate the total buffer size needed to hold a single block | |
470 | * of correlation data | |
471 | * | |
472 | * CONTEXT: user | |
473 | * | |
474 | * Returns 0 on success, -ERRNO otherwise | |
475 | */ | |
476 | static int data_calculate_bufsize(struct fpga_device *priv) | |
477 | { | |
478 | u32 num_corl, num_lags, num_meta, num_qcnt, num_pack; | |
479 | u32 conf1, conf2, version; | |
480 | u32 num_lag_ram, blk_size; | |
481 | int i; | |
482 | ||
483 | /* Each buffer starts with the 5 FPGA register areas */ | |
484 | priv->bufsize = (1 + NUM_FPGA) * REG_BLOCK_SIZE; | |
485 | ||
486 | /* Read and store the configuration data for each FPGA */ | |
487 | for (i = 0; i < NUM_FPGA; i++) { | |
488 | version = fpga_read_reg(priv, i, MMAP_REG_VERSION); | |
489 | conf1 = fpga_read_reg(priv, i, MMAP_REG_CORL_CONF1); | |
490 | conf2 = fpga_read_reg(priv, i, MMAP_REG_CORL_CONF2); | |
491 | ||
492 | /* minor version 2 and later */ | |
493 | if ((version & 0x000000FF) >= 2) { | |
494 | num_corl = (conf1 & 0x000000F0) >> 4; | |
495 | num_pack = (conf1 & 0x00000F00) >> 8; | |
496 | num_lags = (conf1 & 0x00FFF000) >> 12; | |
497 | num_meta = (conf1 & 0x7F000000) >> 24; | |
498 | num_qcnt = (conf2 & 0x00000FFF) >> 0; | |
499 | } else { | |
500 | num_corl = (conf1 & 0x000000F0) >> 4; | |
501 | num_pack = 1; /* implied */ | |
502 | num_lags = (conf1 & 0x000FFF00) >> 8; | |
503 | num_meta = (conf1 & 0x7FF00000) >> 20; | |
504 | num_qcnt = (conf2 & 0x00000FFF) >> 0; | |
505 | } | |
506 | ||
507 | num_lag_ram = (num_corl + num_pack - 1) / num_pack; | |
508 | blk_size = ((num_pack * num_lags) + num_meta + num_qcnt) * 8; | |
509 | ||
510 | priv->info[i].num_lag_ram = num_lag_ram; | |
511 | priv->info[i].blk_size = blk_size; | |
512 | priv->bufsize += num_lag_ram * blk_size; | |
513 | ||
514 | dev_dbg(priv->dev, "FPGA %d NUM_CORL: %d\n", i, num_corl); | |
515 | dev_dbg(priv->dev, "FPGA %d NUM_PACK: %d\n", i, num_pack); | |
516 | dev_dbg(priv->dev, "FPGA %d NUM_LAGS: %d\n", i, num_lags); | |
517 | dev_dbg(priv->dev, "FPGA %d NUM_META: %d\n", i, num_meta); | |
518 | dev_dbg(priv->dev, "FPGA %d NUM_QCNT: %d\n", i, num_qcnt); | |
519 | dev_dbg(priv->dev, "FPGA %d BLK_SIZE: %d\n", i, blk_size); | |
520 | } | |
521 | ||
522 | dev_dbg(priv->dev, "TOTAL BUFFER SIZE: %zu bytes\n", priv->bufsize); | |
523 | return 0; | |
524 | } | |
525 | ||
526 | /* | |
527 | * Interrupt Handling | |
528 | */ | |
529 | ||
530 | /** | |
531 | * data_disable_interrupts() - stop the device from generating interrupts | |
532 | * @priv: the driver's private data structure | |
533 | * | |
534 | * Hide interrupts by switching to GPIO interrupt source | |
535 | * | |
536 | * LOCKING: must hold dev->lock | |
537 | */ | |
538 | static void data_disable_interrupts(struct fpga_device *priv) | |
539 | { | |
540 | /* hide the interrupt by switching the IRQ driver to GPIO */ | |
541 | iowrite32be(0x2F, priv->regs + SYS_IRQ_SOURCE_CTL); | |
542 | } | |
543 | ||
544 | /** | |
545 | * data_enable_interrupts() - allow the device to generate interrupts | |
546 | * @priv: the driver's private data structure | |
547 | * | |
548 | * Unhide interrupts by switching to the FPGA interrupt source. At the | |
549 | * same time, clear the DATA-FPGA status registers. | |
550 | * | |
551 | * LOCKING: must hold dev->lock | |
552 | */ | |
553 | static void data_enable_interrupts(struct fpga_device *priv) | |
554 | { | |
555 | /* clear the actual FPGA corl_done interrupt */ | |
556 | fpga_write_reg(priv, 0, MMAP_REG_STATUS, 0x0); | |
557 | fpga_write_reg(priv, 1, MMAP_REG_STATUS, 0x0); | |
558 | fpga_write_reg(priv, 2, MMAP_REG_STATUS, 0x0); | |
559 | fpga_write_reg(priv, 3, MMAP_REG_STATUS, 0x0); | |
560 | ||
561 | /* flush the writes */ | |
562 | fpga_read_reg(priv, 0, MMAP_REG_STATUS); | |
6c15d7af IS |
563 | fpga_read_reg(priv, 1, MMAP_REG_STATUS); |
564 | fpga_read_reg(priv, 2, MMAP_REG_STATUS); | |
565 | fpga_read_reg(priv, 3, MMAP_REG_STATUS); | |
c186f0e1 IS |
566 | |
567 | /* switch back to the external interrupt source */ | |
568 | iowrite32be(0x3F, priv->regs + SYS_IRQ_SOURCE_CTL); | |
569 | } | |
570 | ||
571 | /** | |
572 | * data_dma_cb() - DMAEngine callback for DMA completion | |
573 | * @data: the driver's private data structure | |
574 | * | |
575 | * Complete a DMA transfer from the DATA-FPGA's | |
576 | * | |
577 | * This is called via the DMA callback mechanism, and will handle moving the | |
578 | * completed DMA transaction to the used list, and then wake any processes | |
579 | * waiting for new data | |
580 | * | |
581 | * CONTEXT: any, softirq expected | |
582 | */ | |
583 | static void data_dma_cb(void *data) | |
584 | { | |
585 | struct fpga_device *priv = data; | |
586 | unsigned long flags; | |
587 | ||
588 | spin_lock_irqsave(&priv->lock, flags); | |
589 | ||
590 | /* If there is no inflight buffer, we've got a bug */ | |
591 | BUG_ON(priv->inflight == NULL); | |
592 | ||
593 | /* Move the inflight buffer onto the used list */ | |
594 | list_move_tail(&priv->inflight->entry, &priv->used); | |
595 | priv->inflight = NULL; | |
596 | ||
6c15d7af IS |
597 | /* |
598 | * If data dumping is still enabled, then clear the FPGA | |
599 | * status registers and re-enable FPGA interrupts | |
600 | */ | |
601 | if (priv->enabled) | |
602 | data_enable_interrupts(priv); | |
c186f0e1 IS |
603 | |
604 | spin_unlock_irqrestore(&priv->lock, flags); | |
605 | ||
606 | /* | |
607 | * We've changed both the inflight and used lists, so we need | |
608 | * to wake up any processes that are blocking for those events | |
609 | */ | |
610 | wake_up(&priv->wait); | |
611 | } | |
612 | ||
613 | /** | |
614 | * data_submit_dma() - prepare and submit the required DMA to fill a buffer | |
615 | * @priv: the driver's private data structure | |
616 | * @buf: the data buffer | |
617 | * | |
618 | * Prepare and submit the necessary DMA transactions to fill a correlation | |
619 | * data buffer. | |
620 | * | |
621 | * LOCKING: must hold dev->lock | |
622 | * CONTEXT: hardirq only | |
623 | * | |
624 | * Returns 0 on success, -ERRNO otherwise | |
625 | */ | |
626 | static int data_submit_dma(struct fpga_device *priv, struct data_buf *buf) | |
627 | { | |
628 | struct scatterlist *dst_sg, *src_sg; | |
629 | unsigned int dst_nents, src_nents; | |
630 | struct dma_chan *chan = priv->chan; | |
631 | struct dma_async_tx_descriptor *tx; | |
632 | dma_cookie_t cookie; | |
633 | dma_addr_t dst, src; | |
0776ae7b | 634 | unsigned long dma_flags = 0; |
c186f0e1 IS |
635 | |
636 | dst_sg = buf->vb.sglist; | |
637 | dst_nents = buf->vb.sglen; | |
638 | ||
639 | src_sg = priv->corl_table.sgl; | |
640 | src_nents = priv->corl_nents; | |
641 | ||
642 | /* | |
643 | * All buffers passed to this function should be ready and mapped | |
644 | * for DMA already. Therefore, we don't need to do anything except | |
645 | * submit it to the Freescale DMA Engine for processing | |
646 | */ | |
647 | ||
648 | /* setup the scatterlist to scatterlist transfer */ | |
649 | tx = chan->device->device_prep_dma_sg(chan, | |
650 | dst_sg, dst_nents, | |
651 | src_sg, src_nents, | |
652 | 0); | |
653 | if (!tx) { | |
654 | dev_err(priv->dev, "unable to prep scatterlist DMA\n"); | |
655 | return -ENOMEM; | |
656 | } | |
657 | ||
658 | /* submit the transaction to the DMA controller */ | |
659 | cookie = tx->tx_submit(tx); | |
660 | if (dma_submit_error(cookie)) { | |
661 | dev_err(priv->dev, "unable to submit scatterlist DMA\n"); | |
662 | return -ENOMEM; | |
663 | } | |
664 | ||
665 | /* Prepare the re-read of the SYS-FPGA block */ | |
666 | dst = sg_dma_address(dst_sg) + (NUM_FPGA * REG_BLOCK_SIZE); | |
667 | src = SYS_FPGA_BLOCK; | |
668 | tx = chan->device->device_prep_dma_memcpy(chan, dst, src, | |
669 | REG_BLOCK_SIZE, | |
bfc191ea | 670 | dma_flags); |
c186f0e1 IS |
671 | if (!tx) { |
672 | dev_err(priv->dev, "unable to prep SYS-FPGA DMA\n"); | |
673 | return -ENOMEM; | |
674 | } | |
675 | ||
676 | /* Setup the callback */ | |
677 | tx->callback = data_dma_cb; | |
678 | tx->callback_param = priv; | |
679 | ||
680 | /* submit the transaction to the DMA controller */ | |
681 | cookie = tx->tx_submit(tx); | |
682 | if (dma_submit_error(cookie)) { | |
683 | dev_err(priv->dev, "unable to submit SYS-FPGA DMA\n"); | |
684 | return -ENOMEM; | |
685 | } | |
686 | ||
687 | return 0; | |
688 | } | |
689 | ||
690 | #define CORL_DONE 0x1 | |
691 | #define CORL_ERR 0x2 | |
692 | ||
693 | static irqreturn_t data_irq(int irq, void *dev_id) | |
694 | { | |
695 | struct fpga_device *priv = dev_id; | |
696 | bool submitted = false; | |
697 | struct data_buf *buf; | |
698 | u32 status; | |
699 | int i; | |
700 | ||
701 | /* detect spurious interrupts via FPGA status */ | |
702 | for (i = 0; i < 4; i++) { | |
703 | status = fpga_read_reg(priv, i, MMAP_REG_STATUS); | |
704 | if (!(status & (CORL_DONE | CORL_ERR))) { | |
705 | dev_err(priv->dev, "spurious irq detected (FPGA)\n"); | |
706 | return IRQ_NONE; | |
707 | } | |
708 | } | |
709 | ||
710 | /* detect spurious interrupts via raw IRQ pin readback */ | |
711 | status = ioread32be(priv->regs + SYS_IRQ_INPUT_DATA); | |
712 | if (status & IRQ_CORL_DONE) { | |
713 | dev_err(priv->dev, "spurious irq detected (IRQ)\n"); | |
714 | return IRQ_NONE; | |
715 | } | |
716 | ||
717 | spin_lock(&priv->lock); | |
718 | ||
6c15d7af IS |
719 | /* |
720 | * This is an error case that should never happen. | |
721 | * | |
722 | * If this driver has a bug and manages to re-enable interrupts while | |
723 | * a DMA is in progress, then we will hit this statement and should | |
724 | * start paying attention immediately. | |
725 | */ | |
726 | BUG_ON(priv->inflight != NULL); | |
727 | ||
c186f0e1 IS |
728 | /* hide the interrupt by switching the IRQ driver to GPIO */ |
729 | data_disable_interrupts(priv); | |
730 | ||
731 | /* If there are no free buffers, drop this data */ | |
732 | if (list_empty(&priv->free)) { | |
733 | priv->num_dropped++; | |
734 | goto out; | |
735 | } | |
736 | ||
737 | buf = list_first_entry(&priv->free, struct data_buf, entry); | |
738 | list_del_init(&buf->entry); | |
739 | BUG_ON(buf->size != priv->bufsize); | |
740 | ||
741 | /* Submit a DMA transfer to get the correlation data */ | |
742 | if (data_submit_dma(priv, buf)) { | |
743 | dev_err(priv->dev, "Unable to setup DMA transfer\n"); | |
744 | list_move_tail(&buf->entry, &priv->free); | |
745 | goto out; | |
746 | } | |
747 | ||
748 | /* Save the buffer for the DMA callback */ | |
749 | priv->inflight = buf; | |
750 | submitted = true; | |
751 | ||
752 | /* Start the DMA Engine */ | |
b9ee8683 | 753 | dma_async_issue_pending(priv->chan); |
c186f0e1 IS |
754 | |
755 | out: | |
756 | /* If no DMA was submitted, re-enable interrupts */ | |
757 | if (!submitted) | |
758 | data_enable_interrupts(priv); | |
759 | ||
760 | spin_unlock(&priv->lock); | |
761 | return IRQ_HANDLED; | |
762 | } | |
763 | ||
764 | /* | |
765 | * Realtime Device Enable Helpers | |
766 | */ | |
767 | ||
768 | /** | |
769 | * data_device_enable() - enable the device for buffered dumping | |
770 | * @priv: the driver's private data structure | |
771 | * | |
772 | * Enable the device for buffered dumping. Allocates buffers and hooks up | |
773 | * the interrupt handler. When this finishes, data will come pouring in. | |
774 | * | |
775 | * LOCKING: must hold dev->mutex | |
776 | * CONTEXT: user context only | |
777 | * | |
778 | * Returns 0 on success, -ERRNO otherwise | |
779 | */ | |
780 | static int data_device_enable(struct fpga_device *priv) | |
781 | { | |
6c15d7af | 782 | bool enabled; |
c186f0e1 IS |
783 | u32 val; |
784 | int ret; | |
785 | ||
786 | /* multiple enables are safe: they do nothing */ | |
6c15d7af IS |
787 | spin_lock_irq(&priv->lock); |
788 | enabled = priv->enabled; | |
789 | spin_unlock_irq(&priv->lock); | |
790 | if (enabled) | |
c186f0e1 IS |
791 | return 0; |
792 | ||
793 | /* check that the FPGAs are programmed */ | |
794 | val = ioread32be(priv->regs + SYS_FPGA_CONFIG_STATUS); | |
795 | if (!(val & (1 << 18))) { | |
796 | dev_err(priv->dev, "DATA-FPGAs are not enabled\n"); | |
797 | return -ENODATA; | |
798 | } | |
799 | ||
800 | /* read the FPGAs to calculate the buffer size */ | |
801 | ret = data_calculate_bufsize(priv); | |
802 | if (ret) { | |
803 | dev_err(priv->dev, "unable to calculate buffer size\n"); | |
804 | goto out_error; | |
805 | } | |
806 | ||
807 | /* allocate the correlation data buffers */ | |
808 | ret = data_alloc_buffers(priv); | |
809 | if (ret) { | |
810 | dev_err(priv->dev, "unable to allocate buffers\n"); | |
811 | goto out_error; | |
812 | } | |
813 | ||
814 | /* setup the source scatterlist for dumping correlation data */ | |
815 | ret = data_setup_corl_table(priv); | |
816 | if (ret) { | |
817 | dev_err(priv->dev, "unable to setup correlation DMA table\n"); | |
818 | goto out_error; | |
819 | } | |
820 | ||
6c15d7af IS |
821 | /* prevent the FPGAs from generating interrupts */ |
822 | data_disable_interrupts(priv); | |
823 | ||
c186f0e1 IS |
824 | /* hookup the irq handler */ |
825 | ret = request_irq(priv->irq, data_irq, IRQF_SHARED, drv_name, priv); | |
826 | if (ret) { | |
827 | dev_err(priv->dev, "unable to request IRQ handler\n"); | |
828 | goto out_error; | |
829 | } | |
830 | ||
6c15d7af IS |
831 | /* allow the DMA callback to re-enable FPGA interrupts */ |
832 | spin_lock_irq(&priv->lock); | |
c186f0e1 | 833 | priv->enabled = true; |
6c15d7af IS |
834 | spin_unlock_irq(&priv->lock); |
835 | ||
836 | /* allow the FPGAs to generate interrupts */ | |
837 | data_enable_interrupts(priv); | |
c186f0e1 IS |
838 | return 0; |
839 | ||
840 | out_error: | |
841 | sg_free_table(&priv->corl_table); | |
842 | priv->corl_nents = 0; | |
843 | ||
844 | data_free_buffers(priv); | |
845 | return ret; | |
846 | } | |
847 | ||
848 | /** | |
849 | * data_device_disable() - disable the device for buffered dumping | |
850 | * @priv: the driver's private data structure | |
851 | * | |
852 | * Disable the device for buffered dumping. Stops new DMA transactions from | |
853 | * being generated, waits for all outstanding DMA to complete, and then frees | |
854 | * all buffers. | |
855 | * | |
856 | * LOCKING: must hold dev->mutex | |
857 | * CONTEXT: user only | |
858 | * | |
859 | * Returns 0 on success, -ERRNO otherwise | |
860 | */ | |
861 | static int data_device_disable(struct fpga_device *priv) | |
862 | { | |
6c15d7af | 863 | spin_lock_irq(&priv->lock); |
c186f0e1 IS |
864 | |
865 | /* allow multiple disable */ | |
6c15d7af IS |
866 | if (!priv->enabled) { |
867 | spin_unlock_irq(&priv->lock); | |
c186f0e1 | 868 | return 0; |
6c15d7af IS |
869 | } |
870 | ||
871 | /* | |
872 | * Mark the device disabled | |
873 | * | |
874 | * This stops DMA callbacks from re-enabling interrupts | |
875 | */ | |
876 | priv->enabled = false; | |
c186f0e1 | 877 | |
6c15d7af | 878 | /* prevent the FPGAs from generating interrupts */ |
c186f0e1 IS |
879 | data_disable_interrupts(priv); |
880 | ||
6c15d7af IS |
881 | /* wait until all ongoing DMA has finished */ |
882 | while (priv->inflight != NULL) { | |
883 | spin_unlock_irq(&priv->lock); | |
884 | wait_event(priv->wait, priv->inflight == NULL); | |
885 | spin_lock_irq(&priv->lock); | |
886 | } | |
887 | ||
888 | spin_unlock_irq(&priv->lock); | |
889 | ||
c186f0e1 IS |
890 | /* unhook the irq handler */ |
891 | free_irq(priv->irq, priv); | |
892 | ||
c186f0e1 IS |
893 | /* free the correlation table */ |
894 | sg_free_table(&priv->corl_table); | |
895 | priv->corl_nents = 0; | |
896 | ||
c186f0e1 IS |
897 | /* free all buffers: the free and used lists are not being changed */ |
898 | data_free_buffers(priv); | |
899 | return 0; | |
900 | } | |
901 | ||
902 | /* | |
903 | * DEBUGFS Interface | |
904 | */ | |
905 | #ifdef CONFIG_DEBUG_FS | |
906 | ||
907 | /* | |
908 | * Count the number of entries in the given list | |
909 | */ | |
910 | static unsigned int list_num_entries(struct list_head *list) | |
911 | { | |
912 | struct list_head *entry; | |
913 | unsigned int ret = 0; | |
914 | ||
915 | list_for_each(entry, list) | |
916 | ret++; | |
917 | ||
918 | return ret; | |
919 | } | |
920 | ||
921 | static int data_debug_show(struct seq_file *f, void *offset) | |
922 | { | |
923 | struct fpga_device *priv = f->private; | |
c186f0e1 IS |
924 | |
925 | spin_lock_irq(&priv->lock); | |
926 | ||
927 | seq_printf(f, "enabled: %d\n", priv->enabled); | |
928 | seq_printf(f, "bufsize: %d\n", priv->bufsize); | |
929 | seq_printf(f, "num_buffers: %d\n", priv->num_buffers); | |
930 | seq_printf(f, "num_free: %d\n", list_num_entries(&priv->free)); | |
931 | seq_printf(f, "inflight: %d\n", priv->inflight != NULL); | |
932 | seq_printf(f, "num_used: %d\n", list_num_entries(&priv->used)); | |
933 | seq_printf(f, "num_dropped: %d\n", priv->num_dropped); | |
934 | ||
935 | spin_unlock_irq(&priv->lock); | |
c186f0e1 IS |
936 | return 0; |
937 | } | |
938 | ||
939 | static int data_debug_open(struct inode *inode, struct file *file) | |
940 | { | |
941 | return single_open(file, data_debug_show, inode->i_private); | |
942 | } | |
943 | ||
944 | static const struct file_operations data_debug_fops = { | |
945 | .owner = THIS_MODULE, | |
946 | .open = data_debug_open, | |
947 | .read = seq_read, | |
948 | .llseek = seq_lseek, | |
949 | .release = single_release, | |
950 | }; | |
951 | ||
952 | static int data_debugfs_init(struct fpga_device *priv) | |
953 | { | |
954 | priv->dbg_entry = debugfs_create_file(drv_name, S_IRUGO, NULL, priv, | |
955 | &data_debug_fops); | |
956 | if (IS_ERR(priv->dbg_entry)) | |
957 | return PTR_ERR(priv->dbg_entry); | |
958 | ||
959 | return 0; | |
960 | } | |
961 | ||
962 | static void data_debugfs_exit(struct fpga_device *priv) | |
963 | { | |
964 | debugfs_remove(priv->dbg_entry); | |
965 | } | |
966 | ||
967 | #else | |
968 | ||
969 | static inline int data_debugfs_init(struct fpga_device *priv) | |
970 | { | |
971 | return 0; | |
972 | } | |
973 | ||
974 | static inline void data_debugfs_exit(struct fpga_device *priv) | |
975 | { | |
976 | } | |
977 | ||
978 | #endif /* CONFIG_DEBUG_FS */ | |
979 | ||
980 | /* | |
981 | * SYSFS Attributes | |
982 | */ | |
983 | ||
984 | static ssize_t data_en_show(struct device *dev, struct device_attribute *attr, | |
985 | char *buf) | |
986 | { | |
987 | struct fpga_device *priv = dev_get_drvdata(dev); | |
6c15d7af IS |
988 | int ret; |
989 | ||
990 | spin_lock_irq(&priv->lock); | |
991 | ret = snprintf(buf, PAGE_SIZE, "%u\n", priv->enabled); | |
992 | spin_unlock_irq(&priv->lock); | |
993 | ||
994 | return ret; | |
c186f0e1 IS |
995 | } |
996 | ||
997 | static ssize_t data_en_set(struct device *dev, struct device_attribute *attr, | |
998 | const char *buf, size_t count) | |
999 | { | |
1000 | struct fpga_device *priv = dev_get_drvdata(dev); | |
1001 | unsigned long enable; | |
1002 | int ret; | |
1003 | ||
f7b41276 | 1004 | ret = kstrtoul(buf, 0, &enable); |
c186f0e1 IS |
1005 | if (ret) { |
1006 | dev_err(priv->dev, "unable to parse enable input\n"); | |
f7b41276 | 1007 | return ret; |
c186f0e1 IS |
1008 | } |
1009 | ||
6c15d7af | 1010 | /* protect against concurrent enable/disable */ |
c186f0e1 IS |
1011 | ret = mutex_lock_interruptible(&priv->mutex); |
1012 | if (ret) | |
1013 | return ret; | |
1014 | ||
1015 | if (enable) | |
1016 | ret = data_device_enable(priv); | |
1017 | else | |
1018 | ret = data_device_disable(priv); | |
1019 | ||
1020 | if (ret) { | |
1021 | dev_err(priv->dev, "device %s failed\n", | |
1022 | enable ? "enable" : "disable"); | |
1023 | count = ret; | |
1024 | goto out_unlock; | |
1025 | } | |
1026 | ||
1027 | out_unlock: | |
1028 | mutex_unlock(&priv->mutex); | |
1029 | return count; | |
1030 | } | |
1031 | ||
1032 | static DEVICE_ATTR(enable, S_IWUSR | S_IRUGO, data_en_show, data_en_set); | |
1033 | ||
1034 | static struct attribute *data_sysfs_attrs[] = { | |
1035 | &dev_attr_enable.attr, | |
1036 | NULL, | |
1037 | }; | |
1038 | ||
1039 | static const struct attribute_group rt_sysfs_attr_group = { | |
1040 | .attrs = data_sysfs_attrs, | |
1041 | }; | |
1042 | ||
1043 | /* | |
1044 | * FPGA Realtime Data Character Device | |
1045 | */ | |
1046 | ||
1047 | static int data_open(struct inode *inode, struct file *filp) | |
1048 | { | |
1049 | /* | |
1050 | * The miscdevice layer puts our struct miscdevice into the | |
1051 | * filp->private_data field. We use this to find our private | |
1052 | * data and then overwrite it with our own private structure. | |
1053 | */ | |
1054 | struct fpga_device *priv = container_of(filp->private_data, | |
1055 | struct fpga_device, miscdev); | |
1056 | struct fpga_reader *reader; | |
1057 | int ret; | |
1058 | ||
1059 | /* allocate private data */ | |
1060 | reader = kzalloc(sizeof(*reader), GFP_KERNEL); | |
1061 | if (!reader) | |
1062 | return -ENOMEM; | |
1063 | ||
1064 | reader->priv = priv; | |
1065 | reader->buf = NULL; | |
1066 | ||
1067 | filp->private_data = reader; | |
1068 | ret = nonseekable_open(inode, filp); | |
1069 | if (ret) { | |
1070 | dev_err(priv->dev, "nonseekable-open failed\n"); | |
1071 | kfree(reader); | |
1072 | return ret; | |
1073 | } | |
1074 | ||
1075 | /* | |
1076 | * success, increase the reference count of the private data structure | |
1077 | * so that it doesn't disappear if the device is unbound | |
1078 | */ | |
1079 | kref_get(&priv->ref); | |
1080 | return 0; | |
1081 | } | |
1082 | ||
1083 | static int data_release(struct inode *inode, struct file *filp) | |
1084 | { | |
1085 | struct fpga_reader *reader = filp->private_data; | |
1086 | struct fpga_device *priv = reader->priv; | |
1087 | ||
1088 | /* free the per-reader structure */ | |
1089 | data_free_buffer(reader->buf); | |
1090 | kfree(reader); | |
1091 | filp->private_data = NULL; | |
1092 | ||
1093 | /* decrement our reference count to the private data */ | |
1094 | kref_put(&priv->ref, fpga_device_release); | |
1095 | return 0; | |
1096 | } | |
1097 | ||
1098 | static ssize_t data_read(struct file *filp, char __user *ubuf, size_t count, | |
1099 | loff_t *f_pos) | |
1100 | { | |
1101 | struct fpga_reader *reader = filp->private_data; | |
1102 | struct fpga_device *priv = reader->priv; | |
1103 | struct list_head *used = &priv->used; | |
75ff85a8 | 1104 | bool drop_buffer = false; |
c186f0e1 IS |
1105 | struct data_buf *dbuf; |
1106 | size_t avail; | |
1107 | void *data; | |
1108 | int ret; | |
1109 | ||
1110 | /* check if we already have a partial buffer */ | |
1111 | if (reader->buf) { | |
1112 | dbuf = reader->buf; | |
1113 | goto have_buffer; | |
1114 | } | |
1115 | ||
1116 | spin_lock_irq(&priv->lock); | |
1117 | ||
1118 | /* Block until there is at least one buffer on the used list */ | |
1119 | while (list_empty(used)) { | |
1120 | spin_unlock_irq(&priv->lock); | |
1121 | ||
1122 | if (filp->f_flags & O_NONBLOCK) | |
1123 | return -EAGAIN; | |
1124 | ||
1125 | ret = wait_event_interruptible(priv->wait, !list_empty(used)); | |
1126 | if (ret) | |
1127 | return ret; | |
1128 | ||
1129 | spin_lock_irq(&priv->lock); | |
1130 | } | |
1131 | ||
1132 | /* Grab the first buffer off of the used list */ | |
1133 | dbuf = list_first_entry(used, struct data_buf, entry); | |
1134 | list_del_init(&dbuf->entry); | |
1135 | ||
1136 | spin_unlock_irq(&priv->lock); | |
1137 | ||
1138 | /* Buffers are always mapped: unmap it */ | |
1139 | videobuf_dma_unmap(priv->dev, &dbuf->vb); | |
1140 | ||
1141 | /* save the buffer for later */ | |
1142 | reader->buf = dbuf; | |
1143 | reader->buf_start = 0; | |
1144 | ||
1145 | have_buffer: | |
1146 | /* Get the number of bytes available */ | |
1147 | avail = dbuf->size - reader->buf_start; | |
1148 | data = dbuf->vb.vaddr + reader->buf_start; | |
1149 | ||
1150 | /* Get the number of bytes we can transfer */ | |
1151 | count = min(count, avail); | |
1152 | ||
1153 | /* Copy the data to the userspace buffer */ | |
1154 | if (copy_to_user(ubuf, data, count)) | |
1155 | return -EFAULT; | |
1156 | ||
1157 | /* Update the amount of available space */ | |
1158 | avail -= count; | |
1159 | ||
1160 | /* | |
1161 | * If there is still some data available, save the buffer for the | |
1162 | * next userspace call to read() and return | |
1163 | */ | |
1164 | if (avail > 0) { | |
1165 | reader->buf_start += count; | |
1166 | reader->buf = dbuf; | |
1167 | return count; | |
1168 | } | |
1169 | ||
1170 | /* | |
1171 | * Get the buffer ready to be reused for DMA | |
1172 | * | |
1173 | * If it fails, we pretend that the read never happed and return | |
1174 | * -EFAULT to userspace. The read will be retried. | |
1175 | */ | |
1176 | ret = videobuf_dma_map(priv->dev, &dbuf->vb); | |
1177 | if (ret) { | |
1178 | dev_err(priv->dev, "unable to remap buffer for DMA\n"); | |
1179 | return -EFAULT; | |
1180 | } | |
1181 | ||
1182 | /* Lock against concurrent enable/disable */ | |
1183 | spin_lock_irq(&priv->lock); | |
1184 | ||
1185 | /* the reader is finished with this buffer */ | |
1186 | reader->buf = NULL; | |
1187 | ||
1188 | /* | |
1189 | * One of two things has happened, the device is disabled, or the | |
1190 | * device has been reconfigured underneath us. In either case, we | |
1191 | * should just throw away the buffer. | |
75ff85a8 IS |
1192 | * |
1193 | * Lockdep complains if this is done under the spinlock, so we | |
1194 | * handle it during the unlock path. | |
c186f0e1 IS |
1195 | */ |
1196 | if (!priv->enabled || dbuf->size != priv->bufsize) { | |
75ff85a8 | 1197 | drop_buffer = true; |
c186f0e1 IS |
1198 | goto out_unlock; |
1199 | } | |
1200 | ||
1201 | /* The buffer is safe to reuse, so add it back to the free list */ | |
1202 | list_add_tail(&dbuf->entry, &priv->free); | |
1203 | ||
1204 | out_unlock: | |
1205 | spin_unlock_irq(&priv->lock); | |
75ff85a8 IS |
1206 | |
1207 | if (drop_buffer) { | |
1208 | videobuf_dma_unmap(priv->dev, &dbuf->vb); | |
1209 | data_free_buffer(dbuf); | |
1210 | } | |
1211 | ||
c186f0e1 IS |
1212 | return count; |
1213 | } | |
1214 | ||
1215 | static unsigned int data_poll(struct file *filp, struct poll_table_struct *tbl) | |
1216 | { | |
1217 | struct fpga_reader *reader = filp->private_data; | |
1218 | struct fpga_device *priv = reader->priv; | |
1219 | unsigned int mask = 0; | |
1220 | ||
1221 | poll_wait(filp, &priv->wait, tbl); | |
1222 | ||
1223 | if (!list_empty(&priv->used)) | |
1224 | mask |= POLLIN | POLLRDNORM; | |
1225 | ||
1226 | return mask; | |
1227 | } | |
1228 | ||
1229 | static int data_mmap(struct file *filp, struct vm_area_struct *vma) | |
1230 | { | |
1231 | struct fpga_reader *reader = filp->private_data; | |
1232 | struct fpga_device *priv = reader->priv; | |
1233 | unsigned long offset, vsize, psize, addr; | |
1234 | ||
1235 | /* VMA properties */ | |
1236 | offset = vma->vm_pgoff << PAGE_SHIFT; | |
1237 | vsize = vma->vm_end - vma->vm_start; | |
1238 | psize = priv->phys_size - offset; | |
1239 | addr = (priv->phys_addr + offset) >> PAGE_SHIFT; | |
1240 | ||
1241 | /* Check against the FPGA region's physical memory size */ | |
1242 | if (vsize > psize) { | |
1243 | dev_err(priv->dev, "requested mmap mapping too large\n"); | |
1244 | return -EINVAL; | |
1245 | } | |
1246 | ||
c186f0e1 IS |
1247 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); |
1248 | ||
1249 | return io_remap_pfn_range(vma, vma->vm_start, addr, vsize, | |
1250 | vma->vm_page_prot); | |
1251 | } | |
1252 | ||
1253 | static const struct file_operations data_fops = { | |
1254 | .owner = THIS_MODULE, | |
1255 | .open = data_open, | |
1256 | .release = data_release, | |
1257 | .read = data_read, | |
1258 | .poll = data_poll, | |
1259 | .mmap = data_mmap, | |
1260 | .llseek = no_llseek, | |
1261 | }; | |
1262 | ||
1263 | /* | |
1264 | * OpenFirmware Device Subsystem | |
1265 | */ | |
1266 | ||
1267 | static bool dma_filter(struct dma_chan *chan, void *data) | |
1268 | { | |
1269 | /* | |
1270 | * DMA Channel #0 is used for the FPGA Programmer, so ignore it | |
1271 | * | |
1272 | * This probably won't survive an unload/load cycle of the Freescale | |
1273 | * DMAEngine driver, but that won't be a problem | |
1274 | */ | |
1275 | if (chan->chan_id == 0 && chan->device->dev_id == 0) | |
1276 | return false; | |
1277 | ||
1278 | return true; | |
1279 | } | |
1280 | ||
49334020 | 1281 | static int data_of_probe(struct platform_device *op) |
c186f0e1 IS |
1282 | { |
1283 | struct device_node *of_node = op->dev.of_node; | |
1284 | struct device *this_device; | |
1285 | struct fpga_device *priv; | |
1286 | struct resource res; | |
1287 | dma_cap_mask_t mask; | |
1288 | int ret; | |
1289 | ||
1290 | /* Allocate private data */ | |
1291 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | |
1292 | if (!priv) { | |
1293 | dev_err(&op->dev, "Unable to allocate device private data\n"); | |
1294 | ret = -ENOMEM; | |
1295 | goto out_return; | |
1296 | } | |
1297 | ||
9093ca88 | 1298 | platform_set_drvdata(op, priv); |
c186f0e1 IS |
1299 | priv->dev = &op->dev; |
1300 | kref_init(&priv->ref); | |
1301 | mutex_init(&priv->mutex); | |
1302 | ||
1303 | dev_set_drvdata(priv->dev, priv); | |
1304 | spin_lock_init(&priv->lock); | |
1305 | INIT_LIST_HEAD(&priv->free); | |
1306 | INIT_LIST_HEAD(&priv->used); | |
1307 | init_waitqueue_head(&priv->wait); | |
1308 | ||
1309 | /* Setup the misc device */ | |
1310 | priv->miscdev.minor = MISC_DYNAMIC_MINOR; | |
1311 | priv->miscdev.name = drv_name; | |
1312 | priv->miscdev.fops = &data_fops; | |
1313 | ||
1314 | /* Get the physical address of the FPGA registers */ | |
1315 | ret = of_address_to_resource(of_node, 0, &res); | |
1316 | if (ret) { | |
1317 | dev_err(&op->dev, "Unable to find FPGA physical address\n"); | |
1318 | ret = -ENODEV; | |
1319 | goto out_free_priv; | |
1320 | } | |
1321 | ||
1322 | priv->phys_addr = res.start; | |
1323 | priv->phys_size = resource_size(&res); | |
1324 | ||
1325 | /* ioremap the registers for use */ | |
1326 | priv->regs = of_iomap(of_node, 0); | |
1327 | if (!priv->regs) { | |
1328 | dev_err(&op->dev, "Unable to ioremap registers\n"); | |
1329 | ret = -ENOMEM; | |
1330 | goto out_free_priv; | |
1331 | } | |
1332 | ||
1333 | dma_cap_zero(mask); | |
1334 | dma_cap_set(DMA_MEMCPY, mask); | |
1335 | dma_cap_set(DMA_INTERRUPT, mask); | |
1336 | dma_cap_set(DMA_SLAVE, mask); | |
1337 | dma_cap_set(DMA_SG, mask); | |
1338 | ||
1339 | /* Request a DMA channel */ | |
1340 | priv->chan = dma_request_channel(mask, dma_filter, NULL); | |
1341 | if (!priv->chan) { | |
1342 | dev_err(&op->dev, "Unable to request DMA channel\n"); | |
1343 | ret = -ENODEV; | |
1344 | goto out_unmap_regs; | |
1345 | } | |
1346 | ||
1347 | /* Find the correct IRQ number */ | |
1348 | priv->irq = irq_of_parse_and_map(of_node, 0); | |
1349 | if (priv->irq == NO_IRQ) { | |
1350 | dev_err(&op->dev, "Unable to find IRQ line\n"); | |
1351 | ret = -ENODEV; | |
1352 | goto out_release_dma; | |
1353 | } | |
1354 | ||
1355 | /* Drive the GPIO for FPGA IRQ high (no interrupt) */ | |
1356 | iowrite32be(IRQ_CORL_DONE, priv->regs + SYS_IRQ_OUTPUT_DATA); | |
1357 | ||
1358 | /* Register the miscdevice */ | |
1359 | ret = misc_register(&priv->miscdev); | |
1360 | if (ret) { | |
1361 | dev_err(&op->dev, "Unable to register miscdevice\n"); | |
1362 | goto out_irq_dispose_mapping; | |
1363 | } | |
1364 | ||
1365 | /* Create the debugfs files */ | |
1366 | ret = data_debugfs_init(priv); | |
1367 | if (ret) { | |
1368 | dev_err(&op->dev, "Unable to create debugfs files\n"); | |
1369 | goto out_misc_deregister; | |
1370 | } | |
1371 | ||
1372 | /* Create the sysfs files */ | |
1373 | this_device = priv->miscdev.this_device; | |
1374 | dev_set_drvdata(this_device, priv); | |
1375 | ret = sysfs_create_group(&this_device->kobj, &rt_sysfs_attr_group); | |
1376 | if (ret) { | |
1377 | dev_err(&op->dev, "Unable to create sysfs files\n"); | |
1378 | goto out_data_debugfs_exit; | |
1379 | } | |
1380 | ||
1381 | dev_info(&op->dev, "CARMA FPGA Realtime Data Driver Loaded\n"); | |
1382 | return 0; | |
1383 | ||
1384 | out_data_debugfs_exit: | |
1385 | data_debugfs_exit(priv); | |
1386 | out_misc_deregister: | |
1387 | misc_deregister(&priv->miscdev); | |
1388 | out_irq_dispose_mapping: | |
1389 | irq_dispose_mapping(priv->irq); | |
1390 | out_release_dma: | |
1391 | dma_release_channel(priv->chan); | |
1392 | out_unmap_regs: | |
1393 | iounmap(priv->regs); | |
1394 | out_free_priv: | |
1395 | kref_put(&priv->ref, fpga_device_release); | |
1396 | out_return: | |
1397 | return ret; | |
1398 | } | |
1399 | ||
1400 | static int data_of_remove(struct platform_device *op) | |
1401 | { | |
9093ca88 | 1402 | struct fpga_device *priv = platform_get_drvdata(op); |
c186f0e1 IS |
1403 | struct device *this_device = priv->miscdev.this_device; |
1404 | ||
1405 | /* remove all sysfs files, now the device cannot be re-enabled */ | |
1406 | sysfs_remove_group(&this_device->kobj, &rt_sysfs_attr_group); | |
1407 | ||
1408 | /* remove all debugfs files */ | |
1409 | data_debugfs_exit(priv); | |
1410 | ||
1411 | /* disable the device from generating data */ | |
1412 | data_device_disable(priv); | |
1413 | ||
1414 | /* remove the character device to stop new readers from appearing */ | |
1415 | misc_deregister(&priv->miscdev); | |
1416 | ||
1417 | /* cleanup everything not needed by readers */ | |
1418 | irq_dispose_mapping(priv->irq); | |
1419 | dma_release_channel(priv->chan); | |
1420 | iounmap(priv->regs); | |
1421 | ||
1422 | /* release our reference */ | |
1423 | kref_put(&priv->ref, fpga_device_release); | |
1424 | return 0; | |
1425 | } | |
1426 | ||
1427 | static struct of_device_id data_of_match[] = { | |
1428 | { .compatible = "carma,carma-fpga", }, | |
1429 | {}, | |
1430 | }; | |
1431 | ||
49334020 | 1432 | static struct platform_driver data_of_driver = { |
c186f0e1 IS |
1433 | .probe = data_of_probe, |
1434 | .remove = data_of_remove, | |
1435 | .driver = { | |
1436 | .name = drv_name, | |
1437 | .of_match_table = data_of_match, | |
1438 | .owner = THIS_MODULE, | |
1439 | }, | |
1440 | }; | |
1441 | ||
b00e126f | 1442 | module_platform_driver(data_of_driver); |
c186f0e1 IS |
1443 | |
1444 | MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>"); | |
1445 | MODULE_DESCRIPTION("CARMA DATA-FPGA Access Driver"); | |
1446 | MODULE_LICENSE("GPL"); |