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89b4012b MB |
1 | /* |
2 | * wm8350-core.c -- Device access for Wolfson WM8350 | |
3 | * | |
4 | * Copyright 2007, 2008 Wolfson Microelectronics PLC. | |
5 | * | |
6 | * Author: Liam Girdwood, Mark Brown | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License as published by the | |
10 | * Free Software Foundation; either version 2 of the License, or (at your | |
11 | * option) any later version. | |
12 | * | |
13 | */ | |
14 | ||
15 | #include <linux/kernel.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/init.h> | |
5a0e3ad6 | 18 | #include <linux/slab.h> |
ebccec0f | 19 | #include <linux/bug.h> |
89b4012b MB |
20 | #include <linux/device.h> |
21 | #include <linux/delay.h> | |
22 | #include <linux/interrupt.h> | |
b7b142d9 | 23 | #include <linux/regmap.h> |
ebccec0f | 24 | #include <linux/workqueue.h> |
89b4012b MB |
25 | |
26 | #include <linux/mfd/wm8350/core.h> | |
27 | #include <linux/mfd/wm8350/audio.h> | |
ebccec0f | 28 | #include <linux/mfd/wm8350/comparator.h> |
89b4012b MB |
29 | #include <linux/mfd/wm8350/gpio.h> |
30 | #include <linux/mfd/wm8350/pmic.h> | |
ebccec0f | 31 | #include <linux/mfd/wm8350/rtc.h> |
89b4012b | 32 | #include <linux/mfd/wm8350/supply.h> |
ebccec0f | 33 | #include <linux/mfd/wm8350/wdt.h> |
89b4012b MB |
34 | |
35 | #define WM8350_UNLOCK_KEY 0x0013 | |
36 | #define WM8350_LOCK_KEY 0x0000 | |
37 | ||
38 | #define WM8350_CLOCK_CONTROL_1 0x28 | |
39 | #define WM8350_AIF_TEST 0x74 | |
40 | ||
41 | /* debug */ | |
42 | #define WM8350_BUS_DEBUG 0 | |
43 | #if WM8350_BUS_DEBUG | |
44 | #define dump(regs, src) do { \ | |
45 | int i_; \ | |
46 | u16 *src_ = src; \ | |
47 | printk(KERN_DEBUG); \ | |
48 | for (i_ = 0; i_ < regs; i_++) \ | |
49 | printk(" 0x%4.4x", *src_++); \ | |
50 | printk("\n"); \ | |
51 | } while (0); | |
52 | #else | |
53 | #define dump(bytes, src) | |
54 | #endif | |
55 | ||
56 | #define WM8350_LOCK_DEBUG 0 | |
57 | #if WM8350_LOCK_DEBUG | |
58 | #define ldbg(format, arg...) printk(format, ## arg) | |
59 | #else | |
60 | #define ldbg(format, arg...) | |
61 | #endif | |
62 | ||
63 | /* | |
64 | * WM8350 Device IO | |
65 | */ | |
66 | static DEFINE_MUTEX(io_mutex); | |
67 | static DEFINE_MUTEX(reg_lock_mutex); | |
89b4012b MB |
68 | |
69 | /* Perform a physical read from the device. | |
70 | */ | |
71 | static int wm8350_phys_read(struct wm8350 *wm8350, u8 reg, int num_regs, | |
72 | u16 *dest) | |
73 | { | |
74 | int i, ret; | |
75 | int bytes = num_regs * 2; | |
76 | ||
77 | dev_dbg(wm8350->dev, "volatile read\n"); | |
b7b142d9 | 78 | ret = regmap_raw_read(wm8350->regmap, reg, dest, bytes); |
89b4012b MB |
79 | |
80 | for (i = reg; i < reg + num_regs; i++) { | |
81 | /* Cache is CPU endian */ | |
82 | dest[i - reg] = be16_to_cpu(dest[i - reg]); | |
83 | ||
89b4012b MB |
84 | /* Mask out non-readable bits */ |
85 | dest[i - reg] &= wm8350_reg_io_map[i].readable; | |
86 | } | |
87 | ||
88 | dump(num_regs, dest); | |
89 | ||
90 | return ret; | |
91 | } | |
92 | ||
93 | static int wm8350_read(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *dest) | |
94 | { | |
95 | int i; | |
96 | int end = reg + num_regs; | |
97 | int ret = 0; | |
98 | int bytes = num_regs * 2; | |
99 | ||
89b4012b MB |
100 | if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) { |
101 | dev_err(wm8350->dev, "invalid reg %x\n", | |
102 | reg + num_regs - 1); | |
103 | return -EINVAL; | |
104 | } | |
105 | ||
106 | dev_dbg(wm8350->dev, | |
107 | "%s R%d(0x%2.2x) %d regs\n", __func__, reg, reg, num_regs); | |
108 | ||
109 | #if WM8350_BUS_DEBUG | |
110 | /* we can _safely_ read any register, but warn if read not supported */ | |
111 | for (i = reg; i < end; i++) { | |
112 | if (!wm8350_reg_io_map[i].readable) | |
113 | dev_warn(wm8350->dev, | |
114 | "reg R%d is not readable\n", i); | |
115 | } | |
116 | #endif | |
117 | ||
118 | /* if any volatile registers are required, then read back all */ | |
119 | for (i = reg; i < end; i++) | |
120 | if (wm8350_reg_io_map[i].vol) | |
121 | return wm8350_phys_read(wm8350, reg, num_regs, dest); | |
122 | ||
123 | /* no volatiles, then cache is good */ | |
124 | dev_dbg(wm8350->dev, "cache read\n"); | |
125 | memcpy(dest, &wm8350->reg_cache[reg], bytes); | |
126 | dump(num_regs, dest); | |
127 | return ret; | |
128 | } | |
129 | ||
130 | static inline int is_reg_locked(struct wm8350 *wm8350, u8 reg) | |
131 | { | |
132 | if (reg == WM8350_SECURITY || | |
133 | wm8350->reg_cache[WM8350_SECURITY] == WM8350_UNLOCK_KEY) | |
134 | return 0; | |
135 | ||
8e6ba2df | 136 | if ((reg >= WM8350_GPIO_FUNCTION_SELECT_1 && |
89b4012b MB |
137 | reg <= WM8350_GPIO_FUNCTION_SELECT_4) || |
138 | (reg >= WM8350_BATTERY_CHARGER_CONTROL_1 && | |
139 | reg <= WM8350_BATTERY_CHARGER_CONTROL_3)) | |
140 | return 1; | |
141 | return 0; | |
142 | } | |
143 | ||
144 | static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src) | |
145 | { | |
146 | int i; | |
147 | int end = reg + num_regs; | |
148 | int bytes = num_regs * 2; | |
149 | ||
89b4012b MB |
150 | if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) { |
151 | dev_err(wm8350->dev, "invalid reg %x\n", | |
152 | reg + num_regs - 1); | |
153 | return -EINVAL; | |
154 | } | |
155 | ||
156 | /* it's generally not a good idea to write to RO or locked registers */ | |
157 | for (i = reg; i < end; i++) { | |
158 | if (!wm8350_reg_io_map[i].writable) { | |
159 | dev_err(wm8350->dev, | |
160 | "attempted write to read only reg R%d\n", i); | |
161 | return -EINVAL; | |
162 | } | |
163 | ||
164 | if (is_reg_locked(wm8350, i)) { | |
165 | dev_err(wm8350->dev, | |
166 | "attempted write to locked reg R%d\n", i); | |
167 | return -EINVAL; | |
168 | } | |
169 | ||
170 | src[i - reg] &= wm8350_reg_io_map[i].writable; | |
171 | ||
172 | wm8350->reg_cache[i] = | |
173 | (wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable) | |
174 | | src[i - reg]; | |
175 | ||
176 | src[i - reg] = cpu_to_be16(src[i - reg]); | |
177 | } | |
178 | ||
179 | /* Actually write it out */ | |
b7b142d9 | 180 | return regmap_raw_write(wm8350->regmap, reg, src, bytes); |
89b4012b MB |
181 | } |
182 | ||
183 | /* | |
184 | * Safe read, modify, write methods | |
185 | */ | |
186 | int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask) | |
187 | { | |
188 | u16 data; | |
189 | int err; | |
190 | ||
191 | mutex_lock(&io_mutex); | |
192 | err = wm8350_read(wm8350, reg, 1, &data); | |
193 | if (err) { | |
194 | dev_err(wm8350->dev, "read from reg R%d failed\n", reg); | |
195 | goto out; | |
196 | } | |
197 | ||
198 | data &= ~mask; | |
199 | err = wm8350_write(wm8350, reg, 1, &data); | |
200 | if (err) | |
201 | dev_err(wm8350->dev, "write to reg R%d failed\n", reg); | |
202 | out: | |
203 | mutex_unlock(&io_mutex); | |
204 | return err; | |
205 | } | |
206 | EXPORT_SYMBOL_GPL(wm8350_clear_bits); | |
207 | ||
208 | int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask) | |
209 | { | |
210 | u16 data; | |
211 | int err; | |
212 | ||
213 | mutex_lock(&io_mutex); | |
214 | err = wm8350_read(wm8350, reg, 1, &data); | |
215 | if (err) { | |
216 | dev_err(wm8350->dev, "read from reg R%d failed\n", reg); | |
217 | goto out; | |
218 | } | |
219 | ||
220 | data |= mask; | |
221 | err = wm8350_write(wm8350, reg, 1, &data); | |
222 | if (err) | |
223 | dev_err(wm8350->dev, "write to reg R%d failed\n", reg); | |
224 | out: | |
225 | mutex_unlock(&io_mutex); | |
226 | return err; | |
227 | } | |
228 | EXPORT_SYMBOL_GPL(wm8350_set_bits); | |
229 | ||
230 | u16 wm8350_reg_read(struct wm8350 *wm8350, int reg) | |
231 | { | |
232 | u16 data; | |
233 | int err; | |
234 | ||
235 | mutex_lock(&io_mutex); | |
236 | err = wm8350_read(wm8350, reg, 1, &data); | |
237 | if (err) | |
238 | dev_err(wm8350->dev, "read from reg R%d failed\n", reg); | |
239 | ||
240 | mutex_unlock(&io_mutex); | |
241 | return data; | |
242 | } | |
243 | EXPORT_SYMBOL_GPL(wm8350_reg_read); | |
244 | ||
245 | int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val) | |
246 | { | |
247 | int ret; | |
248 | u16 data = val; | |
249 | ||
250 | mutex_lock(&io_mutex); | |
251 | ret = wm8350_write(wm8350, reg, 1, &data); | |
252 | if (ret) | |
253 | dev_err(wm8350->dev, "write to reg R%d failed\n", reg); | |
254 | mutex_unlock(&io_mutex); | |
255 | return ret; | |
256 | } | |
257 | EXPORT_SYMBOL_GPL(wm8350_reg_write); | |
258 | ||
259 | int wm8350_block_read(struct wm8350 *wm8350, int start_reg, int regs, | |
260 | u16 *dest) | |
261 | { | |
262 | int err = 0; | |
263 | ||
264 | mutex_lock(&io_mutex); | |
265 | err = wm8350_read(wm8350, start_reg, regs, dest); | |
266 | if (err) | |
267 | dev_err(wm8350->dev, "block read starting from R%d failed\n", | |
268 | start_reg); | |
269 | mutex_unlock(&io_mutex); | |
270 | return err; | |
271 | } | |
272 | EXPORT_SYMBOL_GPL(wm8350_block_read); | |
273 | ||
274 | int wm8350_block_write(struct wm8350 *wm8350, int start_reg, int regs, | |
275 | u16 *src) | |
276 | { | |
277 | int ret = 0; | |
278 | ||
279 | mutex_lock(&io_mutex); | |
280 | ret = wm8350_write(wm8350, start_reg, regs, src); | |
281 | if (ret) | |
282 | dev_err(wm8350->dev, "block write starting at R%d failed\n", | |
283 | start_reg); | |
284 | mutex_unlock(&io_mutex); | |
285 | return ret; | |
286 | } | |
287 | EXPORT_SYMBOL_GPL(wm8350_block_write); | |
288 | ||
858e6744 MB |
289 | /** |
290 | * wm8350_reg_lock() | |
291 | * | |
292 | * The WM8350 has a hardware lock which can be used to prevent writes to | |
293 | * some registers (generally those which can cause particularly serious | |
294 | * problems if misused). This function enables that lock. | |
295 | */ | |
89b4012b MB |
296 | int wm8350_reg_lock(struct wm8350 *wm8350) |
297 | { | |
298 | u16 key = WM8350_LOCK_KEY; | |
299 | int ret; | |
300 | ||
301 | ldbg(__func__); | |
302 | mutex_lock(&io_mutex); | |
303 | ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key); | |
304 | if (ret) | |
305 | dev_err(wm8350->dev, "lock failed\n"); | |
306 | mutex_unlock(&io_mutex); | |
307 | return ret; | |
308 | } | |
309 | EXPORT_SYMBOL_GPL(wm8350_reg_lock); | |
310 | ||
858e6744 MB |
311 | /** |
312 | * wm8350_reg_unlock() | |
313 | * | |
314 | * The WM8350 has a hardware lock which can be used to prevent writes to | |
315 | * some registers (generally those which can cause particularly serious | |
316 | * problems if misused). This function disables that lock so updates | |
317 | * can be performed. For maximum safety this should be done only when | |
318 | * required. | |
319 | */ | |
89b4012b MB |
320 | int wm8350_reg_unlock(struct wm8350 *wm8350) |
321 | { | |
322 | u16 key = WM8350_UNLOCK_KEY; | |
323 | int ret; | |
324 | ||
325 | ldbg(__func__); | |
326 | mutex_lock(&io_mutex); | |
327 | ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key); | |
328 | if (ret) | |
329 | dev_err(wm8350->dev, "unlock failed\n"); | |
330 | mutex_unlock(&io_mutex); | |
331 | return ret; | |
332 | } | |
333 | EXPORT_SYMBOL_GPL(wm8350_reg_unlock); | |
334 | ||
67488526 MB |
335 | int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref) |
336 | { | |
337 | u16 reg, result = 0; | |
67488526 MB |
338 | |
339 | if (channel < WM8350_AUXADC_AUX1 || channel > WM8350_AUXADC_TEMP) | |
340 | return -EINVAL; | |
341 | if (channel >= WM8350_AUXADC_USB && channel <= WM8350_AUXADC_TEMP | |
342 | && (scale != 0 || vref != 0)) | |
343 | return -EINVAL; | |
344 | ||
345 | mutex_lock(&wm8350->auxadc_mutex); | |
346 | ||
347 | /* Turn on the ADC */ | |
348 | reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5); | |
349 | wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, reg | WM8350_AUXADC_ENA); | |
350 | ||
351 | if (scale || vref) { | |
352 | reg = scale << 13; | |
353 | reg |= vref << 12; | |
354 | wm8350_reg_write(wm8350, WM8350_AUX1_READBACK + channel, reg); | |
355 | } | |
356 | ||
357 | reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1); | |
358 | reg |= 1 << channel | WM8350_AUXADC_POLL; | |
359 | wm8350_reg_write(wm8350, WM8350_DIGITISER_CONTROL_1, reg); | |
360 | ||
5051d411 MB |
361 | /* If a late IRQ left the completion signalled then consume |
362 | * the completion. */ | |
363 | try_wait_for_completion(&wm8350->auxadc_done); | |
364 | ||
d19663ac MB |
365 | /* We ignore the result of the completion and just check for a |
366 | * conversion result, allowing us to soldier on if the IRQ | |
367 | * infrastructure is not set up for the chip. */ | |
368 | wait_for_completion_timeout(&wm8350->auxadc_done, msecs_to_jiffies(5)); | |
67488526 | 369 | |
d19663ac MB |
370 | reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1); |
371 | if (reg & WM8350_AUXADC_POLL) | |
67488526 MB |
372 | dev_err(wm8350->dev, "adc chn %d read timeout\n", channel); |
373 | else | |
374 | result = wm8350_reg_read(wm8350, | |
375 | WM8350_AUX1_READBACK + channel); | |
376 | ||
377 | /* Turn off the ADC */ | |
378 | reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5); | |
379 | wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, | |
380 | reg & ~WM8350_AUXADC_ENA); | |
381 | ||
382 | mutex_unlock(&wm8350->auxadc_mutex); | |
383 | ||
384 | return result & WM8350_AUXADC_DATA1_MASK; | |
385 | } | |
386 | EXPORT_SYMBOL_GPL(wm8350_read_auxadc); | |
387 | ||
d19663ac MB |
388 | static irqreturn_t wm8350_auxadc_irq(int irq, void *irq_data) |
389 | { | |
390 | struct wm8350 *wm8350 = irq_data; | |
391 | ||
392 | complete(&wm8350->auxadc_done); | |
393 | ||
394 | return IRQ_HANDLED; | |
395 | } | |
396 | ||
89b4012b MB |
397 | /* |
398 | * Cache is always host endian. | |
399 | */ | |
96920630 | 400 | static int wm8350_create_cache(struct wm8350 *wm8350, int type, int mode) |
89b4012b MB |
401 | { |
402 | int i, ret = 0; | |
403 | u16 value; | |
404 | const u16 *reg_map; | |
405 | ||
96920630 | 406 | switch (type) { |
89b4012b | 407 | case 0: |
96920630 MB |
408 | switch (mode) { |
409 | #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_0 | |
410 | case 0: | |
411 | reg_map = wm8350_mode0_defaults; | |
412 | break; | |
89b4012b MB |
413 | #endif |
414 | #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_1 | |
96920630 MB |
415 | case 1: |
416 | reg_map = wm8350_mode1_defaults; | |
417 | break; | |
89b4012b MB |
418 | #endif |
419 | #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_2 | |
96920630 MB |
420 | case 2: |
421 | reg_map = wm8350_mode2_defaults; | |
422 | break; | |
89b4012b MB |
423 | #endif |
424 | #ifdef CONFIG_MFD_WM8350_CONFIG_MODE_3 | |
96920630 MB |
425 | case 3: |
426 | reg_map = wm8350_mode3_defaults; | |
427 | break; | |
89b4012b | 428 | #endif |
96920630 MB |
429 | default: |
430 | dev_err(wm8350->dev, | |
431 | "WM8350 configuration mode %d not supported\n", | |
432 | mode); | |
433 | return -EINVAL; | |
434 | } | |
4331bb32 | 435 | break; |
96920630 | 436 | |
ca23f8c1 MB |
437 | case 1: |
438 | switch (mode) { | |
439 | #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_0 | |
440 | case 0: | |
441 | reg_map = wm8351_mode0_defaults; | |
442 | break; | |
443 | #endif | |
444 | #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_1 | |
445 | case 1: | |
446 | reg_map = wm8351_mode1_defaults; | |
447 | break; | |
448 | #endif | |
449 | #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_2 | |
450 | case 2: | |
451 | reg_map = wm8351_mode2_defaults; | |
452 | break; | |
453 | #endif | |
454 | #ifdef CONFIG_MFD_WM8351_CONFIG_MODE_3 | |
455 | case 3: | |
456 | reg_map = wm8351_mode3_defaults; | |
457 | break; | |
458 | #endif | |
459 | default: | |
460 | dev_err(wm8350->dev, | |
461 | "WM8351 configuration mode %d not supported\n", | |
462 | mode); | |
463 | return -EINVAL; | |
464 | } | |
465 | break; | |
466 | ||
96920630 MB |
467 | case 2: |
468 | switch (mode) { | |
469 | #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_0 | |
470 | case 0: | |
471 | reg_map = wm8352_mode0_defaults; | |
472 | break; | |
473 | #endif | |
474 | #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_1 | |
475 | case 1: | |
476 | reg_map = wm8352_mode1_defaults; | |
477 | break; | |
478 | #endif | |
479 | #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_2 | |
480 | case 2: | |
481 | reg_map = wm8352_mode2_defaults; | |
482 | break; | |
483 | #endif | |
484 | #ifdef CONFIG_MFD_WM8352_CONFIG_MODE_3 | |
485 | case 3: | |
486 | reg_map = wm8352_mode3_defaults; | |
487 | break; | |
488 | #endif | |
489 | default: | |
490 | dev_err(wm8350->dev, | |
491 | "WM8352 configuration mode %d not supported\n", | |
492 | mode); | |
493 | return -EINVAL; | |
494 | } | |
495 | break; | |
496 | ||
89b4012b | 497 | default: |
96920630 MB |
498 | dev_err(wm8350->dev, |
499 | "WM835x configuration mode %d not supported\n", | |
89b4012b MB |
500 | mode); |
501 | return -EINVAL; | |
502 | } | |
503 | ||
504 | wm8350->reg_cache = | |
9dfd3381 | 505 | kmalloc(sizeof(u16) * (WM8350_MAX_REGISTER + 1), GFP_KERNEL); |
89b4012b MB |
506 | if (wm8350->reg_cache == NULL) |
507 | return -ENOMEM; | |
508 | ||
509 | /* Read the initial cache state back from the device - this is | |
510 | * a PMIC so the device many not be in a virgin state and we | |
511 | * can't rely on the silicon values. | |
512 | */ | |
b7b142d9 MB |
513 | ret = regmap_raw_read(wm8350->regmap, 0, wm8350->reg_cache, |
514 | sizeof(u16) * (WM8350_MAX_REGISTER + 1)); | |
9dfd3381 MB |
515 | if (ret < 0) { |
516 | dev_err(wm8350->dev, | |
517 | "failed to read initial cache values\n"); | |
518 | goto out; | |
519 | } | |
520 | ||
521 | /* Mask out uncacheable/unreadable bits and the audio. */ | |
89b4012b | 522 | for (i = 0; i < WM8350_MAX_REGISTER; i++) { |
89b4012b MB |
523 | if (wm8350_reg_io_map[i].readable && |
524 | (i < WM8350_CLOCK_CONTROL_1 || i > WM8350_AIF_TEST)) { | |
9dfd3381 | 525 | value = be16_to_cpu(wm8350->reg_cache[i]); |
89b4012b MB |
526 | value &= wm8350_reg_io_map[i].readable; |
527 | wm8350->reg_cache[i] = value; | |
528 | } else | |
529 | wm8350->reg_cache[i] = reg_map[i]; | |
530 | } | |
531 | ||
532 | out: | |
8c46cf30 | 533 | kfree(wm8350->reg_cache); |
89b4012b MB |
534 | return ret; |
535 | } | |
89b4012b | 536 | |
9201d38b MB |
537 | /* |
538 | * Register a client device. This is non-fatal since there is no need to | |
539 | * fail the entire device init due to a single platform device failing. | |
540 | */ | |
541 | static void wm8350_client_dev_register(struct wm8350 *wm8350, | |
542 | const char *name, | |
543 | struct platform_device **pdev) | |
544 | { | |
545 | int ret; | |
546 | ||
547 | *pdev = platform_device_alloc(name, -1); | |
cb9b2245 | 548 | if (*pdev == NULL) { |
9201d38b MB |
549 | dev_err(wm8350->dev, "Failed to allocate %s\n", name); |
550 | return; | |
551 | } | |
552 | ||
553 | (*pdev)->dev.parent = wm8350->dev; | |
554 | platform_set_drvdata(*pdev, wm8350); | |
555 | ret = platform_device_add(*pdev); | |
556 | if (ret != 0) { | |
557 | dev_err(wm8350->dev, "Failed to register %s: %d\n", name, ret); | |
558 | platform_device_put(*pdev); | |
559 | *pdev = NULL; | |
560 | } | |
561 | } | |
562 | ||
ebccec0f | 563 | int wm8350_device_init(struct wm8350 *wm8350, int irq, |
bcdd4efc | 564 | struct wm8350_platform_data *pdata) |
89b4012b | 565 | { |
85c93ea7 | 566 | int ret; |
b7b142d9 MB |
567 | unsigned int id1, id2, mask_rev; |
568 | unsigned int cust_id, mode, chip_rev; | |
89b4012b | 569 | |
18bf50a3 MB |
570 | dev_set_drvdata(wm8350->dev, wm8350); |
571 | ||
89b4012b | 572 | /* get WM8350 revision and config mode */ |
b7b142d9 | 573 | ret = regmap_read(wm8350->regmap, WM8350_RESET_ID, &id1); |
85c93ea7 MB |
574 | if (ret != 0) { |
575 | dev_err(wm8350->dev, "Failed to read ID: %d\n", ret); | |
576 | goto err; | |
577 | } | |
578 | ||
b7b142d9 | 579 | ret = regmap_read(wm8350->regmap, WM8350_ID, &id2); |
85c93ea7 MB |
580 | if (ret != 0) { |
581 | dev_err(wm8350->dev, "Failed to read ID: %d\n", ret); | |
582 | goto err; | |
583 | } | |
584 | ||
b7b142d9 | 585 | ret = regmap_read(wm8350->regmap, WM8350_REVISION, &mask_rev); |
85c93ea7 MB |
586 | if (ret != 0) { |
587 | dev_err(wm8350->dev, "Failed to read revision: %d\n", ret); | |
588 | goto err; | |
589 | } | |
89b4012b | 590 | |
b797a555 MB |
591 | if (id1 != 0x6143) { |
592 | dev_err(wm8350->dev, | |
593 | "Device with ID %x is not a WM8350\n", id1); | |
594 | ret = -ENODEV; | |
595 | goto err; | |
596 | } | |
597 | ||
598 | mode = id2 & WM8350_CONF_STS_MASK >> 10; | |
599 | cust_id = id2 & WM8350_CUST_ID_MASK; | |
600 | chip_rev = (id2 & WM8350_CHIP_REV_MASK) >> 12; | |
601 | dev_info(wm8350->dev, | |
602 | "CONF_STS %d, CUST_ID %d, MASK_REV %d, CHIP_REV %d\n", | |
603 | mode, cust_id, mask_rev, chip_rev); | |
604 | ||
605 | if (cust_id != 0) { | |
606 | dev_err(wm8350->dev, "Unsupported CUST_ID\n"); | |
607 | ret = -ENODEV; | |
608 | goto err; | |
609 | } | |
610 | ||
611 | switch (mask_rev) { | |
612 | case 0: | |
645524a9 MB |
613 | wm8350->pmic.max_dcdc = WM8350_DCDC_6; |
614 | wm8350->pmic.max_isink = WM8350_ISINK_B; | |
615 | ||
b797a555 | 616 | switch (chip_rev) { |
89b4012b | 617 | case WM8350_REV_E: |
b797a555 | 618 | dev_info(wm8350->dev, "WM8350 Rev E\n"); |
89b4012b MB |
619 | break; |
620 | case WM8350_REV_F: | |
b797a555 | 621 | dev_info(wm8350->dev, "WM8350 Rev F\n"); |
89b4012b MB |
622 | break; |
623 | case WM8350_REV_G: | |
b797a555 | 624 | dev_info(wm8350->dev, "WM8350 Rev G\n"); |
d756f4a4 | 625 | wm8350->power.rev_g_coeff = 1; |
89b4012b | 626 | break; |
0c8a6016 | 627 | case WM8350_REV_H: |
b797a555 | 628 | dev_info(wm8350->dev, "WM8350 Rev H\n"); |
d756f4a4 | 629 | wm8350->power.rev_g_coeff = 1; |
0c8a6016 | 630 | break; |
89b4012b MB |
631 | default: |
632 | /* For safety we refuse to run on unknown hardware */ | |
b797a555 | 633 | dev_err(wm8350->dev, "Unknown WM8350 CHIP_REV\n"); |
89b4012b MB |
634 | ret = -ENODEV; |
635 | goto err; | |
636 | } | |
b797a555 MB |
637 | break; |
638 | ||
ca23f8c1 MB |
639 | case 1: |
640 | wm8350->pmic.max_dcdc = WM8350_DCDC_4; | |
641 | wm8350->pmic.max_isink = WM8350_ISINK_A; | |
642 | ||
643 | switch (chip_rev) { | |
644 | case 0: | |
645 | dev_info(wm8350->dev, "WM8351 Rev A\n"); | |
646 | wm8350->power.rev_g_coeff = 1; | |
647 | break; | |
648 | ||
02d46e07 MB |
649 | case 1: |
650 | dev_info(wm8350->dev, "WM8351 Rev B\n"); | |
651 | wm8350->power.rev_g_coeff = 1; | |
652 | break; | |
653 | ||
ca23f8c1 MB |
654 | default: |
655 | dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n"); | |
656 | ret = -ENODEV; | |
657 | goto err; | |
658 | } | |
659 | break; | |
660 | ||
96920630 | 661 | case 2: |
645524a9 MB |
662 | wm8350->pmic.max_dcdc = WM8350_DCDC_6; |
663 | wm8350->pmic.max_isink = WM8350_ISINK_B; | |
664 | ||
96920630 MB |
665 | switch (chip_rev) { |
666 | case 0: | |
667 | dev_info(wm8350->dev, "WM8352 Rev A\n"); | |
668 | wm8350->power.rev_g_coeff = 1; | |
669 | break; | |
670 | ||
671 | default: | |
672 | dev_err(wm8350->dev, "Unknown WM8352 CHIP_REV\n"); | |
673 | ret = -ENODEV; | |
674 | goto err; | |
675 | } | |
676 | break; | |
677 | ||
b797a555 MB |
678 | default: |
679 | dev_err(wm8350->dev, "Unknown MASK_REV\n"); | |
89b4012b MB |
680 | ret = -ENODEV; |
681 | goto err; | |
682 | } | |
683 | ||
96920630 | 684 | ret = wm8350_create_cache(wm8350, mask_rev, mode); |
89b4012b | 685 | if (ret < 0) { |
b797a555 | 686 | dev_err(wm8350->dev, "Failed to create register cache\n"); |
89b4012b MB |
687 | return ret; |
688 | } | |
689 | ||
67488526 | 690 | mutex_init(&wm8350->auxadc_mutex); |
d19663ac | 691 | init_completion(&wm8350->auxadc_done); |
32064503 | 692 | |
e0a3389a MB |
693 | ret = wm8350_irq_init(wm8350, irq, pdata); |
694 | if (ret < 0) | |
8c46cf30 | 695 | goto err_free; |
ebccec0f | 696 | |
d19663ac MB |
697 | if (wm8350->irq_base) { |
698 | ret = request_threaded_irq(wm8350->irq_base + | |
699 | WM8350_IRQ_AUXADC_DATARDY, | |
700 | NULL, wm8350_auxadc_irq, 0, | |
701 | "auxadc", wm8350); | |
702 | if (ret < 0) | |
703 | dev_warn(wm8350->dev, | |
704 | "Failed to request AUXADC IRQ: %d\n", ret); | |
705 | } | |
706 | ||
62571c29 MB |
707 | if (pdata && pdata->init) { |
708 | ret = pdata->init(wm8350); | |
709 | if (ret != 0) { | |
710 | dev_err(wm8350->dev, "Platform init() failed: %d\n", | |
711 | ret); | |
e0a3389a | 712 | goto err_irq; |
62571c29 MB |
713 | } |
714 | } | |
715 | ||
ebccec0f MB |
716 | wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0); |
717 | ||
add41cb4 MB |
718 | wm8350_client_dev_register(wm8350, "wm8350-codec", |
719 | &(wm8350->codec.pdev)); | |
720 | wm8350_client_dev_register(wm8350, "wm8350-gpio", | |
721 | &(wm8350->gpio.pdev)); | |
fb6c023a MB |
722 | wm8350_client_dev_register(wm8350, "wm8350-hwmon", |
723 | &(wm8350->hwmon.pdev)); | |
add41cb4 MB |
724 | wm8350_client_dev_register(wm8350, "wm8350-power", |
725 | &(wm8350->power.pdev)); | |
726 | wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev)); | |
727 | wm8350_client_dev_register(wm8350, "wm8350-wdt", &(wm8350->wdt.pdev)); | |
728 | ||
89b4012b MB |
729 | return 0; |
730 | ||
e0a3389a MB |
731 | err_irq: |
732 | wm8350_irq_exit(wm8350); | |
8c46cf30 | 733 | err_free: |
89b4012b | 734 | kfree(wm8350->reg_cache); |
8c46cf30 | 735 | err: |
89b4012b MB |
736 | return ret; |
737 | } | |
738 | EXPORT_SYMBOL_GPL(wm8350_device_init); | |
739 | ||
740 | void wm8350_device_exit(struct wm8350 *wm8350) | |
741 | { | |
da09155a MB |
742 | int i; |
743 | ||
0081e802 MB |
744 | for (i = 0; i < ARRAY_SIZE(wm8350->pmic.led); i++) |
745 | platform_device_unregister(wm8350->pmic.led[i].pdev); | |
746 | ||
da09155a | 747 | for (i = 0; i < ARRAY_SIZE(wm8350->pmic.pdev); i++) |
add41cb4 MB |
748 | platform_device_unregister(wm8350->pmic.pdev[i]); |
749 | ||
750 | platform_device_unregister(wm8350->wdt.pdev); | |
751 | platform_device_unregister(wm8350->rtc.pdev); | |
752 | platform_device_unregister(wm8350->power.pdev); | |
fb6c023a | 753 | platform_device_unregister(wm8350->hwmon.pdev); |
add41cb4 MB |
754 | platform_device_unregister(wm8350->gpio.pdev); |
755 | platform_device_unregister(wm8350->codec.pdev); | |
da09155a | 756 | |
d19663ac MB |
757 | if (wm8350->irq_base) |
758 | free_irq(wm8350->irq_base + WM8350_IRQ_AUXADC_DATARDY, wm8350); | |
759 | ||
e0a3389a MB |
760 | wm8350_irq_exit(wm8350); |
761 | ||
89b4012b MB |
762 | kfree(wm8350->reg_cache); |
763 | } | |
764 | EXPORT_SYMBOL_GPL(wm8350_device_exit); | |
765 | ||
ebccec0f | 766 | MODULE_DESCRIPTION("WM8350 AudioPlus PMIC core driver"); |
89b4012b | 767 | MODULE_LICENSE("GPL"); |