[linux-2.6-block.git] / drivers / mfd / wm8350-core.c

/*
 * wm8350-core.c  --  Device access for Wolfson WM8350
 *
 * Copyright 2007, 2008 Wolfson Microelectronics PLC.
 *
 * Author: Liam Girdwood, Mark Brown
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 *  option) any later version.
 *
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/bug.h>
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/workqueue.h>

#include <linux/mfd/wm8350/core.h>
#include <linux/mfd/wm8350/audio.h>
#include <linux/mfd/wm8350/comparator.h>
#include <linux/mfd/wm8350/gpio.h>
#include <linux/mfd/wm8350/pmic.h>
#include <linux/mfd/wm8350/rtc.h>
#include <linux/mfd/wm8350/supply.h>
#include <linux/mfd/wm8350/wdt.h>

#define WM8350_UNLOCK_KEY		0x0013
#define WM8350_LOCK_KEY			0x0000

#define WM8350_CLOCK_CONTROL_1		0x28
#define WM8350_AIF_TEST			0x74

/* debug */
#define WM8350_BUS_DEBUG 0
#if WM8350_BUS_DEBUG
#define dump(regs, src) do { \
	int i_; \
	u16 *src_ = src; \
	printk(KERN_DEBUG); \
	for (i_ = 0; i_ < regs; i_++) \
		printk(" 0x%4.4x", *src_++); \
	printk("\n"); \
} while (0);
#else
#define dump(bytes, src)
#endif

#define WM8350_LOCK_DEBUG 0
#if WM8350_LOCK_DEBUG
#define ldbg(format, arg...) printk(format, ## arg)
#else
#define ldbg(format, arg...)
#endif

/*
 * WM8350 Device IO
 */
static DEFINE_MUTEX(io_mutex);
static DEFINE_MUTEX(reg_lock_mutex);

/* Perform a physical read from the device.
 */
static int wm8350_phys_read(struct wm8350 *wm8350, u8 reg, int num_regs,
			    u16 *dest)
{
	int i, ret;
	int bytes = num_regs * 2;

	dev_dbg(wm8350->dev, "volatile read\n");
	ret = wm8350->read_dev(wm8350, reg, bytes, (char *)dest);

	for (i = reg; i < reg + num_regs; i++) {
		/* Cache is CPU endian */
		dest[i - reg] = be16_to_cpu(dest[i - reg]);

		/* Mask out non-readable bits */
		dest[i - reg] &= wm8350_reg_io_map[i].readable;
	}

	dump(num_regs, dest);

	return ret;
}

static int wm8350_read(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *dest)
{
	int i;
	int end = reg + num_regs;
	int ret = 0;
	int bytes = num_regs * 2;

	if (wm8350->read_dev == NULL)
		return -ENODEV;

	if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
		dev_err(wm8350->dev, "invalid reg %x\n",
			reg + num_regs - 1);
		return -EINVAL;
	}

	dev_dbg(wm8350->dev,
		"%s R%d(0x%2.2x) %d regs\n", __func__, reg, reg, num_regs);

#if WM8350_BUS_DEBUG
	/* we can _safely_ read any register, but warn if read not supported */
	for (i = reg; i < end; i++) {
		if (!wm8350_reg_io_map[i].readable)
			dev_warn(wm8350->dev,
				"reg R%d is not readable\n", i);
	}
#endif

	/* if any volatile registers are required, then read back all */
	for (i = reg; i < end; i++)
		if (wm8350_reg_io_map[i].vol)
			return wm8350_phys_read(wm8350, reg, num_regs, dest);

	/* no volatiles, then cache is good */
	dev_dbg(wm8350->dev, "cache read\n");
	memcpy(dest, &wm8350->reg_cache[reg], bytes);
	dump(num_regs, dest);
	return ret;
}

static inline int is_reg_locked(struct wm8350 *wm8350, u8 reg)
{
	if (reg == WM8350_SECURITY ||
	    wm8350->reg_cache[WM8350_SECURITY] == WM8350_UNLOCK_KEY)
		return 0;

	if ((reg == WM8350_GPIO_CONFIGURATION_I_O) ||
	    (reg >= WM8350_GPIO_FUNCTION_SELECT_1 &&
	     reg <= WM8350_GPIO_FUNCTION_SELECT_4) ||
	    (reg >= WM8350_BATTERY_CHARGER_CONTROL_1 &&
	     reg <= WM8350_BATTERY_CHARGER_CONTROL_3))
		return 1;
	return 0;
}

static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src)
{
	int i;
	int end = reg + num_regs;
	int bytes = num_regs * 2;

	if (wm8350->write_dev == NULL)
		return -ENODEV;

	if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
		dev_err(wm8350->dev, "invalid reg %x\n",
			reg + num_regs - 1);
		return -EINVAL;
	}

	/* it's generally not a good idea to write to RO or locked registers */
	for (i = reg; i < end; i++) {
		if (!wm8350_reg_io_map[i].writable) {
			dev_err(wm8350->dev,
				"attempted write to read only reg R%d\n", i);
			return -EINVAL;
		}

		if (is_reg_locked(wm8350, i)) {
			dev_err(wm8350->dev,
			       "attempted write to locked reg R%d\n", i);
			return -EINVAL;
		}

		src[i - reg] &= wm8350_reg_io_map[i].writable;

		wm8350->reg_cache[i] =
			(wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable)
			| src[i - reg];

		src[i - reg] = cpu_to_be16(src[i - reg]);
	}

	/* Actually write it out */
	return wm8350->write_dev(wm8350, reg, bytes, (char *)src);
}

/*
 * Safe read, modify, write methods
 */
int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
{
	u16 data;
	int err;

	mutex_lock(&io_mutex);
	err = wm8350_read(wm8350, reg, 1, &data);
	if (err) {
		dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
		goto out;
	}

	data &= ~mask;
	err = wm8350_write(wm8350, reg, 1, &data);
	if (err)
		dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
out:
	mutex_unlock(&io_mutex);
	return err;
}
EXPORT_SYMBOL_GPL(wm8350_clear_bits);

int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
{
	u16 data;
	int err;

	mutex_lock(&io_mutex);
	err = wm8350_read(wm8350, reg, 1, &data);
	if (err) {
		dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
		goto out;
	}

	data |= mask;
	err = wm8350_write(wm8350, reg, 1, &data);
	if (err)
		dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
out:
	mutex_unlock(&io_mutex);
	return err;
}
EXPORT_SYMBOL_GPL(wm8350_set_bits);

u16 wm8350_reg_read(struct wm8350 *wm8350, int reg)
{
	u16 data;
	int err;

	mutex_lock(&io_mutex);
	err = wm8350_read(wm8350, reg, 1, &data);
	if (err)
		dev_err(wm8350->dev, "read from reg R%d failed\n", reg);

	mutex_unlock(&io_mutex);
	return data;
}
EXPORT_SYMBOL_GPL(wm8350_reg_read);

int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val)
{
	int ret;
	u16 data = val;

	mutex_lock(&io_mutex);
	ret = wm8350_write(wm8350, reg, 1, &data);
	if (ret)
		dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
	mutex_unlock(&io_mutex);
	return ret;
}
EXPORT_SYMBOL_GPL(wm8350_reg_write);

int wm8350_block_read(struct wm8350 *wm8350, int start_reg, int regs,
		      u16 *dest)
{
	int err = 0;

	mutex_lock(&io_mutex);
	err = wm8350_read(wm8350, start_reg, regs, dest);
	if (err)
		dev_err(wm8350->dev, "block read starting from R%d failed\n",
			start_reg);
	mutex_unlock(&io_mutex);
	return err;
}
EXPORT_SYMBOL_GPL(wm8350_block_read);

int wm8350_block_write(struct wm8350 *wm8350, int start_reg, int regs,
		       u16 *src)
{
	int ret = 0;

	mutex_lock(&io_mutex);
	ret = wm8350_write(wm8350, start_reg, regs, src);
	if (ret)
		dev_err(wm8350->dev, "block write starting at R%d failed\n",
			start_reg);
	mutex_unlock(&io_mutex);
	return ret;
}
EXPORT_SYMBOL_GPL(wm8350_block_write);

/**
 * wm8350_reg_lock()
 *
 * The WM8350 has a hardware lock which can be used to prevent writes to
 * some registers (generally those which can cause particularly serious
 * problems if misused).  This function enables that lock.
 */
int wm8350_reg_lock(struct wm8350 *wm8350)
{
	u16 key = WM8350_LOCK_KEY;
	int ret;

	ldbg(__func__);
	mutex_lock(&io_mutex);
	ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
	if (ret)
		dev_err(wm8350->dev, "lock failed\n");
	mutex_unlock(&io_mutex);
	return ret;
}
EXPORT_SYMBOL_GPL(wm8350_reg_lock);

/**
 * wm8350_reg_unlock()
 *
 * The WM8350 has a hardware lock which can be used to prevent writes to
 * some registers (generally those which can cause particularly serious
 * problems if misused).  This function disables that lock so updates
 * can be performed.  For maximum safety this should be done only when
 * required.
 */
int wm8350_reg_unlock(struct wm8350 *wm8350)
{
	u16 key = WM8350_UNLOCK_KEY;
	int ret;

	ldbg(__func__);
	mutex_lock(&io_mutex);
	ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
	if (ret)
		dev_err(wm8350->dev, "unlock failed\n");
	mutex_unlock(&io_mutex);
	return ret;
}
EXPORT_SYMBOL_GPL(wm8350_reg_unlock);

int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref)
{
	u16 reg, result = 0;
	int tries = 5;

	if (channel < WM8350_AUXADC_AUX1 || channel > WM8350_AUXADC_TEMP)
		return -EINVAL;
	if (channel >= WM8350_AUXADC_USB && channel <= WM8350_AUXADC_TEMP
	    && (scale != 0 || vref != 0))
		return -EINVAL;

	mutex_lock(&wm8350->auxadc_mutex);

	/* Turn on the ADC */
	reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
	wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, reg | WM8350_AUXADC_ENA);

	if (scale || vref) {
		reg = scale << 13;
		reg |= vref << 12;
		wm8350_reg_write(wm8350, WM8350_AUX1_READBACK + channel, reg);
	}

	reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
	reg |= 1 << channel | WM8350_AUXADC_POLL;
	wm8350_reg_write(wm8350, WM8350_DIGITISER_CONTROL_1, reg);

	do {
		schedule_timeout_interruptible(1);
		reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
	} while ((reg & WM8350_AUXADC_POLL) && --tries);

	if (!tries)
		dev_err(wm8350->dev, "adc chn %d read timeout\n", channel);
	else
		result = wm8350_reg_read(wm8350,
					 WM8350_AUX1_READBACK + channel);

	/* Turn off the ADC */
	reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
	wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5,
			 reg & ~WM8350_AUXADC_ENA);

	mutex_unlock(&wm8350->auxadc_mutex);

	return result & WM8350_AUXADC_DATA1_MASK;
}
EXPORT_SYMBOL_GPL(wm8350_read_auxadc);

/*
 * Cache is always host endian.
 */
static int wm8350_create_cache(struct wm8350 *wm8350, int type, int mode)
{
	int i, ret = 0;
	u16 value;
	const u16 *reg_map;

	switch (type) {
	case 0:
		switch (mode) {
#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_0
		case 0:
			reg_map = wm8350_mode0_defaults;
			break;
#endif
#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_1
		case 1:
			reg_map = wm8350_mode1_defaults;
			break;
#endif
#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_2
		case 2:
			reg_map = wm8350_mode2_defaults;
			break;
#endif
#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_3
		case 3:
			reg_map = wm8350_mode3_defaults;
			break;
#endif
		default:
			dev_err(wm8350->dev,
				"WM8350 configuration mode %d not supported\n",
				mode);
			return -EINVAL;
		}
		break;

	case 1:
		switch (mode) {
#ifdef CONFIG_MFD_WM8351_CONFIG_MODE_0
		case 0:
			reg_map = wm8351_mode0_defaults;
			break;
#endif
#ifdef CONFIG_MFD_WM8351_CONFIG_MODE_1
		case 1:
			reg_map = wm8351_mode1_defaults;
			break;
#endif
#ifdef CONFIG_MFD_WM8351_CONFIG_MODE_2
		case 2:
			reg_map = wm8351_mode2_defaults;
			break;
#endif
#ifdef CONFIG_MFD_WM8351_CONFIG_MODE_3
		case 3:
			reg_map = wm8351_mode3_defaults;
			break;
#endif
		default:
			dev_err(wm8350->dev,
				"WM8351 configuration mode %d not supported\n",
				mode);
			return -EINVAL;
		}
		break;

	case 2:
		switch (mode) {
#ifdef CONFIG_MFD_WM8352_CONFIG_MODE_0
		case 0:
			reg_map = wm8352_mode0_defaults;
			break;
#endif
#ifdef CONFIG_MFD_WM8352_CONFIG_MODE_1
		case 1:
			reg_map = wm8352_mode1_defaults;
			break;
#endif
#ifdef CONFIG_MFD_WM8352_CONFIG_MODE_2
		case 2:
			reg_map = wm8352_mode2_defaults;
			break;
#endif
#ifdef CONFIG_MFD_WM8352_CONFIG_MODE_3
		case 3:
			reg_map = wm8352_mode3_defaults;
			break;
#endif
		default:
			dev_err(wm8350->dev,
				"WM8352 configuration mode %d not supported\n",
				mode);
			return -EINVAL;
		}
		break;

	default:
		dev_err(wm8350->dev,
			"WM835x configuration mode %d not supported\n",
			mode);
		return -EINVAL;
	}

	wm8350->reg_cache =
		kmalloc(sizeof(u16) * (WM8350_MAX_REGISTER + 1), GFP_KERNEL);
	if (wm8350->reg_cache == NULL)
		return -ENOMEM;

	/* Read the initial cache state back from the device - this is
	 * a PMIC so the device many not be in a virgin state and we
	 * can't rely on the silicon values.
	 */
	ret = wm8350->read_dev(wm8350, 0,
			       sizeof(u16) * (WM8350_MAX_REGISTER + 1),
			       wm8350->reg_cache);
	if (ret < 0) {
		dev_err(wm8350->dev,
			"failed to read initial cache values\n");
		goto out;
	}

	/* Mask out uncacheable/unreadable bits and the audio. */
	for (i = 0; i < WM8350_MAX_REGISTER; i++) {
		if (wm8350_reg_io_map[i].readable &&
		    (i < WM8350_CLOCK_CONTROL_1 || i > WM8350_AIF_TEST)) {
			value = be16_to_cpu(wm8350->reg_cache[i]);
			value &= wm8350_reg_io_map[i].readable;
			wm8350->reg_cache[i] = value;
		} else
			wm8350->reg_cache[i] = reg_map[i];
	}

out:
	return ret;
}

/*
 * Register a client device.  This is non-fatal since there is no need to
 * fail the entire device init due to a single platform device failing.
 */
static void wm8350_client_dev_register(struct wm8350 *wm8350,
				       const char *name,
				       struct platform_device **pdev)
{
	int ret;

	*pdev = platform_device_alloc(name, -1);
	if (pdev == NULL) {
		dev_err(wm8350->dev, "Failed to allocate %s\n", name);
		return;
	}

	(*pdev)->dev.parent = wm8350->dev;
	platform_set_drvdata(*pdev, wm8350);
	ret = platform_device_add(*pdev);
	if (ret != 0) {
		dev_err(wm8350->dev, "Failed to register %s: %d\n", name, ret);
		platform_device_put(*pdev);
		*pdev = NULL;
	}
}

int wm8350_device_init(struct wm8350 *wm8350, int irq,
		       struct wm8350_platform_data *pdata)
{
	int ret;
	u16 id1, id2, mask_rev;
	u16 cust_id, mode, chip_rev;

	/* get WM8350 revision and config mode */
	ret = wm8350->read_dev(wm8350, WM8350_RESET_ID, sizeof(id1), &id1);
	if (ret != 0) {
		dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
		goto err;
	}

	ret = wm8350->read_dev(wm8350, WM8350_ID, sizeof(id2), &id2);
	if (ret != 0) {
		dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
		goto err;
	}

	ret = wm8350->read_dev(wm8350, WM8350_REVISION, sizeof(mask_rev),
			       &mask_rev);
	if (ret != 0) {
		dev_err(wm8350->dev, "Failed to read revision: %d\n", ret);
		goto err;
	}

	id1 = be16_to_cpu(id1);
	id2 = be16_to_cpu(id2);
	mask_rev = be16_to_cpu(mask_rev);

	if (id1 != 0x6143) {
		dev_err(wm8350->dev,
			"Device with ID %x is not a WM8350\n", id1);
		ret = -ENODEV;
		goto err;
	}

	mode = id2 & WM8350_CONF_STS_MASK >> 10;
	cust_id = id2 & WM8350_CUST_ID_MASK;
	chip_rev = (id2 & WM8350_CHIP_REV_MASK) >> 12;
	dev_info(wm8350->dev,
		 "CONF_STS %d, CUST_ID %d, MASK_REV %d, CHIP_REV %d\n",
		 mode, cust_id, mask_rev, chip_rev);

	if (cust_id != 0) {
		dev_err(wm8350->dev, "Unsupported CUST_ID\n");
		ret = -ENODEV;
		goto err;
	}

	switch (mask_rev) {
	case 0:
		wm8350->pmic.max_dcdc = WM8350_DCDC_6;
		wm8350->pmic.max_isink = WM8350_ISINK_B;

		switch (chip_rev) {
		case WM8350_REV_E:
			dev_info(wm8350->dev, "WM8350 Rev E\n");
			break;
		case WM8350_REV_F:
			dev_info(wm8350->dev, "WM8350 Rev F\n");
			break;
		case WM8350_REV_G:
			dev_info(wm8350->dev, "WM8350 Rev G\n");
			wm8350->power.rev_g_coeff = 1;
			break;
		case WM8350_REV_H:
			dev_info(wm8350->dev, "WM8350 Rev H\n");
			wm8350->power.rev_g_coeff = 1;
			break;
		default:
			/* For safety we refuse to run on unknown hardware */
			dev_err(wm8350->dev, "Unknown WM8350 CHIP_REV\n");
			ret = -ENODEV;
			goto err;
		}
		break;

	case 1:
		wm8350->pmic.max_dcdc = WM8350_DCDC_4;
		wm8350->pmic.max_isink = WM8350_ISINK_A;

		switch (chip_rev) {
		case 0:
			dev_info(wm8350->dev, "WM8351 Rev A\n");
			wm8350->power.rev_g_coeff = 1;
			break;

		case 1:
			dev_info(wm8350->dev, "WM8351 Rev B\n");
			wm8350->power.rev_g_coeff = 1;
			break;

		default:
			dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n");
			ret = -ENODEV;
			goto err;
		}
		break;

	case 2:
		wm8350->pmic.max_dcdc = WM8350_DCDC_6;
		wm8350->pmic.max_isink = WM8350_ISINK_B;

		switch (chip_rev) {
		case 0:
			dev_info(wm8350->dev, "WM8352 Rev A\n");
			wm8350->power.rev_g_coeff = 1;
			break;

		default:
			dev_err(wm8350->dev, "Unknown WM8352 CHIP_REV\n");
			ret = -ENODEV;
			goto err;
		}
		break;

	default:
		dev_err(wm8350->dev, "Unknown MASK_REV\n");
		ret = -ENODEV;
		goto err;
	}

	ret = wm8350_create_cache(wm8350, mask_rev, mode);
	if (ret < 0) {
		dev_err(wm8350->dev, "Failed to create register cache\n");
		return ret;
	}

	mutex_init(&wm8350->auxadc_mutex);

	ret = wm8350_irq_init(wm8350, irq, pdata);
	if (ret < 0)
		goto err;

	if (pdata && pdata->init) {
		ret = pdata->init(wm8350);
		if (ret != 0) {
			dev_err(wm8350->dev, "Platform init() failed: %d\n",
				ret);
			goto err_irq;
		}
	}

	wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0);

	wm8350_client_dev_register(wm8350, "wm8350-codec",
				   &(wm8350->codec.pdev));
	wm8350_client_dev_register(wm8350, "wm8350-gpio",
				   &(wm8350->gpio.pdev));
	wm8350_client_dev_register(wm8350, "wm8350-hwmon",
				   &(wm8350->hwmon.pdev));
	wm8350_client_dev_register(wm8350, "wm8350-power",
				   &(wm8350->power.pdev));
	wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev));
	wm8350_client_dev_register(wm8350, "wm8350-wdt", &(wm8350->wdt.pdev));

	return 0;

err_irq:
	wm8350_irq_exit(wm8350);
err:
	kfree(wm8350->reg_cache);
	return ret;
}
EXPORT_SYMBOL_GPL(wm8350_device_init);

void wm8350_device_exit(struct wm8350 *wm8350)
{
	int i;

	for (i = 0; i < ARRAY_SIZE(wm8350->pmic.led); i++)
		platform_device_unregister(wm8350->pmic.led[i].pdev);

	for (i = 0; i < ARRAY_SIZE(wm8350->pmic.pdev); i++)
		platform_device_unregister(wm8350->pmic.pdev[i]);

	platform_device_unregister(wm8350->wdt.pdev);
	platform_device_unregister(wm8350->rtc.pdev);
	platform_device_unregister(wm8350->power.pdev);
	platform_device_unregister(wm8350->hwmon.pdev);
	platform_device_unregister(wm8350->gpio.pdev);
	platform_device_unregister(wm8350->codec.pdev);

	wm8350_irq_exit(wm8350);

	kfree(wm8350->reg_cache);
}
EXPORT_SYMBOL_GPL(wm8350_device_exit);

MODULE_DESCRIPTION("WM8350 AudioPlus PMIC core driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
89b4012b MB	1	/*
	2	* wm8350-core.c -- Device access for Wolfson WM8350
	3	*
	4	* Copyright 2007, 2008 Wolfson Microelectronics PLC.
	5	*
	6	* Author: Liam Girdwood, Mark Brown
	7	*
	8	* This program is free software; you can redistribute it and/or modify it
	9	* under the terms of the GNU General Public License as published by the
	10	* Free Software Foundation; either version 2 of the License, or (at your
	11	* option) any later version.
	12	*
	13	*/
	14
	15	#include <linux/kernel.h>
	16	#include <linux/module.h>
	17	#include <linux/init.h>
ebccec0f	18	#include <linux/bug.h>
89b4012b MB	19	#include <linux/device.h>
	20	#include <linux/delay.h>
	21	#include <linux/interrupt.h>
ebccec0f	22	#include <linux/workqueue.h>
89b4012b MB	23
	24	#include <linux/mfd/wm8350/core.h>
	25	#include <linux/mfd/wm8350/audio.h>
ebccec0f	26	#include <linux/mfd/wm8350/comparator.h>
89b4012b MB	27	#include <linux/mfd/wm8350/gpio.h>
89b4012b MB	28	#include <linux/mfd/wm8350/pmic.h>
ebccec0f	29	#include <linux/mfd/wm8350/rtc.h>
89b4012b	30	#include <linux/mfd/wm8350/supply.h>
ebccec0f	31	#include <linux/mfd/wm8350/wdt.h>
89b4012b MB	32
	33	#define WM8350_UNLOCK_KEY 0x0013
	34	#define WM8350_LOCK_KEY 0x0000
	35
	36	#define WM8350_CLOCK_CONTROL_1 0x28
	37	#define WM8350_AIF_TEST 0x74
	38
	39	/* debug */
	40	#define WM8350_BUS_DEBUG 0
	41	#if WM8350_BUS_DEBUG
	42	#define dump(regs, src) do { \
	43	int i_; \
	44	u16 *src_ = src; \
	45	printk(KERN_DEBUG); \
	46	for (i_ = 0; i_ < regs; i_++) \
	47	printk(" 0x%4.4x", *src_++); \
	48	printk("\n"); \
	49	} while (0);
	50	#else
	51	#define dump(bytes, src)
	52	#endif
	53
	54	#define WM8350_LOCK_DEBUG 0
	55	#if WM8350_LOCK_DEBUG
	56	#define ldbg(format, arg...) printk(format, ## arg)
	57	#else
	58	#define ldbg(format, arg...)
	59	#endif
	60
	61	/*
	62	* WM8350 Device IO
	63	*/
	64	static DEFINE_MUTEX(io_mutex);
	65	static DEFINE_MUTEX(reg_lock_mutex);
89b4012b MB	66
	67	/* Perform a physical read from the device.
	68	*/
	69	static int wm8350_phys_read(struct wm8350 *wm8350, u8 reg, int num_regs,
	70	u16 *dest)
	71	{
	72	int i, ret;
	73	int bytes = num_regs * 2;
	74
	75	dev_dbg(wm8350->dev, "volatile read\n");
	76	ret = wm8350->read_dev(wm8350, reg, bytes, (char *)dest);
	77
	78	for (i = reg; i < reg + num_regs; i++) {
	79	/* Cache is CPU endian */
	80	dest[i - reg] = be16_to_cpu(dest[i - reg]);
	81
89b4012b MB	82	/* Mask out non-readable bits */
	83	dest[i - reg] &= wm8350_reg_io_map[i].readable;
	84	}
	85
	86	dump(num_regs, dest);
	87
	88	return ret;
	89	}
	90
	91	static int wm8350_read(struct wm8350 wm8350, u8 reg, int num_regs, u16 dest)
	92	{
	93	int i;
	94	int end = reg + num_regs;
	95	int ret = 0;
	96	int bytes = num_regs * 2;
	97
	98	if (wm8350->read_dev == NULL)
	99	return -ENODEV;
	100
	101	if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
	102	dev_err(wm8350->dev, "invalid reg %x\n",
	103	reg + num_regs - 1);
	104	return -EINVAL;
	105	}
	106
	107	dev_dbg(wm8350->dev,
	108	"%s R%d(0x%2.2x) %d regs\n", __func__, reg, reg, num_regs);
	109
	110	#if WM8350_BUS_DEBUG
	111	/* we can _safely_ read any register, but warn if read not supported */
	112	for (i = reg; i < end; i++) {
	113	if (!wm8350_reg_io_map[i].readable)
	114	dev_warn(wm8350->dev,
	115	"reg R%d is not readable\n", i);
	116	}
	117	#endif
	118
	119	/* if any volatile registers are required, then read back all */
	120	for (i = reg; i < end; i++)
	121	if (wm8350_reg_io_map[i].vol)
	122	return wm8350_phys_read(wm8350, reg, num_regs, dest);
	123
	124	/* no volatiles, then cache is good */
	125	dev_dbg(wm8350->dev, "cache read\n");
	126	memcpy(dest, &wm8350->reg_cache[reg], bytes);
	127	dump(num_regs, dest);
	128	return ret;
	129	}
	130
	131	static inline int is_reg_locked(struct wm8350 *wm8350, u8 reg)
	132	{
	133	if (reg == WM8350_SECURITY \|\|
	134	wm8350->reg_cache[WM8350_SECURITY] == WM8350_UNLOCK_KEY)
	135	return 0;
	136
	137	if ((reg == WM8350_GPIO_CONFIGURATION_I_O) \|\|
	138	(reg >= WM8350_GPIO_FUNCTION_SELECT_1 &&
	139	reg <= WM8350_GPIO_FUNCTION_SELECT_4) \|\|
	140	(reg >= WM8350_BATTERY_CHARGER_CONTROL_1 &&
	141	reg <= WM8350_BATTERY_CHARGER_CONTROL_3))
	142	return 1;
	143	return 0;
	144	}
	145
146	static int wm8350_write(struct wm8350 wm8350, u8 reg, int num_regs, u16 src)
147	{
148	int i;
149	int end = reg + num_regs;
150	int bytes = num_regs * 2;
151
152	if (wm8350->write_dev == NULL)
153	return -ENODEV;
154
155	if ((reg + num_regs - 1) > WM8350_MAX_REGISTER) {
156	dev_err(wm8350->dev, "invalid reg %x\n",
157	reg + num_regs - 1);
158	return -EINVAL;
159	}
160
161	/* it's generally not a good idea to write to RO or locked registers */
162	for (i = reg; i < end; i++) {
163	if (!wm8350_reg_io_map[i].writable) {
164	dev_err(wm8350->dev,
165	"attempted write to read only reg R%d\n", i);
166	return -EINVAL;
167	}
168
169	if (is_reg_locked(wm8350, i)) {
170	dev_err(wm8350->dev,
171	"attempted write to locked reg R%d\n", i);
172	return -EINVAL;
173	}
174
175	src[i - reg] &= wm8350_reg_io_map[i].writable;
176
177	wm8350->reg_cache[i] =
178	(wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable)
179	\| src[i - reg];
180
181	src[i - reg] = cpu_to_be16(src[i - reg]);
182	}
183
184	/* Actually write it out */
185	return wm8350->write_dev(wm8350, reg, bytes, (char *)src);
186	}
187
188	/*
189	* Safe read, modify, write methods
190	*/
191	int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
192	{
193	u16 data;
194	int err;
195
196	mutex_lock(&io_mutex);
197	err = wm8350_read(wm8350, reg, 1, &data);
198	if (err) {
199	dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
200	goto out;
201	}
202
203	data &= ~mask;
204	err = wm8350_write(wm8350, reg, 1, &data);
205	if (err)
206	dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
207	out:
208	mutex_unlock(&io_mutex);
209	return err;
210	}
211	EXPORT_SYMBOL_GPL(wm8350_clear_bits);
212
213	int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
214	{
215	u16 data;
216	int err;
217
218	mutex_lock(&io_mutex);
219	err = wm8350_read(wm8350, reg, 1, &data);
220	if (err) {
221	dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
222	goto out;
223	}
224
225	data \|= mask;
226	err = wm8350_write(wm8350, reg, 1, &data);
227	if (err)
228	dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
229	out:
230	mutex_unlock(&io_mutex);
231	return err;
232	}
233	EXPORT_SYMBOL_GPL(wm8350_set_bits);
234
235	u16 wm8350_reg_read(struct wm8350 *wm8350, int reg)
236	{
237	u16 data;
238	int err;
239
240	mutex_lock(&io_mutex);
241	err = wm8350_read(wm8350, reg, 1, &data);
242	if (err)
243	dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
244
245	mutex_unlock(&io_mutex);
246	return data;
247	}
248	EXPORT_SYMBOL_GPL(wm8350_reg_read);
249
250	int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val)
251	{
252	int ret;
253	u16 data = val;
254
255	mutex_lock(&io_mutex);
256	ret = wm8350_write(wm8350, reg, 1, &data);
257	if (ret)
258	dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
259	mutex_unlock(&io_mutex);
260	return ret;
261	}
262	EXPORT_SYMBOL_GPL(wm8350_reg_write);
263
264	int wm8350_block_read(struct wm8350 *wm8350, int start_reg, int regs,
265	u16 *dest)
266	{
267	int err = 0;
268
269	mutex_lock(&io_mutex);
270	err = wm8350_read(wm8350, start_reg, regs, dest);
271	if (err)
272	dev_err(wm8350->dev, "block read starting from R%d failed\n",
273	start_reg);
274	mutex_unlock(&io_mutex);
275	return err;
276	}
277	EXPORT_SYMBOL_GPL(wm8350_block_read);
278
279	int wm8350_block_write(struct wm8350 *wm8350, int start_reg, int regs,
280	u16 *src)
281	{
282	int ret = 0;
283
284	mutex_lock(&io_mutex);
285	ret = wm8350_write(wm8350, start_reg, regs, src);
286	if (ret)
287	dev_err(wm8350->dev, "block write starting at R%d failed\n",
288	start_reg);
289	mutex_unlock(&io_mutex);
290	return ret;
291	}
292	EXPORT_SYMBOL_GPL(wm8350_block_write);
293
858e6744 MB	294	/**
	295	* wm8350_reg_lock()
	296	*
	297	* The WM8350 has a hardware lock which can be used to prevent writes to
	298	* some registers (generally those which can cause particularly serious
	299	* problems if misused). This function enables that lock.
	300	*/
89b4012b MB	301	int wm8350_reg_lock(struct wm8350 *wm8350)
	302	{
	303	u16 key = WM8350_LOCK_KEY;
	304	int ret;
	305
	306	ldbg(__func__);
	307	mutex_lock(&io_mutex);
	308	ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
	309	if (ret)
	310	dev_err(wm8350->dev, "lock failed\n");
	311	mutex_unlock(&io_mutex);
	312	return ret;
	313	}
	314	EXPORT_SYMBOL_GPL(wm8350_reg_lock);
	315
858e6744 MB	316	/**
	317	* wm8350_reg_unlock()
	318	*
	319	* The WM8350 has a hardware lock which can be used to prevent writes to
	320	* some registers (generally those which can cause particularly serious
	321	* problems if misused). This function disables that lock so updates
	322	* can be performed. For maximum safety this should be done only when
	323	* required.
	324	*/
89b4012b MB	325	int wm8350_reg_unlock(struct wm8350 *wm8350)
	326	{
	327	u16 key = WM8350_UNLOCK_KEY;
	328	int ret;
	329
	330	ldbg(__func__);
	331	mutex_lock(&io_mutex);
	332	ret = wm8350_write(wm8350, WM8350_SECURITY, 1, &key);
	333	if (ret)
	334	dev_err(wm8350->dev, "unlock failed\n");
	335	mutex_unlock(&io_mutex);
	336	return ret;
	337	}
	338	EXPORT_SYMBOL_GPL(wm8350_reg_unlock);
	339
67488526 MB	340	int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref)
	341	{
	342	u16 reg, result = 0;
	343	int tries = 5;
	344
	345	if (channel < WM8350_AUXADC_AUX1 \|\| channel > WM8350_AUXADC_TEMP)
	346	return -EINVAL;
	347	if (channel >= WM8350_AUXADC_USB && channel <= WM8350_AUXADC_TEMP
	348	&& (scale != 0 \|\| vref != 0))
	349	return -EINVAL;
	350
	351	mutex_lock(&wm8350->auxadc_mutex);
	352
	353	/* Turn on the ADC */
	354	reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
	355	wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, reg \| WM8350_AUXADC_ENA);
	356
	357	if (scale \|\| vref) {
	358	reg = scale << 13;
	359	reg \|= vref << 12;
	360	wm8350_reg_write(wm8350, WM8350_AUX1_READBACK + channel, reg);
	361	}
	362
	363	reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
	364	reg \|= 1 << channel \| WM8350_AUXADC_POLL;
	365	wm8350_reg_write(wm8350, WM8350_DIGITISER_CONTROL_1, reg);
	366
	367	do {
	368	schedule_timeout_interruptible(1);
	369	reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
f3df0b75	370	} while ((reg & WM8350_AUXADC_POLL) && --tries);
67488526 MB	371
	372	if (!tries)
	373	dev_err(wm8350->dev, "adc chn %d read timeout\n", channel);
	374	else
	375	result = wm8350_reg_read(wm8350,
	376	WM8350_AUX1_READBACK + channel);
	377
	378	/* Turn off the ADC */
	379	reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
	380	wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5,
	381	reg & ~WM8350_AUXADC_ENA);
	382
	383	mutex_unlock(&wm8350->auxadc_mutex);
	384
	385	return result & WM8350_AUXADC_DATA1_MASK;
	386	}
	387	EXPORT_SYMBOL_GPL(wm8350_read_auxadc);
	388
89b4012b MB	389	/*
	390	* Cache is always host endian.
	391	*/
96920630	392	static int wm8350_create_cache(struct wm8350 *wm8350, int type, int mode)
89b4012b MB	393	{
	394	int i, ret = 0;
	395	u16 value;
	396	const u16 *reg_map;
	397
96920630	398	switch (type) {
89b4012b	399	case 0:
96920630 MB	400	switch (mode) {
	401	#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_0
	402	case 0:
	403	reg_map = wm8350_mode0_defaults;
	404	break;
89b4012b MB	405	#endif
89b4012b MB	406	#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_1
96920630 MB	407	case 1:
	408	reg_map = wm8350_mode1_defaults;
	409	break;
89b4012b MB	410	#endif
89b4012b MB	411	#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_2
96920630 MB	412	case 2:
	413	reg_map = wm8350_mode2_defaults;
	414	break;
89b4012b MB	415	#endif
89b4012b MB	416	#ifdef CONFIG_MFD_WM8350_CONFIG_MODE_3
96920630 MB	417	case 3:
	418	reg_map = wm8350_mode3_defaults;
	419	break;
89b4012b	420	#endif
96920630 MB	421	default:
	422	dev_err(wm8350->dev,
	423	"WM8350 configuration mode %d not supported\n",
	424	mode);
	425	return -EINVAL;
	426	}
4331bb32	427	break;
96920630	428
ca23f8c1 MB	429	case 1:
	430	switch (mode) {
	431	#ifdef CONFIG_MFD_WM8351_CONFIG_MODE_0
	432	case 0:
	433	reg_map = wm8351_mode0_defaults;
	434	break;
	435	#endif
	436	#ifdef CONFIG_MFD_WM8351_CONFIG_MODE_1
	437	case 1:
	438	reg_map = wm8351_mode1_defaults;
	439	break;
	440	#endif
	441	#ifdef CONFIG_MFD_WM8351_CONFIG_MODE_2
	442	case 2:
	443	reg_map = wm8351_mode2_defaults;
	444	break;
	445	#endif
	446	#ifdef CONFIG_MFD_WM8351_CONFIG_MODE_3
	447	case 3:
	448	reg_map = wm8351_mode3_defaults;
	449	break;
	450	#endif
	451	default:
	452	dev_err(wm8350->dev,
	453	"WM8351 configuration mode %d not supported\n",
	454	mode);
	455	return -EINVAL;
	456	}
	457	break;
	458
96920630 MB	459	case 2:
	460	switch (mode) {
	461	#ifdef CONFIG_MFD_WM8352_CONFIG_MODE_0
	462	case 0:
	463	reg_map = wm8352_mode0_defaults;
	464	break;
	465	#endif
	466	#ifdef CONFIG_MFD_WM8352_CONFIG_MODE_1
	467	case 1:
	468	reg_map = wm8352_mode1_defaults;
	469	break;
	470	#endif
	471	#ifdef CONFIG_MFD_WM8352_CONFIG_MODE_2
	472	case 2:
	473	reg_map = wm8352_mode2_defaults;
	474	break;
	475	#endif
	476	#ifdef CONFIG_MFD_WM8352_CONFIG_MODE_3
	477	case 3:
	478	reg_map = wm8352_mode3_defaults;
	479	break;
	480	#endif
	481	default:
	482	dev_err(wm8350->dev,
	483	"WM8352 configuration mode %d not supported\n",
	484	mode);
	485	return -EINVAL;
	486	}
	487	break;
	488
89b4012b	489	default:
96920630 MB	490	dev_err(wm8350->dev,
96920630 MB	491	"WM835x configuration mode %d not supported\n",
89b4012b MB	492	mode);
	493	return -EINVAL;
	494	}
	495
	496	wm8350->reg_cache =
9dfd3381	497	kmalloc(sizeof(u16) * (WM8350_MAX_REGISTER + 1), GFP_KERNEL);
89b4012b MB	498	if (wm8350->reg_cache == NULL)
	499	return -ENOMEM;
	500
	501	/* Read the initial cache state back from the device - this is
	502	* a PMIC so the device many not be in a virgin state and we
	503	* can't rely on the silicon values.
	504	*/
9dfd3381 MB	505	ret = wm8350->read_dev(wm8350, 0,
	506	sizeof(u16) * (WM8350_MAX_REGISTER + 1),
	507	wm8350->reg_cache);
	508	if (ret < 0) {
	509	dev_err(wm8350->dev,
	510	"failed to read initial cache values\n");
	511	goto out;
	512	}
	513
	514	/* Mask out uncacheable/unreadable bits and the audio. */
89b4012b	515	for (i = 0; i < WM8350_MAX_REGISTER; i++) {
89b4012b MB	516	if (wm8350_reg_io_map[i].readable &&
89b4012b MB	517	(i < WM8350_CLOCK_CONTROL_1 \|\| i > WM8350_AIF_TEST)) {
9dfd3381	518	value = be16_to_cpu(wm8350->reg_cache[i]);
89b4012b MB	519	value &= wm8350_reg_io_map[i].readable;
	520	wm8350->reg_cache[i] = value;
	521	} else
	522	wm8350->reg_cache[i] = reg_map[i];
	523	}
	524
	525	out:
	526	return ret;
	527	}
89b4012b	528
9201d38b MB	529	/*
	530	* Register a client device. This is non-fatal since there is no need to
	531	* fail the entire device init due to a single platform device failing.
	532	*/
	533	static void wm8350_client_dev_register(struct wm8350 *wm8350,
	534	const char *name,
	535	struct platform_device **pdev)
	536	{
	537	int ret;
	538
	539	*pdev = platform_device_alloc(name, -1);
	540	if (pdev == NULL) {
	541	dev_err(wm8350->dev, "Failed to allocate %s\n", name);
	542	return;
	543	}
	544
	545	(*pdev)->dev.parent = wm8350->dev;
	546	platform_set_drvdata(*pdev, wm8350);
	547	ret = platform_device_add(*pdev);
	548	if (ret != 0) {
	549	dev_err(wm8350->dev, "Failed to register %s: %d\n", name, ret);
	550	platform_device_put(*pdev);
	551	*pdev = NULL;
	552	}
	553	}
	554
ebccec0f	555	int wm8350_device_init(struct wm8350 *wm8350, int irq,
bcdd4efc	556	struct wm8350_platform_data *pdata)
89b4012b	557	{
85c93ea7	558	int ret;
b797a555 MB	559	u16 id1, id2, mask_rev;
b797a555 MB	560	u16 cust_id, mode, chip_rev;
89b4012b MB	561
89b4012b MB	562	/* get WM8350 revision and config mode */
85c93ea7 MB	563	ret = wm8350->read_dev(wm8350, WM8350_RESET_ID, sizeof(id1), &id1);
	564	if (ret != 0) {
	565	dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
	566	goto err;
	567	}
	568
	569	ret = wm8350->read_dev(wm8350, WM8350_ID, sizeof(id2), &id2);
	570	if (ret != 0) {
	571	dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
	572	goto err;
	573	}
	574
	575	ret = wm8350->read_dev(wm8350, WM8350_REVISION, sizeof(mask_rev),
	576	&mask_rev);
	577	if (ret != 0) {
	578	dev_err(wm8350->dev, "Failed to read revision: %d\n", ret);
	579	goto err;
	580	}
89b4012b MB	581
	582	id1 = be16_to_cpu(id1);
	583	id2 = be16_to_cpu(id2);
b797a555	584	mask_rev = be16_to_cpu(mask_rev);
89b4012b	585
b797a555 MB	586	if (id1 != 0x6143) {
	587	dev_err(wm8350->dev,
	588	"Device with ID %x is not a WM8350\n", id1);
	589	ret = -ENODEV;
	590	goto err;
	591	}
	592
	593	mode = id2 & WM8350_CONF_STS_MASK >> 10;
	594	cust_id = id2 & WM8350_CUST_ID_MASK;
	595	chip_rev = (id2 & WM8350_CHIP_REV_MASK) >> 12;
	596	dev_info(wm8350->dev,
	597	"CONF_STS %d, CUST_ID %d, MASK_REV %d, CHIP_REV %d\n",
	598	mode, cust_id, mask_rev, chip_rev);
	599
	600	if (cust_id != 0) {
	601	dev_err(wm8350->dev, "Unsupported CUST_ID\n");
	602	ret = -ENODEV;
	603	goto err;
	604	}
	605
	606	switch (mask_rev) {
	607	case 0:
645524a9 MB	608	wm8350->pmic.max_dcdc = WM8350_DCDC_6;
	609	wm8350->pmic.max_isink = WM8350_ISINK_B;
	610
b797a555	611	switch (chip_rev) {
89b4012b	612	case WM8350_REV_E:
b797a555	613	dev_info(wm8350->dev, "WM8350 Rev E\n");
89b4012b MB	614	break;
89b4012b MB	615	case WM8350_REV_F:
b797a555	616	dev_info(wm8350->dev, "WM8350 Rev F\n");
89b4012b MB	617	break;
89b4012b MB	618	case WM8350_REV_G:
b797a555	619	dev_info(wm8350->dev, "WM8350 Rev G\n");
d756f4a4	620	wm8350->power.rev_g_coeff = 1;
89b4012b	621	break;
0c8a6016	622	case WM8350_REV_H:
b797a555	623	dev_info(wm8350->dev, "WM8350 Rev H\n");
d756f4a4	624	wm8350->power.rev_g_coeff = 1;
0c8a6016	625	break;
89b4012b MB	626	default:
89b4012b MB	627	/* For safety we refuse to run on unknown hardware */
b797a555	628	dev_err(wm8350->dev, "Unknown WM8350 CHIP_REV\n");
89b4012b MB	629	ret = -ENODEV;
	630	goto err;
	631	}
b797a555 MB	632	break;
b797a555 MB	633
ca23f8c1 MB	634	case 1:
	635	wm8350->pmic.max_dcdc = WM8350_DCDC_4;
	636	wm8350->pmic.max_isink = WM8350_ISINK_A;
	637
	638	switch (chip_rev) {
	639	case 0:
	640	dev_info(wm8350->dev, "WM8351 Rev A\n");
	641	wm8350->power.rev_g_coeff = 1;
	642	break;
	643
02d46e07 MB	644	case 1:
	645	dev_info(wm8350->dev, "WM8351 Rev B\n");
	646	wm8350->power.rev_g_coeff = 1;
	647	break;
	648
ca23f8c1 MB	649	default:
	650	dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n");
	651	ret = -ENODEV;
	652	goto err;
	653	}
	654	break;
	655
96920630	656	case 2:
645524a9 MB	657	wm8350->pmic.max_dcdc = WM8350_DCDC_6;
	658	wm8350->pmic.max_isink = WM8350_ISINK_B;
	659
96920630 MB	660	switch (chip_rev) {
	661	case 0:
	662	dev_info(wm8350->dev, "WM8352 Rev A\n");
	663	wm8350->power.rev_g_coeff = 1;
	664	break;
	665
	666	default:
	667	dev_err(wm8350->dev, "Unknown WM8352 CHIP_REV\n");
	668	ret = -ENODEV;
	669	goto err;
	670	}
	671	break;
	672
b797a555 MB	673	default:
b797a555 MB	674	dev_err(wm8350->dev, "Unknown MASK_REV\n");
89b4012b MB	675	ret = -ENODEV;
	676	goto err;
	677	}
	678
96920630	679	ret = wm8350_create_cache(wm8350, mask_rev, mode);
89b4012b	680	if (ret < 0) {
b797a555	681	dev_err(wm8350->dev, "Failed to create register cache\n");
89b4012b MB	682	return ret;
	683	}
	684
67488526	685	mutex_init(&wm8350->auxadc_mutex);
32064503	686
e0a3389a MB	687	ret = wm8350_irq_init(wm8350, irq, pdata);
e0a3389a MB	688	if (ret < 0)
ebccec0f	689	goto err;
ebccec0f	690
62571c29 MB	691	if (pdata && pdata->init) {
	692	ret = pdata->init(wm8350);
	693	if (ret != 0) {
	694	dev_err(wm8350->dev, "Platform init() failed: %d\n",
	695	ret);
e0a3389a	696	goto err_irq;
62571c29 MB	697	}
	698	}
	699
ebccec0f MB	700	wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0);
ebccec0f MB	701
add41cb4 MB	702	wm8350_client_dev_register(wm8350, "wm8350-codec",
	703	&(wm8350->codec.pdev));
	704	wm8350_client_dev_register(wm8350, "wm8350-gpio",
	705	&(wm8350->gpio.pdev));
fb6c023a MB	706	wm8350_client_dev_register(wm8350, "wm8350-hwmon",
fb6c023a MB	707	&(wm8350->hwmon.pdev));
add41cb4 MB	708	wm8350_client_dev_register(wm8350, "wm8350-power",
	709	&(wm8350->power.pdev));
	710	wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev));
	711	wm8350_client_dev_register(wm8350, "wm8350-wdt", &(wm8350->wdt.pdev));
	712
89b4012b MB	713	return 0;
89b4012b MB	714
e0a3389a MB	715	err_irq:
e0a3389a MB	716	wm8350_irq_exit(wm8350);
89b4012b MB	717	err:
	718	kfree(wm8350->reg_cache);
	719	return ret;
	720	}
	721	EXPORT_SYMBOL_GPL(wm8350_device_init);
	722
	723	void wm8350_device_exit(struct wm8350 *wm8350)
	724	{
da09155a MB	725	int i;
da09155a MB	726
0081e802 MB	727	for (i = 0; i < ARRAY_SIZE(wm8350->pmic.led); i++)
	728	platform_device_unregister(wm8350->pmic.led[i].pdev);
	729
da09155a	730	for (i = 0; i < ARRAY_SIZE(wm8350->pmic.pdev); i++)
add41cb4 MB	731	platform_device_unregister(wm8350->pmic.pdev[i]);
	732
	733	platform_device_unregister(wm8350->wdt.pdev);
	734	platform_device_unregister(wm8350->rtc.pdev);
	735	platform_device_unregister(wm8350->power.pdev);
fb6c023a	736	platform_device_unregister(wm8350->hwmon.pdev);
add41cb4 MB	737	platform_device_unregister(wm8350->gpio.pdev);
add41cb4 MB	738	platform_device_unregister(wm8350->codec.pdev);
da09155a	739
e0a3389a MB	740	wm8350_irq_exit(wm8350);
e0a3389a MB	741
89b4012b MB	742	kfree(wm8350->reg_cache);
	743	}
	744	EXPORT_SYMBOL_GPL(wm8350_device_exit);
	745
ebccec0f	746	MODULE_DESCRIPTION("WM8350 AudioPlus PMIC core driver");
89b4012b	747	MODULE_LICENSE("GPL");