[linux-2.6-block.git] / drivers / mfd / wm8350-core.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * wm8350-core.c  --  Device access for Wolfson WM8350
 *
 * Copyright 2007, 2008 Wolfson Microelectronics PLC.
 *
 * Author: Liam Girdwood, Mark Brown
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/export.h>
#include <linux/slab.h>
#include <linux/bug.h>
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/regmap.h>
#include <linux/workqueue.h>

#include <linux/mfd/wm8350/core.h>
#include <linux/mfd/wm8350/audio.h>
#include <linux/mfd/wm8350/comparator.h>
#include <linux/mfd/wm8350/gpio.h>
#include <linux/mfd/wm8350/pmic.h>
#include <linux/mfd/wm8350/rtc.h>
#include <linux/mfd/wm8350/supply.h>
#include <linux/mfd/wm8350/wdt.h>

#define WM8350_CLOCK_CONTROL_1		0x28
#define WM8350_AIF_TEST			0x74

/* debug */
#define WM8350_BUS_DEBUG 0
#if WM8350_BUS_DEBUG
#define dump(regs, src) do { \
	int i_; \
	u16 *src_ = src; \
	printk(KERN_DEBUG); \
	for (i_ = 0; i_ < regs; i_++) \
		printk(" 0x%4.4x", *src_++); \
	printk("\n"); \
} while (0);
#else
#define dump(bytes, src)
#endif

#define WM8350_LOCK_DEBUG 0
#if WM8350_LOCK_DEBUG
#define ldbg(format, arg...) printk(format, ## arg)
#else
#define ldbg(format, arg...)
#endif

/*
 * WM8350 Device IO
 */
static DEFINE_MUTEX(reg_lock_mutex);

/*
 * Safe read, modify, write methods
 */
int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
{
	return regmap_update_bits(wm8350->regmap, reg, mask, 0);
}
EXPORT_SYMBOL_GPL(wm8350_clear_bits);

int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
{
	return regmap_update_bits(wm8350->regmap, reg, mask, mask);
}
EXPORT_SYMBOL_GPL(wm8350_set_bits);

u16 wm8350_reg_read(struct wm8350 *wm8350, int reg)
{
	unsigned int data;
	int err;

	err = regmap_read(wm8350->regmap, reg, &data);
	if (err)
		dev_err(wm8350->dev, "read from reg R%d failed\n", reg);

	return data;
}
EXPORT_SYMBOL_GPL(wm8350_reg_read);

int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val)
{
	int ret;

	ret = regmap_write(wm8350->regmap, reg, val);

	if (ret)
		dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
	return ret;
}
EXPORT_SYMBOL_GPL(wm8350_reg_write);

int wm8350_block_read(struct wm8350 *wm8350, int start_reg, int regs,
		      u16 *dest)
{
	int err = 0;

	err = regmap_bulk_read(wm8350->regmap, start_reg, dest, regs);
	if (err)
		dev_err(wm8350->dev, "block read starting from R%d failed\n",
			start_reg);

	return err;
}
EXPORT_SYMBOL_GPL(wm8350_block_read);

int wm8350_block_write(struct wm8350 *wm8350, int start_reg, int regs,
		       u16 *src)
{
	int ret = 0;

	ret = regmap_bulk_write(wm8350->regmap, start_reg, src, regs);
	if (ret)
		dev_err(wm8350->dev, "block write starting at R%d failed\n",
			start_reg);

	return ret;
}
EXPORT_SYMBOL_GPL(wm8350_block_write);

/**
 * wm8350_reg_lock()
 *
 * The WM8350 has a hardware lock which can be used to prevent writes to
 * some registers (generally those which can cause particularly serious
 * problems if misused).  This function enables that lock.
 *
 * @wm8350: pointer to local driver data structure
 */
int wm8350_reg_lock(struct wm8350 *wm8350)
{
	int ret;

	mutex_lock(&reg_lock_mutex);

	ldbg(__func__);

	ret = wm8350_reg_write(wm8350, WM8350_SECURITY, WM8350_LOCK_KEY);
	if (ret)
		dev_err(wm8350->dev, "lock failed\n");

	wm8350->unlocked = false;

	mutex_unlock(&reg_lock_mutex);

	return ret;
}
EXPORT_SYMBOL_GPL(wm8350_reg_lock);

/**
 * wm8350_reg_unlock()
 *
 * The WM8350 has a hardware lock which can be used to prevent writes to
 * some registers (generally those which can cause particularly serious
 * problems if misused).  This function disables that lock so updates
 * can be performed.  For maximum safety this should be done only when
 * required.
 *
 * @wm8350: pointer to local driver data structure
 */
int wm8350_reg_unlock(struct wm8350 *wm8350)
{
	int ret;

	mutex_lock(&reg_lock_mutex);

	ldbg(__func__);

	ret = wm8350_reg_write(wm8350, WM8350_SECURITY, WM8350_UNLOCK_KEY);
	if (ret)
		dev_err(wm8350->dev, "unlock failed\n");

	wm8350->unlocked = true;

	mutex_unlock(&reg_lock_mutex);

	return ret;
}
EXPORT_SYMBOL_GPL(wm8350_reg_unlock);

int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref)
{
	u16 reg, result = 0;

	if (channel < WM8350_AUXADC_AUX1 || channel > WM8350_AUXADC_TEMP)
		return -EINVAL;
	if (channel >= WM8350_AUXADC_USB && channel <= WM8350_AUXADC_TEMP
	    && (scale != 0 || vref != 0))
		return -EINVAL;

	mutex_lock(&wm8350->auxadc_mutex);

	/* Turn on the ADC */
	reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
	wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, reg | WM8350_AUXADC_ENA);

	if (scale || vref) {
		reg = scale << 13;
		reg |= vref << 12;
		wm8350_reg_write(wm8350, WM8350_AUX1_READBACK + channel, reg);
	}

	reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
	reg |= 1 << channel | WM8350_AUXADC_POLL;
	wm8350_reg_write(wm8350, WM8350_DIGITISER_CONTROL_1, reg);

	/* If a late IRQ left the completion signalled then consume
	 * the completion. */
	try_wait_for_completion(&wm8350->auxadc_done);

	/* We ignore the result of the completion and just check for a
	 * conversion result, allowing us to soldier on if the IRQ
	 * infrastructure is not set up for the chip. */
	wait_for_completion_timeout(&wm8350->auxadc_done, msecs_to_jiffies(5));

	reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
	if (reg & WM8350_AUXADC_POLL)
		dev_err(wm8350->dev, "adc chn %d read timeout\n", channel);
	else
		result = wm8350_reg_read(wm8350,
					 WM8350_AUX1_READBACK + channel);

	/* Turn off the ADC */
	reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
	wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5,
			 reg & ~WM8350_AUXADC_ENA);

	mutex_unlock(&wm8350->auxadc_mutex);

	return result & WM8350_AUXADC_DATA1_MASK;
}
EXPORT_SYMBOL_GPL(wm8350_read_auxadc);

static irqreturn_t wm8350_auxadc_irq(int irq, void *irq_data)
{
	struct wm8350 *wm8350 = irq_data;

	complete(&wm8350->auxadc_done);

	return IRQ_HANDLED;
}

/*
 * Register a client device.  This is non-fatal since there is no need to
 * fail the entire device init due to a single platform device failing.
 */
static void wm8350_client_dev_register(struct wm8350 *wm8350,
				       const char *name,
				       struct platform_device **pdev)
{
	int ret;

	*pdev = platform_device_alloc(name, -1);
	if (*pdev == NULL) {
		dev_err(wm8350->dev, "Failed to allocate %s\n", name);
		return;
	}

	(*pdev)->dev.parent = wm8350->dev;
	platform_set_drvdata(*pdev, wm8350);
	ret = platform_device_add(*pdev);
	if (ret != 0) {
		dev_err(wm8350->dev, "Failed to register %s: %d\n", name, ret);
		platform_device_put(*pdev);
		*pdev = NULL;
	}
}

int wm8350_device_init(struct wm8350 *wm8350, int irq,
		       struct wm8350_platform_data *pdata)
{
	int ret;
	unsigned int id1, id2, mask_rev;
	unsigned int cust_id, mode, chip_rev;

	dev_set_drvdata(wm8350->dev, wm8350);

	/* get WM8350 revision and config mode */
	ret = regmap_read(wm8350->regmap, WM8350_RESET_ID, &id1);
	if (ret != 0) {
		dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
		goto err;
	}

	ret = regmap_read(wm8350->regmap, WM8350_ID, &id2);
	if (ret != 0) {
		dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
		goto err;
	}

	ret = regmap_read(wm8350->regmap, WM8350_REVISION, &mask_rev);
	if (ret != 0) {
		dev_err(wm8350->dev, "Failed to read revision: %d\n", ret);
		goto err;
	}

	if (id1 != 0x6143) {
		dev_err(wm8350->dev,
			"Device with ID %x is not a WM8350\n", id1);
		ret = -ENODEV;
		goto err;
	}

	mode = (id2 & WM8350_CONF_STS_MASK) >> 10;
	cust_id = id2 & WM8350_CUST_ID_MASK;
	chip_rev = (id2 & WM8350_CHIP_REV_MASK) >> 12;
	dev_info(wm8350->dev,
		 "CONF_STS %d, CUST_ID %d, MASK_REV %d, CHIP_REV %d\n",
		 mode, cust_id, mask_rev, chip_rev);

	if (cust_id != 0) {
		dev_err(wm8350->dev, "Unsupported CUST_ID\n");
		ret = -ENODEV;
		goto err;
	}

	switch (mask_rev) {
	case 0:
		wm8350->pmic.max_dcdc = WM8350_DCDC_6;
		wm8350->pmic.max_isink = WM8350_ISINK_B;

		switch (chip_rev) {
		case WM8350_REV_E:
			dev_info(wm8350->dev, "WM8350 Rev E\n");
			break;
		case WM8350_REV_F:
			dev_info(wm8350->dev, "WM8350 Rev F\n");
			break;
		case WM8350_REV_G:
			dev_info(wm8350->dev, "WM8350 Rev G\n");
			wm8350->power.rev_g_coeff = 1;
			break;
		case WM8350_REV_H:
			dev_info(wm8350->dev, "WM8350 Rev H\n");
			wm8350->power.rev_g_coeff = 1;
			break;
		default:
			/* For safety we refuse to run on unknown hardware */
			dev_err(wm8350->dev, "Unknown WM8350 CHIP_REV\n");
			ret = -ENODEV;
			goto err;
		}
		break;

	case 1:
		wm8350->pmic.max_dcdc = WM8350_DCDC_4;
		wm8350->pmic.max_isink = WM8350_ISINK_A;

		switch (chip_rev) {
		case 0:
			dev_info(wm8350->dev, "WM8351 Rev A\n");
			wm8350->power.rev_g_coeff = 1;
			break;

		case 1:
			dev_info(wm8350->dev, "WM8351 Rev B\n");
			wm8350->power.rev_g_coeff = 1;
			break;

		default:
			dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n");
			ret = -ENODEV;
			goto err;
		}
		break;

	case 2:
		wm8350->pmic.max_dcdc = WM8350_DCDC_6;
		wm8350->pmic.max_isink = WM8350_ISINK_B;

		switch (chip_rev) {
		case 0:
			dev_info(wm8350->dev, "WM8352 Rev A\n");
			wm8350->power.rev_g_coeff = 1;
			break;

		default:
			dev_err(wm8350->dev, "Unknown WM8352 CHIP_REV\n");
			ret = -ENODEV;
			goto err;
		}
		break;

	default:
		dev_err(wm8350->dev, "Unknown MASK_REV\n");
		ret = -ENODEV;
		goto err;
	}

	mutex_init(&wm8350->auxadc_mutex);
	init_completion(&wm8350->auxadc_done);

	ret = wm8350_irq_init(wm8350, irq, pdata);
	if (ret < 0)
		goto err;

	if (wm8350->irq_base) {
		ret = request_threaded_irq(wm8350->irq_base +
					   WM8350_IRQ_AUXADC_DATARDY,
					   NULL, wm8350_auxadc_irq,
					   IRQF_ONESHOT,
					   "auxadc", wm8350);
		if (ret < 0)
			dev_warn(wm8350->dev,
				 "Failed to request AUXADC IRQ: %d\n", ret);
	}

	if (pdata && pdata->init) {
		ret = pdata->init(wm8350);
		if (ret != 0) {
			dev_err(wm8350->dev, "Platform init() failed: %d\n",
				ret);
			goto err_irq;
		}
	}

	wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0);

	wm8350_client_dev_register(wm8350, "wm8350-codec",
				   &(wm8350->codec.pdev));
	wm8350_client_dev_register(wm8350, "wm8350-gpio",
				   &(wm8350->gpio.pdev));
	wm8350_client_dev_register(wm8350, "wm8350-hwmon",
				   &(wm8350->hwmon.pdev));
	wm8350_client_dev_register(wm8350, "wm8350-power",
				   &(wm8350->power.pdev));
	wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev));
	wm8350_client_dev_register(wm8350, "wm8350-wdt", &(wm8350->wdt.pdev));

	return 0;

err_irq:
	wm8350_irq_exit(wm8350);
err:
	return ret;
}
EXPORT_SYMBOL_GPL(wm8350_device_init);
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
89b4012b MB	2	/*
	3	* wm8350-core.c -- Device access for Wolfson WM8350
	4	*
	5	* Copyright 2007, 2008 Wolfson Microelectronics PLC.
	6	*
	7	* Author: Liam Girdwood, Mark Brown
89b4012b MB	8	*/
	9
	10	#include <linux/kernel.h>
0db88688 PG	11	#include <linux/init.h>
0db88688 PG	12	#include <linux/export.h>
5a0e3ad6	13	#include <linux/slab.h>
ebccec0f	14	#include <linux/bug.h>
89b4012b MB	15	#include <linux/device.h>
	16	#include <linux/delay.h>
	17	#include <linux/interrupt.h>
b7b142d9	18	#include <linux/regmap.h>
ebccec0f	19	#include <linux/workqueue.h>
89b4012b MB	20
	21	#include <linux/mfd/wm8350/core.h>
	22	#include <linux/mfd/wm8350/audio.h>
ebccec0f	23	#include <linux/mfd/wm8350/comparator.h>
89b4012b MB	24	#include <linux/mfd/wm8350/gpio.h>
89b4012b MB	25	#include <linux/mfd/wm8350/pmic.h>
ebccec0f	26	#include <linux/mfd/wm8350/rtc.h>
89b4012b	27	#include <linux/mfd/wm8350/supply.h>
ebccec0f	28	#include <linux/mfd/wm8350/wdt.h>
89b4012b	29
89b4012b MB	30	#define WM8350_CLOCK_CONTROL_1 0x28
	31	#define WM8350_AIF_TEST 0x74
	32
	33	/* debug */
	34	#define WM8350_BUS_DEBUG 0
	35	#if WM8350_BUS_DEBUG
	36	#define dump(regs, src) do { \
	37	int i_; \
	38	u16 *src_ = src; \
	39	printk(KERN_DEBUG); \
	40	for (i_ = 0; i_ < regs; i_++) \
	41	printk(" 0x%4.4x", *src_++); \
	42	printk("\n"); \
	43	} while (0);
	44	#else
	45	#define dump(bytes, src)
	46	#endif
	47
	48	#define WM8350_LOCK_DEBUG 0
	49	#if WM8350_LOCK_DEBUG
	50	#define ldbg(format, arg...) printk(format, ## arg)
	51	#else
	52	#define ldbg(format, arg...)
	53	#endif
	54
	55	/*
	56	* WM8350 Device IO
	57	*/
89b4012b	58	static DEFINE_MUTEX(reg_lock_mutex);
89b4012b	59
89b4012b MB	60	/*
	61	* Safe read, modify, write methods
	62	*/
	63	int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
	64	{
19d57ed5	65	return regmap_update_bits(wm8350->regmap, reg, mask, 0);
89b4012b MB	66	}
	67	EXPORT_SYMBOL_GPL(wm8350_clear_bits);
	68
	69	int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
	70	{
19d57ed5	71	return regmap_update_bits(wm8350->regmap, reg, mask, mask);
89b4012b MB	72	}
	73	EXPORT_SYMBOL_GPL(wm8350_set_bits);
	74
	75	u16 wm8350_reg_read(struct wm8350 *wm8350, int reg)
	76	{
19d57ed5	77	unsigned int data;
89b4012b MB	78	int err;
89b4012b MB	79
19d57ed5	80	err = regmap_read(wm8350->regmap, reg, &data);
89b4012b MB	81	if (err)
	82	dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
	83
89b4012b MB	84	return data;
	85	}
	86	EXPORT_SYMBOL_GPL(wm8350_reg_read);
	87
	88	int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val)
	89	{
	90	int ret;
89b4012b	91
19d57ed5 MB	92	ret = regmap_write(wm8350->regmap, reg, val);
19d57ed5 MB	93
89b4012b MB	94	if (ret)
89b4012b MB	95	dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
89b4012b MB	96	return ret;
	97	}
	98	EXPORT_SYMBOL_GPL(wm8350_reg_write);
	99
	100	int wm8350_block_read(struct wm8350 *wm8350, int start_reg, int regs,
	101	u16 *dest)
	102	{
	103	int err = 0;
	104
19d57ed5	105	err = regmap_bulk_read(wm8350->regmap, start_reg, dest, regs);
89b4012b MB	106	if (err)
	107	dev_err(wm8350->dev, "block read starting from R%d failed\n",
	108	start_reg);
19d57ed5	109
89b4012b MB	110	return err;
	111	}
	112	EXPORT_SYMBOL_GPL(wm8350_block_read);
	113
	114	int wm8350_block_write(struct wm8350 *wm8350, int start_reg, int regs,
	115	u16 *src)
	116	{
	117	int ret = 0;
	118
19d57ed5	119	ret = regmap_bulk_write(wm8350->regmap, start_reg, src, regs);
89b4012b MB	120	if (ret)
	121	dev_err(wm8350->dev, "block write starting at R%d failed\n",
	122	start_reg);
19d57ed5	123
89b4012b MB	124	return ret;
	125	}
	126	EXPORT_SYMBOL_GPL(wm8350_block_write);
	127
858e6744 MB	128	/**
	129	* wm8350_reg_lock()
	130	*
	131	* The WM8350 has a hardware lock which can be used to prevent writes to
	132	* some registers (generally those which can cause particularly serious
	133	* problems if misused). This function enables that lock.
afb718a8 LJ	134	*
afb718a8 LJ	135	* @wm8350: pointer to local driver data structure
858e6744	136	*/
89b4012b MB	137	int wm8350_reg_lock(struct wm8350 *wm8350)
89b4012b MB	138	{
89b4012b MB	139	int ret;
89b4012b MB	140
52b461b8 MB	141	mutex_lock(&reg_lock_mutex);
52b461b8 MB	142
89b4012b	143	ldbg(__func__);
52b461b8 MB	144
52b461b8 MB	145	ret = wm8350_reg_write(wm8350, WM8350_SECURITY, WM8350_LOCK_KEY);
89b4012b MB	146	if (ret)
89b4012b MB	147	dev_err(wm8350->dev, "lock failed\n");
52b461b8 MB	148
	149	wm8350->unlocked = false;
	150
	151	mutex_unlock(&reg_lock_mutex);
	152
89b4012b MB	153	return ret;
	154	}
	155	EXPORT_SYMBOL_GPL(wm8350_reg_lock);
	156
858e6744 MB	157	/**
	158	* wm8350_reg_unlock()
	159	*
	160	* The WM8350 has a hardware lock which can be used to prevent writes to
	161	* some registers (generally those which can cause particularly serious
	162	* problems if misused). This function disables that lock so updates
	163	* can be performed. For maximum safety this should be done only when
	164	* required.
afb718a8 LJ	165	*
afb718a8 LJ	166	* @wm8350: pointer to local driver data structure
858e6744	167	*/
89b4012b MB	168	int wm8350_reg_unlock(struct wm8350 *wm8350)
89b4012b MB	169	{
89b4012b MB	170	int ret;
89b4012b MB	171
52b461b8 MB	172	mutex_lock(&reg_lock_mutex);
52b461b8 MB	173
89b4012b	174	ldbg(__func__);
52b461b8 MB	175
52b461b8 MB	176	ret = wm8350_reg_write(wm8350, WM8350_SECURITY, WM8350_UNLOCK_KEY);
89b4012b MB	177	if (ret)
89b4012b MB	178	dev_err(wm8350->dev, "unlock failed\n");
52b461b8 MB	179
	180	wm8350->unlocked = true;
	181
	182	mutex_unlock(&reg_lock_mutex);
	183
89b4012b MB	184	return ret;
	185	}
	186	EXPORT_SYMBOL_GPL(wm8350_reg_unlock);
	187
67488526 MB	188	int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref)
	189	{
	190	u16 reg, result = 0;
67488526 MB	191
	192	if (channel < WM8350_AUXADC_AUX1 \|\| channel > WM8350_AUXADC_TEMP)
	193	return -EINVAL;
	194	if (channel >= WM8350_AUXADC_USB && channel <= WM8350_AUXADC_TEMP
	195	&& (scale != 0 \|\| vref != 0))
	196	return -EINVAL;
	197
	198	mutex_lock(&wm8350->auxadc_mutex);
	199
	200	/* Turn on the ADC */
	201	reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
	202	wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, reg \| WM8350_AUXADC_ENA);
	203
	204	if (scale \|\| vref) {
	205	reg = scale << 13;
	206	reg \|= vref << 12;
	207	wm8350_reg_write(wm8350, WM8350_AUX1_READBACK + channel, reg);
	208	}
	209
	210	reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
	211	reg \|= 1 << channel \| WM8350_AUXADC_POLL;
	212	wm8350_reg_write(wm8350, WM8350_DIGITISER_CONTROL_1, reg);
	213
5051d411 MB	214	/* If a late IRQ left the completion signalled then consume
	215	* the completion. */
	216	try_wait_for_completion(&wm8350->auxadc_done);
	217
d19663ac MB	218	/* We ignore the result of the completion and just check for a
	219	* conversion result, allowing us to soldier on if the IRQ
	220	* infrastructure is not set up for the chip. */
	221	wait_for_completion_timeout(&wm8350->auxadc_done, msecs_to_jiffies(5));
67488526	222
d19663ac MB	223	reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
d19663ac MB	224	if (reg & WM8350_AUXADC_POLL)
67488526 MB	225	dev_err(wm8350->dev, "adc chn %d read timeout\n", channel);
	226	else
	227	result = wm8350_reg_read(wm8350,
	228	WM8350_AUX1_READBACK + channel);
	229
	230	/* Turn off the ADC */
	231	reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
	232	wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5,
	233	reg & ~WM8350_AUXADC_ENA);
	234
	235	mutex_unlock(&wm8350->auxadc_mutex);
	236
	237	return result & WM8350_AUXADC_DATA1_MASK;
	238	}
	239	EXPORT_SYMBOL_GPL(wm8350_read_auxadc);
	240
d19663ac MB	241	static irqreturn_t wm8350_auxadc_irq(int irq, void *irq_data)
	242	{
	243	struct wm8350 *wm8350 = irq_data;
	244
	245	complete(&wm8350->auxadc_done);
	246
	247	return IRQ_HANDLED;
	248	}
	249
9201d38b MB	250	/*
	251	* Register a client device. This is non-fatal since there is no need to
	252	* fail the entire device init due to a single platform device failing.
	253	*/
	254	static void wm8350_client_dev_register(struct wm8350 *wm8350,
	255	const char *name,
	256	struct platform_device **pdev)
	257	{
	258	int ret;
	259
	260	*pdev = platform_device_alloc(name, -1);
cb9b2245	261	if (*pdev == NULL) {
9201d38b MB	262	dev_err(wm8350->dev, "Failed to allocate %s\n", name);
	263	return;
	264	}
	265
	266	(*pdev)->dev.parent = wm8350->dev;
	267	platform_set_drvdata(*pdev, wm8350);
	268	ret = platform_device_add(*pdev);
	269	if (ret != 0) {
	270	dev_err(wm8350->dev, "Failed to register %s: %d\n", name, ret);
	271	platform_device_put(*pdev);
	272	*pdev = NULL;
	273	}
	274	}
	275
ebccec0f	276	int wm8350_device_init(struct wm8350 *wm8350, int irq,
bcdd4efc	277	struct wm8350_platform_data *pdata)
89b4012b	278	{
85c93ea7	279	int ret;
b7b142d9 MB	280	unsigned int id1, id2, mask_rev;
b7b142d9 MB	281	unsigned int cust_id, mode, chip_rev;
89b4012b	282
18bf50a3 MB	283	dev_set_drvdata(wm8350->dev, wm8350);
18bf50a3 MB	284
89b4012b	285	/* get WM8350 revision and config mode */
b7b142d9	286	ret = regmap_read(wm8350->regmap, WM8350_RESET_ID, &id1);
85c93ea7 MB	287	if (ret != 0) {
	288	dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
	289	goto err;
	290	}
	291
b7b142d9	292	ret = regmap_read(wm8350->regmap, WM8350_ID, &id2);
85c93ea7 MB	293	if (ret != 0) {
	294	dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
	295	goto err;
	296	}
	297
b7b142d9	298	ret = regmap_read(wm8350->regmap, WM8350_REVISION, &mask_rev);
85c93ea7 MB	299	if (ret != 0) {
	300	dev_err(wm8350->dev, "Failed to read revision: %d\n", ret);
	301	goto err;
	302	}
89b4012b	303
b797a555 MB	304	if (id1 != 0x6143) {
	305	dev_err(wm8350->dev,
	306	"Device with ID %x is not a WM8350\n", id1);
	307	ret = -ENODEV;
	308	goto err;
	309	}
	310
1753b40f	311	mode = (id2 & WM8350_CONF_STS_MASK) >> 10;
b797a555 MB	312	cust_id = id2 & WM8350_CUST_ID_MASK;
	313	chip_rev = (id2 & WM8350_CHIP_REV_MASK) >> 12;
	314	dev_info(wm8350->dev,
	315	"CONF_STS %d, CUST_ID %d, MASK_REV %d, CHIP_REV %d\n",
	316	mode, cust_id, mask_rev, chip_rev);
	317
	318	if (cust_id != 0) {
	319	dev_err(wm8350->dev, "Unsupported CUST_ID\n");
	320	ret = -ENODEV;
	321	goto err;
	322	}
	323
	324	switch (mask_rev) {
	325	case 0:
645524a9 MB	326	wm8350->pmic.max_dcdc = WM8350_DCDC_6;
	327	wm8350->pmic.max_isink = WM8350_ISINK_B;
	328
b797a555	329	switch (chip_rev) {
89b4012b	330	case WM8350_REV_E:
b797a555	331	dev_info(wm8350->dev, "WM8350 Rev E\n");
89b4012b MB	332	break;
89b4012b MB	333	case WM8350_REV_F:
b797a555	334	dev_info(wm8350->dev, "WM8350 Rev F\n");
89b4012b MB	335	break;
89b4012b MB	336	case WM8350_REV_G:
b797a555	337	dev_info(wm8350->dev, "WM8350 Rev G\n");
d756f4a4	338	wm8350->power.rev_g_coeff = 1;
89b4012b	339	break;
0c8a6016	340	case WM8350_REV_H:
b797a555	341	dev_info(wm8350->dev, "WM8350 Rev H\n");
d756f4a4	342	wm8350->power.rev_g_coeff = 1;
0c8a6016	343	break;
89b4012b MB	344	default:
89b4012b MB	345	/* For safety we refuse to run on unknown hardware */
b797a555	346	dev_err(wm8350->dev, "Unknown WM8350 CHIP_REV\n");
89b4012b MB	347	ret = -ENODEV;
	348	goto err;
	349	}
b797a555 MB	350	break;
b797a555 MB	351
ca23f8c1 MB	352	case 1:
	353	wm8350->pmic.max_dcdc = WM8350_DCDC_4;
	354	wm8350->pmic.max_isink = WM8350_ISINK_A;
	355
	356	switch (chip_rev) {
	357	case 0:
	358	dev_info(wm8350->dev, "WM8351 Rev A\n");
	359	wm8350->power.rev_g_coeff = 1;
	360	break;
	361
02d46e07 MB	362	case 1:
	363	dev_info(wm8350->dev, "WM8351 Rev B\n");
	364	wm8350->power.rev_g_coeff = 1;
	365	break;
	366
ca23f8c1 MB	367	default:
	368	dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n");
	369	ret = -ENODEV;
	370	goto err;
	371	}
	372	break;
	373
96920630	374	case 2:
645524a9 MB	375	wm8350->pmic.max_dcdc = WM8350_DCDC_6;
	376	wm8350->pmic.max_isink = WM8350_ISINK_B;
	377
96920630 MB	378	switch (chip_rev) {
	379	case 0:
	380	dev_info(wm8350->dev, "WM8352 Rev A\n");
	381	wm8350->power.rev_g_coeff = 1;
	382	break;
	383
	384	default:
	385	dev_err(wm8350->dev, "Unknown WM8352 CHIP_REV\n");
	386	ret = -ENODEV;
	387	goto err;
	388	}
	389	break;
	390
b797a555 MB	391	default:
b797a555 MB	392	dev_err(wm8350->dev, "Unknown MASK_REV\n");
89b4012b MB	393	ret = -ENODEV;
	394	goto err;
	395	}
	396
67488526	397	mutex_init(&wm8350->auxadc_mutex);
d19663ac	398	init_completion(&wm8350->auxadc_done);
32064503	399
e0a3389a MB	400	ret = wm8350_irq_init(wm8350, irq, pdata);
e0a3389a MB	401	if (ret < 0)
19d57ed5	402	goto err;
ebccec0f	403
d19663ac MB	404	if (wm8350->irq_base) {
	405	ret = request_threaded_irq(wm8350->irq_base +
	406	WM8350_IRQ_AUXADC_DATARDY,
b3c8c82b FE	407	NULL, wm8350_auxadc_irq,
b3c8c82b FE	408	IRQF_ONESHOT,
d19663ac MB	409	"auxadc", wm8350);
	410	if (ret < 0)
	411	dev_warn(wm8350->dev,
	412	"Failed to request AUXADC IRQ: %d\n", ret);
	413	}
	414
62571c29 MB	415	if (pdata && pdata->init) {
	416	ret = pdata->init(wm8350);
	417	if (ret != 0) {
	418	dev_err(wm8350->dev, "Platform init() failed: %d\n",
	419	ret);
e0a3389a	420	goto err_irq;
62571c29 MB	421	}
	422	}
	423
ebccec0f MB	424	wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0);
ebccec0f MB	425
add41cb4 MB	426	wm8350_client_dev_register(wm8350, "wm8350-codec",
	427	&(wm8350->codec.pdev));
	428	wm8350_client_dev_register(wm8350, "wm8350-gpio",
	429	&(wm8350->gpio.pdev));
fb6c023a MB	430	wm8350_client_dev_register(wm8350, "wm8350-hwmon",
fb6c023a MB	431	&(wm8350->hwmon.pdev));
add41cb4 MB	432	wm8350_client_dev_register(wm8350, "wm8350-power",
	433	&(wm8350->power.pdev));
	434	wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev));
	435	wm8350_client_dev_register(wm8350, "wm8350-wdt", &(wm8350->wdt.pdev));
	436
89b4012b MB	437	return 0;
89b4012b MB	438
e0a3389a MB	439	err_irq:
e0a3389a MB	440	wm8350_irq_exit(wm8350);
8c46cf30	441	err:
89b4012b MB	442	return ret;
	443	}
	444	EXPORT_SYMBOL_GPL(wm8350_device_init);