[linux-block.git] / drivers / mfd / wm8350-core.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * wm8350-core.c  --  Device access for Wolfson WM8350
 *
 * Copyright 2007, 2008 Wolfson Microelectronics PLC.
 *
 * Author: Liam Girdwood, Mark Brown
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/export.h>
#include <linux/slab.h>
#include <linux/bug.h>
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/regmap.h>
#include <linux/workqueue.h>

#include <linux/mfd/wm8350/core.h>
#include <linux/mfd/wm8350/audio.h>
#include <linux/mfd/wm8350/comparator.h>
#include <linux/mfd/wm8350/gpio.h>
#include <linux/mfd/wm8350/pmic.h>
#include <linux/mfd/wm8350/rtc.h>
#include <linux/mfd/wm8350/supply.h>
#include <linux/mfd/wm8350/wdt.h>

#define WM8350_CLOCK_CONTROL_1		0x28
#define WM8350_AIF_TEST			0x74

/* debug */
#define WM8350_BUS_DEBUG 0
#if WM8350_BUS_DEBUG
#define dump(regs, src) do { \
	int i_; \
	u16 *src_ = src; \
	printk(KERN_DEBUG); \
	for (i_ = 0; i_ < regs; i_++) \
		printk(" 0x%4.4x", *src_++); \
	printk("\n"); \
} while (0);
#else
#define dump(bytes, src)
#endif

#define WM8350_LOCK_DEBUG 0
#if WM8350_LOCK_DEBUG
#define ldbg(format, arg...) printk(format, ## arg)
#else
#define ldbg(format, arg...)
#endif

/*
 * WM8350 Device IO
 */
static DEFINE_MUTEX(reg_lock_mutex);

/*
 * Safe read, modify, write methods
 */
int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
{
	return regmap_update_bits(wm8350->regmap, reg, mask, 0);
}
EXPORT_SYMBOL_GPL(wm8350_clear_bits);

int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
{
	return regmap_update_bits(wm8350->regmap, reg, mask, mask);
}
EXPORT_SYMBOL_GPL(wm8350_set_bits);

u16 wm8350_reg_read(struct wm8350 *wm8350, int reg)
{
	unsigned int data;
	int err;

	err = regmap_read(wm8350->regmap, reg, &data);
	if (err)
		dev_err(wm8350->dev, "read from reg R%d failed\n", reg);

	return data;
}
EXPORT_SYMBOL_GPL(wm8350_reg_read);

int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val)
{
	int ret;

	ret = regmap_write(wm8350->regmap, reg, val);

	if (ret)
		dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
	return ret;
}
EXPORT_SYMBOL_GPL(wm8350_reg_write);

int wm8350_block_read(struct wm8350 *wm8350, int start_reg, int regs,
		      u16 *dest)
{
	int err = 0;

	err = regmap_bulk_read(wm8350->regmap, start_reg, dest, regs);
	if (err)
		dev_err(wm8350->dev, "block read starting from R%d failed\n",
			start_reg);

	return err;
}
EXPORT_SYMBOL_GPL(wm8350_block_read);

int wm8350_block_write(struct wm8350 *wm8350, int start_reg, int regs,
		       u16 *src)
{
	int ret = 0;

	ret = regmap_bulk_write(wm8350->regmap, start_reg, src, regs);
	if (ret)
		dev_err(wm8350->dev, "block write starting at R%d failed\n",
			start_reg);

	return ret;
}
EXPORT_SYMBOL_GPL(wm8350_block_write);

/**
 * wm8350_reg_lock()
 *
 * The WM8350 has a hardware lock which can be used to prevent writes to
 * some registers (generally those which can cause particularly serious
 * problems if misused).  This function enables that lock.
 */
int wm8350_reg_lock(struct wm8350 *wm8350)
{
	int ret;

	mutex_lock(&reg_lock_mutex);

	ldbg(__func__);

	ret = wm8350_reg_write(wm8350, WM8350_SECURITY, WM8350_LOCK_KEY);
	if (ret)
		dev_err(wm8350->dev, "lock failed\n");

	wm8350->unlocked = false;

	mutex_unlock(&reg_lock_mutex);

	return ret;
}
EXPORT_SYMBOL_GPL(wm8350_reg_lock);

/**
 * wm8350_reg_unlock()
 *
 * The WM8350 has a hardware lock which can be used to prevent writes to
 * some registers (generally those which can cause particularly serious
 * problems if misused).  This function disables that lock so updates
 * can be performed.  For maximum safety this should be done only when
 * required.
 */
int wm8350_reg_unlock(struct wm8350 *wm8350)
{
	int ret;

	mutex_lock(&reg_lock_mutex);

	ldbg(__func__);

	ret = wm8350_reg_write(wm8350, WM8350_SECURITY, WM8350_UNLOCK_KEY);
	if (ret)
		dev_err(wm8350->dev, "unlock failed\n");

	wm8350->unlocked = true;

	mutex_unlock(&reg_lock_mutex);

	return ret;
}
EXPORT_SYMBOL_GPL(wm8350_reg_unlock);

int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref)
{
	u16 reg, result = 0;

	if (channel < WM8350_AUXADC_AUX1 || channel > WM8350_AUXADC_TEMP)
		return -EINVAL;
	if (channel >= WM8350_AUXADC_USB && channel <= WM8350_AUXADC_TEMP
	    && (scale != 0 || vref != 0))
		return -EINVAL;

	mutex_lock(&wm8350->auxadc_mutex);

	/* Turn on the ADC */
	reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
	wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, reg | WM8350_AUXADC_ENA);

	if (scale || vref) {
		reg = scale << 13;
		reg |= vref << 12;
		wm8350_reg_write(wm8350, WM8350_AUX1_READBACK + channel, reg);
	}

	reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
	reg |= 1 << channel | WM8350_AUXADC_POLL;
	wm8350_reg_write(wm8350, WM8350_DIGITISER_CONTROL_1, reg);

	/* If a late IRQ left the completion signalled then consume
	 * the completion. */
	try_wait_for_completion(&wm8350->auxadc_done);

	/* We ignore the result of the completion and just check for a
	 * conversion result, allowing us to soldier on if the IRQ
	 * infrastructure is not set up for the chip. */
	wait_for_completion_timeout(&wm8350->auxadc_done, msecs_to_jiffies(5));

	reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
	if (reg & WM8350_AUXADC_POLL)
		dev_err(wm8350->dev, "adc chn %d read timeout\n", channel);
	else
		result = wm8350_reg_read(wm8350,
					 WM8350_AUX1_READBACK + channel);

	/* Turn off the ADC */
	reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
	wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5,
			 reg & ~WM8350_AUXADC_ENA);

	mutex_unlock(&wm8350->auxadc_mutex);

	return result & WM8350_AUXADC_DATA1_MASK;
}
EXPORT_SYMBOL_GPL(wm8350_read_auxadc);

static irqreturn_t wm8350_auxadc_irq(int irq, void *irq_data)
{
	struct wm8350 *wm8350 = irq_data;

	complete(&wm8350->auxadc_done);

	return IRQ_HANDLED;
}

/*
 * Register a client device.  This is non-fatal since there is no need to
 * fail the entire device init due to a single platform device failing.
 */
static void wm8350_client_dev_register(struct wm8350 *wm8350,
				       const char *name,
				       struct platform_device **pdev)
{
	int ret;

	*pdev = platform_device_alloc(name, -1);
	if (*pdev == NULL) {
		dev_err(wm8350->dev, "Failed to allocate %s\n", name);
		return;
	}

	(*pdev)->dev.parent = wm8350->dev;
	platform_set_drvdata(*pdev, wm8350);
	ret = platform_device_add(*pdev);
	if (ret != 0) {
		dev_err(wm8350->dev, "Failed to register %s: %d\n", name, ret);
		platform_device_put(*pdev);
		*pdev = NULL;
	}
}

int wm8350_device_init(struct wm8350 *wm8350, int irq,
		       struct wm8350_platform_data *pdata)
{
	int ret;
	unsigned int id1, id2, mask_rev;
	unsigned int cust_id, mode, chip_rev;

	dev_set_drvdata(wm8350->dev, wm8350);

	/* get WM8350 revision and config mode */
	ret = regmap_read(wm8350->regmap, WM8350_RESET_ID, &id1);
	if (ret != 0) {
		dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
		goto err;
	}

	ret = regmap_read(wm8350->regmap, WM8350_ID, &id2);
	if (ret != 0) {
		dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
		goto err;
	}

	ret = regmap_read(wm8350->regmap, WM8350_REVISION, &mask_rev);
	if (ret != 0) {
		dev_err(wm8350->dev, "Failed to read revision: %d\n", ret);
		goto err;
	}

	if (id1 != 0x6143) {
		dev_err(wm8350->dev,
			"Device with ID %x is not a WM8350\n", id1);
		ret = -ENODEV;
		goto err;
	}

	mode = (id2 & WM8350_CONF_STS_MASK) >> 10;
	cust_id = id2 & WM8350_CUST_ID_MASK;
	chip_rev = (id2 & WM8350_CHIP_REV_MASK) >> 12;
	dev_info(wm8350->dev,
		 "CONF_STS %d, CUST_ID %d, MASK_REV %d, CHIP_REV %d\n",
		 mode, cust_id, mask_rev, chip_rev);

	if (cust_id != 0) {
		dev_err(wm8350->dev, "Unsupported CUST_ID\n");
		ret = -ENODEV;
		goto err;
	}

	switch (mask_rev) {
	case 0:
		wm8350->pmic.max_dcdc = WM8350_DCDC_6;
		wm8350->pmic.max_isink = WM8350_ISINK_B;

		switch (chip_rev) {
		case WM8350_REV_E:
			dev_info(wm8350->dev, "WM8350 Rev E\n");
			break;
		case WM8350_REV_F:
			dev_info(wm8350->dev, "WM8350 Rev F\n");
			break;
		case WM8350_REV_G:
			dev_info(wm8350->dev, "WM8350 Rev G\n");
			wm8350->power.rev_g_coeff = 1;
			break;
		case WM8350_REV_H:
			dev_info(wm8350->dev, "WM8350 Rev H\n");
			wm8350->power.rev_g_coeff = 1;
			break;
		default:
			/* For safety we refuse to run on unknown hardware */
			dev_err(wm8350->dev, "Unknown WM8350 CHIP_REV\n");
			ret = -ENODEV;
			goto err;
		}
		break;

	case 1:
		wm8350->pmic.max_dcdc = WM8350_DCDC_4;
		wm8350->pmic.max_isink = WM8350_ISINK_A;

		switch (chip_rev) {
		case 0:
			dev_info(wm8350->dev, "WM8351 Rev A\n");
			wm8350->power.rev_g_coeff = 1;
			break;

		case 1:
			dev_info(wm8350->dev, "WM8351 Rev B\n");
			wm8350->power.rev_g_coeff = 1;
			break;

		default:
			dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n");
			ret = -ENODEV;
			goto err;
		}
		break;

	case 2:
		wm8350->pmic.max_dcdc = WM8350_DCDC_6;
		wm8350->pmic.max_isink = WM8350_ISINK_B;

		switch (chip_rev) {
		case 0:
			dev_info(wm8350->dev, "WM8352 Rev A\n");
			wm8350->power.rev_g_coeff = 1;
			break;

		default:
			dev_err(wm8350->dev, "Unknown WM8352 CHIP_REV\n");
			ret = -ENODEV;
			goto err;
		}
		break;

	default:
		dev_err(wm8350->dev, "Unknown MASK_REV\n");
		ret = -ENODEV;
		goto err;
	}

	mutex_init(&wm8350->auxadc_mutex);
	init_completion(&wm8350->auxadc_done);

	ret = wm8350_irq_init(wm8350, irq, pdata);
	if (ret < 0)
		goto err;

	if (wm8350->irq_base) {
		ret = request_threaded_irq(wm8350->irq_base +
					   WM8350_IRQ_AUXADC_DATARDY,
					   NULL, wm8350_auxadc_irq,
					   IRQF_ONESHOT,
					   "auxadc", wm8350);
		if (ret < 0)
			dev_warn(wm8350->dev,
				 "Failed to request AUXADC IRQ: %d\n", ret);
	}

	if (pdata && pdata->init) {
		ret = pdata->init(wm8350);
		if (ret != 0) {
			dev_err(wm8350->dev, "Platform init() failed: %d\n",
				ret);
			goto err_irq;
		}
	}

	wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0);

	wm8350_client_dev_register(wm8350, "wm8350-codec",
				   &(wm8350->codec.pdev));
	wm8350_client_dev_register(wm8350, "wm8350-gpio",
				   &(wm8350->gpio.pdev));
	wm8350_client_dev_register(wm8350, "wm8350-hwmon",
				   &(wm8350->hwmon.pdev));
	wm8350_client_dev_register(wm8350, "wm8350-power",
				   &(wm8350->power.pdev));
	wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev));
	wm8350_client_dev_register(wm8350, "wm8350-wdt", &(wm8350->wdt.pdev));

	return 0;

err_irq:
	wm8350_irq_exit(wm8350);
err:
	return ret;
}
EXPORT_SYMBOL_GPL(wm8350_device_init);
Commit	Line	Data
2874c5fd	1	// SPDX-License-Identifier: GPL-2.0-or-later
89b4012b MB	2	/*
	3	* wm8350-core.c -- Device access for Wolfson WM8350
	4	*
	5	* Copyright 2007, 2008 Wolfson Microelectronics PLC.
	6	*
	7	* Author: Liam Girdwood, Mark Brown
89b4012b MB	8	*/
	9
	10	#include <linux/kernel.h>
0db88688 PG	11	#include <linux/init.h>
0db88688 PG	12	#include <linux/export.h>
5a0e3ad6	13	#include <linux/slab.h>
ebccec0f	14	#include <linux/bug.h>
89b4012b MB	15	#include <linux/device.h>
	16	#include <linux/delay.h>
	17	#include <linux/interrupt.h>
b7b142d9	18	#include <linux/regmap.h>
ebccec0f	19	#include <linux/workqueue.h>
89b4012b MB	20
	21	#include <linux/mfd/wm8350/core.h>
	22	#include <linux/mfd/wm8350/audio.h>
ebccec0f	23	#include <linux/mfd/wm8350/comparator.h>
89b4012b MB	24	#include <linux/mfd/wm8350/gpio.h>
89b4012b MB	25	#include <linux/mfd/wm8350/pmic.h>
ebccec0f	26	#include <linux/mfd/wm8350/rtc.h>
89b4012b	27	#include <linux/mfd/wm8350/supply.h>
ebccec0f	28	#include <linux/mfd/wm8350/wdt.h>
89b4012b	29
89b4012b MB	30	#define WM8350_CLOCK_CONTROL_1 0x28
	31	#define WM8350_AIF_TEST 0x74
	32
	33	/* debug */
	34	#define WM8350_BUS_DEBUG 0
	35	#if WM8350_BUS_DEBUG
	36	#define dump(regs, src) do { \
	37	int i_; \
	38	u16 *src_ = src; \
	39	printk(KERN_DEBUG); \
	40	for (i_ = 0; i_ < regs; i_++) \
	41	printk(" 0x%4.4x", *src_++); \
	42	printk("\n"); \
	43	} while (0);
	44	#else
	45	#define dump(bytes, src)
	46	#endif
	47
	48	#define WM8350_LOCK_DEBUG 0
	49	#if WM8350_LOCK_DEBUG
	50	#define ldbg(format, arg...) printk(format, ## arg)
	51	#else
	52	#define ldbg(format, arg...)
	53	#endif
	54
	55	/*
	56	* WM8350 Device IO
	57	*/
89b4012b	58	static DEFINE_MUTEX(reg_lock_mutex);
89b4012b	59
89b4012b MB	60	/*
	61	* Safe read, modify, write methods
	62	*/
	63	int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
	64	{
19d57ed5	65	return regmap_update_bits(wm8350->regmap, reg, mask, 0);
89b4012b MB	66	}
	67	EXPORT_SYMBOL_GPL(wm8350_clear_bits);
	68
	69	int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask)
	70	{
19d57ed5	71	return regmap_update_bits(wm8350->regmap, reg, mask, mask);
89b4012b MB	72	}
	73	EXPORT_SYMBOL_GPL(wm8350_set_bits);
	74
	75	u16 wm8350_reg_read(struct wm8350 *wm8350, int reg)
	76	{
19d57ed5	77	unsigned int data;
89b4012b MB	78	int err;
89b4012b MB	79
19d57ed5	80	err = regmap_read(wm8350->regmap, reg, &data);
89b4012b MB	81	if (err)
	82	dev_err(wm8350->dev, "read from reg R%d failed\n", reg);
	83
89b4012b MB	84	return data;
	85	}
	86	EXPORT_SYMBOL_GPL(wm8350_reg_read);
	87
	88	int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val)
	89	{
	90	int ret;
89b4012b	91
19d57ed5 MB	92	ret = regmap_write(wm8350->regmap, reg, val);
19d57ed5 MB	93
89b4012b MB	94	if (ret)
89b4012b MB	95	dev_err(wm8350->dev, "write to reg R%d failed\n", reg);
89b4012b MB	96	return ret;
	97	}
	98	EXPORT_SYMBOL_GPL(wm8350_reg_write);
	99
	100	int wm8350_block_read(struct wm8350 *wm8350, int start_reg, int regs,
	101	u16 *dest)
	102	{
	103	int err = 0;
	104
19d57ed5	105	err = regmap_bulk_read(wm8350->regmap, start_reg, dest, regs);
89b4012b MB	106	if (err)
	107	dev_err(wm8350->dev, "block read starting from R%d failed\n",
	108	start_reg);
19d57ed5	109
89b4012b MB	110	return err;
	111	}
	112	EXPORT_SYMBOL_GPL(wm8350_block_read);
	113
	114	int wm8350_block_write(struct wm8350 *wm8350, int start_reg, int regs,
	115	u16 *src)
	116	{
	117	int ret = 0;
	118
19d57ed5	119	ret = regmap_bulk_write(wm8350->regmap, start_reg, src, regs);
89b4012b MB	120	if (ret)
	121	dev_err(wm8350->dev, "block write starting at R%d failed\n",
	122	start_reg);
19d57ed5	123
89b4012b MB	124	return ret;
	125	}
	126	EXPORT_SYMBOL_GPL(wm8350_block_write);
	127
858e6744 MB	128	/**
	129	* wm8350_reg_lock()
	130	*
	131	* The WM8350 has a hardware lock which can be used to prevent writes to
	132	* some registers (generally those which can cause particularly serious
	133	* problems if misused). This function enables that lock.
	134	*/
89b4012b MB	135	int wm8350_reg_lock(struct wm8350 *wm8350)
89b4012b MB	136	{
89b4012b MB	137	int ret;
89b4012b MB	138
52b461b8 MB	139	mutex_lock(&reg_lock_mutex);
52b461b8 MB	140
89b4012b	141	ldbg(__func__);
52b461b8 MB	142
52b461b8 MB	143	ret = wm8350_reg_write(wm8350, WM8350_SECURITY, WM8350_LOCK_KEY);
89b4012b MB	144	if (ret)
89b4012b MB	145	dev_err(wm8350->dev, "lock failed\n");
52b461b8 MB	146
	147	wm8350->unlocked = false;
	148
	149	mutex_unlock(&reg_lock_mutex);
	150
89b4012b MB	151	return ret;
	152	}
	153	EXPORT_SYMBOL_GPL(wm8350_reg_lock);
	154
858e6744 MB	155	/**
	156	* wm8350_reg_unlock()
	157	*
	158	* The WM8350 has a hardware lock which can be used to prevent writes to
	159	* some registers (generally those which can cause particularly serious
	160	* problems if misused). This function disables that lock so updates
	161	* can be performed. For maximum safety this should be done only when
	162	* required.
	163	*/
89b4012b MB	164	int wm8350_reg_unlock(struct wm8350 *wm8350)
89b4012b MB	165	{
89b4012b MB	166	int ret;
89b4012b MB	167
52b461b8 MB	168	mutex_lock(&reg_lock_mutex);
52b461b8 MB	169
89b4012b	170	ldbg(__func__);
52b461b8 MB	171
52b461b8 MB	172	ret = wm8350_reg_write(wm8350, WM8350_SECURITY, WM8350_UNLOCK_KEY);
89b4012b MB	173	if (ret)
89b4012b MB	174	dev_err(wm8350->dev, "unlock failed\n");
52b461b8 MB	175
	176	wm8350->unlocked = true;
	177
	178	mutex_unlock(&reg_lock_mutex);
	179
89b4012b MB	180	return ret;
	181	}
	182	EXPORT_SYMBOL_GPL(wm8350_reg_unlock);
	183
67488526 MB	184	int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale, int vref)
	185	{
	186	u16 reg, result = 0;
67488526 MB	187
	188	if (channel < WM8350_AUXADC_AUX1 \|\| channel > WM8350_AUXADC_TEMP)
	189	return -EINVAL;
	190	if (channel >= WM8350_AUXADC_USB && channel <= WM8350_AUXADC_TEMP
	191	&& (scale != 0 \|\| vref != 0))
	192	return -EINVAL;
	193
	194	mutex_lock(&wm8350->auxadc_mutex);
	195
	196	/* Turn on the ADC */
	197	reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
	198	wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5, reg \| WM8350_AUXADC_ENA);
	199
	200	if (scale \|\| vref) {
	201	reg = scale << 13;
	202	reg \|= vref << 12;
	203	wm8350_reg_write(wm8350, WM8350_AUX1_READBACK + channel, reg);
	204	}
	205
	206	reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
	207	reg \|= 1 << channel \| WM8350_AUXADC_POLL;
	208	wm8350_reg_write(wm8350, WM8350_DIGITISER_CONTROL_1, reg);
	209
5051d411 MB	210	/* If a late IRQ left the completion signalled then consume
	211	* the completion. */
	212	try_wait_for_completion(&wm8350->auxadc_done);
	213
d19663ac MB	214	/* We ignore the result of the completion and just check for a
	215	* conversion result, allowing us to soldier on if the IRQ
	216	* infrastructure is not set up for the chip. */
	217	wait_for_completion_timeout(&wm8350->auxadc_done, msecs_to_jiffies(5));
67488526	218
d19663ac MB	219	reg = wm8350_reg_read(wm8350, WM8350_DIGITISER_CONTROL_1);
d19663ac MB	220	if (reg & WM8350_AUXADC_POLL)
67488526 MB	221	dev_err(wm8350->dev, "adc chn %d read timeout\n", channel);
	222	else
	223	result = wm8350_reg_read(wm8350,
	224	WM8350_AUX1_READBACK + channel);
	225
	226	/* Turn off the ADC */
	227	reg = wm8350_reg_read(wm8350, WM8350_POWER_MGMT_5);
	228	wm8350_reg_write(wm8350, WM8350_POWER_MGMT_5,
	229	reg & ~WM8350_AUXADC_ENA);
	230
	231	mutex_unlock(&wm8350->auxadc_mutex);
	232
	233	return result & WM8350_AUXADC_DATA1_MASK;
	234	}
	235	EXPORT_SYMBOL_GPL(wm8350_read_auxadc);
	236
d19663ac MB	237	static irqreturn_t wm8350_auxadc_irq(int irq, void *irq_data)
	238	{
	239	struct wm8350 *wm8350 = irq_data;
	240
	241	complete(&wm8350->auxadc_done);
	242
	243	return IRQ_HANDLED;
	244	}
	245
9201d38b MB	246	/*
	247	* Register a client device. This is non-fatal since there is no need to
	248	* fail the entire device init due to a single platform device failing.
	249	*/
	250	static void wm8350_client_dev_register(struct wm8350 *wm8350,
	251	const char *name,
	252	struct platform_device **pdev)
	253	{
	254	int ret;
	255
	256	*pdev = platform_device_alloc(name, -1);
cb9b2245	257	if (*pdev == NULL) {
9201d38b MB	258	dev_err(wm8350->dev, "Failed to allocate %s\n", name);
	259	return;
	260	}
	261
	262	(*pdev)->dev.parent = wm8350->dev;
	263	platform_set_drvdata(*pdev, wm8350);
	264	ret = platform_device_add(*pdev);
	265	if (ret != 0) {
	266	dev_err(wm8350->dev, "Failed to register %s: %d\n", name, ret);
	267	platform_device_put(*pdev);
	268	*pdev = NULL;
	269	}
	270	}
	271
ebccec0f	272	int wm8350_device_init(struct wm8350 *wm8350, int irq,
bcdd4efc	273	struct wm8350_platform_data *pdata)
89b4012b	274	{
85c93ea7	275	int ret;
b7b142d9 MB	276	unsigned int id1, id2, mask_rev;
b7b142d9 MB	277	unsigned int cust_id, mode, chip_rev;
89b4012b	278
18bf50a3 MB	279	dev_set_drvdata(wm8350->dev, wm8350);
18bf50a3 MB	280
89b4012b	281	/* get WM8350 revision and config mode */
b7b142d9	282	ret = regmap_read(wm8350->regmap, WM8350_RESET_ID, &id1);
85c93ea7 MB	283	if (ret != 0) {
	284	dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
	285	goto err;
	286	}
	287
b7b142d9	288	ret = regmap_read(wm8350->regmap, WM8350_ID, &id2);
85c93ea7 MB	289	if (ret != 0) {
	290	dev_err(wm8350->dev, "Failed to read ID: %d\n", ret);
	291	goto err;
	292	}
	293
b7b142d9	294	ret = regmap_read(wm8350->regmap, WM8350_REVISION, &mask_rev);
85c93ea7 MB	295	if (ret != 0) {
	296	dev_err(wm8350->dev, "Failed to read revision: %d\n", ret);
	297	goto err;
	298	}
89b4012b	299
b797a555 MB	300	if (id1 != 0x6143) {
	301	dev_err(wm8350->dev,
	302	"Device with ID %x is not a WM8350\n", id1);
	303	ret = -ENODEV;
	304	goto err;
	305	}
	306
1753b40f	307	mode = (id2 & WM8350_CONF_STS_MASK) >> 10;
b797a555 MB	308	cust_id = id2 & WM8350_CUST_ID_MASK;
	309	chip_rev = (id2 & WM8350_CHIP_REV_MASK) >> 12;
	310	dev_info(wm8350->dev,
	311	"CONF_STS %d, CUST_ID %d, MASK_REV %d, CHIP_REV %d\n",
	312	mode, cust_id, mask_rev, chip_rev);
	313
	314	if (cust_id != 0) {
	315	dev_err(wm8350->dev, "Unsupported CUST_ID\n");
	316	ret = -ENODEV;
	317	goto err;
	318	}
	319
	320	switch (mask_rev) {
	321	case 0:
645524a9 MB	322	wm8350->pmic.max_dcdc = WM8350_DCDC_6;
	323	wm8350->pmic.max_isink = WM8350_ISINK_B;
	324
b797a555	325	switch (chip_rev) {
89b4012b	326	case WM8350_REV_E:
b797a555	327	dev_info(wm8350->dev, "WM8350 Rev E\n");
89b4012b MB	328	break;
89b4012b MB	329	case WM8350_REV_F:
b797a555	330	dev_info(wm8350->dev, "WM8350 Rev F\n");
89b4012b MB	331	break;
89b4012b MB	332	case WM8350_REV_G:
b797a555	333	dev_info(wm8350->dev, "WM8350 Rev G\n");
d756f4a4	334	wm8350->power.rev_g_coeff = 1;
89b4012b	335	break;
0c8a6016	336	case WM8350_REV_H:
b797a555	337	dev_info(wm8350->dev, "WM8350 Rev H\n");
d756f4a4	338	wm8350->power.rev_g_coeff = 1;
0c8a6016	339	break;
89b4012b MB	340	default:
89b4012b MB	341	/* For safety we refuse to run on unknown hardware */
b797a555	342	dev_err(wm8350->dev, "Unknown WM8350 CHIP_REV\n");
89b4012b MB	343	ret = -ENODEV;
	344	goto err;
	345	}
b797a555 MB	346	break;
b797a555 MB	347
ca23f8c1 MB	348	case 1:
	349	wm8350->pmic.max_dcdc = WM8350_DCDC_4;
	350	wm8350->pmic.max_isink = WM8350_ISINK_A;
	351
	352	switch (chip_rev) {
	353	case 0:
	354	dev_info(wm8350->dev, "WM8351 Rev A\n");
	355	wm8350->power.rev_g_coeff = 1;
	356	break;
	357
02d46e07 MB	358	case 1:
	359	dev_info(wm8350->dev, "WM8351 Rev B\n");
	360	wm8350->power.rev_g_coeff = 1;
	361	break;
	362
ca23f8c1 MB	363	default:
	364	dev_err(wm8350->dev, "Unknown WM8351 CHIP_REV\n");
	365	ret = -ENODEV;
	366	goto err;
	367	}
	368	break;
	369
96920630	370	case 2:
645524a9 MB	371	wm8350->pmic.max_dcdc = WM8350_DCDC_6;
	372	wm8350->pmic.max_isink = WM8350_ISINK_B;
	373
96920630 MB	374	switch (chip_rev) {
	375	case 0:
	376	dev_info(wm8350->dev, "WM8352 Rev A\n");
	377	wm8350->power.rev_g_coeff = 1;
	378	break;
	379
	380	default:
	381	dev_err(wm8350->dev, "Unknown WM8352 CHIP_REV\n");
	382	ret = -ENODEV;
	383	goto err;
	384	}
	385	break;
	386
b797a555 MB	387	default:
b797a555 MB	388	dev_err(wm8350->dev, "Unknown MASK_REV\n");
89b4012b MB	389	ret = -ENODEV;
	390	goto err;
	391	}
	392
67488526	393	mutex_init(&wm8350->auxadc_mutex);
d19663ac	394	init_completion(&wm8350->auxadc_done);
32064503	395
e0a3389a MB	396	ret = wm8350_irq_init(wm8350, irq, pdata);
e0a3389a MB	397	if (ret < 0)
19d57ed5	398	goto err;
ebccec0f	399
d19663ac MB	400	if (wm8350->irq_base) {
	401	ret = request_threaded_irq(wm8350->irq_base +
	402	WM8350_IRQ_AUXADC_DATARDY,
b3c8c82b FE	403	NULL, wm8350_auxadc_irq,
b3c8c82b FE	404	IRQF_ONESHOT,
d19663ac MB	405	"auxadc", wm8350);
	406	if (ret < 0)
	407	dev_warn(wm8350->dev,
	408	"Failed to request AUXADC IRQ: %d\n", ret);
	409	}
	410
62571c29 MB	411	if (pdata && pdata->init) {
	412	ret = pdata->init(wm8350);
	413	if (ret != 0) {
	414	dev_err(wm8350->dev, "Platform init() failed: %d\n",
	415	ret);
e0a3389a	416	goto err_irq;
62571c29 MB	417	}
	418	}
	419
ebccec0f MB	420	wm8350_reg_write(wm8350, WM8350_SYSTEM_INTERRUPTS_MASK, 0x0);
ebccec0f MB	421
add41cb4 MB	422	wm8350_client_dev_register(wm8350, "wm8350-codec",
	423	&(wm8350->codec.pdev));
	424	wm8350_client_dev_register(wm8350, "wm8350-gpio",
	425	&(wm8350->gpio.pdev));
fb6c023a MB	426	wm8350_client_dev_register(wm8350, "wm8350-hwmon",
fb6c023a MB	427	&(wm8350->hwmon.pdev));
add41cb4 MB	428	wm8350_client_dev_register(wm8350, "wm8350-power",
	429	&(wm8350->power.pdev));
	430	wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev));
	431	wm8350_client_dev_register(wm8350, "wm8350-wdt", &(wm8350->wdt.pdev));
	432
89b4012b MB	433	return 0;
89b4012b MB	434
e0a3389a MB	435	err_irq:
e0a3389a MB	436	wm8350_irq_exit(wm8350);
8c46cf30	437	err:
89b4012b MB	438	return ret;
	439	}
	440	EXPORT_SYMBOL_GPL(wm8350_device_init);