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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
[linux-block.git] / drivers / mfd / wm831x-core.c
CommitLineData
2874c5fd 1// SPDX-License-Identifier: GPL-2.0-or-later
d2bedfe7
MB		 2/*
3 * wm831x-core.c -- Device access for Wolfson WM831x PMICs
4 *
5 * Copyright 2009 Wolfson Microelectronics PLC.
6 *
7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
d2bedfe7
MB		 8 */
9
10#include <linux/kernel.h>
efb5a790
PG		 11#include <linux/init.h>
12#include <linux/export.h>
7e9f9fd4
MB		 13#include <linux/bcd.h>
14#include <linux/delay.h>
d2bedfe7 15#include <linux/mfd/core.h>
5a0e3ad6 16#include <linux/slab.h>
1df5981b 17#include <linux/err.h>
f6dd8449
CK		 18#include <linux/of.h>
19#include <linux/of_device.h>
d2bedfe7
MB		 20
21#include <linux/mfd/wm831x/core.h>
22#include <linux/mfd/wm831x/pdata.h>
7d4d0a3e 23#include <linux/mfd/wm831x/irq.h>
7e9f9fd4 24#include <linux/mfd/wm831x/auxadc.h>
6704e517 25#include <linux/mfd/wm831x/otp.h>
523d9cfb 26#include <linux/mfd/wm831x/pmu.h>
698659d5
MB		 27#include <linux/mfd/wm831x/regulator.h>
28
29/* Current settings - values are 2*2^(reg_val/4) microamps. These are
30 * exported since they are used by multiple drivers.
31 */
d48acfd0 32const unsigned int wm831x_isinkv_values[WM831X_ISINK_MAX_ISEL + 1] = {
698659d5
MB		 33 2,
34 2,
35 3,
36 3,
37 4,
38 5,
39 6,
40 7,
41 8,
42 10,
43 11,
44 13,
45 16,
46 19,
47 23,
48 27,
49 32,
50 38,
51 45,
52 54,
53 64,
54 76,
55 91,
56 108,
57 128,
58 152,
59 181,
60 215,
61 256,
62 304,
63 362,
64 431,
65 512,
66 609,
67 724,
68 861,
69 1024,
70 1218,
71 1448,
72 1722,
73 2048,
74 2435,
75 2896,
76 3444,
77 4096,
78 4871,
79 5793,
80 6889,
81 8192,
82 9742,
83 11585,
84 13777,
85 16384,
86 19484,
87 23170,
88 27554,
89};
90EXPORT_SYMBOL_GPL(wm831x_isinkv_values);
d2bedfe7 91
d2bedfe7
MB		 92static int wm831x_reg_locked(struct wm831x *wm831x, unsigned short reg)
93{
94 if (!wm831x->locked)
95 return 0;
96
97 switch (reg) {
98 case WM831X_WATCHDOG:
99 case WM831X_DC4_CONTROL:
100 case WM831X_ON_PIN_CONTROL:
101 case WM831X_BACKUP_CHARGER_CONTROL:
102 case WM831X_CHARGER_CONTROL_1:
103 case WM831X_CHARGER_CONTROL_2:
104 return 1;
105
106 default:
107 return 0;
108 }
109}
110
111/**
926337b2 112 * wm831x_reg_lock: Unlock user keyed registers
d2bedfe7
MB		 113 *
114 * The WM831x has a user key preventing writes to particularly
115 * critical registers. This function locks those registers,
116 * allowing writes to them.
38ea9f47
LJ		 117 *
118 * @wm831x: pointer to local driver data structure
d2bedfe7
MB		 119 */
120void wm831x_reg_lock(struct wm831x *wm831x)
121{
122 int ret;
123
124 ret = wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0);
125 if (ret == 0) {
126 dev_vdbg(wm831x->dev, "Registers locked\n");
127
128 mutex_lock(&wm831x->io_lock);
129 WARN_ON(wm831x->locked);
130 wm831x->locked = 1;
131 mutex_unlock(&wm831x->io_lock);
132 } else {
133 dev_err(wm831x->dev, "Failed to lock registers: %d\n", ret);
134 }
135
136}
137EXPORT_SYMBOL_GPL(wm831x_reg_lock);
138
139/**
140 * wm831x_reg_unlock: Unlock user keyed registers
141 *
142 * The WM831x has a user key preventing writes to particularly
143 * critical registers. This function locks those registers,
144 * preventing spurious writes.
38ea9f47
LJ		 145 *
146 * @wm831x: pointer to local driver data structure
d2bedfe7
MB		 147 */
148int wm831x_reg_unlock(struct wm831x *wm831x)
149{
150 int ret;
151
152 /* 0x9716 is the value required to unlock the registers */
153 ret = wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0x9716);
154 if (ret == 0) {
155 dev_vdbg(wm831x->dev, "Registers unlocked\n");
156
157 mutex_lock(&wm831x->io_lock);
158 WARN_ON(!wm831x->locked);
159 wm831x->locked = 0;
160 mutex_unlock(&wm831x->io_lock);
161 }
162
163 return ret;
164}
165EXPORT_SYMBOL_GPL(wm831x_reg_unlock);
166
2e47fff1
MB		 167static bool wm831x_reg_readable(struct device *dev, unsigned int reg)
168{
169 switch (reg) {
170 case WM831X_RESET_ID:
171 case WM831X_REVISION:
172 case WM831X_PARENT_ID:
173 case WM831X_SYSVDD_CONTROL:
174 case WM831X_THERMAL_MONITORING:
175 case WM831X_POWER_STATE:
176 case WM831X_WATCHDOG:
177 case WM831X_ON_PIN_CONTROL:
178 case WM831X_RESET_CONTROL:
179 case WM831X_CONTROL_INTERFACE:
180 case WM831X_SECURITY_KEY:
181 case WM831X_SOFTWARE_SCRATCH:
182 case WM831X_OTP_CONTROL:
183 case WM831X_GPIO_LEVEL:
184 case WM831X_SYSTEM_STATUS:
185 case WM831X_ON_SOURCE:
186 case WM831X_OFF_SOURCE:
187 case WM831X_SYSTEM_INTERRUPTS:
188 case WM831X_INTERRUPT_STATUS_1:
189 case WM831X_INTERRUPT_STATUS_2:
190 case WM831X_INTERRUPT_STATUS_3:
191 case WM831X_INTERRUPT_STATUS_4:
192 case WM831X_INTERRUPT_STATUS_5:
193 case WM831X_IRQ_CONFIG:
194 case WM831X_SYSTEM_INTERRUPTS_MASK:
195 case WM831X_INTERRUPT_STATUS_1_MASK:
196 case WM831X_INTERRUPT_STATUS_2_MASK:
197 case WM831X_INTERRUPT_STATUS_3_MASK:
198 case WM831X_INTERRUPT_STATUS_4_MASK:
199 case WM831X_INTERRUPT_STATUS_5_MASK:
200 case WM831X_RTC_WRITE_COUNTER:
201 case WM831X_RTC_TIME_1:
202 case WM831X_RTC_TIME_2:
203 case WM831X_RTC_ALARM_1:
204 case WM831X_RTC_ALARM_2:
205 case WM831X_RTC_CONTROL:
206 case WM831X_RTC_TRIM:
207 case WM831X_TOUCH_CONTROL_1:
208 case WM831X_TOUCH_CONTROL_2:
209 case WM831X_TOUCH_DATA_X:
210 case WM831X_TOUCH_DATA_Y:
211 case WM831X_TOUCH_DATA_Z:
212 case WM831X_AUXADC_DATA:
213 case WM831X_AUXADC_CONTROL:
214 case WM831X_AUXADC_SOURCE:
215 case WM831X_COMPARATOR_CONTROL:
216 case WM831X_COMPARATOR_1:
217 case WM831X_COMPARATOR_2:
218 case WM831X_COMPARATOR_3:
219 case WM831X_COMPARATOR_4:
220 case WM831X_GPIO1_CONTROL:
221 case WM831X_GPIO2_CONTROL:
222 case WM831X_GPIO3_CONTROL:
223 case WM831X_GPIO4_CONTROL:
224 case WM831X_GPIO5_CONTROL:
225 case WM831X_GPIO6_CONTROL:
226 case WM831X_GPIO7_CONTROL:
227 case WM831X_GPIO8_CONTROL:
228 case WM831X_GPIO9_CONTROL:
229 case WM831X_GPIO10_CONTROL:
230 case WM831X_GPIO11_CONTROL:
231 case WM831X_GPIO12_CONTROL:
232 case WM831X_GPIO13_CONTROL:
233 case WM831X_GPIO14_CONTROL:
234 case WM831X_GPIO15_CONTROL:
235 case WM831X_GPIO16_CONTROL:
236 case WM831X_CHARGER_CONTROL_1:
237 case WM831X_CHARGER_CONTROL_2:
238 case WM831X_CHARGER_STATUS:
239 case WM831X_BACKUP_CHARGER_CONTROL:
240 case WM831X_STATUS_LED_1:
241 case WM831X_STATUS_LED_2:
242 case WM831X_CURRENT_SINK_1:
243 case WM831X_CURRENT_SINK_2:
244 case WM831X_DCDC_ENABLE:
245 case WM831X_LDO_ENABLE:
246 case WM831X_DCDC_STATUS:
247 case WM831X_LDO_STATUS:
248 case WM831X_DCDC_UV_STATUS:
249 case WM831X_LDO_UV_STATUS:
250 case WM831X_DC1_CONTROL_1:
251 case WM831X_DC1_CONTROL_2:
252 case WM831X_DC1_ON_CONFIG:
253 case WM831X_DC1_SLEEP_CONTROL:
254 case WM831X_DC1_DVS_CONTROL:
255 case WM831X_DC2_CONTROL_1:
256 case WM831X_DC2_CONTROL_2:
257 case WM831X_DC2_ON_CONFIG:
258 case WM831X_DC2_SLEEP_CONTROL:
259 case WM831X_DC2_DVS_CONTROL:
260 case WM831X_DC3_CONTROL_1:
261 case WM831X_DC3_CONTROL_2:
262 case WM831X_DC3_ON_CONFIG:
263 case WM831X_DC3_SLEEP_CONTROL:
264 case WM831X_DC4_CONTROL:
265 case WM831X_DC4_SLEEP_CONTROL:
266 case WM831X_EPE1_CONTROL:
267 case WM831X_EPE2_CONTROL:
268 case WM831X_LDO1_CONTROL:
269 case WM831X_LDO1_ON_CONTROL:
270 case WM831X_LDO1_SLEEP_CONTROL:
271 case WM831X_LDO2_CONTROL:
272 case WM831X_LDO2_ON_CONTROL:
273 case WM831X_LDO2_SLEEP_CONTROL:
274 case WM831X_LDO3_CONTROL:
275 case WM831X_LDO3_ON_CONTROL:
276 case WM831X_LDO3_SLEEP_CONTROL:
277 case WM831X_LDO4_CONTROL:
278 case WM831X_LDO4_ON_CONTROL:
279 case WM831X_LDO4_SLEEP_CONTROL:
280 case WM831X_LDO5_CONTROL:
281 case WM831X_LDO5_ON_CONTROL:
282 case WM831X_LDO5_SLEEP_CONTROL:
283 case WM831X_LDO6_CONTROL:
284 case WM831X_LDO6_ON_CONTROL:
285 case WM831X_LDO6_SLEEP_CONTROL:
286 case WM831X_LDO7_CONTROL:
287 case WM831X_LDO7_ON_CONTROL:
288 case WM831X_LDO7_SLEEP_CONTROL:
289 case WM831X_LDO8_CONTROL:
290 case WM831X_LDO8_ON_CONTROL:
291 case WM831X_LDO8_SLEEP_CONTROL:
292 case WM831X_LDO9_CONTROL:
293 case WM831X_LDO9_ON_CONTROL:
294 case WM831X_LDO9_SLEEP_CONTROL:
295 case WM831X_LDO10_CONTROL:
296 case WM831X_LDO10_ON_CONTROL:
297 case WM831X_LDO10_SLEEP_CONTROL:
298 case WM831X_LDO11_ON_CONTROL:
299 case WM831X_LDO11_SLEEP_CONTROL:
300 case WM831X_POWER_GOOD_SOURCE_1:
301 case WM831X_POWER_GOOD_SOURCE_2:
302 case WM831X_CLOCK_CONTROL_1:
303 case WM831X_CLOCK_CONTROL_2:
304 case WM831X_FLL_CONTROL_1:
305 case WM831X_FLL_CONTROL_2:
306 case WM831X_FLL_CONTROL_3:
307 case WM831X_FLL_CONTROL_4:
308 case WM831X_FLL_CONTROL_5:
309 case WM831X_UNIQUE_ID_1:
310 case WM831X_UNIQUE_ID_2:
311 case WM831X_UNIQUE_ID_3:
312 case WM831X_UNIQUE_ID_4:
313 case WM831X_UNIQUE_ID_5:
314 case WM831X_UNIQUE_ID_6:
315 case WM831X_UNIQUE_ID_7:
316 case WM831X_UNIQUE_ID_8:
317 case WM831X_FACTORY_OTP_ID:
318 case WM831X_FACTORY_OTP_1:
319 case WM831X_FACTORY_OTP_2:
320 case WM831X_FACTORY_OTP_3:
321 case WM831X_FACTORY_OTP_4:
322 case WM831X_FACTORY_OTP_5:
323 case WM831X_CUSTOMER_OTP_ID:
324 case WM831X_DC1_OTP_CONTROL:
325 case WM831X_DC2_OTP_CONTROL:
326 case WM831X_DC3_OTP_CONTROL:
327 case WM831X_LDO1_2_OTP_CONTROL:
328 case WM831X_LDO3_4_OTP_CONTROL:
329 case WM831X_LDO5_6_OTP_CONTROL:
330 case WM831X_LDO7_8_OTP_CONTROL:
331 case WM831X_LDO9_10_OTP_CONTROL:
332 case WM831X_LDO11_EPE_CONTROL:
333 case WM831X_GPIO1_OTP_CONTROL:
334 case WM831X_GPIO2_OTP_CONTROL:
335 case WM831X_GPIO3_OTP_CONTROL:
336 case WM831X_GPIO4_OTP_CONTROL:
337 case WM831X_GPIO5_OTP_CONTROL:
338 case WM831X_GPIO6_OTP_CONTROL:
339 case WM831X_DBE_CHECK_DATA:
340 return true;
341 default:
342 return false;
343 }
344}
345
346static bool wm831x_reg_writeable(struct device *dev, unsigned int reg)
347{
348 struct wm831x *wm831x = dev_get_drvdata(dev);
349
350 if (wm831x_reg_locked(wm831x, reg))
351 return false;
352
353 switch (reg) {
354 case WM831X_SYSVDD_CONTROL:
355 case WM831X_THERMAL_MONITORING:
356 case WM831X_POWER_STATE:
357 case WM831X_WATCHDOG:
358 case WM831X_ON_PIN_CONTROL:
359 case WM831X_RESET_CONTROL:
360 case WM831X_CONTROL_INTERFACE:
361 case WM831X_SECURITY_KEY:
362 case WM831X_SOFTWARE_SCRATCH:
363 case WM831X_OTP_CONTROL:
364 case WM831X_GPIO_LEVEL:
365 case WM831X_INTERRUPT_STATUS_1:
366 case WM831X_INTERRUPT_STATUS_2:
367 case WM831X_INTERRUPT_STATUS_3:
368 case WM831X_INTERRUPT_STATUS_4:
369 case WM831X_INTERRUPT_STATUS_5:
370 case WM831X_IRQ_CONFIG:
371 case WM831X_SYSTEM_INTERRUPTS_MASK:
372 case WM831X_INTERRUPT_STATUS_1_MASK:
373 case WM831X_INTERRUPT_STATUS_2_MASK:
374 case WM831X_INTERRUPT_STATUS_3_MASK:
375 case WM831X_INTERRUPT_STATUS_4_MASK:
376 case WM831X_INTERRUPT_STATUS_5_MASK:
377 case WM831X_RTC_TIME_1:
378 case WM831X_RTC_TIME_2:
379 case WM831X_RTC_ALARM_1:
380 case WM831X_RTC_ALARM_2:
381 case WM831X_RTC_CONTROL:
382 case WM831X_RTC_TRIM:
383 case WM831X_TOUCH_CONTROL_1:
384 case WM831X_TOUCH_CONTROL_2:
385 case WM831X_AUXADC_CONTROL:
386 case WM831X_AUXADC_SOURCE:
387 case WM831X_COMPARATOR_CONTROL:
388 case WM831X_COMPARATOR_1:
389 case WM831X_COMPARATOR_2:
390 case WM831X_COMPARATOR_3:
391 case WM831X_COMPARATOR_4:
392 case WM831X_GPIO1_CONTROL:
393 case WM831X_GPIO2_CONTROL:
394 case WM831X_GPIO3_CONTROL:
395 case WM831X_GPIO4_CONTROL:
396 case WM831X_GPIO5_CONTROL:
397 case WM831X_GPIO6_CONTROL:
398 case WM831X_GPIO7_CONTROL:
399 case WM831X_GPIO8_CONTROL:
400 case WM831X_GPIO9_CONTROL:
401 case WM831X_GPIO10_CONTROL:
402 case WM831X_GPIO11_CONTROL:
403 case WM831X_GPIO12_CONTROL:
404 case WM831X_GPIO13_CONTROL:
405 case WM831X_GPIO14_CONTROL:
406 case WM831X_GPIO15_CONTROL:
407 case WM831X_GPIO16_CONTROL:
408 case WM831X_CHARGER_CONTROL_1:
409 case WM831X_CHARGER_CONTROL_2:
410 case WM831X_CHARGER_STATUS:
411 case WM831X_BACKUP_CHARGER_CONTROL:
412 case WM831X_STATUS_LED_1:
413 case WM831X_STATUS_LED_2:
414 case WM831X_CURRENT_SINK_1:
415 case WM831X_CURRENT_SINK_2:
416 case WM831X_DCDC_ENABLE:
417 case WM831X_LDO_ENABLE:
418 case WM831X_DC1_CONTROL_1:
419 case WM831X_DC1_CONTROL_2:
420 case WM831X_DC1_ON_CONFIG:
421 case WM831X_DC1_SLEEP_CONTROL:
422 case WM831X_DC1_DVS_CONTROL:
423 case WM831X_DC2_CONTROL_1:
424 case WM831X_DC2_CONTROL_2:
425 case WM831X_DC2_ON_CONFIG:
426 case WM831X_DC2_SLEEP_CONTROL:
427 case WM831X_DC2_DVS_CONTROL:
428 case WM831X_DC3_CONTROL_1:
429 case WM831X_DC3_CONTROL_2:
430 case WM831X_DC3_ON_CONFIG:
431 case WM831X_DC3_SLEEP_CONTROL:
432 case WM831X_DC4_CONTROL:
433 case WM831X_DC4_SLEEP_CONTROL:
434 case WM831X_EPE1_CONTROL:
435 case WM831X_EPE2_CONTROL:
436 case WM831X_LDO1_CONTROL:
437 case WM831X_LDO1_ON_CONTROL:
438 case WM831X_LDO1_SLEEP_CONTROL:
439 case WM831X_LDO2_CONTROL:
440 case WM831X_LDO2_ON_CONTROL:
441 case WM831X_LDO2_SLEEP_CONTROL:
442 case WM831X_LDO3_CONTROL:
443 case WM831X_LDO3_ON_CONTROL:
444 case WM831X_LDO3_SLEEP_CONTROL:
445 case WM831X_LDO4_CONTROL:
446 case WM831X_LDO4_ON_CONTROL:
447 case WM831X_LDO4_SLEEP_CONTROL:
448 case WM831X_LDO5_CONTROL:
449 case WM831X_LDO5_ON_CONTROL:
450 case WM831X_LDO5_SLEEP_CONTROL:
451 case WM831X_LDO6_CONTROL:
452 case WM831X_LDO6_ON_CONTROL:
453 case WM831X_LDO6_SLEEP_CONTROL:
454 case WM831X_LDO7_CONTROL:
455 case WM831X_LDO7_ON_CONTROL:
456 case WM831X_LDO7_SLEEP_CONTROL:
457 case WM831X_LDO8_CONTROL:
458 case WM831X_LDO8_ON_CONTROL:
459 case WM831X_LDO8_SLEEP_CONTROL:
460 case WM831X_LDO9_CONTROL:
461 case WM831X_LDO9_ON_CONTROL:
462 case WM831X_LDO9_SLEEP_CONTROL:
463 case WM831X_LDO10_CONTROL:
464 case WM831X_LDO10_ON_CONTROL:
465 case WM831X_LDO10_SLEEP_CONTROL:
466 case WM831X_LDO11_ON_CONTROL:
467 case WM831X_LDO11_SLEEP_CONTROL:
468 case WM831X_POWER_GOOD_SOURCE_1:
469 case WM831X_POWER_GOOD_SOURCE_2:
470 case WM831X_CLOCK_CONTROL_1:
471 case WM831X_CLOCK_CONTROL_2:
472 case WM831X_FLL_CONTROL_1:
473 case WM831X_FLL_CONTROL_2:
474 case WM831X_FLL_CONTROL_3:
475 case WM831X_FLL_CONTROL_4:
476 case WM831X_FLL_CONTROL_5:
477 return true;
478 default:
479 return false;
480 }
481}
482
483static bool wm831x_reg_volatile(struct device *dev, unsigned int reg)
484{
485 switch (reg) {
486 case WM831X_SYSTEM_STATUS:
487 case WM831X_ON_SOURCE:
488 case WM831X_OFF_SOURCE:
489 case WM831X_GPIO_LEVEL:
490 case WM831X_SYSTEM_INTERRUPTS:
491 case WM831X_INTERRUPT_STATUS_1:
492 case WM831X_INTERRUPT_STATUS_2:
493 case WM831X_INTERRUPT_STATUS_3:
494 case WM831X_INTERRUPT_STATUS_4:
495 case WM831X_INTERRUPT_STATUS_5:
496 case WM831X_RTC_TIME_1:
497 case WM831X_RTC_TIME_2:
498 case WM831X_TOUCH_DATA_X:
499 case WM831X_TOUCH_DATA_Y:
500 case WM831X_TOUCH_DATA_Z:
501 case WM831X_AUXADC_DATA:
502 case WM831X_CHARGER_STATUS:
503 case WM831X_DCDC_STATUS:
504 case WM831X_LDO_STATUS:
505 case WM831X_DCDC_UV_STATUS:
506 case WM831X_LDO_UV_STATUS:
507 return true;
508 default:
509 return false;
510 }
511}
512
d2bedfe7
MB		 513/**
514 * wm831x_reg_read: Read a single WM831x register.
515 *
516 * @wm831x: Device to read from.
517 * @reg: Register to read.
518 */
519int wm831x_reg_read(struct wm831x *wm831x, unsigned short reg)
520{
1df5981b 521 unsigned int val;
d2bedfe7
MB		 522 int ret;
523
1df5981b 524 ret = regmap_read(wm831x->regmap, reg, &val);
d2bedfe7
MB		 525
526 if (ret < 0)
527 return ret;
528 else
529 return val;
530}
531EXPORT_SYMBOL_GPL(wm831x_reg_read);
532
533/**
534 * wm831x_bulk_read: Read multiple WM831x registers
535 *
536 * @wm831x: Device to read from
537 * @reg: First register
538 * @count: Number of registers
539 * @buf: Buffer to fill.
540 */
541int wm831x_bulk_read(struct wm831x *wm831x, unsigned short reg,
542 int count, u16 *buf)
543{
1df5981b 544 return regmap_bulk_read(wm831x->regmap, reg, buf, count);
d2bedfe7
MB		 545}
546EXPORT_SYMBOL_GPL(wm831x_bulk_read);
547
548static int wm831x_write(struct wm831x *wm831x, unsigned short reg,
549 int bytes, void *src)
550{
551 u16 *buf = src;
1df5981b 552 int i, ret;
d2bedfe7
MB		 553
554 BUG_ON(bytes % 2);
555 BUG_ON(bytes <= 0);
556
557 for (i = 0; i < bytes / 2; i++) {
558 if (wm831x_reg_locked(wm831x, reg))
559 return -EPERM;
560
561 dev_vdbg(wm831x->dev, "Write %04x to R%d(0x%x)\n",
562 buf[i], reg + i, reg + i);
1df5981b 563 ret = regmap_write(wm831x->regmap, reg + i, buf[i]);
5391b5c6
MB		 564 if (ret != 0)
565 return ret;
d2bedfe7
MB		 566 }
567
1df5981b 568 return 0;
d2bedfe7
MB		 569}
570
571/**
572 * wm831x_reg_write: Write a single WM831x register.
573 *
574 * @wm831x: Device to write to.
575 * @reg: Register to write to.
576 * @val: Value to write.
577 */
578int wm831x_reg_write(struct wm831x *wm831x, unsigned short reg,
579 unsigned short val)
580{
581 int ret;
582
583 mutex_lock(&wm831x->io_lock);
584
585 ret = wm831x_write(wm831x, reg, 2, &val);
586
587 mutex_unlock(&wm831x->io_lock);
588
589 return ret;
590}
591EXPORT_SYMBOL_GPL(wm831x_reg_write);
592
593/**
594 * wm831x_set_bits: Set the value of a bitfield in a WM831x register
595 *
596 * @wm831x: Device to write to.
597 * @reg: Register to write to.
598 * @mask: Mask of bits to set.
599 * @val: Value to set (unshifted)
600 */
601int wm831x_set_bits(struct wm831x *wm831x, unsigned short reg,
602 unsigned short mask, unsigned short val)
603{
604 int ret;
d2bedfe7
MB		 605
606 mutex_lock(&wm831x->io_lock);
607
1df5981b
MB		 608 if (!wm831x_reg_locked(wm831x, reg))
609 ret = regmap_update_bits(wm831x->regmap, reg, mask, val);
610 else
611 ret = -EPERM;
d2bedfe7 612
d2bedfe7
MB		 613 mutex_unlock(&wm831x->io_lock);
614
615 return ret;
616}
617EXPORT_SYMBOL_GPL(wm831x_set_bits);
618
f977284a 619static const struct resource wm831x_dcdc1_resources[] = {
d2bedfe7
MB		 620 {
621 .start = WM831X_DC1_CONTROL_1,
622 .end = WM831X_DC1_DVS_CONTROL,
5656098e 623 .flags = IORESOURCE_REG,
d2bedfe7 624 },
3da286aa
ZL		 625 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_UV_DC1, "UV"),
626 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_HC_DC1, "HC"),
d2bedfe7
MB		 627};
628
629
f977284a 630static const struct resource wm831x_dcdc2_resources[] = {
d2bedfe7
MB		 631 {
632 .start = WM831X_DC2_CONTROL_1,
633 .end = WM831X_DC2_DVS_CONTROL,
5656098e 634 .flags = IORESOURCE_REG,
d2bedfe7 635 },
3da286aa
ZL		 636 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_UV_DC2, "UV"),
637 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_HC_DC2, "HC"),
d2bedfe7
MB		 638};
639
f977284a 640static const struct resource wm831x_dcdc3_resources[] = {
d2bedfe7
MB		 641 {
642 .start = WM831X_DC3_CONTROL_1,
643 .end = WM831X_DC3_SLEEP_CONTROL,
5656098e 644 .flags = IORESOURCE_REG,
d2bedfe7 645 },
3da286aa 646 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_UV_DC3, "UV"),
d2bedfe7
MB		 647};
648
f977284a 649static const struct resource wm831x_dcdc4_resources[] = {
d2bedfe7
MB		 650 {
651 .start = WM831X_DC4_CONTROL,
652 .end = WM831X_DC4_SLEEP_CONTROL,
5656098e 653 .flags = IORESOURCE_REG,
d2bedfe7 654 },
3da286aa 655 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_UV_DC4, "UV"),
d2bedfe7
MB		 656};
657
f977284a 658static const struct resource wm8320_dcdc4_buck_resources[] = {
d4e0a89e
MB		 659 {
660 .start = WM831X_DC4_CONTROL,
661 .end = WM832X_DC4_SLEEP_CONTROL,
5656098e 662 .flags = IORESOURCE_REG,
d4e0a89e 663 },
3da286aa 664 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_UV_DC4, "UV"),
d4e0a89e
MB		 665};
666
f977284a 667static const struct resource wm831x_gpio_resources[] = {
d2bedfe7
MB		 668 {
669 .start = WM831X_IRQ_GPIO_1,
670 .end = WM831X_IRQ_GPIO_16,
671 .flags = IORESOURCE_IRQ,
672 },
673};
674
f977284a 675static const struct resource wm831x_isink1_resources[] = {
d2bedfe7
MB		 676 {
677 .start = WM831X_CURRENT_SINK_1,
678 .end = WM831X_CURRENT_SINK_1,
5656098e 679 .flags = IORESOURCE_REG,
d2bedfe7 680 },
3da286aa 681 DEFINE_RES_IRQ(WM831X_IRQ_CS1),
d2bedfe7
MB		 682};
683
f977284a 684static const struct resource wm831x_isink2_resources[] = {
d2bedfe7
MB		 685 {
686 .start = WM831X_CURRENT_SINK_2,
687 .end = WM831X_CURRENT_SINK_2,
5656098e 688 .flags = IORESOURCE_REG,
d2bedfe7 689 },
3da286aa 690 DEFINE_RES_IRQ(WM831X_IRQ_CS2),
d2bedfe7
MB		 691};
692
f977284a 693static const struct resource wm831x_ldo1_resources[] = {
d2bedfe7
MB		 694 {
695 .start = WM831X_LDO1_CONTROL,
696 .end = WM831X_LDO1_SLEEP_CONTROL,
5656098e 697 .flags = IORESOURCE_REG,
d2bedfe7 698 },
3da286aa 699 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_UV_LDO1, "UV"),
d2bedfe7
MB		 700};
701
f977284a 702static const struct resource wm831x_ldo2_resources[] = {
d2bedfe7
MB		 703 {
704 .start = WM831X_LDO2_CONTROL,
705 .end = WM831X_LDO2_SLEEP_CONTROL,
5656098e 706 .flags = IORESOURCE_REG,
d2bedfe7 707 },
3da286aa 708 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_UV_LDO2, "UV"),
d2bedfe7
MB		 709};
710
f977284a 711static const struct resource wm831x_ldo3_resources[] = {
d2bedfe7
MB		 712 {
713 .start = WM831X_LDO3_CONTROL,
714 .end = WM831X_LDO3_SLEEP_CONTROL,
5656098e 715 .flags = IORESOURCE_REG,
d2bedfe7 716 },
3da286aa 717 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_UV_LDO3, "UV"),
d2bedfe7
MB		 718};
719
f977284a 720static const struct resource wm831x_ldo4_resources[] = {
d2bedfe7
MB		 721 {
722 .start = WM831X_LDO4_CONTROL,
723 .end = WM831X_LDO4_SLEEP_CONTROL,
5656098e 724 .flags = IORESOURCE_REG,
d2bedfe7 725 },
3da286aa 726 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_UV_LDO4, "UV"),
d2bedfe7
MB		 727};
728
f977284a 729static const struct resource wm831x_ldo5_resources[] = {
d2bedfe7
MB		 730 {
731 .start = WM831X_LDO5_CONTROL,
732 .end = WM831X_LDO5_SLEEP_CONTROL,
5656098e 733 .flags = IORESOURCE_REG,
d2bedfe7 734 },
3da286aa 735 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_UV_LDO5, "UV"),
d2bedfe7
MB		 736};
737
f977284a 738static const struct resource wm831x_ldo6_resources[] = {
d2bedfe7
MB		 739 {
740 .start = WM831X_LDO6_CONTROL,
741 .end = WM831X_LDO6_SLEEP_CONTROL,
5656098e 742 .flags = IORESOURCE_REG,
d2bedfe7 743 },
3da286aa 744 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_UV_LDO6, "UV"),
d2bedfe7
MB		 745};
746
f977284a 747static const struct resource wm831x_ldo7_resources[] = {
d2bedfe7
MB		 748 {
749 .start = WM831X_LDO7_CONTROL,
750 .end = WM831X_LDO7_SLEEP_CONTROL,
5656098e 751 .flags = IORESOURCE_REG,
d2bedfe7 752 },
3da286aa 753 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_UV_LDO7, "UV"),
d2bedfe7
MB		 754};
755
f977284a 756static const struct resource wm831x_ldo8_resources[] = {
d2bedfe7
MB		 757 {
758 .start = WM831X_LDO8_CONTROL,
759 .end = WM831X_LDO8_SLEEP_CONTROL,
5656098e 760 .flags = IORESOURCE_REG,
d2bedfe7 761 },
3da286aa 762 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_UV_LDO8, "UV"),
d2bedfe7
MB		 763};
764
f977284a 765static const struct resource wm831x_ldo9_resources[] = {
d2bedfe7
MB		 766 {
767 .start = WM831X_LDO9_CONTROL,
768 .end = WM831X_LDO9_SLEEP_CONTROL,
5656098e 769 .flags = IORESOURCE_REG,
d2bedfe7 770 },
3da286aa 771 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_UV_LDO9, "UV"),
d2bedfe7
MB		 772};
773
f977284a 774static const struct resource wm831x_ldo10_resources[] = {
d2bedfe7
MB		 775 {
776 .start = WM831X_LDO10_CONTROL,
777 .end = WM831X_LDO10_SLEEP_CONTROL,
5656098e 778 .flags = IORESOURCE_REG,
d2bedfe7 779 },
3da286aa 780 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_UV_LDO10, "UV"),
d2bedfe7
MB		 781};
782
f977284a 783static const struct resource wm831x_ldo11_resources[] = {
d2bedfe7
MB		 784 {
785 .start = WM831X_LDO11_ON_CONTROL,
786 .end = WM831X_LDO11_SLEEP_CONTROL,
5656098e 787 .flags = IORESOURCE_REG,
d2bedfe7
MB		 788 },
789};
790
f977284a 791static const struct resource wm831x_on_resources[] = {
3da286aa 792 DEFINE_RES_IRQ(WM831X_IRQ_ON),
d2bedfe7
MB		 793};
794
795
f977284a 796static const struct resource wm831x_power_resources[] = {
3da286aa
ZL		 797 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_PPM_SYSLO, "SYSLO"),
798 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_PPM_PWR_SRC, "PWR SRC"),
799 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_PPM_USB_CURR, "USB CURR"),
800 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_CHG_BATT_HOT, "BATT HOT"),
801 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_CHG_BATT_COLD, "BATT COLD"),
802 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_CHG_BATT_FAIL, "BATT FAIL"),
803 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_CHG_OV, "OV"),
804 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_CHG_END, "END"),
805 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_CHG_TO, "TO"),
806 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_CHG_MODE, "MODE"),
807 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_CHG_START, "START"),
d2bedfe7
MB		 808};
809
f977284a 810static const struct resource wm831x_rtc_resources[] = {
3da286aa
ZL		 811 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_RTC_PER, "PER"),
812 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_RTC_ALM, "ALM"),
d2bedfe7
MB		 813};
814
f977284a 815static const struct resource wm831x_status1_resources[] = {
d2bedfe7
MB		 816 {
817 .start = WM831X_STATUS_LED_1,
818 .end = WM831X_STATUS_LED_1,
5656098e 819 .flags = IORESOURCE_REG,
d2bedfe7
MB		 820 },
821};
822
f977284a 823static const struct resource wm831x_status2_resources[] = {
d2bedfe7
MB		 824 {
825 .start = WM831X_STATUS_LED_2,
826 .end = WM831X_STATUS_LED_2,
5656098e 827 .flags = IORESOURCE_REG,
d2bedfe7
MB		 828 },
829};
830
f977284a 831static const struct resource wm831x_touch_resources[] = {
3da286aa
ZL		 832 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_TCHPD, "TCHPD"),
833 DEFINE_RES_IRQ_NAMED(WM831X_IRQ_TCHDATA, "TCHDATA"),
d2bedfe7
MB		 834};
835
f977284a 836static const struct resource wm831x_wdt_resources[] = {
3da286aa 837 DEFINE_RES_IRQ(WM831X_IRQ_WDOG_TO),
d2bedfe7
MB		 838};
839
ad59de48 840static const struct mfd_cell wm8310_devs[] = {
c26964ea
MB		 841 {
842 .name = "wm831x-backup",
843 },
d2bedfe7
MB		 844 {
845 .name = "wm831x-buckv",
846 .id = 1,
847 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
848 .resources = wm831x_dcdc1_resources,
849 },
850 {
851 .name = "wm831x-buckv",
852 .id = 2,
853 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
854 .resources = wm831x_dcdc2_resources,
855 },
856 {
857 .name = "wm831x-buckp",
858 .id = 3,
859 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
860 .resources = wm831x_dcdc3_resources,
861 },
862 {
863 .name = "wm831x-boostp",
864 .id = 4,
865 .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
866 .resources = wm831x_dcdc4_resources,
867 },
a5e06781
MB		 868 {
869 .name = "wm831x-clk",
870 },
d2bedfe7
MB		 871 {
872 .name = "wm831x-epe",
873 .id = 1,
874 },
875 {
876 .name = "wm831x-epe",
877 .id = 2,
878 },
879 {
880 .name = "wm831x-gpio",
881 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
882 .resources = wm831x_gpio_resources,
883 },
884 {
885 .name = "wm831x-hwmon",
886 },
887 {
888 .name = "wm831x-isink",
889 .id = 1,
890 .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
891 .resources = wm831x_isink1_resources,
892 },
893 {
894 .name = "wm831x-isink",
895 .id = 2,
896 .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
897 .resources = wm831x_isink2_resources,
898 },
899 {
900 .name = "wm831x-ldo",
901 .id = 1,
902 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
903 .resources = wm831x_ldo1_resources,
904 },
905 {
906 .name = "wm831x-ldo",
907 .id = 2,
908 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
909 .resources = wm831x_ldo2_resources,
910 },
911 {
912 .name = "wm831x-ldo",
913 .id = 3,
914 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
915 .resources = wm831x_ldo3_resources,
916 },
917 {
918 .name = "wm831x-ldo",
919 .id = 4,
920 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
921 .resources = wm831x_ldo4_resources,
922 },
923 {
924 .name = "wm831x-ldo",
925 .id = 5,
926 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
927 .resources = wm831x_ldo5_resources,
928 },
929 {
930 .name = "wm831x-ldo",
931 .id = 6,
932 .num_resources = ARRAY_SIZE(wm831x_ldo6_resources),
933 .resources = wm831x_ldo6_resources,
934 },
935 {
936 .name = "wm831x-aldo",
937 .id = 7,
938 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
939 .resources = wm831x_ldo7_resources,
940 },
941 {
942 .name = "wm831x-aldo",
943 .id = 8,
944 .num_resources = ARRAY_SIZE(wm831x_ldo8_resources),
945 .resources = wm831x_ldo8_resources,
946 },
947 {
948 .name = "wm831x-aldo",
949 .id = 9,
950 .num_resources = ARRAY_SIZE(wm831x_ldo9_resources),
951 .resources = wm831x_ldo9_resources,
952 },
953 {
954 .name = "wm831x-aldo",
955 .id = 10,
956 .num_resources = ARRAY_SIZE(wm831x_ldo10_resources),
957 .resources = wm831x_ldo10_resources,
958 },
959 {
960 .name = "wm831x-alive-ldo",
961 .id = 11,
962 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
963 .resources = wm831x_ldo11_resources,
964 },
965 {
966 .name = "wm831x-on",
967 .num_resources = ARRAY_SIZE(wm831x_on_resources),
968 .resources = wm831x_on_resources,
969 },
970 {
971 .name = "wm831x-power",
972 .num_resources = ARRAY_SIZE(wm831x_power_resources),
973 .resources = wm831x_power_resources,
974 },
d2bedfe7
MB		 975 {
976 .name = "wm831x-status",
977 .id = 1,
978 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
979 .resources = wm831x_status1_resources,
980 },
981 {
982 .name = "wm831x-status",
983 .id = 2,
984 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
985 .resources = wm831x_status2_resources,
986 },
987 {
988 .name = "wm831x-watchdog",
989 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
990 .resources = wm831x_wdt_resources,
991 },
992};
993
ad59de48 994static const struct mfd_cell wm8311_devs[] = {
c26964ea
MB		 995 {
996 .name = "wm831x-backup",
997 },
d2bedfe7
MB		 998 {
999 .name = "wm831x-buckv",
1000 .id = 1,
1001 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
1002 .resources = wm831x_dcdc1_resources,
1003 },
1004 {
1005 .name = "wm831x-buckv",
1006 .id = 2,
1007 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
1008 .resources = wm831x_dcdc2_resources,
1009 },
1010 {
1011 .name = "wm831x-buckp",
1012 .id = 3,
1013 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1014 .resources = wm831x_dcdc3_resources,
1015 },
1016 {
1017 .name = "wm831x-boostp",
1018 .id = 4,
1019 .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
1020 .resources = wm831x_dcdc4_resources,
1021 },
a5e06781
MB		 1022 {
1023 .name = "wm831x-clk",
1024 },
d2bedfe7
MB		 1025 {
1026 .name = "wm831x-epe",
1027 .id = 1,
1028 },
1029 {
1030 .name = "wm831x-epe",
1031 .id = 2,
1032 },
1033 {
1034 .name = "wm831x-gpio",
1035 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1036 .resources = wm831x_gpio_resources,
1037 },
1038 {
1039 .name = "wm831x-hwmon",
1040 },
1041 {
1042 .name = "wm831x-isink",
1043 .id = 1,
1044 .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
1045 .resources = wm831x_isink1_resources,
1046 },
1047 {
1048 .name = "wm831x-isink",
1049 .id = 2,
1050 .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
1051 .resources = wm831x_isink2_resources,
1052 },
1053 {
1054 .name = "wm831x-ldo",
1055 .id = 1,
1056 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1057 .resources = wm831x_ldo1_resources,
1058 },
1059 {
1060 .name = "wm831x-ldo",
1061 .id = 2,
1062 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1063 .resources = wm831x_ldo2_resources,
1064 },
1065 {
1066 .name = "wm831x-ldo",
1067 .id = 3,
1068 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1069 .resources = wm831x_ldo3_resources,
1070 },
1071 {
1072 .name = "wm831x-ldo",
1073 .id = 4,
1074 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1075 .resources = wm831x_ldo4_resources,
1076 },
1077 {
1078 .name = "wm831x-ldo",
1079 .id = 5,
1080 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1081 .resources = wm831x_ldo5_resources,
1082 },
1083 {
1084 .name = "wm831x-aldo",
1085 .id = 7,
1086 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1087 .resources = wm831x_ldo7_resources,
1088 },
1089 {
1090 .name = "wm831x-alive-ldo",
1091 .id = 11,
1092 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1093 .resources = wm831x_ldo11_resources,
1094 },
1095 {
1096 .name = "wm831x-on",
1097 .num_resources = ARRAY_SIZE(wm831x_on_resources),
1098 .resources = wm831x_on_resources,
1099 },
1100 {
1101 .name = "wm831x-power",
1102 .num_resources = ARRAY_SIZE(wm831x_power_resources),
1103 .resources = wm831x_power_resources,
1104 },
d2bedfe7
MB		 1105 {
1106 .name = "wm831x-status",
1107 .id = 1,
1108 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1109 .resources = wm831x_status1_resources,
1110 },
1111 {
1112 .name = "wm831x-status",
1113 .id = 2,
1114 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1115 .resources = wm831x_status2_resources,
1116 },
d2bedfe7
MB		 1117 {
1118 .name = "wm831x-watchdog",
1119 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1120 .resources = wm831x_wdt_resources,
1121 },
1122};
1123
ad59de48 1124static const struct mfd_cell wm8312_devs[] = {
c26964ea
MB		 1125 {
1126 .name = "wm831x-backup",
1127 },
d2bedfe7
MB		 1128 {
1129 .name = "wm831x-buckv",
1130 .id = 1,
1131 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
1132 .resources = wm831x_dcdc1_resources,
1133 },
1134 {
1135 .name = "wm831x-buckv",
1136 .id = 2,
1137 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
1138 .resources = wm831x_dcdc2_resources,
1139 },
1140 {
1141 .name = "wm831x-buckp",
1142 .id = 3,
1143 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1144 .resources = wm831x_dcdc3_resources,
1145 },
1146 {
1147 .name = "wm831x-boostp",
1148 .id = 4,
1149 .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
1150 .resources = wm831x_dcdc4_resources,
1151 },
a5e06781
MB		 1152 {
1153 .name = "wm831x-clk",
1154 },
d2bedfe7
MB		 1155 {
1156 .name = "wm831x-epe",
1157 .id = 1,
1158 },
1159 {
1160 .name = "wm831x-epe",
1161 .id = 2,
1162 },
1163 {
1164 .name = "wm831x-gpio",
1165 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1166 .resources = wm831x_gpio_resources,
1167 },
1168 {
1169 .name = "wm831x-hwmon",
1170 },
1171 {
1172 .name = "wm831x-isink",
1173 .id = 1,
1174 .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
1175 .resources = wm831x_isink1_resources,
1176 },
1177 {
1178 .name = "wm831x-isink",
1179 .id = 2,
1180 .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
1181 .resources = wm831x_isink2_resources,
1182 },
1183 {
1184 .name = "wm831x-ldo",
1185 .id = 1,
1186 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1187 .resources = wm831x_ldo1_resources,
1188 },
1189 {
1190 .name = "wm831x-ldo",
1191 .id = 2,
1192 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1193 .resources = wm831x_ldo2_resources,
1194 },
1195 {
1196 .name = "wm831x-ldo",
1197 .id = 3,
1198 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1199 .resources = wm831x_ldo3_resources,
1200 },
1201 {
1202 .name = "wm831x-ldo",
1203 .id = 4,
1204 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1205 .resources = wm831x_ldo4_resources,
1206 },
1207 {
1208 .name = "wm831x-ldo",
1209 .id = 5,
1210 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1211 .resources = wm831x_ldo5_resources,
1212 },
1213 {
1214 .name = "wm831x-ldo",
1215 .id = 6,
1216 .num_resources = ARRAY_SIZE(wm831x_ldo6_resources),
1217 .resources = wm831x_ldo6_resources,
1218 },
1219 {
1220 .name = "wm831x-aldo",
1221 .id = 7,
1222 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1223 .resources = wm831x_ldo7_resources,
1224 },
1225 {
1226 .name = "wm831x-aldo",
1227 .id = 8,
1228 .num_resources = ARRAY_SIZE(wm831x_ldo8_resources),
1229 .resources = wm831x_ldo8_resources,
1230 },
1231 {
1232 .name = "wm831x-aldo",
1233 .id = 9,
1234 .num_resources = ARRAY_SIZE(wm831x_ldo9_resources),
1235 .resources = wm831x_ldo9_resources,
1236 },
1237 {
1238 .name = "wm831x-aldo",
1239 .id = 10,
1240 .num_resources = ARRAY_SIZE(wm831x_ldo10_resources),
1241 .resources = wm831x_ldo10_resources,
1242 },
1243 {
1244 .name = "wm831x-alive-ldo",
1245 .id = 11,
1246 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1247 .resources = wm831x_ldo11_resources,
1248 },
1249 {
1250 .name = "wm831x-on",
1251 .num_resources = ARRAY_SIZE(wm831x_on_resources),
1252 .resources = wm831x_on_resources,
1253 },
1254 {
1255 .name = "wm831x-power",
1256 .num_resources = ARRAY_SIZE(wm831x_power_resources),
1257 .resources = wm831x_power_resources,
1258 },
d2bedfe7
MB		 1259 {
1260 .name = "wm831x-status",
1261 .id = 1,
1262 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1263 .resources = wm831x_status1_resources,
1264 },
1265 {
1266 .name = "wm831x-status",
1267 .id = 2,
1268 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1269 .resources = wm831x_status2_resources,
1270 },
d2bedfe7
MB		 1271 {
1272 .name = "wm831x-watchdog",
1273 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1274 .resources = wm831x_wdt_resources,
1275 },
1276};
1277
ad59de48 1278static const struct mfd_cell wm8320_devs[] = {
d4e0a89e
MB		 1279 {
1280 .name = "wm831x-backup",
1281 },
1282 {
1283 .name = "wm831x-buckv",
1284 .id = 1,
1285 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
1286 .resources = wm831x_dcdc1_resources,
1287 },
1288 {
1289 .name = "wm831x-buckv",
1290 .id = 2,
1291 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
1292 .resources = wm831x_dcdc2_resources,
1293 },
1294 {
1295 .name = "wm831x-buckp",
1296 .id = 3,
1297 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1298 .resources = wm831x_dcdc3_resources,
1299 },
1300 {
1301 .name = "wm831x-buckp",
1302 .id = 4,
1303 .num_resources = ARRAY_SIZE(wm8320_dcdc4_buck_resources),
1304 .resources = wm8320_dcdc4_buck_resources,
1305 },
a5e06781
MB		 1306 {
1307 .name = "wm831x-clk",
1308 },
d4e0a89e
MB		 1309 {
1310 .name = "wm831x-gpio",
1311 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1312 .resources = wm831x_gpio_resources,
1313 },
1314 {
1315 .name = "wm831x-hwmon",
1316 },
1317 {
1318 .name = "wm831x-ldo",
1319 .id = 1,
1320 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1321 .resources = wm831x_ldo1_resources,
1322 },
1323 {
1324 .name = "wm831x-ldo",
1325 .id = 2,
1326 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1327 .resources = wm831x_ldo2_resources,
1328 },
1329 {
1330 .name = "wm831x-ldo",
1331 .id = 3,
1332 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1333 .resources = wm831x_ldo3_resources,
1334 },
1335 {
1336 .name = "wm831x-ldo",
1337 .id = 4,
1338 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1339 .resources = wm831x_ldo4_resources,
1340 },
1341 {
1342 .name = "wm831x-ldo",
1343 .id = 5,
1344 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1345 .resources = wm831x_ldo5_resources,
1346 },
1347 {
1348 .name = "wm831x-ldo",
1349 .id = 6,
1350 .num_resources = ARRAY_SIZE(wm831x_ldo6_resources),
1351 .resources = wm831x_ldo6_resources,
1352 },
1353 {
1354 .name = "wm831x-aldo",
1355 .id = 7,
1356 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1357 .resources = wm831x_ldo7_resources,
1358 },
1359 {
1360 .name = "wm831x-aldo",
1361 .id = 8,
1362 .num_resources = ARRAY_SIZE(wm831x_ldo8_resources),
1363 .resources = wm831x_ldo8_resources,
1364 },
1365 {
1366 .name = "wm831x-aldo",
1367 .id = 9,
1368 .num_resources = ARRAY_SIZE(wm831x_ldo9_resources),
1369 .resources = wm831x_ldo9_resources,
1370 },
1371 {
1372 .name = "wm831x-aldo",
1373 .id = 10,
1374 .num_resources = ARRAY_SIZE(wm831x_ldo10_resources),
1375 .resources = wm831x_ldo10_resources,
1376 },
1377 {
1378 .name = "wm831x-alive-ldo",
1379 .id = 11,
1380 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1381 .resources = wm831x_ldo11_resources,
1382 },
1383 {
1384 .name = "wm831x-on",
1385 .num_resources = ARRAY_SIZE(wm831x_on_resources),
1386 .resources = wm831x_on_resources,
1387 },
d4e0a89e
MB		 1388 {
1389 .name = "wm831x-status",
1390 .id = 1,
1391 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1392 .resources = wm831x_status1_resources,
1393 },
1394 {
1395 .name = "wm831x-status",
1396 .id = 2,
1397 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1398 .resources = wm831x_status2_resources,
1399 },
1400 {
1401 .name = "wm831x-watchdog",
1402 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1403 .resources = wm831x_wdt_resources,
1404 },
1405};
1406
ad59de48 1407static const struct mfd_cell touch_devs[] = {
266a5e02
MB		 1408 {
1409 .name = "wm831x-touch",
1410 .num_resources = ARRAY_SIZE(wm831x_touch_resources),
1411 .resources = wm831x_touch_resources,
1412 },
1413};
1414
ad59de48 1415static const struct mfd_cell rtc_devs[] = {
b9d03d99
MB		 1416 {
1417 .name = "wm831x-rtc",
1418 .num_resources = ARRAY_SIZE(wm831x_rtc_resources),
1419 .resources = wm831x_rtc_resources,
1420 },
1421};
266a5e02 1422
ad59de48 1423static const struct mfd_cell backlight_devs[] = {
63aed85e
MB		 1424 {
1425 .name = "wm831x-backlight",
1426 },
1427};
1428
1df5981b
MB		 1429struct regmap_config wm831x_regmap_config = {
1430 .reg_bits = 16,
1431 .val_bits = 16,
2e47fff1 1432
7cccbdc8
MB		 1433 .cache_type = REGCACHE_RBTREE,
1434
2e47fff1
MB		 1435 .max_register = WM831X_DBE_CHECK_DATA,
1436 .readable_reg = wm831x_reg_readable,
1437 .writeable_reg = wm831x_reg_writeable,
1438 .volatile_reg = wm831x_reg_volatile,
1df5981b
MB		 1439};
1440EXPORT_SYMBOL_GPL(wm831x_regmap_config);
1441
f6dd8449
CK		 1442const struct of_device_id wm831x_of_match[] = {
1443 { .compatible = "wlf,wm8310", .data = (void *)WM8310 },
1444 { .compatible = "wlf,wm8311", .data = (void *)WM8311 },
1445 { .compatible = "wlf,wm8312", .data = (void *)WM8312 },
1446 { .compatible = "wlf,wm8320", .data = (void *)WM8320 },
1447 { .compatible = "wlf,wm8321", .data = (void *)WM8321 },
1448 { .compatible = "wlf,wm8325", .data = (void *)WM8325 },
1449 { .compatible = "wlf,wm8326", .data = (void *)WM8326 },
1450 { },
1451};
1452EXPORT_SYMBOL_GPL(wm831x_of_match);
1453
d2bedfe7
MB		 1454/*
1455 * Instantiate the generic non-control parts of the device.
1456 */
f6dd8449 1457int wm831x_device_init(struct wm831x *wm831x, int irq)
d2bedfe7 1458{
f6dd8449 1459 struct wm831x_pdata *pdata = &wm831x->pdata;
eb503dc1 1460 int rev, wm831x_num;
d2bedfe7 1461 enum wm831x_parent parent;
0b14c22e 1462 int ret, i;
d2bedfe7
MB		 1463
1464 mutex_init(&wm831x->io_lock);
1465 mutex_init(&wm831x->key_lock);
1466 dev_set_drvdata(wm831x->dev, wm831x);
16dfd103 1467
f6dd8449 1468 wm831x->soft_shutdown = pdata->soft_shutdown;
d2bedfe7
MB		 1469
1470 ret = wm831x_reg_read(wm831x, WM831X_PARENT_ID);
1471 if (ret < 0) {
1472 dev_err(wm831x->dev, "Failed to read parent ID: %d\n", ret);
130a7032 1473 goto err;
d2bedfe7 1474 }
b93cef55
MB		 1475 switch (ret) {
1476 case 0x6204:
1477 case 0x6246:
1478 break;
1479 default:
d2bedfe7
MB		 1480 dev_err(wm831x->dev, "Device is not a WM831x: ID %x\n", ret);
1481 ret = -EINVAL;
130a7032 1482 goto err;
d2bedfe7
MB		 1483 }
1484
1485 ret = wm831x_reg_read(wm831x, WM831X_REVISION);
1486 if (ret < 0) {
1487 dev_err(wm831x->dev, "Failed to read revision: %d\n", ret);
130a7032 1488 goto err;
d2bedfe7
MB		 1489 }
1490 rev = (ret & WM831X_PARENT_REV_MASK) >> WM831X_PARENT_REV_SHIFT;
1491
1492 ret = wm831x_reg_read(wm831x, WM831X_RESET_ID);
1493 if (ret < 0) {
1494 dev_err(wm831x->dev, "Failed to read device ID: %d\n", ret);
130a7032 1495 goto err;
d2bedfe7
MB		 1496 }
1497
894362f5
MB		 1498 /* Some engineering samples do not have the ID set, rely on
1499 * the device being registered correctly.
1500 */
1501 if (ret == 0) {
1502 dev_info(wm831x->dev, "Device is an engineering sample\n");
f6dd8449 1503 ret = wm831x->type;
894362f5
MB		 1504 }
1505
d2bedfe7 1506 switch (ret) {
894362f5 1507 case WM8310:
d2bedfe7 1508 parent = WM8310;
6f2ecaae 1509 wm831x->num_gpio = 16;
b03b4d7c 1510 wm831x->charger_irq_wake = 1;
f92e8f81
MB		 1511 if (rev > 0) {
1512 wm831x->has_gpio_ena = 1;
1513 wm831x->has_cs_sts = 1;
1514 }
1515
894362f5 1516 dev_info(wm831x->dev, "WM8310 revision %c\n", 'A' + rev);
d2bedfe7
MB		 1517 break;
1518
894362f5 1519 case WM8311:
d2bedfe7 1520 parent = WM8311;
6f2ecaae 1521 wm831x->num_gpio = 16;
b03b4d7c 1522 wm831x->charger_irq_wake = 1;
f92e8f81
MB		 1523 if (rev > 0) {
1524 wm831x->has_gpio_ena = 1;
1525 wm831x->has_cs_sts = 1;
1526 }
1527
894362f5 1528 dev_info(wm831x->dev, "WM8311 revision %c\n", 'A' + rev);
d2bedfe7
MB		 1529 break;
1530
894362f5 1531 case WM8312:
d2bedfe7 1532 parent = WM8312;
6f2ecaae 1533 wm831x->num_gpio = 16;
b03b4d7c 1534 wm831x->charger_irq_wake = 1;
f92e8f81
MB		 1535 if (rev > 0) {
1536 wm831x->has_gpio_ena = 1;
1537 wm831x->has_cs_sts = 1;
1538 }
1539
894362f5 1540 dev_info(wm831x->dev, "WM8312 revision %c\n", 'A' + rev);
d2bedfe7
MB		 1541 break;
1542
d4e0a89e
MB		 1543 case WM8320:
1544 parent = WM8320;
1545 wm831x->num_gpio = 12;
1546 dev_info(wm831x->dev, "WM8320 revision %c\n", 'A' + rev);
1547 break;
1548
88913521
MB		 1549 case WM8321:
1550 parent = WM8321;
1551 wm831x->num_gpio = 12;
1552 dev_info(wm831x->dev, "WM8321 revision %c\n", 'A' + rev);
1553 break;
1554
0b315884
MB		 1555 case WM8325:
1556 parent = WM8325;
1557 wm831x->num_gpio = 12;
1558 dev_info(wm831x->dev, "WM8325 revision %c\n", 'A' + rev);
1559 break;
1560
412dc11d
MB		 1561 case WM8326:
1562 parent = WM8326;
1563 wm831x->num_gpio = 12;
1564 dev_info(wm831x->dev, "WM8326 revision %c\n", 'A' + rev);
1565 break;
1566
d2bedfe7
MB		 1567 default:
1568 dev_err(wm831x->dev, "Unknown WM831x device %04x\n", ret);
1569 ret = -EINVAL;
130a7032 1570 goto err;
d2bedfe7
MB		 1571 }
1572
1573 /* This will need revisiting in future but is OK for all
1574 * current parts.
1575 */
f6dd8449
CK		 1576 if (parent != wm831x->type)
1577 dev_warn(wm831x->dev, "Device was registered as a WM%x\n",
1578 wm831x->type);
d2bedfe7
MB		 1579
1580 /* Bootstrap the user key */
1581 ret = wm831x_reg_read(wm831x, WM831X_SECURITY_KEY);
1582 if (ret < 0) {
1583 dev_err(wm831x->dev, "Failed to read security key: %d\n", ret);
130a7032 1584 goto err;
d2bedfe7
MB		 1585 }
1586 if (ret != 0) {
1587 dev_warn(wm831x->dev, "Security key had non-zero value %x\n",
1588 ret);
1589 wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0);
1590 }
1591 wm831x->locked = 1;
1592
dcb0574b 1593 if (pdata->pre_init) {
d2bedfe7
MB		 1594 ret = pdata->pre_init(wm831x);
1595 if (ret != 0) {
1596 dev_err(wm831x->dev, "pre_init() failed: %d\n", ret);
130a7032 1597 goto err;
d2bedfe7
MB		 1598 }
1599 }
1600
dcb0574b
CK		 1601 for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
1602 if (!pdata->gpio_defaults[i])
1603 continue;
0b14c22e 1604
dcb0574b
CK		 1605 wm831x_reg_write(wm831x,
1606 WM831X_GPIO1_CONTROL + i,
1607 pdata->gpio_defaults[i] & 0xffff);
0b14c22e
MB		 1608 }
1609
eb503dc1 1610 /* Multiply by 10 as we have many subdevices of the same type */
dcb0574b 1611 if (pdata->wm831x_num)
eb503dc1
MB		 1612 wm831x_num = pdata->wm831x_num * 10;
1613 else
1614 wm831x_num = -1;
1615
7d4d0a3e
MB		 1616 ret = wm831x_irq_init(wm831x, irq);
1617 if (ret != 0)
130a7032 1618 goto err;
7d4d0a3e 1619
e69b6de1 1620 wm831x_auxadc_init(wm831x);
473fe736 1621
d2bedfe7
MB		 1622 /* The core device is up, instantiate the subdevices. */
1623 switch (parent) {
1624 case WM8310:
eb503dc1 1625 ret = mfd_add_devices(wm831x->dev, wm831x_num,
d2bedfe7 1626 wm8310_devs, ARRAY_SIZE(wm8310_devs),
55692af5 1627 NULL, 0, NULL);
d2bedfe7
MB		 1628 break;
1629
1630 case WM8311:
eb503dc1 1631 ret = mfd_add_devices(wm831x->dev, wm831x_num,
d2bedfe7 1632 wm8311_devs, ARRAY_SIZE(wm8311_devs),
55692af5 1633 NULL, 0, NULL);
dcb0574b 1634 if (!pdata->disable_touch)
266a5e02
MB		 1635 mfd_add_devices(wm831x->dev, wm831x_num,
1636 touch_devs, ARRAY_SIZE(touch_devs),
55692af5 1637 NULL, 0, NULL);
d2bedfe7
MB		 1638 break;
1639
1640 case WM8312:
eb503dc1 1641 ret = mfd_add_devices(wm831x->dev, wm831x_num,
d2bedfe7 1642 wm8312_devs, ARRAY_SIZE(wm8312_devs),
55692af5 1643 NULL, 0, NULL);
dcb0574b 1644 if (!pdata->disable_touch)
266a5e02
MB		 1645 mfd_add_devices(wm831x->dev, wm831x_num,
1646 touch_devs, ARRAY_SIZE(touch_devs),
55692af5 1647 NULL, 0, NULL);
d2bedfe7
MB		 1648 break;
1649
d4e0a89e 1650 case WM8320:
88913521 1651 case WM8321:
0b315884 1652 case WM8325:
412dc11d 1653 case WM8326:
eb503dc1 1654 ret = mfd_add_devices(wm831x->dev, wm831x_num,
0b315884 1655 wm8320_devs, ARRAY_SIZE(wm8320_devs),
55692af5 1656 NULL, 0, NULL);
0b315884
MB		 1657 break;
1658
d2bedfe7
MB		 1659 default:
1660 /* If this happens the bus probe function is buggy */
1661 BUG();
1662 }
1663
1664 if (ret != 0) {
1665 dev_err(wm831x->dev, "Failed to add children\n");
7d4d0a3e 1666 goto err_irq;
d2bedfe7
MB		 1667 }
1668
b9d03d99
MB		 1669 /* The RTC can only be used if the 32.768kHz crystal is
1670 * enabled; this can't be controlled by software at runtime.
1671 */
1672 ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2);
1673 if (ret < 0) {
1674 dev_err(wm831x->dev, "Failed to read clock status: %d\n", ret);
1675 goto err_irq;
1676 }
1677
1678 if (ret & WM831X_XTAL_ENA) {
1679 ret = mfd_add_devices(wm831x->dev, wm831x_num,
1680 rtc_devs, ARRAY_SIZE(rtc_devs),
55692af5 1681 NULL, 0, NULL);
b9d03d99
MB		 1682 if (ret != 0) {
1683 dev_err(wm831x->dev, "Failed to add RTC: %d\n", ret);
1684 goto err_irq;
1685 }
1686 } else {
1687 dev_info(wm831x->dev, "32.768kHz clock disabled, no RTC\n");
1688 }
1689
dcb0574b 1690 if (pdata->backlight) {
63aed85e 1691 /* Treat errors as non-critical */
eb503dc1 1692 ret = mfd_add_devices(wm831x->dev, wm831x_num, backlight_devs,
5fb4d38b 1693 ARRAY_SIZE(backlight_devs), NULL,
55692af5 1694 0, NULL);
63aed85e
MB		 1695 if (ret < 0)
1696 dev_err(wm831x->dev, "Failed to add backlight: %d\n",
1697 ret);
1698 }
1699
6704e517
MB		 1700 wm831x_otp_init(wm831x);
1701
dcb0574b 1702 if (pdata->post_init) {
d2bedfe7
MB		 1703 ret = pdata->post_init(wm831x);
1704 if (ret != 0) {
1705 dev_err(wm831x->dev, "post_init() failed: %d\n", ret);
7d4d0a3e 1706 goto err_irq;
d2bedfe7
MB		 1707 }
1708 }
1709
1710 return 0;
1711
7d4d0a3e
MB		 1712err_irq:
1713 wm831x_irq_exit(wm831x);
130a7032 1714err:
d2bedfe7 1715 mfd_remove_devices(wm831x->dev);
d2bedfe7
MB		 1716 return ret;
1717}
1718
e5b48684 1719int wm831x_device_suspend(struct wm831x *wm831x)
b03b4d7c
MB		 1720{
1721 int reg, mask;
1722
1723 /* If the charger IRQs are a wake source then make sure we ack
1724 * them even if they're not actively being used (eg, no power
1725 * driver or no IRQ line wired up) then acknowledge the
1726 * interrupts otherwise suspend won't last very long.
1727 */
1728 if (wm831x->charger_irq_wake) {
1729 reg = wm831x_reg_read(wm831x, WM831X_INTERRUPT_STATUS_2_MASK);
1730
1731 mask = WM831X_CHG_BATT_HOT_EINT |
1732 WM831X_CHG_BATT_COLD_EINT |
1733 WM831X_CHG_BATT_FAIL_EINT |
1734 WM831X_CHG_OV_EINT | WM831X_CHG_END_EINT |
1735 WM831X_CHG_TO_EINT | WM831X_CHG_MODE_EINT |
1736 WM831X_CHG_START_EINT;
1737
1738 /* If any of the interrupts are masked read the statuses */
1739 if (reg & mask)
1740 reg = wm831x_reg_read(wm831x,
1741 WM831X_INTERRUPT_STATUS_2);
1742
1743 if (reg & mask) {
1744 dev_info(wm831x->dev,
1745 "Acknowledging masked charger IRQs: %x\n",
1746 reg & mask);
1747 wm831x_reg_write(wm831x, WM831X_INTERRUPT_STATUS_2,
1748 reg & mask);
1749 }
1750 }
1751
1752 return 0;
1753}
1754
523d9cfb
MB		 1755void wm831x_device_shutdown(struct wm831x *wm831x)
1756{
1757 if (wm831x->soft_shutdown) {
1758 dev_info(wm831x->dev, "Initiating shutdown...\n");
1759 wm831x_set_bits(wm831x, WM831X_POWER_STATE, WM831X_CHIP_ON, 0);
1760 }
1761}
1762EXPORT_SYMBOL_GPL(wm831x_device_shutdown);
Linux 6.x block layer and io_uring tree(s)