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mfd: twl6040: Optional clk32k clock handling
[linux-2.6-block.git] / drivers / mfd / twl6040.c
CommitLineData
f19b2823
MLC		 1/*
2 * MFD driver for TWL6040 audio device
3 *
4 * Authors: Misael Lopez Cruz <misael.lopez@ti.com>
5 * Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
6 * Peter Ujfalusi <peter.ujfalusi@ti.com>
7 *
8 * Copyright: (C) 2011 Texas Instruments, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 * 02110-1301 USA
23 *
24 */
25
26#include <linux/module.h>
27#include <linux/types.h>
28#include <linux/slab.h>
29#include <linux/kernel.h>
5af7df6b 30#include <linux/err.h>
f19b2823 31#include <linux/platform_device.h>
37e13cec
PU		 32#include <linux/of.h>
33#include <linux/of_irq.h>
34#include <linux/of_gpio.h>
35#include <linux/of_platform.h>
f19b2823
MLC		 36#include <linux/gpio.h>
37#include <linux/delay.h>
8eaeb939
PU		 38#include <linux/i2c.h>
39#include <linux/regmap.h>
f19b2823
MLC		 40#include <linux/mfd/core.h>
41#include <linux/mfd/twl6040.h>
5af7df6b 42#include <linux/regulator/consumer.h>
f19b2823 43
31b402e3 44#define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1)
5af7df6b 45#define TWL6040_NUM_SUPPLIES (2)
31b402e3 46
c7f9129d
PU		 47static struct reg_default twl6040_defaults[] = {
48 { 0x01, 0x4B }, /* REG_ASICID (ro) */
49 { 0x02, 0x00 }, /* REG_ASICREV (ro) */
50 { 0x03, 0x00 }, /* REG_INTID */
51 { 0x04, 0x00 }, /* REG_INTMR */
52 { 0x05, 0x00 }, /* REG_NCPCTRL */
53 { 0x06, 0x00 }, /* REG_LDOCTL */
54 { 0x07, 0x60 }, /* REG_HPPLLCTL */
55 { 0x08, 0x00 }, /* REG_LPPLLCTL */
56 { 0x09, 0x4A }, /* REG_LPPLLDIV */
57 { 0x0A, 0x00 }, /* REG_AMICBCTL */
58 { 0x0B, 0x00 }, /* REG_DMICBCTL */
59 { 0x0C, 0x00 }, /* REG_MICLCTL */
60 { 0x0D, 0x00 }, /* REG_MICRCTL */
61 { 0x0E, 0x00 }, /* REG_MICGAIN */
62 { 0x0F, 0x1B }, /* REG_LINEGAIN */
63 { 0x10, 0x00 }, /* REG_HSLCTL */
64 { 0x11, 0x00 }, /* REG_HSRCTL */
65 { 0x12, 0x00 }, /* REG_HSGAIN */
66 { 0x13, 0x00 }, /* REG_EARCTL */
67 { 0x14, 0x00 }, /* REG_HFLCTL */
68 { 0x15, 0x00 }, /* REG_HFLGAIN */
69 { 0x16, 0x00 }, /* REG_HFRCTL */
70 { 0x17, 0x00 }, /* REG_HFRGAIN */
71 { 0x18, 0x00 }, /* REG_VIBCTLL */
72 { 0x19, 0x00 }, /* REG_VIBDATL */
73 { 0x1A, 0x00 }, /* REG_VIBCTLR */
74 { 0x1B, 0x00 }, /* REG_VIBDATR */
75 { 0x1C, 0x00 }, /* REG_HKCTL1 */
76 { 0x1D, 0x00 }, /* REG_HKCTL2 */
77 { 0x1E, 0x00 }, /* REG_GPOCTL */
78 { 0x1F, 0x00 }, /* REG_ALB */
79 { 0x20, 0x00 }, /* REG_DLB */
80 /* 0x28, REG_TRIM1 */
81 /* 0x29, REG_TRIM2 */
82 /* 0x2A, REG_TRIM3 */
83 /* 0x2B, REG_HSOTRIM */
84 /* 0x2C, REG_HFOTRIM */
85 { 0x2D, 0x08 }, /* REG_ACCCTL */
86 { 0x2E, 0x00 }, /* REG_STATUS (ro) */
87};
88
adc01fbd 89static struct reg_default twl6040_patch[] = {
11e38e11
PU		 90 /*
91 * Select I2C bus access to dual access registers
92 * Interrupt register is cleared on read
93 * Select fast mode for i2c (400KHz)
94 */
95 { TWL6040_REG_ACCCTL,
96 TWL6040_I2CSEL | TWL6040_INTCLRMODE | TWL6040_I2CMODE(1) },
c7f9129d
PU		 97};
98
99
df04b624 100static bool twl6040_has_vibra(struct device_node *node)
ca2cad6a 101{
ca2cad6a
SO		 102#ifdef CONFIG_OF
103 if (of_find_node_by_name(node, "vibra"))
104 return true;
105#endif
ca2cad6a
SO		 106 return false;
107}
108
f19b2823
MLC		 109int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg)
110{
111 int ret;
8eaeb939 112 unsigned int val;
f19b2823 113
c6f39257
MB		 114 ret = regmap_read(twl6040->regmap, reg, &val);
115 if (ret < 0)
116 return ret;
f19b2823
MLC		 117
118 return val;
119}
120EXPORT_SYMBOL(twl6040_reg_read);
121
122int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, u8 val)
123{
124 int ret;
125
8eaeb939 126 ret = regmap_write(twl6040->regmap, reg, val);
f19b2823
MLC		 127
128 return ret;
129}
130EXPORT_SYMBOL(twl6040_reg_write);
131
132int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
133{
c600040f 134 return regmap_update_bits(twl6040->regmap, reg, mask, mask);
f19b2823
MLC		 135}
136EXPORT_SYMBOL(twl6040_set_bits);
137
138int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
139{
c600040f 140 return regmap_update_bits(twl6040->regmap, reg, mask, 0);
f19b2823
MLC		 141}
142EXPORT_SYMBOL(twl6040_clear_bits);
143
144/* twl6040 codec manual power-up sequence */
f9be1343 145static int twl6040_power_up_manual(struct twl6040 *twl6040)
f19b2823
MLC		 146{
147 u8 ldoctl, ncpctl, lppllctl;
148 int ret;
149
150 /* enable high-side LDO, reference system and internal oscillator */
151 ldoctl = TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA;
152 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
153 if (ret)
154 return ret;
155 usleep_range(10000, 10500);
156
157 /* enable negative charge pump */
158 ncpctl = TWL6040_NCPENA;
159 ret = twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
160 if (ret)
161 goto ncp_err;
162 usleep_range(1000, 1500);
163
164 /* enable low-side LDO */
165 ldoctl |= TWL6040_LSLDOENA;
166 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
167 if (ret)
168 goto lsldo_err;
169 usleep_range(1000, 1500);
170
171 /* enable low-power PLL */
172 lppllctl = TWL6040_LPLLENA;
173 ret = twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
174 if (ret)
175 goto lppll_err;
176 usleep_range(5000, 5500);
177
178 /* disable internal oscillator */
179 ldoctl &= ~TWL6040_OSCENA;
180 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
181 if (ret)
182 goto osc_err;
183
184 return 0;
185
186osc_err:
187 lppllctl &= ~TWL6040_LPLLENA;
188 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
189lppll_err:
190 ldoctl &= ~TWL6040_LSLDOENA;
191 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
192lsldo_err:
193 ncpctl &= ~TWL6040_NCPENA;
194 twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
195ncp_err:
196 ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
197 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
198
f9be1343 199 dev_err(twl6040->dev, "manual power-up failed\n");
f19b2823
MLC		 200 return ret;
201}
202
203/* twl6040 manual power-down sequence */
f9be1343 204static void twl6040_power_down_manual(struct twl6040 *twl6040)
f19b2823
MLC		 205{
206 u8 ncpctl, ldoctl, lppllctl;
207
208 ncpctl = twl6040_reg_read(twl6040, TWL6040_REG_NCPCTL);
209 ldoctl = twl6040_reg_read(twl6040, TWL6040_REG_LDOCTL);
210 lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
211
212 /* enable internal oscillator */
213 ldoctl |= TWL6040_OSCENA;
214 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
215 usleep_range(1000, 1500);
216
217 /* disable low-power PLL */
218 lppllctl &= ~TWL6040_LPLLENA;
219 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
220
221 /* disable low-side LDO */
222 ldoctl &= ~TWL6040_LSLDOENA;
223 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
224
225 /* disable negative charge pump */
226 ncpctl &= ~TWL6040_NCPENA;
227 twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
228
229 /* disable high-side LDO, reference system and internal oscillator */
230 ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
231 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
232}
233
1ac96265 234static irqreturn_t twl6040_readyint_handler(int irq, void *data)
f19b2823
MLC		 235{
236 struct twl6040 *twl6040 = data;
f19b2823 237
1ac96265 238 complete(&twl6040->ready);
f19b2823 239
1ac96265
PU		 240 return IRQ_HANDLED;
241}
f19b2823 242
1ac96265
PU		 243static irqreturn_t twl6040_thint_handler(int irq, void *data)
244{
245 struct twl6040 *twl6040 = data;
246 u8 status;
247
248 status = twl6040_reg_read(twl6040, TWL6040_REG_STATUS);
249 if (status & TWL6040_TSHUTDET) {
250 dev_warn(twl6040->dev, "Thermal shutdown, powering-off");
251 twl6040_power(twl6040, 0);
252 } else {
253 dev_warn(twl6040->dev, "Leaving thermal shutdown, powering-on");
254 twl6040_power(twl6040, 1);
f19b2823
MLC		 255 }
256
257 return IRQ_HANDLED;
258}
259
f9be1343 260static int twl6040_power_up_automatic(struct twl6040 *twl6040)
f19b2823
MLC		 261{
262 int time_left;
f9be1343
PU		 263
264 gpio_set_value(twl6040->audpwron, 1);
f19b2823
MLC		 265
266 time_left = wait_for_completion_timeout(&twl6040->ready,
267 msecs_to_jiffies(144));
268 if (!time_left) {
f9be1343
PU		 269 u8 intid;
270
271 dev_warn(twl6040->dev, "timeout waiting for READYINT\n");
f19b2823
MLC		 272 intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
273 if (!(intid & TWL6040_READYINT)) {
f9be1343
PU		 274 dev_err(twl6040->dev, "automatic power-up failed\n");
275 gpio_set_value(twl6040->audpwron, 0);
f19b2823
MLC		 276 return -ETIMEDOUT;
277 }
278 }
279
280 return 0;
281}
282
283int twl6040_power(struct twl6040 *twl6040, int on)
284{
f19b2823
MLC		 285 int ret = 0;
286
287 mutex_lock(&twl6040->mutex);
288
289 if (on) {
290 /* already powered-up */
291 if (twl6040->power_count++)
292 goto out;
293
68bab866
PU		 294 clk_prepare_enable(twl6040->clk32k);
295
c7f9129d
PU		 296 /* Allow writes to the chip */
297 regcache_cache_only(twl6040->regmap, false);
298
f9be1343
PU		 299 if (gpio_is_valid(twl6040->audpwron)) {
300 /* use automatic power-up sequence */
301 ret = twl6040_power_up_automatic(twl6040);
f19b2823 302 if (ret) {
f19b2823
MLC		 303 twl6040->power_count = 0;
304 goto out;
305 }
306 } else {
307 /* use manual power-up sequence */
f9be1343 308 ret = twl6040_power_up_manual(twl6040);
f19b2823 309 if (ret) {
f19b2823
MLC		 310 twl6040->power_count = 0;
311 goto out;
312 }
313 }
c7f9129d
PU		 314
315 /* Sync with the HW */
316 regcache_sync(twl6040->regmap);
317
cfb7a33b
PU		 318 /* Default PLL configuration after power up */
319 twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL;
f19b2823 320 twl6040->sysclk = 19200000;
f8447d6c 321 twl6040->mclk = 32768;
f19b2823
MLC		 322 } else {
323 /* already powered-down */
324 if (!twl6040->power_count) {
2d7c957e 325 dev_err(twl6040->dev,
f19b2823
MLC		 326 "device is already powered-off\n");
327 ret = -EPERM;
328 goto out;
329 }
330
331 if (--twl6040->power_count)
332 goto out;
333
f9be1343 334 if (gpio_is_valid(twl6040->audpwron)) {
f19b2823 335 /* use AUDPWRON line */
f9be1343 336 gpio_set_value(twl6040->audpwron, 0);
f19b2823
MLC		 337
338 /* power-down sequence latency */
339 usleep_range(500, 700);
340 } else {
341 /* use manual power-down sequence */
f9be1343 342 twl6040_power_down_manual(twl6040);
f19b2823 343 }
c7f9129d
PU		 344
345 /* Set regmap to cache only and mark it as dirty */
346 regcache_cache_only(twl6040->regmap, true);
347 regcache_mark_dirty(twl6040->regmap);
348
f19b2823 349 twl6040->sysclk = 0;
f8447d6c 350 twl6040->mclk = 0;
68bab866
PU		 351
352 clk_disable_unprepare(twl6040->clk32k);
f19b2823
MLC		 353 }
354
355out:
356 mutex_unlock(&twl6040->mutex);
357 return ret;
358}
359EXPORT_SYMBOL(twl6040_power);
360
cfb7a33b 361int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
f19b2823
MLC		 362 unsigned int freq_in, unsigned int freq_out)
363{
364 u8 hppllctl, lppllctl;
365 int ret = 0;
366
367 mutex_lock(&twl6040->mutex);
368
369 hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL);
370 lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
371
2bd05db7
PU		 372 /* Force full reconfiguration when switching between PLL */
373 if (pll_id != twl6040->pll) {
374 twl6040->sysclk = 0;
375 twl6040->mclk = 0;
376 }
377
cfb7a33b
PU		 378 switch (pll_id) {
379 case TWL6040_SYSCLK_SEL_LPPLL:
f19b2823 380 /* low-power PLL divider */
2bd05db7
PU		 381 /* Change the sysclk configuration only if it has been canged */
382 if (twl6040->sysclk != freq_out) {
383 switch (freq_out) {
384 case 17640000:
385 lppllctl |= TWL6040_LPLLFIN;
386 break;
387 case 19200000:
388 lppllctl &= ~TWL6040_LPLLFIN;
389 break;
390 default:
391 dev_err(twl6040->dev,
392 "freq_out %d not supported\n",
393 freq_out);
394 ret = -EINVAL;
395 goto pll_out;
396 }
397 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
398 lppllctl);
f19b2823 399 }
2bd05db7
PU		 400
401 /* The PLL in use has not been change, we can exit */
402 if (twl6040->pll == pll_id)
403 break;
f19b2823
MLC		 404
405 switch (freq_in) {
406 case 32768:
407 lppllctl |= TWL6040_LPLLENA;
408 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
409 lppllctl);
410 mdelay(5);
411 lppllctl &= ~TWL6040_HPLLSEL;
412 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
413 lppllctl);
414 hppllctl &= ~TWL6040_HPLLENA;
415 twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
416 hppllctl);
417 break;
418 default:
2d7c957e 419 dev_err(twl6040->dev,
f19b2823
MLC		 420 "freq_in %d not supported\n", freq_in);
421 ret = -EINVAL;
422 goto pll_out;
423 }
f19b2823 424 break;
cfb7a33b 425 case TWL6040_SYSCLK_SEL_HPPLL:
f19b2823
MLC		 426 /* high-performance PLL can provide only 19.2 MHz */
427 if (freq_out != 19200000) {
2d7c957e 428 dev_err(twl6040->dev,
f19b2823
MLC		 429 "freq_out %d not supported\n", freq_out);
430 ret = -EINVAL;
431 goto pll_out;
432 }
433
2bd05db7
PU		 434 if (twl6040->mclk != freq_in) {
435 hppllctl &= ~TWL6040_MCLK_MSK;
436
437 switch (freq_in) {
438 case 12000000:
439 /* PLL enabled, active mode */
440 hppllctl |= TWL6040_MCLK_12000KHZ |
441 TWL6040_HPLLENA;
442 break;
443 case 19200000:
444 /*
445 * PLL disabled
446 * (enable PLL if MCLK jitter quality
447 * doesn't meet specification)
448 */
449 hppllctl |= TWL6040_MCLK_19200KHZ;
450 break;
451 case 26000000:
452 /* PLL enabled, active mode */
453 hppllctl |= TWL6040_MCLK_26000KHZ |
454 TWL6040_HPLLENA;
455 break;
456 case 38400000:
457 /* PLL enabled, active mode */
458 hppllctl |= TWL6040_MCLK_38400KHZ |
459 TWL6040_HPLLENA;
460 break;
461 default:
462 dev_err(twl6040->dev,
463 "freq_in %d not supported\n", freq_in);
464 ret = -EINVAL;
465 goto pll_out;
466 }
f19b2823 467
f19b2823 468 /*
2bd05db7
PU		 469 * enable clock slicer to ensure input waveform is
470 * square
f19b2823 471 */
2bd05db7 472 hppllctl |= TWL6040_HPLLSQRENA;
f19b2823 473
2bd05db7
PU		 474 twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
475 hppllctl);
476 usleep_range(500, 700);
477 lppllctl |= TWL6040_HPLLSEL;
478 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
479 lppllctl);
480 lppllctl &= ~TWL6040_LPLLENA;
481 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
482 lppllctl);
483 }
f19b2823
MLC		 484 break;
485 default:
2d7c957e 486 dev_err(twl6040->dev, "unknown pll id %d\n", pll_id);
f19b2823
MLC		 487 ret = -EINVAL;
488 goto pll_out;
489 }
490
491 twl6040->sysclk = freq_out;
f8447d6c 492 twl6040->mclk = freq_in;
cfb7a33b 493 twl6040->pll = pll_id;
f19b2823
MLC		 494
495pll_out:
496 mutex_unlock(&twl6040->mutex);
497 return ret;
498}
499EXPORT_SYMBOL(twl6040_set_pll);
500
cfb7a33b 501int twl6040_get_pll(struct twl6040 *twl6040)
f19b2823 502{
cfb7a33b
PU		 503 if (twl6040->power_count)
504 return twl6040->pll;
505 else
506 return -ENODEV;
f19b2823
MLC		 507}
508EXPORT_SYMBOL(twl6040_get_pll);
509
510unsigned int twl6040_get_sysclk(struct twl6040 *twl6040)
511{
512 return twl6040->sysclk;
513}
514EXPORT_SYMBOL(twl6040_get_sysclk);
515
70601ec1
PU		 516/* Get the combined status of the vibra control register */
517int twl6040_get_vibralr_status(struct twl6040 *twl6040)
518{
c6f39257
MB		 519 unsigned int reg;
520 int ret;
70601ec1
PU		 521 u8 status;
522
c6f39257
MB		 523 ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLL, &reg);
524 if (ret != 0)
525 return ret;
526 status = reg;
527
528 ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLR, &reg);
529 if (ret != 0)
530 return ret;
531 status |= reg;
532
70601ec1
PU		 533 status &= (TWL6040_VIBENA | TWL6040_VIBSEL);
534
535 return status;
536}
537EXPORT_SYMBOL(twl6040_get_vibralr_status);
538
0f962ae2
PU		 539static struct resource twl6040_vibra_rsrc[] = {
540 {
541 .flags = IORESOURCE_IRQ,
542 },
543};
544
545static struct resource twl6040_codec_rsrc[] = {
546 {
547 .flags = IORESOURCE_IRQ,
548 },
549};
550
8eaeb939 551static bool twl6040_readable_reg(struct device *dev, unsigned int reg)
f19b2823 552{
8eaeb939
PU		 553 /* Register 0 is not readable */
554 if (!reg)
555 return false;
556 return true;
557}
558
c6f39257
MB		 559static bool twl6040_volatile_reg(struct device *dev, unsigned int reg)
560{
561 switch (reg) {
c7f9129d
PU		 562 case TWL6040_REG_ASICID:
563 case TWL6040_REG_ASICREV:
564 case TWL6040_REG_INTID:
565 case TWL6040_REG_LPPLLCTL:
566 case TWL6040_REG_HPPLLCTL:
567 case TWL6040_REG_STATUS:
568 return true;
569 default:
570 return false;
571 }
572}
573
574static bool twl6040_writeable_reg(struct device *dev, unsigned int reg)
575{
576 switch (reg) {
577 case TWL6040_REG_ASICID:
578 case TWL6040_REG_ASICREV:
579 case TWL6040_REG_STATUS:
c6f39257
MB		 580 return false;
581 default:
582 return true;
583 }
584}
585
8eaeb939
PU		 586static struct regmap_config twl6040_regmap_config = {
587 .reg_bits = 8,
588 .val_bits = 8,
c7f9129d
PU		 589
590 .reg_defaults = twl6040_defaults,
591 .num_reg_defaults = ARRAY_SIZE(twl6040_defaults),
592
8eaeb939
PU		 593 .max_register = TWL6040_REG_STATUS, /* 0x2e */
594
595 .readable_reg = twl6040_readable_reg,
c6f39257 596 .volatile_reg = twl6040_volatile_reg,
c7f9129d 597 .writeable_reg = twl6040_writeable_reg,
c6f39257
MB		 598
599 .cache_type = REGCACHE_RBTREE,
8eaeb939
PU		 600};
601
ab7edb14
PU		 602static const struct regmap_irq twl6040_irqs[] = {
603 { .reg_offset = 0, .mask = TWL6040_THINT, },
604 { .reg_offset = 0, .mask = TWL6040_PLUGINT | TWL6040_UNPLUGINT, },
605 { .reg_offset = 0, .mask = TWL6040_HOOKINT, },
606 { .reg_offset = 0, .mask = TWL6040_HFINT, },
607 { .reg_offset = 0, .mask = TWL6040_VIBINT, },
608 { .reg_offset = 0, .mask = TWL6040_READYINT, },
609};
610
611static struct regmap_irq_chip twl6040_irq_chip = {
612 .name = "twl6040",
613 .irqs = twl6040_irqs,
614 .num_irqs = ARRAY_SIZE(twl6040_irqs),
615
616 .num_regs = 1,
617 .status_base = TWL6040_REG_INTID,
618 .mask_base = TWL6040_REG_INTMR,
619};
620
612b95cd
GKH		 621static int twl6040_probe(struct i2c_client *client,
622 const struct i2c_device_id *id)
8eaeb939 623{
37e13cec 624 struct device_node *node = client->dev.of_node;
f19b2823
MLC		 625 struct twl6040 *twl6040;
626 struct mfd_cell *cell = NULL;
1f01d60e 627 int irq, ret, children = 0;
f19b2823 628
df04b624
PU		 629 if (!node) {
630 dev_err(&client->dev, "of node is missing\n");
f19b2823
MLC		 631 return -EINVAL;
632 }
633
d20e1d21 634 /* In order to operate correctly we need valid interrupt config */
6712419d 635 if (!client->irq) {
8eaeb939 636 dev_err(&client->dev, "Invalid IRQ configuration\n");
d20e1d21
PU		 637 return -EINVAL;
638 }
639
8eaeb939
PU		 640 twl6040 = devm_kzalloc(&client->dev, sizeof(struct twl6040),
641 GFP_KERNEL);
ecc8fa1c
PU		 642 if (!twl6040)
643 return -ENOMEM;
8eaeb939 644
bbf6adc1 645 twl6040->regmap = devm_regmap_init_i2c(client, &twl6040_regmap_config);
ecc8fa1c
PU		 646 if (IS_ERR(twl6040->regmap))
647 return PTR_ERR(twl6040->regmap);
f19b2823 648
8eaeb939 649 i2c_set_clientdata(client, twl6040);
f19b2823 650
68bab866
PU		 651 twl6040->clk32k = devm_clk_get(&client->dev, "clk32k");
652 if (IS_ERR(twl6040->clk32k)) {
653 dev_info(&client->dev, "clk32k is not handled\n");
654 twl6040->clk32k = NULL;
655 }
656
5af7df6b
PU		 657 twl6040->supplies[0].supply = "vio";
658 twl6040->supplies[1].supply = "v2v1";
990810b0 659 ret = devm_regulator_bulk_get(&client->dev, TWL6040_NUM_SUPPLIES,
37aefe9f 660 twl6040->supplies);
5af7df6b
PU		 661 if (ret != 0) {
662 dev_err(&client->dev, "Failed to get supplies: %d\n", ret);
501d609a 663 return ret;
5af7df6b
PU		 664 }
665
666 ret = regulator_bulk_enable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
667 if (ret != 0) {
668 dev_err(&client->dev, "Failed to enable supplies: %d\n", ret);
501d609a 669 return ret;
5af7df6b
PU		 670 }
671
8eaeb939
PU		 672 twl6040->dev = &client->dev;
673 twl6040->irq = client->irq;
f19b2823
MLC		 674
675 mutex_init(&twl6040->mutex);
f19b2823
MLC		 676 init_completion(&twl6040->ready);
677
678 twl6040->rev = twl6040_reg_read(twl6040, TWL6040_REG_ASICREV);
89d68998
FV		 679 if (twl6040->rev < 0) {
680 dev_err(&client->dev, "Failed to read revision register: %d\n",
681 twl6040->rev);
682 goto gpio_err;
683 }
f19b2823 684
77f63e06 685 /* ERRATA: Automatic power-up is not possible in ES1.0 */
df04b624
PU		 686 if (twl6040_get_revid(twl6040) > TWL6040_REV_ES1_0)
687 twl6040->audpwron = of_get_named_gpio(node,
688 "ti,audpwron-gpio", 0);
689 else
77f63e06
PU		 690 twl6040->audpwron = -EINVAL;
691
f19b2823 692 if (gpio_is_valid(twl6040->audpwron)) {
990810b0 693 ret = devm_gpio_request_one(&client->dev, twl6040->audpwron,
37aefe9f 694 GPIOF_OUT_INIT_LOW, "audpwron");
f19b2823 695 if (ret)
5af7df6b 696 goto gpio_err;
02d02728
PU		 697
698 /* Clear any pending interrupt */
699 twl6040_reg_read(twl6040, TWL6040_REG_INTID);
f19b2823
MLC		 700 }
701
37aefe9f
PU		 702 ret = regmap_add_irq_chip(twl6040->regmap, twl6040->irq, IRQF_ONESHOT,
703 0, &twl6040_irq_chip,&twl6040->irq_data);
ab7edb14 704 if (ret < 0)
990810b0 705 goto gpio_err;
d20e1d21 706
ab7edb14 707 twl6040->irq_ready = regmap_irq_get_virq(twl6040->irq_data,
37aefe9f 708 TWL6040_IRQ_READY);
ab7edb14 709 twl6040->irq_th = regmap_irq_get_virq(twl6040->irq_data,
37aefe9f 710 TWL6040_IRQ_TH);
ab7edb14 711
990810b0 712 ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_ready, NULL,
37aefe9f
PU		 713 twl6040_readyint_handler, IRQF_ONESHOT,
714 "twl6040_irq_ready", twl6040);
d20e1d21 715 if (ret) {
1ac96265
PU		 716 dev_err(twl6040->dev, "READY IRQ request failed: %d\n", ret);
717 goto readyirq_err;
718 }
719
990810b0 720 ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_th, NULL,
37aefe9f
PU		 721 twl6040_thint_handler, IRQF_ONESHOT,
722 "twl6040_irq_th", twl6040);
1ac96265
PU		 723 if (ret) {
724 dev_err(twl6040->dev, "Thermal IRQ request failed: %d\n", ret);
fc5ee96f 725 goto readyirq_err;
f19b2823
MLC		 726 }
727
728 /* dual-access registers controlled by I2C only */
c7f9129d
PU		 729 regmap_register_patch(twl6040->regmap, twl6040_patch,
730 ARRAY_SIZE(twl6040_patch));
f19b2823 731
1f01d60e
PU		 732 /*
733 * The main functionality of twl6040 to provide audio on OMAP4+ systems.
734 * We can add the ASoC codec child whenever this driver has been loaded.
1f01d60e 735 */
ab7edb14 736 irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_PLUG);
1f01d60e
PU		 737 cell = &twl6040->cells[children];
738 cell->name = "twl6040-codec";
739 twl6040_codec_rsrc[0].start = irq;
740 twl6040_codec_rsrc[0].end = irq;
741 cell->resources = twl6040_codec_rsrc;
742 cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc);
1f01d60e 743 children++;
f19b2823 744
df04b624
PU		 745 /* Vibra input driver support */
746 if (twl6040_has_vibra(node)) {
ab7edb14 747 irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_VIB);
0f962ae2 748
f19b2823
MLC		 749 cell = &twl6040->cells[children];
750 cell->name = "twl6040-vibra";
0f962ae2
PU		 751 twl6040_vibra_rsrc[0].start = irq;
752 twl6040_vibra_rsrc[0].end = irq;
753 cell->resources = twl6040_vibra_rsrc;
754 cell->num_resources = ARRAY_SIZE(twl6040_vibra_rsrc);
f19b2823
MLC		 755 children++;
756 }
757
df04b624
PU		 758 /* GPO support */
759 cell = &twl6040->cells[children];
760 cell->name = "twl6040-gpo";
761 children++;
5cbe786a 762
c7f9129d
PU		 763 /* The chip is powered down so mark regmap to cache only and dirty */
764 regcache_cache_only(twl6040->regmap, true);
765 regcache_mark_dirty(twl6040->regmap);
766
1f01d60e 767 ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children,
55692af5 768 NULL, 0, NULL);
1f01d60e 769 if (ret)
fc5ee96f 770 goto readyirq_err;
f19b2823
MLC		 771
772 return 0;
773
1ac96265 774readyirq_err:
ab7edb14 775 regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
5af7df6b
PU		 776gpio_err:
777 regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
f19b2823
MLC		 778 return ret;
779}
780
612b95cd 781static int twl6040_remove(struct i2c_client *client)
f19b2823 782{
8eaeb939 783 struct twl6040 *twl6040 = i2c_get_clientdata(client);
f19b2823
MLC		 784
785 if (twl6040->power_count)
786 twl6040_power(twl6040, 0);
787
ab7edb14 788 regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
f19b2823 789
8eaeb939 790 mfd_remove_devices(&client->dev);
f19b2823 791
5af7df6b 792 regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
5af7df6b 793
f19b2823
MLC		 794 return 0;
795}
796
8eaeb939
PU		 797static const struct i2c_device_id twl6040_i2c_id[] = {
798 { "twl6040", 0, },
1fc74aef 799 { "twl6041", 0, },
8eaeb939
PU		 800 { },
801};
802MODULE_DEVICE_TABLE(i2c, twl6040_i2c_id);
803
804static struct i2c_driver twl6040_driver = {
805 .driver = {
806 .name = "twl6040",
807 .owner = THIS_MODULE,
808 },
f19b2823 809 .probe = twl6040_probe,
612b95cd 810 .remove = twl6040_remove,
8eaeb939 811 .id_table = twl6040_i2c_id,
f19b2823
MLC		 812};
813
8eaeb939 814module_i2c_driver(twl6040_driver);
f19b2823
MLC		 815
816MODULE_DESCRIPTION("TWL6040 MFD");
817MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
818MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>");
819MODULE_LICENSE("GPL");
820MODULE_ALIAS("platform:twl6040");
Linux 6.x block layer and io_uring tree(s)