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Merge branch 'kconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild
[linux-2.6-block.git] / drivers / mfd / twl6040.c
CommitLineData
f19b2823
MLC		 1/*
2 * MFD driver for TWL6040 audio device
3 *
4 * Authors: Misael Lopez Cruz <misael.lopez@ti.com>
5 * Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
6 * Peter Ujfalusi <peter.ujfalusi@ti.com>
7 *
8 * Copyright: (C) 2011 Texas Instruments, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 * 02110-1301 USA
23 *
24 */
25
26#include <linux/module.h>
27#include <linux/types.h>
28#include <linux/slab.h>
29#include <linux/kernel.h>
5af7df6b 30#include <linux/err.h>
f19b2823 31#include <linux/platform_device.h>
37e13cec
PU		 32#include <linux/of.h>
33#include <linux/of_irq.h>
34#include <linux/of_gpio.h>
35#include <linux/of_platform.h>
f19b2823
MLC		 36#include <linux/gpio.h>
37#include <linux/delay.h>
8eaeb939
PU		 38#include <linux/i2c.h>
39#include <linux/regmap.h>
f19b2823
MLC		 40#include <linux/mfd/core.h>
41#include <linux/mfd/twl6040.h>
5af7df6b 42#include <linux/regulator/consumer.h>
f19b2823 43
31b402e3 44#define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1)
5af7df6b 45#define TWL6040_NUM_SUPPLIES (2)
31b402e3 46
de1e23f8 47static const struct reg_default twl6040_defaults[] = {
c7f9129d
PU		 48 { 0x01, 0x4B }, /* REG_ASICID (ro) */
49 { 0x02, 0x00 }, /* REG_ASICREV (ro) */
50 { 0x03, 0x00 }, /* REG_INTID */
51 { 0x04, 0x00 }, /* REG_INTMR */
52 { 0x05, 0x00 }, /* REG_NCPCTRL */
53 { 0x06, 0x00 }, /* REG_LDOCTL */
54 { 0x07, 0x60 }, /* REG_HPPLLCTL */
55 { 0x08, 0x00 }, /* REG_LPPLLCTL */
56 { 0x09, 0x4A }, /* REG_LPPLLDIV */
57 { 0x0A, 0x00 }, /* REG_AMICBCTL */
58 { 0x0B, 0x00 }, /* REG_DMICBCTL */
59 { 0x0C, 0x00 }, /* REG_MICLCTL */
60 { 0x0D, 0x00 }, /* REG_MICRCTL */
61 { 0x0E, 0x00 }, /* REG_MICGAIN */
62 { 0x0F, 0x1B }, /* REG_LINEGAIN */
63 { 0x10, 0x00 }, /* REG_HSLCTL */
64 { 0x11, 0x00 }, /* REG_HSRCTL */
65 { 0x12, 0x00 }, /* REG_HSGAIN */
66 { 0x13, 0x00 }, /* REG_EARCTL */
67 { 0x14, 0x00 }, /* REG_HFLCTL */
68 { 0x15, 0x00 }, /* REG_HFLGAIN */
69 { 0x16, 0x00 }, /* REG_HFRCTL */
70 { 0x17, 0x00 }, /* REG_HFRGAIN */
71 { 0x18, 0x00 }, /* REG_VIBCTLL */
72 { 0x19, 0x00 }, /* REG_VIBDATL */
73 { 0x1A, 0x00 }, /* REG_VIBCTLR */
74 { 0x1B, 0x00 }, /* REG_VIBDATR */
75 { 0x1C, 0x00 }, /* REG_HKCTL1 */
76 { 0x1D, 0x00 }, /* REG_HKCTL2 */
77 { 0x1E, 0x00 }, /* REG_GPOCTL */
78 { 0x1F, 0x00 }, /* REG_ALB */
79 { 0x20, 0x00 }, /* REG_DLB */
80 /* 0x28, REG_TRIM1 */
81 /* 0x29, REG_TRIM2 */
82 /* 0x2A, REG_TRIM3 */
83 /* 0x2B, REG_HSOTRIM */
84 /* 0x2C, REG_HFOTRIM */
85 { 0x2D, 0x08 }, /* REG_ACCCTL */
86 { 0x2E, 0x00 }, /* REG_STATUS (ro) */
87};
88
8019ff6c 89static struct reg_sequence twl6040_patch[] = {
11e38e11
PU		 90 /*
91 * Select I2C bus access to dual access registers
92 * Interrupt register is cleared on read
93 * Select fast mode for i2c (400KHz)
94 */
95 { TWL6040_REG_ACCCTL,
96 TWL6040_I2CSEL | TWL6040_INTCLRMODE | TWL6040_I2CMODE(1) },
c7f9129d
PU		 97};
98
99
df04b624 100static bool twl6040_has_vibra(struct device_node *node)
ca2cad6a 101{
ca2cad6a
SO		 102#ifdef CONFIG_OF
103 if (of_find_node_by_name(node, "vibra"))
104 return true;
105#endif
ca2cad6a
SO		 106 return false;
107}
108
f19b2823
MLC		 109int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg)
110{
111 int ret;
8eaeb939 112 unsigned int val;
f19b2823 113
c6f39257
MB		 114 ret = regmap_read(twl6040->regmap, reg, &val);
115 if (ret < 0)
116 return ret;
f19b2823
MLC		 117
118 return val;
119}
120EXPORT_SYMBOL(twl6040_reg_read);
121
122int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, u8 val)
123{
124 int ret;
125
8eaeb939 126 ret = regmap_write(twl6040->regmap, reg, val);
f19b2823
MLC		 127
128 return ret;
129}
130EXPORT_SYMBOL(twl6040_reg_write);
131
132int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
133{
c600040f 134 return regmap_update_bits(twl6040->regmap, reg, mask, mask);
f19b2823
MLC		 135}
136EXPORT_SYMBOL(twl6040_set_bits);
137
138int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
139{
c600040f 140 return regmap_update_bits(twl6040->regmap, reg, mask, 0);
f19b2823
MLC		 141}
142EXPORT_SYMBOL(twl6040_clear_bits);
143
144/* twl6040 codec manual power-up sequence */
f9be1343 145static int twl6040_power_up_manual(struct twl6040 *twl6040)
f19b2823
MLC		 146{
147 u8 ldoctl, ncpctl, lppllctl;
148 int ret;
149
150 /* enable high-side LDO, reference system and internal oscillator */
151 ldoctl = TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA;
152 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
153 if (ret)
154 return ret;
155 usleep_range(10000, 10500);
156
157 /* enable negative charge pump */
158 ncpctl = TWL6040_NCPENA;
159 ret = twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
160 if (ret)
161 goto ncp_err;
162 usleep_range(1000, 1500);
163
164 /* enable low-side LDO */
165 ldoctl |= TWL6040_LSLDOENA;
166 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
167 if (ret)
168 goto lsldo_err;
169 usleep_range(1000, 1500);
170
171 /* enable low-power PLL */
172 lppllctl = TWL6040_LPLLENA;
173 ret = twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
174 if (ret)
175 goto lppll_err;
176 usleep_range(5000, 5500);
177
178 /* disable internal oscillator */
179 ldoctl &= ~TWL6040_OSCENA;
180 ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
181 if (ret)
182 goto osc_err;
183
184 return 0;
185
186osc_err:
187 lppllctl &= ~TWL6040_LPLLENA;
188 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
189lppll_err:
190 ldoctl &= ~TWL6040_LSLDOENA;
191 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
192lsldo_err:
193 ncpctl &= ~TWL6040_NCPENA;
194 twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
195ncp_err:
196 ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
197 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
198
f9be1343 199 dev_err(twl6040->dev, "manual power-up failed\n");
f19b2823
MLC		 200 return ret;
201}
202
203/* twl6040 manual power-down sequence */
f9be1343 204static void twl6040_power_down_manual(struct twl6040 *twl6040)
f19b2823
MLC		 205{
206 u8 ncpctl, ldoctl, lppllctl;
207
208 ncpctl = twl6040_reg_read(twl6040, TWL6040_REG_NCPCTL);
209 ldoctl = twl6040_reg_read(twl6040, TWL6040_REG_LDOCTL);
210 lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
211
212 /* enable internal oscillator */
213 ldoctl |= TWL6040_OSCENA;
214 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
215 usleep_range(1000, 1500);
216
217 /* disable low-power PLL */
218 lppllctl &= ~TWL6040_LPLLENA;
219 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
220
221 /* disable low-side LDO */
222 ldoctl &= ~TWL6040_LSLDOENA;
223 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
224
225 /* disable negative charge pump */
226 ncpctl &= ~TWL6040_NCPENA;
227 twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
228
229 /* disable high-side LDO, reference system and internal oscillator */
230 ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
231 twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
232}
233
1ac96265 234static irqreturn_t twl6040_readyint_handler(int irq, void *data)
f19b2823
MLC		 235{
236 struct twl6040 *twl6040 = data;
f19b2823 237
1ac96265 238 complete(&twl6040->ready);
f19b2823 239
1ac96265
PU		 240 return IRQ_HANDLED;
241}
f19b2823 242
1ac96265
PU		 243static irqreturn_t twl6040_thint_handler(int irq, void *data)
244{
245 struct twl6040 *twl6040 = data;
246 u8 status;
247
248 status = twl6040_reg_read(twl6040, TWL6040_REG_STATUS);
249 if (status & TWL6040_TSHUTDET) {
250 dev_warn(twl6040->dev, "Thermal shutdown, powering-off");
251 twl6040_power(twl6040, 0);
252 } else {
253 dev_warn(twl6040->dev, "Leaving thermal shutdown, powering-on");
254 twl6040_power(twl6040, 1);
f19b2823
MLC		 255 }
256
257 return IRQ_HANDLED;
258}
259
f9be1343 260static int twl6040_power_up_automatic(struct twl6040 *twl6040)
f19b2823
MLC		 261{
262 int time_left;
f9be1343
PU		 263
264 gpio_set_value(twl6040->audpwron, 1);
f19b2823
MLC		 265
266 time_left = wait_for_completion_timeout(&twl6040->ready,
267 msecs_to_jiffies(144));
268 if (!time_left) {
f9be1343
PU		 269 u8 intid;
270
271 dev_warn(twl6040->dev, "timeout waiting for READYINT\n");
f19b2823
MLC		 272 intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
273 if (!(intid & TWL6040_READYINT)) {
f9be1343
PU		 274 dev_err(twl6040->dev, "automatic power-up failed\n");
275 gpio_set_value(twl6040->audpwron, 0);
f19b2823
MLC		 276 return -ETIMEDOUT;
277 }
278 }
279
280 return 0;
281}
282
283int twl6040_power(struct twl6040 *twl6040, int on)
284{
f19b2823
MLC		 285 int ret = 0;
286
287 mutex_lock(&twl6040->mutex);
288
289 if (on) {
290 /* already powered-up */
291 if (twl6040->power_count++)
292 goto out;
293
68bab866
PU		 294 clk_prepare_enable(twl6040->clk32k);
295
c7f9129d
PU		 296 /* Allow writes to the chip */
297 regcache_cache_only(twl6040->regmap, false);
298
f9be1343
PU		 299 if (gpio_is_valid(twl6040->audpwron)) {
300 /* use automatic power-up sequence */
301 ret = twl6040_power_up_automatic(twl6040);
f19b2823 302 if (ret) {
f19b2823
MLC		 303 twl6040->power_count = 0;
304 goto out;
305 }
306 } else {
307 /* use manual power-up sequence */
f9be1343 308 ret = twl6040_power_up_manual(twl6040);
f19b2823 309 if (ret) {
f19b2823
MLC		 310 twl6040->power_count = 0;
311 goto out;
312 }
313 }
c7f9129d
PU		 314
315 /* Sync with the HW */
316 regcache_sync(twl6040->regmap);
317
cfb7a33b
PU		 318 /* Default PLL configuration after power up */
319 twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL;
f19b2823 320 twl6040->sysclk = 19200000;
f8447d6c 321 twl6040->mclk = 32768;
f19b2823
MLC		 322 } else {
323 /* already powered-down */
324 if (!twl6040->power_count) {
2d7c957e 325 dev_err(twl6040->dev,
f19b2823
MLC		 326 "device is already powered-off\n");
327 ret = -EPERM;
328 goto out;
329 }
330
331 if (--twl6040->power_count)
332 goto out;
333
f9be1343 334 if (gpio_is_valid(twl6040->audpwron)) {
f19b2823 335 /* use AUDPWRON line */
f9be1343 336 gpio_set_value(twl6040->audpwron, 0);
f19b2823
MLC		 337
338 /* power-down sequence latency */
339 usleep_range(500, 700);
340 } else {
341 /* use manual power-down sequence */
f9be1343 342 twl6040_power_down_manual(twl6040);
f19b2823 343 }
c7f9129d
PU		 344
345 /* Set regmap to cache only and mark it as dirty */
346 regcache_cache_only(twl6040->regmap, true);
347 regcache_mark_dirty(twl6040->regmap);
348
f19b2823 349 twl6040->sysclk = 0;
f8447d6c 350 twl6040->mclk = 0;
68bab866
PU		 351
352 clk_disable_unprepare(twl6040->clk32k);
f19b2823
MLC		 353 }
354
355out:
356 mutex_unlock(&twl6040->mutex);
357 return ret;
358}
359EXPORT_SYMBOL(twl6040_power);
360
cfb7a33b 361int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
f19b2823
MLC		 362 unsigned int freq_in, unsigned int freq_out)
363{
364 u8 hppllctl, lppllctl;
365 int ret = 0;
366
367 mutex_lock(&twl6040->mutex);
368
369 hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL);
370 lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
371
2bd05db7
PU		 372 /* Force full reconfiguration when switching between PLL */
373 if (pll_id != twl6040->pll) {
374 twl6040->sysclk = 0;
375 twl6040->mclk = 0;
376 }
377
cfb7a33b
PU		 378 switch (pll_id) {
379 case TWL6040_SYSCLK_SEL_LPPLL:
f19b2823 380 /* low-power PLL divider */
2bd05db7
PU		 381 /* Change the sysclk configuration only if it has been canged */
382 if (twl6040->sysclk != freq_out) {
383 switch (freq_out) {
384 case 17640000:
385 lppllctl |= TWL6040_LPLLFIN;
386 break;
387 case 19200000:
388 lppllctl &= ~TWL6040_LPLLFIN;
389 break;
390 default:
391 dev_err(twl6040->dev,
392 "freq_out %d not supported\n",
393 freq_out);
394 ret = -EINVAL;
395 goto pll_out;
396 }
397 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
398 lppllctl);
f19b2823 399 }
2bd05db7
PU		 400
401 /* The PLL in use has not been change, we can exit */
402 if (twl6040->pll == pll_id)
403 break;
f19b2823
MLC		 404
405 switch (freq_in) {
406 case 32768:
407 lppllctl |= TWL6040_LPLLENA;
408 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
409 lppllctl);
410 mdelay(5);
411 lppllctl &= ~TWL6040_HPLLSEL;
412 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
413 lppllctl);
414 hppllctl &= ~TWL6040_HPLLENA;
415 twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
416 hppllctl);
417 break;
418 default:
2d7c957e 419 dev_err(twl6040->dev,
f19b2823
MLC		 420 "freq_in %d not supported\n", freq_in);
421 ret = -EINVAL;
422 goto pll_out;
423 }
f19b2823 424 break;
cfb7a33b 425 case TWL6040_SYSCLK_SEL_HPPLL:
f19b2823
MLC		 426 /* high-performance PLL can provide only 19.2 MHz */
427 if (freq_out != 19200000) {
2d7c957e 428 dev_err(twl6040->dev,
f19b2823
MLC		 429 "freq_out %d not supported\n", freq_out);
430 ret = -EINVAL;
431 goto pll_out;
432 }
433
2bd05db7
PU		 434 if (twl6040->mclk != freq_in) {
435 hppllctl &= ~TWL6040_MCLK_MSK;
436
437 switch (freq_in) {
438 case 12000000:
439 /* PLL enabled, active mode */
440 hppllctl |= TWL6040_MCLK_12000KHZ |
441 TWL6040_HPLLENA;
442 break;
443 case 19200000:
ac8320c4
PU		 444 /* PLL enabled, bypass mode */
445 hppllctl |= TWL6040_MCLK_19200KHZ |
446 TWL6040_HPLLBP | TWL6040_HPLLENA;
2bd05db7
PU		 447 break;
448 case 26000000:
449 /* PLL enabled, active mode */
450 hppllctl |= TWL6040_MCLK_26000KHZ |
451 TWL6040_HPLLENA;
452 break;
453 case 38400000:
ac8320c4 454 /* PLL enabled, bypass mode */
2bd05db7 455 hppllctl |= TWL6040_MCLK_38400KHZ |
ac8320c4 456 TWL6040_HPLLBP | TWL6040_HPLLENA;
2bd05db7
PU		 457 break;
458 default:
459 dev_err(twl6040->dev,
460 "freq_in %d not supported\n", freq_in);
461 ret = -EINVAL;
462 goto pll_out;
463 }
f19b2823 464
f19b2823 465 /*
2bd05db7
PU		 466 * enable clock slicer to ensure input waveform is
467 * square
f19b2823 468 */
2bd05db7 469 hppllctl |= TWL6040_HPLLSQRENA;
f19b2823 470
2bd05db7
PU		 471 twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
472 hppllctl);
473 usleep_range(500, 700);
474 lppllctl |= TWL6040_HPLLSEL;
475 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
476 lppllctl);
477 lppllctl &= ~TWL6040_LPLLENA;
478 twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
479 lppllctl);
480 }
f19b2823
MLC		 481 break;
482 default:
2d7c957e 483 dev_err(twl6040->dev, "unknown pll id %d\n", pll_id);
f19b2823
MLC		 484 ret = -EINVAL;
485 goto pll_out;
486 }
487
488 twl6040->sysclk = freq_out;
f8447d6c 489 twl6040->mclk = freq_in;
cfb7a33b 490 twl6040->pll = pll_id;
f19b2823
MLC		 491
492pll_out:
493 mutex_unlock(&twl6040->mutex);
494 return ret;
495}
496EXPORT_SYMBOL(twl6040_set_pll);
497
cfb7a33b 498int twl6040_get_pll(struct twl6040 *twl6040)
f19b2823 499{
cfb7a33b
PU		 500 if (twl6040->power_count)
501 return twl6040->pll;
502 else
503 return -ENODEV;
f19b2823
MLC		 504}
505EXPORT_SYMBOL(twl6040_get_pll);
506
507unsigned int twl6040_get_sysclk(struct twl6040 *twl6040)
508{
509 return twl6040->sysclk;
510}
511EXPORT_SYMBOL(twl6040_get_sysclk);
512
70601ec1
PU		 513/* Get the combined status of the vibra control register */
514int twl6040_get_vibralr_status(struct twl6040 *twl6040)
515{
c6f39257
MB		 516 unsigned int reg;
517 int ret;
70601ec1
PU		 518 u8 status;
519
c6f39257
MB		 520 ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLL, &reg);
521 if (ret != 0)
522 return ret;
523 status = reg;
524
525 ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLR, &reg);
526 if (ret != 0)
527 return ret;
528 status |= reg;
529
70601ec1
PU		 530 status &= (TWL6040_VIBENA | TWL6040_VIBSEL);
531
532 return status;
533}
534EXPORT_SYMBOL(twl6040_get_vibralr_status);
535
0f962ae2
PU		 536static struct resource twl6040_vibra_rsrc[] = {
537 {
538 .flags = IORESOURCE_IRQ,
539 },
540};
541
542static struct resource twl6040_codec_rsrc[] = {
543 {
544 .flags = IORESOURCE_IRQ,
545 },
546};
547
8eaeb939 548static bool twl6040_readable_reg(struct device *dev, unsigned int reg)
f19b2823 549{
8eaeb939
PU		 550 /* Register 0 is not readable */
551 if (!reg)
552 return false;
553 return true;
554}
555
c6f39257
MB		 556static bool twl6040_volatile_reg(struct device *dev, unsigned int reg)
557{
558 switch (reg) {
c7f9129d
PU		 559 case TWL6040_REG_ASICID:
560 case TWL6040_REG_ASICREV:
561 case TWL6040_REG_INTID:
562 case TWL6040_REG_LPPLLCTL:
563 case TWL6040_REG_HPPLLCTL:
564 case TWL6040_REG_STATUS:
565 return true;
566 default:
567 return false;
568 }
569}
570
571static bool twl6040_writeable_reg(struct device *dev, unsigned int reg)
572{
573 switch (reg) {
574 case TWL6040_REG_ASICID:
575 case TWL6040_REG_ASICREV:
576 case TWL6040_REG_STATUS:
c6f39257
MB		 577 return false;
578 default:
579 return true;
580 }
581}
582
de1e23f8 583static const struct regmap_config twl6040_regmap_config = {
8eaeb939
PU		 584 .reg_bits = 8,
585 .val_bits = 8,
c7f9129d
PU		 586
587 .reg_defaults = twl6040_defaults,
588 .num_reg_defaults = ARRAY_SIZE(twl6040_defaults),
589
8eaeb939
PU		 590 .max_register = TWL6040_REG_STATUS, /* 0x2e */
591
592 .readable_reg = twl6040_readable_reg,
c6f39257 593 .volatile_reg = twl6040_volatile_reg,
c7f9129d 594 .writeable_reg = twl6040_writeable_reg,
c6f39257
MB		 595
596 .cache_type = REGCACHE_RBTREE,
8eaeb939
PU		 597};
598
ab7edb14
PU		 599static const struct regmap_irq twl6040_irqs[] = {
600 { .reg_offset = 0, .mask = TWL6040_THINT, },
601 { .reg_offset = 0, .mask = TWL6040_PLUGINT | TWL6040_UNPLUGINT, },
602 { .reg_offset = 0, .mask = TWL6040_HOOKINT, },
603 { .reg_offset = 0, .mask = TWL6040_HFINT, },
604 { .reg_offset = 0, .mask = TWL6040_VIBINT, },
605 { .reg_offset = 0, .mask = TWL6040_READYINT, },
606};
607
608static struct regmap_irq_chip twl6040_irq_chip = {
609 .name = "twl6040",
610 .irqs = twl6040_irqs,
611 .num_irqs = ARRAY_SIZE(twl6040_irqs),
612
613 .num_regs = 1,
614 .status_base = TWL6040_REG_INTID,
615 .mask_base = TWL6040_REG_INTMR,
616};
617
612b95cd
GKH		 618static int twl6040_probe(struct i2c_client *client,
619 const struct i2c_device_id *id)
8eaeb939 620{
37e13cec 621 struct device_node *node = client->dev.of_node;
f19b2823
MLC		 622 struct twl6040 *twl6040;
623 struct mfd_cell *cell = NULL;
1f01d60e 624 int irq, ret, children = 0;
f19b2823 625
df04b624
PU		 626 if (!node) {
627 dev_err(&client->dev, "of node is missing\n");
f19b2823
MLC		 628 return -EINVAL;
629 }
630
d20e1d21 631 /* In order to operate correctly we need valid interrupt config */
6712419d 632 if (!client->irq) {
8eaeb939 633 dev_err(&client->dev, "Invalid IRQ configuration\n");
d20e1d21
PU		 634 return -EINVAL;
635 }
636
8eaeb939
PU		 637 twl6040 = devm_kzalloc(&client->dev, sizeof(struct twl6040),
638 GFP_KERNEL);
ecc8fa1c
PU		 639 if (!twl6040)
640 return -ENOMEM;
8eaeb939 641
bbf6adc1 642 twl6040->regmap = devm_regmap_init_i2c(client, &twl6040_regmap_config);
ecc8fa1c
PU		 643 if (IS_ERR(twl6040->regmap))
644 return PTR_ERR(twl6040->regmap);
f19b2823 645
8eaeb939 646 i2c_set_clientdata(client, twl6040);
f19b2823 647
68bab866
PU		 648 twl6040->clk32k = devm_clk_get(&client->dev, "clk32k");
649 if (IS_ERR(twl6040->clk32k)) {
650 dev_info(&client->dev, "clk32k is not handled\n");
651 twl6040->clk32k = NULL;
652 }
653
5af7df6b
PU		 654 twl6040->supplies[0].supply = "vio";
655 twl6040->supplies[1].supply = "v2v1";
990810b0 656 ret = devm_regulator_bulk_get(&client->dev, TWL6040_NUM_SUPPLIES,
37aefe9f 657 twl6040->supplies);
5af7df6b
PU		 658 if (ret != 0) {
659 dev_err(&client->dev, "Failed to get supplies: %d\n", ret);
501d609a 660 return ret;
5af7df6b
PU		 661 }
662
663 ret = regulator_bulk_enable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
664 if (ret != 0) {
665 dev_err(&client->dev, "Failed to enable supplies: %d\n", ret);
501d609a 666 return ret;
5af7df6b
PU		 667 }
668
8eaeb939
PU		 669 twl6040->dev = &client->dev;
670 twl6040->irq = client->irq;
f19b2823
MLC		 671
672 mutex_init(&twl6040->mutex);
f19b2823
MLC		 673 init_completion(&twl6040->ready);
674
006cea3a
PU		 675 regmap_register_patch(twl6040->regmap, twl6040_patch,
676 ARRAY_SIZE(twl6040_patch));
677
f19b2823 678 twl6040->rev = twl6040_reg_read(twl6040, TWL6040_REG_ASICREV);
89d68998
FV		 679 if (twl6040->rev < 0) {
680 dev_err(&client->dev, "Failed to read revision register: %d\n",
681 twl6040->rev);
f2b86781 682 ret = twl6040->rev;
89d68998
FV		 683 goto gpio_err;
684 }
f19b2823 685
77f63e06 686 /* ERRATA: Automatic power-up is not possible in ES1.0 */
df04b624
PU		 687 if (twl6040_get_revid(twl6040) > TWL6040_REV_ES1_0)
688 twl6040->audpwron = of_get_named_gpio(node,
689 "ti,audpwron-gpio", 0);
690 else
77f63e06
PU		 691 twl6040->audpwron = -EINVAL;
692
f19b2823 693 if (gpio_is_valid(twl6040->audpwron)) {
990810b0 694 ret = devm_gpio_request_one(&client->dev, twl6040->audpwron,
37aefe9f 695 GPIOF_OUT_INIT_LOW, "audpwron");
f19b2823 696 if (ret)
5af7df6b 697 goto gpio_err;
02d02728
PU		 698
699 /* Clear any pending interrupt */
700 twl6040_reg_read(twl6040, TWL6040_REG_INTID);
f19b2823
MLC		 701 }
702
37aefe9f 703 ret = regmap_add_irq_chip(twl6040->regmap, twl6040->irq, IRQF_ONESHOT,
c06f308a 704 0, &twl6040_irq_chip, &twl6040->irq_data);
ab7edb14 705 if (ret < 0)
990810b0 706 goto gpio_err;
d20e1d21 707
ab7edb14 708 twl6040->irq_ready = regmap_irq_get_virq(twl6040->irq_data,
37aefe9f 709 TWL6040_IRQ_READY);
ab7edb14 710 twl6040->irq_th = regmap_irq_get_virq(twl6040->irq_data,
37aefe9f 711 TWL6040_IRQ_TH);
ab7edb14 712
990810b0 713 ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_ready, NULL,
37aefe9f
PU		 714 twl6040_readyint_handler, IRQF_ONESHOT,
715 "twl6040_irq_ready", twl6040);
d20e1d21 716 if (ret) {
1ac96265
PU		 717 dev_err(twl6040->dev, "READY IRQ request failed: %d\n", ret);
718 goto readyirq_err;
719 }
720
990810b0 721 ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_th, NULL,
37aefe9f
PU		 722 twl6040_thint_handler, IRQF_ONESHOT,
723 "twl6040_irq_th", twl6040);
1ac96265
PU		 724 if (ret) {
725 dev_err(twl6040->dev, "Thermal IRQ request failed: %d\n", ret);
fc5ee96f 726 goto readyirq_err;
f19b2823
MLC		 727 }
728
1f01d60e
PU		 729 /*
730 * The main functionality of twl6040 to provide audio on OMAP4+ systems.
731 * We can add the ASoC codec child whenever this driver has been loaded.
1f01d60e 732 */
ab7edb14 733 irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_PLUG);
1f01d60e
PU		 734 cell = &twl6040->cells[children];
735 cell->name = "twl6040-codec";
736 twl6040_codec_rsrc[0].start = irq;
737 twl6040_codec_rsrc[0].end = irq;
738 cell->resources = twl6040_codec_rsrc;
739 cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc);
1f01d60e 740 children++;
f19b2823 741
df04b624
PU		 742 /* Vibra input driver support */
743 if (twl6040_has_vibra(node)) {
ab7edb14 744 irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_VIB);
0f962ae2 745
f19b2823
MLC		 746 cell = &twl6040->cells[children];
747 cell->name = "twl6040-vibra";
0f962ae2
PU		 748 twl6040_vibra_rsrc[0].start = irq;
749 twl6040_vibra_rsrc[0].end = irq;
750 cell->resources = twl6040_vibra_rsrc;
751 cell->num_resources = ARRAY_SIZE(twl6040_vibra_rsrc);
f19b2823
MLC		 752 children++;
753 }
754
df04b624
PU		 755 /* GPO support */
756 cell = &twl6040->cells[children];
757 cell->name = "twl6040-gpo";
758 children++;
5cbe786a 759
c7f9129d
PU		 760 /* The chip is powered down so mark regmap to cache only and dirty */
761 regcache_cache_only(twl6040->regmap, true);
762 regcache_mark_dirty(twl6040->regmap);
763
1f01d60e 764 ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children,
55692af5 765 NULL, 0, NULL);
1f01d60e 766 if (ret)
fc5ee96f 767 goto readyirq_err;
f19b2823
MLC		 768
769 return 0;
770
1ac96265 771readyirq_err:
ab7edb14 772 regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
5af7df6b
PU		 773gpio_err:
774 regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
f19b2823
MLC		 775 return ret;
776}
777
612b95cd 778static int twl6040_remove(struct i2c_client *client)
f19b2823 779{
8eaeb939 780 struct twl6040 *twl6040 = i2c_get_clientdata(client);
f19b2823
MLC		 781
782 if (twl6040->power_count)
783 twl6040_power(twl6040, 0);
784
ab7edb14 785 regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
f19b2823 786
8eaeb939 787 mfd_remove_devices(&client->dev);
f19b2823 788
5af7df6b 789 regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
5af7df6b 790
f19b2823
MLC		 791 return 0;
792}
793
8eaeb939
PU		 794static const struct i2c_device_id twl6040_i2c_id[] = {
795 { "twl6040", 0, },
1fc74aef 796 { "twl6041", 0, },
8eaeb939
PU		 797 { },
798};
799MODULE_DEVICE_TABLE(i2c, twl6040_i2c_id);
800
801static struct i2c_driver twl6040_driver = {
802 .driver = {
803 .name = "twl6040",
8eaeb939 804 },
f19b2823 805 .probe = twl6040_probe,
612b95cd 806 .remove = twl6040_remove,
8eaeb939 807 .id_table = twl6040_i2c_id,
f19b2823
MLC		 808};
809
8eaeb939 810module_i2c_driver(twl6040_driver);
f19b2823
MLC		 811
812MODULE_DESCRIPTION("TWL6040 MFD");
813MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
814MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>");
815MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)