Commit | Line | Data |
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f19b2823 MLC |
1 | /* |
2 | * MFD driver for TWL6040 audio device | |
3 | * | |
4 | * Authors: Misael Lopez Cruz <misael.lopez@ti.com> | |
5 | * Jorge Eduardo Candelaria <jorge.candelaria@ti.com> | |
6 | * Peter Ujfalusi <peter.ujfalusi@ti.com> | |
7 | * | |
8 | * Copyright: (C) 2011 Texas Instruments, Inc. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License version 2 as | |
12 | * published by the Free Software Foundation. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but | |
15 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
22 | * 02110-1301 USA | |
23 | * | |
24 | */ | |
25 | ||
26 | #include <linux/module.h> | |
27 | #include <linux/types.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/kernel.h> | |
5af7df6b | 30 | #include <linux/err.h> |
f19b2823 | 31 | #include <linux/platform_device.h> |
37e13cec PU |
32 | #include <linux/of.h> |
33 | #include <linux/of_irq.h> | |
34 | #include <linux/of_gpio.h> | |
35 | #include <linux/of_platform.h> | |
f19b2823 MLC |
36 | #include <linux/gpio.h> |
37 | #include <linux/delay.h> | |
8eaeb939 PU |
38 | #include <linux/i2c.h> |
39 | #include <linux/regmap.h> | |
f19b2823 MLC |
40 | #include <linux/mfd/core.h> |
41 | #include <linux/mfd/twl6040.h> | |
5af7df6b | 42 | #include <linux/regulator/consumer.h> |
f19b2823 | 43 | |
31b402e3 | 44 | #define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1) |
5af7df6b | 45 | #define TWL6040_NUM_SUPPLIES (2) |
31b402e3 | 46 | |
de1e23f8 | 47 | static const struct reg_default twl6040_defaults[] = { |
c7f9129d PU |
48 | { 0x01, 0x4B }, /* REG_ASICID (ro) */ |
49 | { 0x02, 0x00 }, /* REG_ASICREV (ro) */ | |
50 | { 0x03, 0x00 }, /* REG_INTID */ | |
51 | { 0x04, 0x00 }, /* REG_INTMR */ | |
52 | { 0x05, 0x00 }, /* REG_NCPCTRL */ | |
53 | { 0x06, 0x00 }, /* REG_LDOCTL */ | |
54 | { 0x07, 0x60 }, /* REG_HPPLLCTL */ | |
55 | { 0x08, 0x00 }, /* REG_LPPLLCTL */ | |
56 | { 0x09, 0x4A }, /* REG_LPPLLDIV */ | |
57 | { 0x0A, 0x00 }, /* REG_AMICBCTL */ | |
58 | { 0x0B, 0x00 }, /* REG_DMICBCTL */ | |
59 | { 0x0C, 0x00 }, /* REG_MICLCTL */ | |
60 | { 0x0D, 0x00 }, /* REG_MICRCTL */ | |
61 | { 0x0E, 0x00 }, /* REG_MICGAIN */ | |
62 | { 0x0F, 0x1B }, /* REG_LINEGAIN */ | |
63 | { 0x10, 0x00 }, /* REG_HSLCTL */ | |
64 | { 0x11, 0x00 }, /* REG_HSRCTL */ | |
65 | { 0x12, 0x00 }, /* REG_HSGAIN */ | |
66 | { 0x13, 0x00 }, /* REG_EARCTL */ | |
67 | { 0x14, 0x00 }, /* REG_HFLCTL */ | |
68 | { 0x15, 0x00 }, /* REG_HFLGAIN */ | |
69 | { 0x16, 0x00 }, /* REG_HFRCTL */ | |
70 | { 0x17, 0x00 }, /* REG_HFRGAIN */ | |
71 | { 0x18, 0x00 }, /* REG_VIBCTLL */ | |
72 | { 0x19, 0x00 }, /* REG_VIBDATL */ | |
73 | { 0x1A, 0x00 }, /* REG_VIBCTLR */ | |
74 | { 0x1B, 0x00 }, /* REG_VIBDATR */ | |
75 | { 0x1C, 0x00 }, /* REG_HKCTL1 */ | |
76 | { 0x1D, 0x00 }, /* REG_HKCTL2 */ | |
77 | { 0x1E, 0x00 }, /* REG_GPOCTL */ | |
78 | { 0x1F, 0x00 }, /* REG_ALB */ | |
79 | { 0x20, 0x00 }, /* REG_DLB */ | |
80 | /* 0x28, REG_TRIM1 */ | |
81 | /* 0x29, REG_TRIM2 */ | |
82 | /* 0x2A, REG_TRIM3 */ | |
83 | /* 0x2B, REG_HSOTRIM */ | |
84 | /* 0x2C, REG_HFOTRIM */ | |
85 | { 0x2D, 0x08 }, /* REG_ACCCTL */ | |
86 | { 0x2E, 0x00 }, /* REG_STATUS (ro) */ | |
87 | }; | |
88 | ||
8019ff6c | 89 | static struct reg_sequence twl6040_patch[] = { |
11e38e11 PU |
90 | /* |
91 | * Select I2C bus access to dual access registers | |
92 | * Interrupt register is cleared on read | |
93 | * Select fast mode for i2c (400KHz) | |
94 | */ | |
95 | { TWL6040_REG_ACCCTL, | |
96 | TWL6040_I2CSEL | TWL6040_INTCLRMODE | TWL6040_I2CMODE(1) }, | |
c7f9129d PU |
97 | }; |
98 | ||
99 | ||
85e9b13c | 100 | static bool twl6040_has_vibra(struct device_node *parent) |
ca2cad6a | 101 | { |
85e9b13c JH |
102 | struct device_node *node; |
103 | ||
104 | node = of_get_child_by_name(parent, "vibra"); | |
105 | if (node) { | |
106 | of_node_put(node); | |
ca2cad6a | 107 | return true; |
85e9b13c JH |
108 | } |
109 | ||
ca2cad6a SO |
110 | return false; |
111 | } | |
112 | ||
f19b2823 MLC |
113 | int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg) |
114 | { | |
115 | int ret; | |
8eaeb939 | 116 | unsigned int val; |
f19b2823 | 117 | |
c6f39257 MB |
118 | ret = regmap_read(twl6040->regmap, reg, &val); |
119 | if (ret < 0) | |
120 | return ret; | |
f19b2823 MLC |
121 | |
122 | return val; | |
123 | } | |
124 | EXPORT_SYMBOL(twl6040_reg_read); | |
125 | ||
126 | int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, u8 val) | |
127 | { | |
128 | int ret; | |
129 | ||
8eaeb939 | 130 | ret = regmap_write(twl6040->regmap, reg, val); |
f19b2823 MLC |
131 | |
132 | return ret; | |
133 | } | |
134 | EXPORT_SYMBOL(twl6040_reg_write); | |
135 | ||
136 | int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask) | |
137 | { | |
c600040f | 138 | return regmap_update_bits(twl6040->regmap, reg, mask, mask); |
f19b2823 MLC |
139 | } |
140 | EXPORT_SYMBOL(twl6040_set_bits); | |
141 | ||
142 | int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask) | |
143 | { | |
c600040f | 144 | return regmap_update_bits(twl6040->regmap, reg, mask, 0); |
f19b2823 MLC |
145 | } |
146 | EXPORT_SYMBOL(twl6040_clear_bits); | |
147 | ||
148 | /* twl6040 codec manual power-up sequence */ | |
f9be1343 | 149 | static int twl6040_power_up_manual(struct twl6040 *twl6040) |
f19b2823 MLC |
150 | { |
151 | u8 ldoctl, ncpctl, lppllctl; | |
152 | int ret; | |
153 | ||
154 | /* enable high-side LDO, reference system and internal oscillator */ | |
155 | ldoctl = TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA; | |
156 | ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl); | |
157 | if (ret) | |
158 | return ret; | |
159 | usleep_range(10000, 10500); | |
160 | ||
161 | /* enable negative charge pump */ | |
162 | ncpctl = TWL6040_NCPENA; | |
163 | ret = twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl); | |
164 | if (ret) | |
165 | goto ncp_err; | |
166 | usleep_range(1000, 1500); | |
167 | ||
168 | /* enable low-side LDO */ | |
169 | ldoctl |= TWL6040_LSLDOENA; | |
170 | ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl); | |
171 | if (ret) | |
172 | goto lsldo_err; | |
173 | usleep_range(1000, 1500); | |
174 | ||
175 | /* enable low-power PLL */ | |
176 | lppllctl = TWL6040_LPLLENA; | |
177 | ret = twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl); | |
178 | if (ret) | |
179 | goto lppll_err; | |
180 | usleep_range(5000, 5500); | |
181 | ||
182 | /* disable internal oscillator */ | |
183 | ldoctl &= ~TWL6040_OSCENA; | |
184 | ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl); | |
185 | if (ret) | |
186 | goto osc_err; | |
187 | ||
188 | return 0; | |
189 | ||
190 | osc_err: | |
191 | lppllctl &= ~TWL6040_LPLLENA; | |
192 | twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl); | |
193 | lppll_err: | |
194 | ldoctl &= ~TWL6040_LSLDOENA; | |
195 | twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl); | |
196 | lsldo_err: | |
197 | ncpctl &= ~TWL6040_NCPENA; | |
198 | twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl); | |
199 | ncp_err: | |
200 | ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA); | |
201 | twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl); | |
202 | ||
f9be1343 | 203 | dev_err(twl6040->dev, "manual power-up failed\n"); |
f19b2823 MLC |
204 | return ret; |
205 | } | |
206 | ||
207 | /* twl6040 manual power-down sequence */ | |
f9be1343 | 208 | static void twl6040_power_down_manual(struct twl6040 *twl6040) |
f19b2823 MLC |
209 | { |
210 | u8 ncpctl, ldoctl, lppllctl; | |
211 | ||
212 | ncpctl = twl6040_reg_read(twl6040, TWL6040_REG_NCPCTL); | |
213 | ldoctl = twl6040_reg_read(twl6040, TWL6040_REG_LDOCTL); | |
214 | lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL); | |
215 | ||
216 | /* enable internal oscillator */ | |
217 | ldoctl |= TWL6040_OSCENA; | |
218 | twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl); | |
219 | usleep_range(1000, 1500); | |
220 | ||
221 | /* disable low-power PLL */ | |
222 | lppllctl &= ~TWL6040_LPLLENA; | |
223 | twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl); | |
224 | ||
225 | /* disable low-side LDO */ | |
226 | ldoctl &= ~TWL6040_LSLDOENA; | |
227 | twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl); | |
228 | ||
229 | /* disable negative charge pump */ | |
230 | ncpctl &= ~TWL6040_NCPENA; | |
231 | twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl); | |
232 | ||
233 | /* disable high-side LDO, reference system and internal oscillator */ | |
234 | ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA); | |
235 | twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl); | |
236 | } | |
237 | ||
1ac96265 | 238 | static irqreturn_t twl6040_readyint_handler(int irq, void *data) |
f19b2823 MLC |
239 | { |
240 | struct twl6040 *twl6040 = data; | |
f19b2823 | 241 | |
1ac96265 | 242 | complete(&twl6040->ready); |
f19b2823 | 243 | |
1ac96265 PU |
244 | return IRQ_HANDLED; |
245 | } | |
f19b2823 | 246 | |
1ac96265 PU |
247 | static irqreturn_t twl6040_thint_handler(int irq, void *data) |
248 | { | |
249 | struct twl6040 *twl6040 = data; | |
250 | u8 status; | |
251 | ||
252 | status = twl6040_reg_read(twl6040, TWL6040_REG_STATUS); | |
253 | if (status & TWL6040_TSHUTDET) { | |
254 | dev_warn(twl6040->dev, "Thermal shutdown, powering-off"); | |
255 | twl6040_power(twl6040, 0); | |
256 | } else { | |
257 | dev_warn(twl6040->dev, "Leaving thermal shutdown, powering-on"); | |
258 | twl6040_power(twl6040, 1); | |
f19b2823 MLC |
259 | } |
260 | ||
261 | return IRQ_HANDLED; | |
262 | } | |
263 | ||
f9be1343 | 264 | static int twl6040_power_up_automatic(struct twl6040 *twl6040) |
f19b2823 MLC |
265 | { |
266 | int time_left; | |
f9be1343 PU |
267 | |
268 | gpio_set_value(twl6040->audpwron, 1); | |
f19b2823 MLC |
269 | |
270 | time_left = wait_for_completion_timeout(&twl6040->ready, | |
271 | msecs_to_jiffies(144)); | |
272 | if (!time_left) { | |
f9be1343 PU |
273 | u8 intid; |
274 | ||
275 | dev_warn(twl6040->dev, "timeout waiting for READYINT\n"); | |
f19b2823 MLC |
276 | intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID); |
277 | if (!(intid & TWL6040_READYINT)) { | |
f9be1343 PU |
278 | dev_err(twl6040->dev, "automatic power-up failed\n"); |
279 | gpio_set_value(twl6040->audpwron, 0); | |
f19b2823 MLC |
280 | return -ETIMEDOUT; |
281 | } | |
282 | } | |
283 | ||
284 | return 0; | |
285 | } | |
286 | ||
287 | int twl6040_power(struct twl6040 *twl6040, int on) | |
288 | { | |
f19b2823 MLC |
289 | int ret = 0; |
290 | ||
291 | mutex_lock(&twl6040->mutex); | |
292 | ||
293 | if (on) { | |
294 | /* already powered-up */ | |
295 | if (twl6040->power_count++) | |
296 | goto out; | |
297 | ||
32852bca JMC |
298 | ret = clk_prepare_enable(twl6040->clk32k); |
299 | if (ret) { | |
300 | twl6040->power_count = 0; | |
301 | goto out; | |
302 | } | |
68bab866 | 303 | |
c7f9129d PU |
304 | /* Allow writes to the chip */ |
305 | regcache_cache_only(twl6040->regmap, false); | |
306 | ||
f9be1343 PU |
307 | if (gpio_is_valid(twl6040->audpwron)) { |
308 | /* use automatic power-up sequence */ | |
309 | ret = twl6040_power_up_automatic(twl6040); | |
f19b2823 | 310 | if (ret) { |
d6441dc5 | 311 | clk_disable_unprepare(twl6040->clk32k); |
f19b2823 MLC |
312 | twl6040->power_count = 0; |
313 | goto out; | |
314 | } | |
315 | } else { | |
316 | /* use manual power-up sequence */ | |
f9be1343 | 317 | ret = twl6040_power_up_manual(twl6040); |
f19b2823 | 318 | if (ret) { |
d6441dc5 | 319 | clk_disable_unprepare(twl6040->clk32k); |
f19b2823 MLC |
320 | twl6040->power_count = 0; |
321 | goto out; | |
322 | } | |
323 | } | |
c7f9129d PU |
324 | |
325 | /* Sync with the HW */ | |
326 | regcache_sync(twl6040->regmap); | |
327 | ||
cfb7a33b PU |
328 | /* Default PLL configuration after power up */ |
329 | twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL; | |
0a58da1e | 330 | twl6040->sysclk_rate = 19200000; |
f19b2823 MLC |
331 | } else { |
332 | /* already powered-down */ | |
333 | if (!twl6040->power_count) { | |
2d7c957e | 334 | dev_err(twl6040->dev, |
f19b2823 MLC |
335 | "device is already powered-off\n"); |
336 | ret = -EPERM; | |
337 | goto out; | |
338 | } | |
339 | ||
340 | if (--twl6040->power_count) | |
341 | goto out; | |
342 | ||
f9be1343 | 343 | if (gpio_is_valid(twl6040->audpwron)) { |
f19b2823 | 344 | /* use AUDPWRON line */ |
f9be1343 | 345 | gpio_set_value(twl6040->audpwron, 0); |
f19b2823 MLC |
346 | |
347 | /* power-down sequence latency */ | |
348 | usleep_range(500, 700); | |
349 | } else { | |
350 | /* use manual power-down sequence */ | |
f9be1343 | 351 | twl6040_power_down_manual(twl6040); |
f19b2823 | 352 | } |
c7f9129d PU |
353 | |
354 | /* Set regmap to cache only and mark it as dirty */ | |
355 | regcache_cache_only(twl6040->regmap, true); | |
356 | regcache_mark_dirty(twl6040->regmap); | |
357 | ||
0a58da1e PU |
358 | twl6040->sysclk_rate = 0; |
359 | ||
360 | if (twl6040->pll == TWL6040_SYSCLK_SEL_HPPLL) { | |
361 | clk_disable_unprepare(twl6040->mclk); | |
362 | twl6040->mclk_rate = 0; | |
363 | } | |
68bab866 PU |
364 | |
365 | clk_disable_unprepare(twl6040->clk32k); | |
f19b2823 MLC |
366 | } |
367 | ||
368 | out: | |
369 | mutex_unlock(&twl6040->mutex); | |
370 | return ret; | |
371 | } | |
372 | EXPORT_SYMBOL(twl6040_power); | |
373 | ||
cfb7a33b | 374 | int twl6040_set_pll(struct twl6040 *twl6040, int pll_id, |
f19b2823 MLC |
375 | unsigned int freq_in, unsigned int freq_out) |
376 | { | |
377 | u8 hppllctl, lppllctl; | |
378 | int ret = 0; | |
379 | ||
380 | mutex_lock(&twl6040->mutex); | |
381 | ||
382 | hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL); | |
383 | lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL); | |
384 | ||
2bd05db7 PU |
385 | /* Force full reconfiguration when switching between PLL */ |
386 | if (pll_id != twl6040->pll) { | |
0a58da1e PU |
387 | twl6040->sysclk_rate = 0; |
388 | twl6040->mclk_rate = 0; | |
2bd05db7 PU |
389 | } |
390 | ||
cfb7a33b PU |
391 | switch (pll_id) { |
392 | case TWL6040_SYSCLK_SEL_LPPLL: | |
f19b2823 | 393 | /* low-power PLL divider */ |
2bd05db7 | 394 | /* Change the sysclk configuration only if it has been canged */ |
0a58da1e | 395 | if (twl6040->sysclk_rate != freq_out) { |
2bd05db7 PU |
396 | switch (freq_out) { |
397 | case 17640000: | |
398 | lppllctl |= TWL6040_LPLLFIN; | |
399 | break; | |
400 | case 19200000: | |
401 | lppllctl &= ~TWL6040_LPLLFIN; | |
402 | break; | |
403 | default: | |
404 | dev_err(twl6040->dev, | |
405 | "freq_out %d not supported\n", | |
406 | freq_out); | |
407 | ret = -EINVAL; | |
408 | goto pll_out; | |
409 | } | |
410 | twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, | |
411 | lppllctl); | |
f19b2823 | 412 | } |
2bd05db7 PU |
413 | |
414 | /* The PLL in use has not been change, we can exit */ | |
415 | if (twl6040->pll == pll_id) | |
416 | break; | |
f19b2823 MLC |
417 | |
418 | switch (freq_in) { | |
419 | case 32768: | |
420 | lppllctl |= TWL6040_LPLLENA; | |
421 | twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, | |
422 | lppllctl); | |
423 | mdelay(5); | |
424 | lppllctl &= ~TWL6040_HPLLSEL; | |
425 | twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, | |
426 | lppllctl); | |
427 | hppllctl &= ~TWL6040_HPLLENA; | |
428 | twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL, | |
429 | hppllctl); | |
430 | break; | |
431 | default: | |
2d7c957e | 432 | dev_err(twl6040->dev, |
f19b2823 MLC |
433 | "freq_in %d not supported\n", freq_in); |
434 | ret = -EINVAL; | |
435 | goto pll_out; | |
436 | } | |
0a58da1e PU |
437 | |
438 | clk_disable_unprepare(twl6040->mclk); | |
f19b2823 | 439 | break; |
cfb7a33b | 440 | case TWL6040_SYSCLK_SEL_HPPLL: |
f19b2823 MLC |
441 | /* high-performance PLL can provide only 19.2 MHz */ |
442 | if (freq_out != 19200000) { | |
2d7c957e | 443 | dev_err(twl6040->dev, |
f19b2823 MLC |
444 | "freq_out %d not supported\n", freq_out); |
445 | ret = -EINVAL; | |
446 | goto pll_out; | |
447 | } | |
448 | ||
0a58da1e | 449 | if (twl6040->mclk_rate != freq_in) { |
2bd05db7 PU |
450 | hppllctl &= ~TWL6040_MCLK_MSK; |
451 | ||
452 | switch (freq_in) { | |
453 | case 12000000: | |
454 | /* PLL enabled, active mode */ | |
455 | hppllctl |= TWL6040_MCLK_12000KHZ | | |
456 | TWL6040_HPLLENA; | |
457 | break; | |
458 | case 19200000: | |
ac8320c4 PU |
459 | /* PLL enabled, bypass mode */ |
460 | hppllctl |= TWL6040_MCLK_19200KHZ | | |
461 | TWL6040_HPLLBP | TWL6040_HPLLENA; | |
2bd05db7 PU |
462 | break; |
463 | case 26000000: | |
464 | /* PLL enabled, active mode */ | |
465 | hppllctl |= TWL6040_MCLK_26000KHZ | | |
466 | TWL6040_HPLLENA; | |
467 | break; | |
468 | case 38400000: | |
ac8320c4 | 469 | /* PLL enabled, bypass mode */ |
2bd05db7 | 470 | hppllctl |= TWL6040_MCLK_38400KHZ | |
ac8320c4 | 471 | TWL6040_HPLLBP | TWL6040_HPLLENA; |
2bd05db7 PU |
472 | break; |
473 | default: | |
474 | dev_err(twl6040->dev, | |
475 | "freq_in %d not supported\n", freq_in); | |
476 | ret = -EINVAL; | |
477 | goto pll_out; | |
478 | } | |
f19b2823 | 479 | |
0a58da1e PU |
480 | /* When switching to HPPLL, enable the mclk first */ |
481 | if (pll_id != twl6040->pll) | |
482 | clk_prepare_enable(twl6040->mclk); | |
f19b2823 | 483 | /* |
2bd05db7 PU |
484 | * enable clock slicer to ensure input waveform is |
485 | * square | |
f19b2823 | 486 | */ |
2bd05db7 | 487 | hppllctl |= TWL6040_HPLLSQRENA; |
f19b2823 | 488 | |
2bd05db7 PU |
489 | twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL, |
490 | hppllctl); | |
491 | usleep_range(500, 700); | |
492 | lppllctl |= TWL6040_HPLLSEL; | |
493 | twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, | |
494 | lppllctl); | |
495 | lppllctl &= ~TWL6040_LPLLENA; | |
496 | twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, | |
497 | lppllctl); | |
0a58da1e PU |
498 | |
499 | twl6040->mclk_rate = freq_in; | |
2bd05db7 | 500 | } |
f19b2823 MLC |
501 | break; |
502 | default: | |
2d7c957e | 503 | dev_err(twl6040->dev, "unknown pll id %d\n", pll_id); |
f19b2823 MLC |
504 | ret = -EINVAL; |
505 | goto pll_out; | |
506 | } | |
507 | ||
0a58da1e | 508 | twl6040->sysclk_rate = freq_out; |
cfb7a33b | 509 | twl6040->pll = pll_id; |
f19b2823 MLC |
510 | |
511 | pll_out: | |
512 | mutex_unlock(&twl6040->mutex); | |
513 | return ret; | |
514 | } | |
515 | EXPORT_SYMBOL(twl6040_set_pll); | |
516 | ||
cfb7a33b | 517 | int twl6040_get_pll(struct twl6040 *twl6040) |
f19b2823 | 518 | { |
cfb7a33b PU |
519 | if (twl6040->power_count) |
520 | return twl6040->pll; | |
521 | else | |
522 | return -ENODEV; | |
f19b2823 MLC |
523 | } |
524 | EXPORT_SYMBOL(twl6040_get_pll); | |
525 | ||
526 | unsigned int twl6040_get_sysclk(struct twl6040 *twl6040) | |
527 | { | |
0a58da1e | 528 | return twl6040->sysclk_rate; |
f19b2823 MLC |
529 | } |
530 | EXPORT_SYMBOL(twl6040_get_sysclk); | |
531 | ||
70601ec1 PU |
532 | /* Get the combined status of the vibra control register */ |
533 | int twl6040_get_vibralr_status(struct twl6040 *twl6040) | |
534 | { | |
c6f39257 MB |
535 | unsigned int reg; |
536 | int ret; | |
70601ec1 PU |
537 | u8 status; |
538 | ||
c6f39257 MB |
539 | ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLL, ®); |
540 | if (ret != 0) | |
541 | return ret; | |
542 | status = reg; | |
543 | ||
544 | ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLR, ®); | |
545 | if (ret != 0) | |
546 | return ret; | |
547 | status |= reg; | |
548 | ||
70601ec1 PU |
549 | status &= (TWL6040_VIBENA | TWL6040_VIBSEL); |
550 | ||
551 | return status; | |
552 | } | |
553 | EXPORT_SYMBOL(twl6040_get_vibralr_status); | |
554 | ||
0f962ae2 PU |
555 | static struct resource twl6040_vibra_rsrc[] = { |
556 | { | |
557 | .flags = IORESOURCE_IRQ, | |
558 | }, | |
559 | }; | |
560 | ||
561 | static struct resource twl6040_codec_rsrc[] = { | |
562 | { | |
563 | .flags = IORESOURCE_IRQ, | |
564 | }, | |
565 | }; | |
566 | ||
8eaeb939 | 567 | static bool twl6040_readable_reg(struct device *dev, unsigned int reg) |
f19b2823 | 568 | { |
8eaeb939 PU |
569 | /* Register 0 is not readable */ |
570 | if (!reg) | |
571 | return false; | |
572 | return true; | |
573 | } | |
574 | ||
c6f39257 MB |
575 | static bool twl6040_volatile_reg(struct device *dev, unsigned int reg) |
576 | { | |
577 | switch (reg) { | |
c7f9129d PU |
578 | case TWL6040_REG_ASICID: |
579 | case TWL6040_REG_ASICREV: | |
580 | case TWL6040_REG_INTID: | |
581 | case TWL6040_REG_LPPLLCTL: | |
582 | case TWL6040_REG_HPPLLCTL: | |
583 | case TWL6040_REG_STATUS: | |
584 | return true; | |
585 | default: | |
586 | return false; | |
587 | } | |
588 | } | |
589 | ||
590 | static bool twl6040_writeable_reg(struct device *dev, unsigned int reg) | |
591 | { | |
592 | switch (reg) { | |
593 | case TWL6040_REG_ASICID: | |
594 | case TWL6040_REG_ASICREV: | |
595 | case TWL6040_REG_STATUS: | |
c6f39257 MB |
596 | return false; |
597 | default: | |
598 | return true; | |
599 | } | |
600 | } | |
601 | ||
de1e23f8 | 602 | static const struct regmap_config twl6040_regmap_config = { |
8eaeb939 PU |
603 | .reg_bits = 8, |
604 | .val_bits = 8, | |
c7f9129d PU |
605 | |
606 | .reg_defaults = twl6040_defaults, | |
607 | .num_reg_defaults = ARRAY_SIZE(twl6040_defaults), | |
608 | ||
8eaeb939 PU |
609 | .max_register = TWL6040_REG_STATUS, /* 0x2e */ |
610 | ||
611 | .readable_reg = twl6040_readable_reg, | |
c6f39257 | 612 | .volatile_reg = twl6040_volatile_reg, |
c7f9129d | 613 | .writeable_reg = twl6040_writeable_reg, |
c6f39257 MB |
614 | |
615 | .cache_type = REGCACHE_RBTREE, | |
c78cb178 | 616 | .use_single_rw = true, |
8eaeb939 PU |
617 | }; |
618 | ||
ab7edb14 PU |
619 | static const struct regmap_irq twl6040_irqs[] = { |
620 | { .reg_offset = 0, .mask = TWL6040_THINT, }, | |
621 | { .reg_offset = 0, .mask = TWL6040_PLUGINT | TWL6040_UNPLUGINT, }, | |
622 | { .reg_offset = 0, .mask = TWL6040_HOOKINT, }, | |
623 | { .reg_offset = 0, .mask = TWL6040_HFINT, }, | |
624 | { .reg_offset = 0, .mask = TWL6040_VIBINT, }, | |
625 | { .reg_offset = 0, .mask = TWL6040_READYINT, }, | |
626 | }; | |
627 | ||
628 | static struct regmap_irq_chip twl6040_irq_chip = { | |
629 | .name = "twl6040", | |
630 | .irqs = twl6040_irqs, | |
631 | .num_irqs = ARRAY_SIZE(twl6040_irqs), | |
632 | ||
633 | .num_regs = 1, | |
634 | .status_base = TWL6040_REG_INTID, | |
635 | .mask_base = TWL6040_REG_INTMR, | |
636 | }; | |
637 | ||
612b95cd GKH |
638 | static int twl6040_probe(struct i2c_client *client, |
639 | const struct i2c_device_id *id) | |
8eaeb939 | 640 | { |
37e13cec | 641 | struct device_node *node = client->dev.of_node; |
f19b2823 MLC |
642 | struct twl6040 *twl6040; |
643 | struct mfd_cell *cell = NULL; | |
1f01d60e | 644 | int irq, ret, children = 0; |
f19b2823 | 645 | |
df04b624 PU |
646 | if (!node) { |
647 | dev_err(&client->dev, "of node is missing\n"); | |
f19b2823 MLC |
648 | return -EINVAL; |
649 | } | |
650 | ||
d20e1d21 | 651 | /* In order to operate correctly we need valid interrupt config */ |
6712419d | 652 | if (!client->irq) { |
8eaeb939 | 653 | dev_err(&client->dev, "Invalid IRQ configuration\n"); |
d20e1d21 PU |
654 | return -EINVAL; |
655 | } | |
656 | ||
8eaeb939 PU |
657 | twl6040 = devm_kzalloc(&client->dev, sizeof(struct twl6040), |
658 | GFP_KERNEL); | |
ecc8fa1c PU |
659 | if (!twl6040) |
660 | return -ENOMEM; | |
8eaeb939 | 661 | |
bbf6adc1 | 662 | twl6040->regmap = devm_regmap_init_i2c(client, &twl6040_regmap_config); |
ecc8fa1c PU |
663 | if (IS_ERR(twl6040->regmap)) |
664 | return PTR_ERR(twl6040->regmap); | |
f19b2823 | 665 | |
8eaeb939 | 666 | i2c_set_clientdata(client, twl6040); |
f19b2823 | 667 | |
68bab866 PU |
668 | twl6040->clk32k = devm_clk_get(&client->dev, "clk32k"); |
669 | if (IS_ERR(twl6040->clk32k)) { | |
75c08f17 TL |
670 | if (PTR_ERR(twl6040->clk32k) == -EPROBE_DEFER) |
671 | return -EPROBE_DEFER; | |
0a58da1e | 672 | dev_dbg(&client->dev, "clk32k is not handled\n"); |
68bab866 PU |
673 | twl6040->clk32k = NULL; |
674 | } | |
675 | ||
0a58da1e PU |
676 | twl6040->mclk = devm_clk_get(&client->dev, "mclk"); |
677 | if (IS_ERR(twl6040->mclk)) { | |
678 | if (PTR_ERR(twl6040->mclk) == -EPROBE_DEFER) | |
679 | return -EPROBE_DEFER; | |
680 | dev_dbg(&client->dev, "mclk is not handled\n"); | |
681 | twl6040->mclk = NULL; | |
682 | } | |
683 | ||
5af7df6b PU |
684 | twl6040->supplies[0].supply = "vio"; |
685 | twl6040->supplies[1].supply = "v2v1"; | |
990810b0 | 686 | ret = devm_regulator_bulk_get(&client->dev, TWL6040_NUM_SUPPLIES, |
37aefe9f | 687 | twl6040->supplies); |
5af7df6b PU |
688 | if (ret != 0) { |
689 | dev_err(&client->dev, "Failed to get supplies: %d\n", ret); | |
501d609a | 690 | return ret; |
5af7df6b PU |
691 | } |
692 | ||
693 | ret = regulator_bulk_enable(TWL6040_NUM_SUPPLIES, twl6040->supplies); | |
694 | if (ret != 0) { | |
695 | dev_err(&client->dev, "Failed to enable supplies: %d\n", ret); | |
501d609a | 696 | return ret; |
5af7df6b PU |
697 | } |
698 | ||
8eaeb939 PU |
699 | twl6040->dev = &client->dev; |
700 | twl6040->irq = client->irq; | |
f19b2823 MLC |
701 | |
702 | mutex_init(&twl6040->mutex); | |
f19b2823 MLC |
703 | init_completion(&twl6040->ready); |
704 | ||
006cea3a PU |
705 | regmap_register_patch(twl6040->regmap, twl6040_patch, |
706 | ARRAY_SIZE(twl6040_patch)); | |
707 | ||
f19b2823 | 708 | twl6040->rev = twl6040_reg_read(twl6040, TWL6040_REG_ASICREV); |
89d68998 FV |
709 | if (twl6040->rev < 0) { |
710 | dev_err(&client->dev, "Failed to read revision register: %d\n", | |
711 | twl6040->rev); | |
f2b86781 | 712 | ret = twl6040->rev; |
89d68998 FV |
713 | goto gpio_err; |
714 | } | |
f19b2823 | 715 | |
77f63e06 | 716 | /* ERRATA: Automatic power-up is not possible in ES1.0 */ |
df04b624 PU |
717 | if (twl6040_get_revid(twl6040) > TWL6040_REV_ES1_0) |
718 | twl6040->audpwron = of_get_named_gpio(node, | |
719 | "ti,audpwron-gpio", 0); | |
720 | else | |
77f63e06 PU |
721 | twl6040->audpwron = -EINVAL; |
722 | ||
f19b2823 | 723 | if (gpio_is_valid(twl6040->audpwron)) { |
990810b0 | 724 | ret = devm_gpio_request_one(&client->dev, twl6040->audpwron, |
37aefe9f | 725 | GPIOF_OUT_INIT_LOW, "audpwron"); |
f19b2823 | 726 | if (ret) |
5af7df6b | 727 | goto gpio_err; |
02d02728 PU |
728 | |
729 | /* Clear any pending interrupt */ | |
730 | twl6040_reg_read(twl6040, TWL6040_REG_INTID); | |
f19b2823 MLC |
731 | } |
732 | ||
37aefe9f | 733 | ret = regmap_add_irq_chip(twl6040->regmap, twl6040->irq, IRQF_ONESHOT, |
c06f308a | 734 | 0, &twl6040_irq_chip, &twl6040->irq_data); |
ab7edb14 | 735 | if (ret < 0) |
990810b0 | 736 | goto gpio_err; |
d20e1d21 | 737 | |
ab7edb14 | 738 | twl6040->irq_ready = regmap_irq_get_virq(twl6040->irq_data, |
37aefe9f | 739 | TWL6040_IRQ_READY); |
ab7edb14 | 740 | twl6040->irq_th = regmap_irq_get_virq(twl6040->irq_data, |
37aefe9f | 741 | TWL6040_IRQ_TH); |
ab7edb14 | 742 | |
990810b0 | 743 | ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_ready, NULL, |
37aefe9f PU |
744 | twl6040_readyint_handler, IRQF_ONESHOT, |
745 | "twl6040_irq_ready", twl6040); | |
d20e1d21 | 746 | if (ret) { |
1ac96265 PU |
747 | dev_err(twl6040->dev, "READY IRQ request failed: %d\n", ret); |
748 | goto readyirq_err; | |
749 | } | |
750 | ||
990810b0 | 751 | ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_th, NULL, |
37aefe9f PU |
752 | twl6040_thint_handler, IRQF_ONESHOT, |
753 | "twl6040_irq_th", twl6040); | |
1ac96265 PU |
754 | if (ret) { |
755 | dev_err(twl6040->dev, "Thermal IRQ request failed: %d\n", ret); | |
fc5ee96f | 756 | goto readyirq_err; |
f19b2823 MLC |
757 | } |
758 | ||
1f01d60e PU |
759 | /* |
760 | * The main functionality of twl6040 to provide audio on OMAP4+ systems. | |
761 | * We can add the ASoC codec child whenever this driver has been loaded. | |
1f01d60e | 762 | */ |
ab7edb14 | 763 | irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_PLUG); |
1f01d60e PU |
764 | cell = &twl6040->cells[children]; |
765 | cell->name = "twl6040-codec"; | |
766 | twl6040_codec_rsrc[0].start = irq; | |
767 | twl6040_codec_rsrc[0].end = irq; | |
768 | cell->resources = twl6040_codec_rsrc; | |
769 | cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc); | |
1f01d60e | 770 | children++; |
f19b2823 | 771 | |
df04b624 PU |
772 | /* Vibra input driver support */ |
773 | if (twl6040_has_vibra(node)) { | |
ab7edb14 | 774 | irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_VIB); |
0f962ae2 | 775 | |
f19b2823 MLC |
776 | cell = &twl6040->cells[children]; |
777 | cell->name = "twl6040-vibra"; | |
0f962ae2 PU |
778 | twl6040_vibra_rsrc[0].start = irq; |
779 | twl6040_vibra_rsrc[0].end = irq; | |
780 | cell->resources = twl6040_vibra_rsrc; | |
781 | cell->num_resources = ARRAY_SIZE(twl6040_vibra_rsrc); | |
f19b2823 MLC |
782 | children++; |
783 | } | |
784 | ||
df04b624 PU |
785 | /* GPO support */ |
786 | cell = &twl6040->cells[children]; | |
787 | cell->name = "twl6040-gpo"; | |
788 | children++; | |
5cbe786a | 789 | |
0133d323 PU |
790 | /* PDM clock support */ |
791 | cell = &twl6040->cells[children]; | |
792 | cell->name = "twl6040-pdmclk"; | |
793 | children++; | |
794 | ||
c7f9129d PU |
795 | /* The chip is powered down so mark regmap to cache only and dirty */ |
796 | regcache_cache_only(twl6040->regmap, true); | |
797 | regcache_mark_dirty(twl6040->regmap); | |
798 | ||
1f01d60e | 799 | ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children, |
55692af5 | 800 | NULL, 0, NULL); |
1f01d60e | 801 | if (ret) |
fc5ee96f | 802 | goto readyirq_err; |
f19b2823 MLC |
803 | |
804 | return 0; | |
805 | ||
1ac96265 | 806 | readyirq_err: |
ab7edb14 | 807 | regmap_del_irq_chip(twl6040->irq, twl6040->irq_data); |
5af7df6b PU |
808 | gpio_err: |
809 | regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies); | |
f19b2823 MLC |
810 | return ret; |
811 | } | |
812 | ||
612b95cd | 813 | static int twl6040_remove(struct i2c_client *client) |
f19b2823 | 814 | { |
8eaeb939 | 815 | struct twl6040 *twl6040 = i2c_get_clientdata(client); |
f19b2823 MLC |
816 | |
817 | if (twl6040->power_count) | |
818 | twl6040_power(twl6040, 0); | |
819 | ||
ab7edb14 | 820 | regmap_del_irq_chip(twl6040->irq, twl6040->irq_data); |
f19b2823 | 821 | |
8eaeb939 | 822 | mfd_remove_devices(&client->dev); |
f19b2823 | 823 | |
5af7df6b | 824 | regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies); |
5af7df6b | 825 | |
f19b2823 MLC |
826 | return 0; |
827 | } | |
828 | ||
8eaeb939 PU |
829 | static const struct i2c_device_id twl6040_i2c_id[] = { |
830 | { "twl6040", 0, }, | |
1fc74aef | 831 | { "twl6041", 0, }, |
8eaeb939 PU |
832 | { }, |
833 | }; | |
834 | MODULE_DEVICE_TABLE(i2c, twl6040_i2c_id); | |
835 | ||
836 | static struct i2c_driver twl6040_driver = { | |
837 | .driver = { | |
838 | .name = "twl6040", | |
8eaeb939 | 839 | }, |
f19b2823 | 840 | .probe = twl6040_probe, |
612b95cd | 841 | .remove = twl6040_remove, |
8eaeb939 | 842 | .id_table = twl6040_i2c_id, |
f19b2823 MLC |
843 | }; |
844 | ||
8eaeb939 | 845 | module_i2c_driver(twl6040_driver); |
f19b2823 MLC |
846 | |
847 | MODULE_DESCRIPTION("TWL6040 MFD"); | |
848 | MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>"); | |
849 | MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>"); | |
850 | MODULE_LICENSE("GPL"); |