Merge branch 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur...
[linux-2.6-block.git] / drivers / mfd / twl6030-irq.c
CommitLineData
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1/*
2 * twl6030-irq.c - TWL6030 irq support
3 *
4 * Copyright (C) 2005-2009 Texas Instruments, Inc.
5 *
6 * Modifications to defer interrupt handling to a kernel thread:
7 * Copyright (C) 2006 MontaVista Software, Inc.
8 *
9 * Based on tlv320aic23.c:
10 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
11 *
12 * Code cleanup and modifications to IRQ handler.
13 * by syed khasim <x0khasim@ti.com>
14 *
15 * TWL6030 specific code and IRQ handling changes by
16 * Jagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com>
17 * Balaji T K <balajitk@ti.com>
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License as published by
21 * the Free Software Foundation; either version 2 of the License, or
22 * (at your option) any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 *
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 */
33
34#include <linux/init.h>
5d4a357d 35#include <linux/export.h>
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36#include <linux/interrupt.h>
37#include <linux/irq.h>
38#include <linux/kthread.h>
39#include <linux/i2c/twl.h>
72f2e2c7 40#include <linux/platform_device.h>
ab2b9260 41#include <linux/suspend.h>
e8deb28c 42
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43#include "twl-core.h"
44
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45/*
46 * TWL6030 (unlike its predecessors, which had two level interrupt handling)
47 * three interrupt registers INT_STS_A, INT_STS_B and INT_STS_C.
48 * It exposes status bits saying who has raised an interrupt. There are
49 * three mask registers that corresponds to these status registers, that
50 * enables/disables these interrupts.
51 *
52 * We set up IRQs starting at a platform-specified base. An interrupt map table,
53 * specifies mapping between interrupt number and the associated module.
54 *
55 */
56
57static int twl6030_interrupt_mapping[24] = {
58 PWR_INTR_OFFSET, /* Bit 0 PWRON */
59 PWR_INTR_OFFSET, /* Bit 1 RPWRON */
60 PWR_INTR_OFFSET, /* Bit 2 BAT_VLOW */
61 RTC_INTR_OFFSET, /* Bit 3 RTC_ALARM */
62 RTC_INTR_OFFSET, /* Bit 4 RTC_PERIOD */
63 HOTDIE_INTR_OFFSET, /* Bit 5 HOT_DIE */
64 SMPSLDO_INTR_OFFSET, /* Bit 6 VXXX_SHORT */
65 SMPSLDO_INTR_OFFSET, /* Bit 7 VMMC_SHORT */
66
67 SMPSLDO_INTR_OFFSET, /* Bit 8 VUSIM_SHORT */
68 BATDETECT_INTR_OFFSET, /* Bit 9 BAT */
69 SIMDETECT_INTR_OFFSET, /* Bit 10 SIM */
70 MMCDETECT_INTR_OFFSET, /* Bit 11 MMC */
71 RSV_INTR_OFFSET, /* Bit 12 Reserved */
72 MADC_INTR_OFFSET, /* Bit 13 GPADC_RT_EOC */
73 MADC_INTR_OFFSET, /* Bit 14 GPADC_SW_EOC */
74 GASGAUGE_INTR_OFFSET, /* Bit 15 CC_AUTOCAL */
75
76 USBOTG_INTR_OFFSET, /* Bit 16 ID_WKUP */
77 USBOTG_INTR_OFFSET, /* Bit 17 VBUS_WKUP */
78 USBOTG_INTR_OFFSET, /* Bit 18 ID */
77b1d3fa 79 USB_PRES_INTR_OFFSET, /* Bit 19 VBUS */
e8deb28c 80 CHARGER_INTR_OFFSET, /* Bit 20 CHRG_CTRL */
6523b148
GG
81 CHARGERFAULT_INTR_OFFSET, /* Bit 21 EXT_CHRG */
82 CHARGERFAULT_INTR_OFFSET, /* Bit 22 INT_CHRG */
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83 RSV_INTR_OFFSET, /* Bit 23 Reserved */
84};
85/*----------------------------------------------------------------------*/
86
87static unsigned twl6030_irq_base;
ab2b9260
TP
88static int twl_irq;
89static bool twl_irq_wake_enabled;
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90
91static struct completion irq_event;
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92static atomic_t twl6030_wakeirqs = ATOMIC_INIT(0);
93
94static int twl6030_irq_pm_notifier(struct notifier_block *notifier,
95 unsigned long pm_event, void *unused)
96{
97 int chained_wakeups;
98
99 switch (pm_event) {
100 case PM_SUSPEND_PREPARE:
101 chained_wakeups = atomic_read(&twl6030_wakeirqs);
102
103 if (chained_wakeups && !twl_irq_wake_enabled) {
104 if (enable_irq_wake(twl_irq))
105 pr_err("twl6030 IRQ wake enable failed\n");
106 else
107 twl_irq_wake_enabled = true;
108 } else if (!chained_wakeups && twl_irq_wake_enabled) {
109 disable_irq_wake(twl_irq);
110 twl_irq_wake_enabled = false;
111 }
112
782baa20 113 disable_irq(twl_irq);
ab2b9260 114 break;
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TP
115
116 case PM_POST_SUSPEND:
117 enable_irq(twl_irq);
118 break;
119
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TP
120 default:
121 break;
122 }
123
124 return NOTIFY_DONE;
125}
126
127static struct notifier_block twl6030_irq_pm_notifier_block = {
128 .notifier_call = twl6030_irq_pm_notifier,
129};
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130
131/*
132 * This thread processes interrupts reported by the Primary Interrupt Handler.
133 */
134static int twl6030_irq_thread(void *data)
135{
136 long irq = (long)data;
137 static unsigned i2c_errors;
138 static const unsigned max_i2c_errors = 100;
139 int ret;
140
141 current->flags |= PF_NOFREEZE;
142
143 while (!kthread_should_stop()) {
144 int i;
145 union {
146 u8 bytes[4];
147 u32 int_sts;
148 } sts;
149
150 /* Wait for IRQ, then read PIH irq status (also blocking) */
151 wait_for_completion_interruptible(&irq_event);
152
153 /* read INT_STS_A, B and C in one shot using a burst read */
154 ret = twl_i2c_read(TWL_MODULE_PIH, sts.bytes,
155 REG_INT_STS_A, 3);
156 if (ret) {
157 pr_warning("twl6030: I2C error %d reading PIH ISR\n",
158 ret);
159 if (++i2c_errors >= max_i2c_errors) {
160 printk(KERN_ERR "Maximum I2C error count"
161 " exceeded. Terminating %s.\n",
162 __func__);
163 break;
164 }
165 complete(&irq_event);
166 continue;
167 }
168
169
170
171 sts.bytes[3] = 0; /* Only 24 bits are valid*/
172
77b1d3fa
HH
173 /*
174 * Since VBUS status bit is not reliable for VBUS disconnect
175 * use CHARGER VBUS detection status bit instead.
176 */
177 if (sts.bytes[2] & 0x10)
178 sts.bytes[2] |= 0x08;
179
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180 for (i = 0; sts.int_sts; sts.int_sts >>= 1, i++) {
181 local_irq_disable();
182 if (sts.int_sts & 0x1) {
183 int module_irq = twl6030_irq_base +
184 twl6030_interrupt_mapping[i];
c22435a3 185 generic_handle_irq(module_irq);
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186
187 }
188 local_irq_enable();
189 }
190 ret = twl_i2c_write(TWL_MODULE_PIH, sts.bytes,
191 REG_INT_STS_A, 3); /* clear INT_STS_A */
192 if (ret)
193 pr_warning("twl6030: I2C error in clearing PIH ISR\n");
194
195 enable_irq(irq);
196 }
197
198 return 0;
199}
200
201/*
202 * handle_twl6030_int() is the desc->handle method for the twl6030 interrupt.
203 * This is a chained interrupt, so there is no desc->action method for it.
204 * Now we need to query the interrupt controller in the twl6030 to determine
205 * which module is generating the interrupt request. However, we can't do i2c
206 * transactions in interrupt context, so we must defer that work to a kernel
207 * thread. All we do here is acknowledge and mask the interrupt and wakeup
208 * the kernel thread.
209 */
210static irqreturn_t handle_twl6030_pih(int irq, void *devid)
211{
212 disable_irq_nosync(irq);
213 complete(devid);
214 return IRQ_HANDLED;
215}
216
217/*----------------------------------------------------------------------*/
218
219static inline void activate_irq(int irq)
220{
221#ifdef CONFIG_ARM
222 /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
223 * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
224 */
225 set_irq_flags(irq, IRQF_VALID);
226#else
227 /* same effect on other architectures */
d5bb1221 228 irq_set_noprobe(irq);
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229#endif
230}
231
49dcd070
SS
232int twl6030_irq_set_wake(struct irq_data *d, unsigned int on)
233{
ab2b9260
TP
234 if (on)
235 atomic_inc(&twl6030_wakeirqs);
236 else
237 atomic_dec(&twl6030_wakeirqs);
49dcd070 238
ab2b9260 239 return 0;
49dcd070
SS
240}
241
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242/*----------------------------------------------------------------------*/
243
244static unsigned twl6030_irq_next;
245
246/*----------------------------------------------------------------------*/
247int twl6030_interrupt_unmask(u8 bit_mask, u8 offset)
248{
249 int ret;
250 u8 unmask_value;
251 ret = twl_i2c_read_u8(TWL_MODULE_PIH, &unmask_value,
252 REG_INT_STS_A + offset);
253 unmask_value &= (~(bit_mask));
254 ret |= twl_i2c_write_u8(TWL_MODULE_PIH, unmask_value,
255 REG_INT_STS_A + offset); /* unmask INT_MSK_A/B/C */
256 return ret;
257}
258EXPORT_SYMBOL(twl6030_interrupt_unmask);
259
260int twl6030_interrupt_mask(u8 bit_mask, u8 offset)
261{
262 int ret;
263 u8 mask_value;
264 ret = twl_i2c_read_u8(TWL_MODULE_PIH, &mask_value,
265 REG_INT_STS_A + offset);
266 mask_value |= (bit_mask);
267 ret |= twl_i2c_write_u8(TWL_MODULE_PIH, mask_value,
268 REG_INT_STS_A + offset); /* mask INT_MSK_A/B/C */
269 return ret;
270}
271EXPORT_SYMBOL(twl6030_interrupt_mask);
272
72f2e2c7 273int twl6030_mmc_card_detect_config(void)
274{
275 int ret;
276 u8 reg_val = 0;
277
278 /* Unmasking the Card detect Interrupt line for MMC1 from Phoenix */
279 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
280 REG_INT_MSK_LINE_B);
281 twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
282 REG_INT_MSK_STS_B);
283 /*
25985edc 284 * Initially Configuring MMC_CTRL for receiving interrupts &
72f2e2c7 285 * Card status on TWL6030 for MMC1
286 */
287 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val, TWL6030_MMCCTRL);
288 if (ret < 0) {
289 pr_err("twl6030: Failed to read MMCCTRL, error %d\n", ret);
290 return ret;
291 }
292 reg_val &= ~VMMC_AUTO_OFF;
293 reg_val |= SW_FC;
294 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val, TWL6030_MMCCTRL);
295 if (ret < 0) {
296 pr_err("twl6030: Failed to write MMCCTRL, error %d\n", ret);
297 return ret;
298 }
299
300 /* Configuring PullUp-PullDown register */
301 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val,
302 TWL6030_CFG_INPUT_PUPD3);
303 if (ret < 0) {
304 pr_err("twl6030: Failed to read CFG_INPUT_PUPD3, error %d\n",
305 ret);
306 return ret;
307 }
308 reg_val &= ~(MMC_PU | MMC_PD);
309 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val,
310 TWL6030_CFG_INPUT_PUPD3);
311 if (ret < 0) {
312 pr_err("twl6030: Failed to write CFG_INPUT_PUPD3, error %d\n",
313 ret);
314 return ret;
315 }
316 return 0;
317}
318EXPORT_SYMBOL(twl6030_mmc_card_detect_config);
319
320int twl6030_mmc_card_detect(struct device *dev, int slot)
321{
322 int ret = -EIO;
323 u8 read_reg = 0;
324 struct platform_device *pdev = to_platform_device(dev);
325
326 if (pdev->id) {
327 /* TWL6030 provide's Card detect support for
328 * only MMC1 controller.
329 */
25985edc 330 pr_err("Unknown MMC controller %d in %s\n", pdev->id, __func__);
72f2e2c7 331 return ret;
332 }
333 /*
334 * BIT0 of MMC_CTRL on TWL6030 provides card status for MMC1
335 * 0 - Card not present ,1 - Card present
336 */
337 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &read_reg,
338 TWL6030_MMCCTRL);
339 if (ret >= 0)
340 ret = read_reg & STS_MMC;
341 return ret;
342}
343EXPORT_SYMBOL(twl6030_mmc_card_detect);
344
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345int twl6030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
346{
347
348 int status = 0;
349 int i;
350 struct task_struct *task;
351 int ret;
352 u8 mask[4];
353
354 static struct irq_chip twl6030_irq_chip;
355 mask[1] = 0xFF;
356 mask[2] = 0xFF;
357 mask[3] = 0xFF;
358 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
359 REG_INT_MSK_LINE_A, 3); /* MASK ALL INT LINES */
360 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
361 REG_INT_MSK_STS_A, 3); /* MASK ALL INT STS */
362 ret = twl_i2c_write(TWL_MODULE_PIH, &mask[0],
363 REG_INT_STS_A, 3); /* clear INT_STS_A,B,C */
364
365 twl6030_irq_base = irq_base;
366
367 /* install an irq handler for each of the modules;
368 * clone dummy irq_chip since PIH can't *do* anything
369 */
370 twl6030_irq_chip = dummy_irq_chip;
371 twl6030_irq_chip.name = "twl6030";
c45c685c 372 twl6030_irq_chip.irq_set_type = NULL;
49dcd070 373 twl6030_irq_chip.irq_set_wake = twl6030_irq_set_wake;
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374
375 for (i = irq_base; i < irq_end; i++) {
d5bb1221
TG
376 irq_set_chip_and_handler(i, &twl6030_irq_chip,
377 handle_simple_irq);
49dcd070 378 irq_set_chip_data(i, (void *)irq_num);
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B
379 activate_irq(i);
380 }
381
382 twl6030_irq_next = i;
383 pr_info("twl6030: %s (irq %d) chaining IRQs %d..%d\n", "PIH",
384 irq_num, irq_base, twl6030_irq_next - 1);
385
386 /* install an irq handler to demultiplex the TWL6030 interrupt */
387 init_completion(&irq_event);
e8deb28c 388
f742b96e 389 status = request_irq(irq_num, handle_twl6030_pih, 0,
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B
390 "TWL6030-PIH", &irq_event);
391 if (status < 0) {
392 pr_err("twl6030: could not claim irq%d: %d\n", irq_num, status);
393 goto fail_irq;
394 }
862de70c
AL
395
396 task = kthread_run(twl6030_irq_thread, (void *)irq_num, "twl6030-irq");
397 if (IS_ERR(task)) {
398 pr_err("twl6030: could not create irq %d thread!\n", irq_num);
399 status = PTR_ERR(task);
400 goto fail_kthread;
401 }
ab2b9260
TP
402
403 twl_irq = irq_num;
404 register_pm_notifier(&twl6030_irq_pm_notifier_block);
e8deb28c 405 return status;
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406
407fail_kthread:
862de70c
AL
408 free_irq(irq_num, &irq_event);
409
410fail_irq:
e8deb28c 411 for (i = irq_base; i < irq_end; i++)
d5bb1221 412 irq_set_chip_and_handler(i, NULL, NULL);
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B
413 return status;
414}
415
416int twl6030_exit_irq(void)
417{
ab2b9260 418 unregister_pm_notifier(&twl6030_irq_pm_notifier_block);
e8deb28c
B
419
420 if (twl6030_irq_base) {
421 pr_err("twl6030: can't yet clean up IRQs?\n");
422 return -ENOSYS;
423 }
424 return 0;
425}
426