regulator: twl: add clk32kg to twl-regulator
[linux-2.6-block.git] / drivers / mfd / twl-core.c
CommitLineData
a603a7fa 1/*
fc7b92fc
B
2 * twl_core.c - driver for TWL4030/TWL5030/TWL60X0/TPS659x0 PM
3 * and audio CODEC devices
a603a7fa
DB
4 *
5 * Copyright (C) 2005-2006 Texas Instruments, Inc.
6 *
7 * Modifications to defer interrupt handling to a kernel thread:
8 * Copyright (C) 2006 MontaVista Software, Inc.
9 *
10 * Based on tlv320aic23.c:
11 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
12 *
13 * Code cleanup and modifications to IRQ handler.
14 * by syed khasim <x0khasim@ti.com>
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 */
30
a603a7fa
DB
31#include <linux/init.h>
32#include <linux/mutex.h>
a603a7fa
DB
33#include <linux/platform_device.h>
34#include <linux/clk.h>
a30d46c0 35#include <linux/err.h>
a603a7fa 36
dad759ff
DB
37#include <linux/regulator/machine.h>
38
a603a7fa 39#include <linux/i2c.h>
b07682b6 40#include <linux/i2c/twl.h>
a603a7fa 41
a313d758 42#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
ce491cf8 43#include <plat/cpu.h>
b29c06ae 44#endif
a603a7fa
DB
45
46/*
47 * The TWL4030 "Triton 2" is one of a family of a multi-function "Power
48 * Management and System Companion Device" chips originally designed for
49 * use in OMAP2 and OMAP 3 based systems. Its control interfaces use I2C,
50 * often at around 3 Mbit/sec, including for interrupt handling.
51 *
52 * This driver core provides genirq support for the interrupts emitted,
53 * by the various modules, and exports register access primitives.
54 *
55 * FIXME this driver currently requires use of the first interrupt line
56 * (and associated registers).
57 */
58
fc7b92fc 59#define DRIVER_NAME "twl"
a603a7fa 60
a603a7fa
DB
61#if defined(CONFIG_KEYBOARD_TWL4030) || defined(CONFIG_KEYBOARD_TWL4030_MODULE)
62#define twl_has_keypad() true
63#else
64#define twl_has_keypad() false
65#endif
66
67#if defined(CONFIG_GPIO_TWL4030) || defined(CONFIG_GPIO_TWL4030_MODULE)
68#define twl_has_gpio() true
69#else
70#define twl_has_gpio() false
71#endif
72
dad759ff
DB
73#if defined(CONFIG_REGULATOR_TWL4030) \
74 || defined(CONFIG_REGULATOR_TWL4030_MODULE)
75#define twl_has_regulator() true
76#else
77#define twl_has_regulator() false
78#endif
79
a603a7fa
DB
80#if defined(CONFIG_TWL4030_MADC) || defined(CONFIG_TWL4030_MADC_MODULE)
81#define twl_has_madc() true
82#else
83#define twl_has_madc() false
84#endif
85
ebf0bd36
AK
86#ifdef CONFIG_TWL4030_POWER
87#define twl_has_power() true
88#else
89#define twl_has_power() false
90#endif
91
a603a7fa
DB
92#if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE)
93#define twl_has_rtc() true
94#else
95#define twl_has_rtc() false
96#endif
97
e70357e3
HH
98#if defined(CONFIG_TWL4030_USB) || defined(CONFIG_TWL4030_USB_MODULE) ||\
99 defined(CONFIG_TWL6030_USB) || defined(CONFIG_TWL6030_USB_MODULE)
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DB
100#define twl_has_usb() true
101#else
102#define twl_has_usb() false
103#endif
104
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TK
105#if defined(CONFIG_TWL4030_WATCHDOG) || \
106 defined(CONFIG_TWL4030_WATCHDOG_MODULE)
107#define twl_has_watchdog() true
108#else
109#define twl_has_watchdog() false
110#endif
a603a7fa 111
d62abe56 112#if defined(CONFIG_TWL4030_CODEC) || defined(CONFIG_TWL4030_CODEC_MODULE) ||\
6a1c7b7e 113 defined(CONFIG_SND_SOC_TWL6040) || defined(CONFIG_SND_SOC_TWL6040_MODULE)
0b83ddeb
PU
114#define twl_has_codec() true
115#else
116#define twl_has_codec() false
117#endif
118
11c39c4b
GI
119#if defined(CONFIG_CHARGER_TWL4030) || defined(CONFIG_CHARGER_TWL4030_MODULE)
120#define twl_has_bci() true
121#else
122#define twl_has_bci() false
123#endif
124
a603a7fa
DB
125/* Triton Core internal information (BEGIN) */
126
127/* Last - for index max*/
128#define TWL4030_MODULE_LAST TWL4030_MODULE_SECURED_REG
129
fc7b92fc 130#define TWL_NUM_SLAVES 4
a603a7fa 131
9c3664dd 132#if defined(CONFIG_INPUT_TWL4030_PWRBUTTON) \
14e5c82c 133 || defined(CONFIG_INPUT_TWL4030_PWRBUTTON_MODULE)
9c3664dd
FB
134#define twl_has_pwrbutton() true
135#else
136#define twl_has_pwrbutton() false
137#endif
a603a7fa 138
fc7b92fc
B
139#define SUB_CHIP_ID0 0
140#define SUB_CHIP_ID1 1
141#define SUB_CHIP_ID2 2
142#define SUB_CHIP_ID3 3
143
144#define TWL_MODULE_LAST TWL4030_MODULE_LAST
145
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DB
146/* Base Address defns for twl4030_map[] */
147
148/* subchip/slave 0 - USB ID */
149#define TWL4030_BASEADD_USB 0x0000
150
151/* subchip/slave 1 - AUD ID */
152#define TWL4030_BASEADD_AUDIO_VOICE 0x0000
153#define TWL4030_BASEADD_GPIO 0x0098
154#define TWL4030_BASEADD_INTBR 0x0085
155#define TWL4030_BASEADD_PIH 0x0080
156#define TWL4030_BASEADD_TEST 0x004C
157
158/* subchip/slave 2 - AUX ID */
159#define TWL4030_BASEADD_INTERRUPTS 0x00B9
160#define TWL4030_BASEADD_LED 0x00EE
161#define TWL4030_BASEADD_MADC 0x0000
162#define TWL4030_BASEADD_MAIN_CHARGE 0x0074
163#define TWL4030_BASEADD_PRECHARGE 0x00AA
164#define TWL4030_BASEADD_PWM0 0x00F8
165#define TWL4030_BASEADD_PWM1 0x00FB
166#define TWL4030_BASEADD_PWMA 0x00EF
167#define TWL4030_BASEADD_PWMB 0x00F1
168#define TWL4030_BASEADD_KEYPAD 0x00D2
169
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IK
170#define TWL5031_BASEADD_ACCESSORY 0x0074 /* Replaces Main Charge */
171#define TWL5031_BASEADD_INTERRUPTS 0x00B9 /* Different than TWL4030's
172 one */
173
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DB
174/* subchip/slave 3 - POWER ID */
175#define TWL4030_BASEADD_BACKUP 0x0014
176#define TWL4030_BASEADD_INT 0x002E
177#define TWL4030_BASEADD_PM_MASTER 0x0036
178#define TWL4030_BASEADD_PM_RECEIVER 0x005B
179#define TWL4030_BASEADD_RTC 0x001C
180#define TWL4030_BASEADD_SECURED_REG 0x0000
181
182/* Triton Core internal information (END) */
183
184
e8deb28c
B
185/* subchip/slave 0 0x48 - POWER */
186#define TWL6030_BASEADD_RTC 0x0000
187#define TWL6030_BASEADD_MEM 0x0017
188#define TWL6030_BASEADD_PM_MASTER 0x001F
189#define TWL6030_BASEADD_PM_SLAVE_MISC 0x0030 /* PM_RECEIVER */
190#define TWL6030_BASEADD_PM_MISC 0x00E2
191#define TWL6030_BASEADD_PM_PUPD 0x00F0
192
193/* subchip/slave 1 0x49 - FEATURE */
194#define TWL6030_BASEADD_USB 0x0000
195#define TWL6030_BASEADD_GPADC_CTRL 0x002E
196#define TWL6030_BASEADD_AUX 0x0090
197#define TWL6030_BASEADD_PWM 0x00BA
198#define TWL6030_BASEADD_GASGAUGE 0x00C0
199#define TWL6030_BASEADD_PIH 0x00D0
200#define TWL6030_BASEADD_CHARGER 0x00E0
201
202/* subchip/slave 2 0x4A - DFT */
203#define TWL6030_BASEADD_DIEID 0x00C0
204
205/* subchip/slave 3 0x4B - AUDIO */
206#define TWL6030_BASEADD_AUDIO 0x0000
207#define TWL6030_BASEADD_RSV 0x0000
fa0d9762 208#define TWL6030_BASEADD_ZERO 0x0000
e8deb28c 209
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DB
210/* Few power values */
211#define R_CFG_BOOT 0x05
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DB
212
213/* some fields in R_CFG_BOOT */
214#define HFCLK_FREQ_19p2_MHZ (1 << 0)
215#define HFCLK_FREQ_26_MHZ (2 << 0)
216#define HFCLK_FREQ_38p4_MHZ (3 << 0)
217#define HIGH_PERF_SQ (1 << 3)
38a68496 218#define CK32K_LOWPWR_EN (1 << 7)
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DB
219
220
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DB
221/* chip-specific feature flags, for i2c_device_id.driver_data */
222#define TWL4030_VAUX2 BIT(0) /* pre-5030 voltage ranges */
223#define TPS_SUBSET BIT(1) /* tps659[23]0 have fewer LDOs */
1920a61e 224#define TWL5031 BIT(2) /* twl5031 has different registers */
e8deb28c 225#define TWL6030_CLASS BIT(3) /* TWL6030 class */
dad759ff 226
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DB
227/*----------------------------------------------------------------------*/
228
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DB
229/* is driver active, bound to a chip? */
230static bool inuse;
231
e8deb28c
B
232static unsigned int twl_id;
233unsigned int twl_rev(void)
234{
235 return twl_id;
236}
237EXPORT_SYMBOL(twl_rev);
238
239/* Structure for each TWL4030/TWL6030 Slave */
fc7b92fc 240struct twl_client {
a603a7fa
DB
241 struct i2c_client *client;
242 u8 address;
243
244 /* max numb of i2c_msg required is for read =2 */
245 struct i2c_msg xfer_msg[2];
246
247 /* To lock access to xfer_msg */
248 struct mutex xfer_lock;
249};
250
fc7b92fc 251static struct twl_client twl_modules[TWL_NUM_SLAVES];
a603a7fa
DB
252
253
254/* mapping the module id to slave id and base address */
fc7b92fc 255struct twl_mapping {
a603a7fa
DB
256 unsigned char sid; /* Slave ID */
257 unsigned char base; /* base address */
258};
2cfcce18 259static struct twl_mapping *twl_map;
a603a7fa 260
fc7b92fc 261static struct twl_mapping twl4030_map[TWL4030_MODULE_LAST + 1] = {
a603a7fa
DB
262 /*
263 * NOTE: don't change this table without updating the
e8deb28c 264 * <linux/i2c/twl.h> defines for TWL4030_MODULE_*
a603a7fa
DB
265 * so they continue to match the order in this table.
266 */
267
268 { 0, TWL4030_BASEADD_USB },
269
270 { 1, TWL4030_BASEADD_AUDIO_VOICE },
271 { 1, TWL4030_BASEADD_GPIO },
272 { 1, TWL4030_BASEADD_INTBR },
273 { 1, TWL4030_BASEADD_PIH },
274 { 1, TWL4030_BASEADD_TEST },
275
276 { 2, TWL4030_BASEADD_KEYPAD },
277 { 2, TWL4030_BASEADD_MADC },
278 { 2, TWL4030_BASEADD_INTERRUPTS },
279 { 2, TWL4030_BASEADD_LED },
280 { 2, TWL4030_BASEADD_MAIN_CHARGE },
281 { 2, TWL4030_BASEADD_PRECHARGE },
282 { 2, TWL4030_BASEADD_PWM0 },
283 { 2, TWL4030_BASEADD_PWM1 },
284 { 2, TWL4030_BASEADD_PWMA },
285 { 2, TWL4030_BASEADD_PWMB },
1920a61e
IK
286 { 2, TWL5031_BASEADD_ACCESSORY },
287 { 2, TWL5031_BASEADD_INTERRUPTS },
a603a7fa
DB
288
289 { 3, TWL4030_BASEADD_BACKUP },
290 { 3, TWL4030_BASEADD_INT },
291 { 3, TWL4030_BASEADD_PM_MASTER },
292 { 3, TWL4030_BASEADD_PM_RECEIVER },
293 { 3, TWL4030_BASEADD_RTC },
294 { 3, TWL4030_BASEADD_SECURED_REG },
295};
296
e8deb28c
B
297static struct twl_mapping twl6030_map[] = {
298 /*
299 * NOTE: don't change this table without updating the
300 * <linux/i2c/twl.h> defines for TWL4030_MODULE_*
301 * so they continue to match the order in this table.
302 */
303 { SUB_CHIP_ID1, TWL6030_BASEADD_USB },
304 { SUB_CHIP_ID3, TWL6030_BASEADD_AUDIO },
305 { SUB_CHIP_ID2, TWL6030_BASEADD_DIEID },
306 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
307 { SUB_CHIP_ID1, TWL6030_BASEADD_PIH },
308
309 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
310 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
311 { SUB_CHIP_ID1, TWL6030_BASEADD_GPADC_CTRL },
312 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
313 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
314
315 { SUB_CHIP_ID1, TWL6030_BASEADD_CHARGER },
316 { SUB_CHIP_ID1, TWL6030_BASEADD_GASGAUGE },
317 { SUB_CHIP_ID1, TWL6030_BASEADD_PWM },
fa0d9762
B
318 { SUB_CHIP_ID0, TWL6030_BASEADD_ZERO },
319 { SUB_CHIP_ID1, TWL6030_BASEADD_ZERO },
e8deb28c 320
fa0d9762
B
321 { SUB_CHIP_ID2, TWL6030_BASEADD_ZERO },
322 { SUB_CHIP_ID2, TWL6030_BASEADD_ZERO },
e8deb28c
B
323 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
324 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
325 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
326 { SUB_CHIP_ID0, TWL6030_BASEADD_PM_MASTER },
327 { SUB_CHIP_ID0, TWL6030_BASEADD_PM_SLAVE_MISC },
328
329 { SUB_CHIP_ID0, TWL6030_BASEADD_RTC },
330 { SUB_CHIP_ID0, TWL6030_BASEADD_MEM },
331};
332
a603a7fa
DB
333/*----------------------------------------------------------------------*/
334
a603a7fa
DB
335/* Exported Functions */
336
337/**
fc7b92fc 338 * twl_i2c_write - Writes a n bit register in TWL4030/TWL5030/TWL60X0
a603a7fa
DB
339 * @mod_no: module number
340 * @value: an array of num_bytes+1 containing data to write
341 * @reg: register address (just offset will do)
342 * @num_bytes: number of bytes to transfer
343 *
344 * IMPORTANT: for 'value' parameter: Allocate value num_bytes+1 and
345 * valid data starts at Offset 1.
346 *
347 * Returns the result of operation - 0 is success
348 */
fc7b92fc 349int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
a603a7fa
DB
350{
351 int ret;
352 int sid;
fc7b92fc 353 struct twl_client *twl;
a603a7fa
DB
354 struct i2c_msg *msg;
355
fc7b92fc 356 if (unlikely(mod_no > TWL_MODULE_LAST)) {
a603a7fa
DB
357 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
358 return -EPERM;
359 }
e8deb28c 360 sid = twl_map[mod_no].sid;
fc7b92fc 361 twl = &twl_modules[sid];
a603a7fa
DB
362
363 if (unlikely(!inuse)) {
364 pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid);
365 return -EPERM;
366 }
367 mutex_lock(&twl->xfer_lock);
368 /*
369 * [MSG1]: fill the register address data
370 * fill the data Tx buffer
371 */
372 msg = &twl->xfer_msg[0];
373 msg->addr = twl->address;
374 msg->len = num_bytes + 1;
375 msg->flags = 0;
376 msg->buf = value;
377 /* over write the first byte of buffer with the register address */
e8deb28c 378 *value = twl_map[mod_no].base + reg;
a603a7fa
DB
379 ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 1);
380 mutex_unlock(&twl->xfer_lock);
381
147e0847
AK
382 /* i2c_transfer returns number of messages transferred */
383 if (ret != 1) {
384 pr_err("%s: i2c_write failed to transfer all messages\n",
385 DRIVER_NAME);
386 if (ret < 0)
387 return ret;
388 else
389 return -EIO;
390 } else {
391 return 0;
392 }
a603a7fa 393}
fc7b92fc 394EXPORT_SYMBOL(twl_i2c_write);
a603a7fa
DB
395
396/**
fc7b92fc 397 * twl_i2c_read - Reads a n bit register in TWL4030/TWL5030/TWL60X0
a603a7fa
DB
398 * @mod_no: module number
399 * @value: an array of num_bytes containing data to be read
400 * @reg: register address (just offset will do)
401 * @num_bytes: number of bytes to transfer
402 *
403 * Returns result of operation - num_bytes is success else failure.
404 */
fc7b92fc 405int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
a603a7fa
DB
406{
407 int ret;
408 u8 val;
409 int sid;
fc7b92fc 410 struct twl_client *twl;
a603a7fa
DB
411 struct i2c_msg *msg;
412
fc7b92fc 413 if (unlikely(mod_no > TWL_MODULE_LAST)) {
a603a7fa
DB
414 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
415 return -EPERM;
416 }
e8deb28c 417 sid = twl_map[mod_no].sid;
fc7b92fc 418 twl = &twl_modules[sid];
a603a7fa
DB
419
420 if (unlikely(!inuse)) {
421 pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid);
422 return -EPERM;
423 }
424 mutex_lock(&twl->xfer_lock);
425 /* [MSG1] fill the register address data */
426 msg = &twl->xfer_msg[0];
427 msg->addr = twl->address;
428 msg->len = 1;
429 msg->flags = 0; /* Read the register value */
e8deb28c 430 val = twl_map[mod_no].base + reg;
a603a7fa
DB
431 msg->buf = &val;
432 /* [MSG2] fill the data rx buffer */
433 msg = &twl->xfer_msg[1];
434 msg->addr = twl->address;
435 msg->flags = I2C_M_RD; /* Read the register value */
436 msg->len = num_bytes; /* only n bytes */
437 msg->buf = value;
438 ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 2);
439 mutex_unlock(&twl->xfer_lock);
440
147e0847
AK
441 /* i2c_transfer returns number of messages transferred */
442 if (ret != 2) {
443 pr_err("%s: i2c_read failed to transfer all messages\n",
444 DRIVER_NAME);
445 if (ret < 0)
446 return ret;
447 else
448 return -EIO;
449 } else {
450 return 0;
451 }
a603a7fa 452}
fc7b92fc 453EXPORT_SYMBOL(twl_i2c_read);
a603a7fa
DB
454
455/**
fc7b92fc 456 * twl_i2c_write_u8 - Writes a 8 bit register in TWL4030/TWL5030/TWL60X0
a603a7fa
DB
457 * @mod_no: module number
458 * @value: the value to be written 8 bit
459 * @reg: register address (just offset will do)
460 *
461 * Returns result of operation - 0 is success
462 */
fc7b92fc 463int twl_i2c_write_u8(u8 mod_no, u8 value, u8 reg)
a603a7fa
DB
464{
465
466 /* 2 bytes offset 1 contains the data offset 0 is used by i2c_write */
467 u8 temp_buffer[2] = { 0 };
468 /* offset 1 contains the data */
469 temp_buffer[1] = value;
fc7b92fc 470 return twl_i2c_write(mod_no, temp_buffer, reg, 1);
a603a7fa 471}
fc7b92fc 472EXPORT_SYMBOL(twl_i2c_write_u8);
a603a7fa
DB
473
474/**
fc7b92fc 475 * twl_i2c_read_u8 - Reads a 8 bit register from TWL4030/TWL5030/TWL60X0
a603a7fa
DB
476 * @mod_no: module number
477 * @value: the value read 8 bit
478 * @reg: register address (just offset will do)
479 *
480 * Returns result of operation - 0 is success
481 */
fc7b92fc 482int twl_i2c_read_u8(u8 mod_no, u8 *value, u8 reg)
a603a7fa 483{
fc7b92fc 484 return twl_i2c_read(mod_no, value, reg, 1);
a603a7fa 485}
fc7b92fc 486EXPORT_SYMBOL(twl_i2c_read_u8);
a603a7fa
DB
487
488/*----------------------------------------------------------------------*/
489
dad759ff
DB
490static struct device *
491add_numbered_child(unsigned chip, const char *name, int num,
5725d66b
DB
492 void *pdata, unsigned pdata_len,
493 bool can_wakeup, int irq0, int irq1)
a603a7fa 494{
5725d66b 495 struct platform_device *pdev;
fc7b92fc 496 struct twl_client *twl = &twl_modules[chip];
5725d66b
DB
497 int status;
498
dad759ff 499 pdev = platform_device_alloc(name, num);
5725d66b
DB
500 if (!pdev) {
501 dev_dbg(&twl->client->dev, "can't alloc dev\n");
502 status = -ENOMEM;
503 goto err;
504 }
a603a7fa 505
5725d66b
DB
506 device_init_wakeup(&pdev->dev, can_wakeup);
507 pdev->dev.parent = &twl->client->dev;
a603a7fa 508
5725d66b
DB
509 if (pdata) {
510 status = platform_device_add_data(pdev, pdata, pdata_len);
511 if (status < 0) {
512 dev_dbg(&pdev->dev, "can't add platform_data\n");
a603a7fa
DB
513 goto err;
514 }
5725d66b 515 }
a603a7fa 516
5725d66b
DB
517 if (irq0) {
518 struct resource r[2] = {
519 { .start = irq0, .flags = IORESOURCE_IRQ, },
520 { .start = irq1, .flags = IORESOURCE_IRQ, },
521 };
a603a7fa 522
5725d66b 523 status = platform_device_add_resources(pdev, r, irq1 ? 2 : 1);
a603a7fa 524 if (status < 0) {
5725d66b 525 dev_dbg(&pdev->dev, "can't add irqs\n");
a603a7fa
DB
526 goto err;
527 }
528 }
529
5725d66b 530 status = platform_device_add(pdev);
a603a7fa 531
5725d66b
DB
532err:
533 if (status < 0) {
534 platform_device_put(pdev);
535 dev_err(&twl->client->dev, "can't add %s dev\n", name);
536 return ERR_PTR(status);
537 }
538 return &pdev->dev;
539}
a603a7fa 540
dad759ff
DB
541static inline struct device *add_child(unsigned chip, const char *name,
542 void *pdata, unsigned pdata_len,
543 bool can_wakeup, int irq0, int irq1)
544{
545 return add_numbered_child(chip, name, -1, pdata, pdata_len,
546 can_wakeup, irq0, irq1);
547}
548
549static struct device *
550add_regulator_linked(int num, struct regulator_init_data *pdata,
551 struct regulator_consumer_supply *consumers,
552 unsigned num_consumers)
553{
e8deb28c 554 unsigned sub_chip_id;
dad759ff
DB
555 /* regulator framework demands init_data ... */
556 if (!pdata)
557 return NULL;
558
b73eac78 559 if (consumers) {
dad759ff
DB
560 pdata->consumer_supplies = consumers;
561 pdata->num_consumer_supplies = num_consumers;
562 }
563
564 /* NOTE: we currently ignore regulator IRQs, e.g. for short circuits */
e8deb28c
B
565 sub_chip_id = twl_map[TWL_MODULE_PM_MASTER].sid;
566 return add_numbered_child(sub_chip_id, "twl_reg", num,
dad759ff
DB
567 pdata, sizeof(*pdata), false, 0, 0);
568}
569
570static struct device *
571add_regulator(int num, struct regulator_init_data *pdata)
572{
573 return add_regulator_linked(num, pdata, NULL, 0);
574}
575
5725d66b
DB
576/*
577 * NOTE: We know the first 8 IRQs after pdata->base_irq are
578 * for the PIH, and the next are for the PWR_INT SIH, since
579 * that's how twl_init_irq() sets things up.
580 */
a603a7fa 581
dad759ff
DB
582static int
583add_children(struct twl4030_platform_data *pdata, unsigned long features)
5725d66b
DB
584{
585 struct device *child;
e8deb28c 586 unsigned sub_chip_id;
a603a7fa 587
5725d66b 588 if (twl_has_gpio() && pdata->gpio) {
fc7b92fc 589 child = add_child(SUB_CHIP_ID1, "twl4030_gpio",
5725d66b 590 pdata->gpio, sizeof(*pdata->gpio),
fc7b92fc 591 false, pdata->irq_base + GPIO_INTR_OFFSET, 0);
5725d66b
DB
592 if (IS_ERR(child))
593 return PTR_ERR(child);
a603a7fa
DB
594 }
595
596 if (twl_has_keypad() && pdata->keypad) {
fc7b92fc 597 child = add_child(SUB_CHIP_ID2, "twl4030_keypad",
5725d66b 598 pdata->keypad, sizeof(*pdata->keypad),
fc7b92fc 599 true, pdata->irq_base + KEYPAD_INTR_OFFSET, 0);
5725d66b
DB
600 if (IS_ERR(child))
601 return PTR_ERR(child);
a603a7fa
DB
602 }
603
604 if (twl_has_madc() && pdata->madc) {
5725d66b
DB
605 child = add_child(2, "twl4030_madc",
606 pdata->madc, sizeof(*pdata->madc),
fc7b92fc 607 true, pdata->irq_base + MADC_INTR_OFFSET, 0);
5725d66b
DB
608 if (IS_ERR(child))
609 return PTR_ERR(child);
a603a7fa
DB
610 }
611
612 if (twl_has_rtc()) {
a603a7fa 613 /*
5725d66b 614 * REVISIT platform_data here currently might expose the
a603a7fa 615 * "msecure" line ... but for now we just expect board
5725d66b 616 * setup to tell the chip "it's always ok to SET_TIME".
a603a7fa
DB
617 * Eventually, Linux might become more aware of such
618 * HW security concerns, and "least privilege".
619 */
e8deb28c
B
620 sub_chip_id = twl_map[TWL_MODULE_RTC].sid;
621 child = add_child(sub_chip_id, "twl_rtc",
5725d66b 622 NULL, 0,
fc7b92fc 623 true, pdata->irq_base + RTC_INTR_OFFSET, 0);
5725d66b
DB
624 if (IS_ERR(child))
625 return PTR_ERR(child);
a603a7fa
DB
626 }
627
9da66539 628 if (twl_has_usb() && pdata->usb && twl_class_is_4030()) {
f8ebdff0
RQ
629
630 static struct regulator_consumer_supply usb1v5 = {
631 .supply = "usb1v5",
632 };
633 static struct regulator_consumer_supply usb1v8 = {
634 .supply = "usb1v8",
635 };
636 static struct regulator_consumer_supply usb3v1 = {
637 .supply = "usb3v1",
638 };
639
640 /* First add the regulators so that they can be used by transceiver */
641 if (twl_has_regulator()) {
642 /* this is a template that gets copied */
643 struct regulator_init_data usb_fixed = {
644 .constraints.valid_modes_mask =
645 REGULATOR_MODE_NORMAL
646 | REGULATOR_MODE_STANDBY,
647 .constraints.valid_ops_mask =
648 REGULATOR_CHANGE_MODE
649 | REGULATOR_CHANGE_STATUS,
650 };
651
652 child = add_regulator_linked(TWL4030_REG_VUSB1V5,
653 &usb_fixed, &usb1v5, 1);
654 if (IS_ERR(child))
655 return PTR_ERR(child);
656
657 child = add_regulator_linked(TWL4030_REG_VUSB1V8,
658 &usb_fixed, &usb1v8, 1);
659 if (IS_ERR(child))
660 return PTR_ERR(child);
661
662 child = add_regulator_linked(TWL4030_REG_VUSB3V1,
663 &usb_fixed, &usb3v1, 1);
664 if (IS_ERR(child))
665 return PTR_ERR(child);
666
667 }
668
5725d66b
DB
669 child = add_child(0, "twl4030_usb",
670 pdata->usb, sizeof(*pdata->usb),
671 true,
672 /* irq0 = USB_PRES, irq1 = USB */
fc7b92fc
B
673 pdata->irq_base + USB_PRES_INTR_OFFSET,
674 pdata->irq_base + USB_INTR_OFFSET);
f8ebdff0 675
5725d66b
DB
676 if (IS_ERR(child))
677 return PTR_ERR(child);
dad759ff
DB
678
679 /* we need to connect regulators to this transceiver */
f8ebdff0
RQ
680 if (twl_has_regulator() && child) {
681 usb1v5.dev = child;
682 usb1v8.dev = child;
683 usb3v1.dev = child;
684 }
dad759ff 685 }
e70357e3
HH
686 if (twl_has_usb() && pdata->usb && twl_class_is_6030()) {
687
688 static struct regulator_consumer_supply usb3v3 = {
689 .supply = "vusb",
690 };
691
692 if (twl_has_regulator()) {
693 /* this is a template that gets copied */
694 struct regulator_init_data usb_fixed = {
695 .constraints.valid_modes_mask =
696 REGULATOR_MODE_NORMAL
697 | REGULATOR_MODE_STANDBY,
698 .constraints.valid_ops_mask =
699 REGULATOR_CHANGE_MODE
700 | REGULATOR_CHANGE_STATUS,
701 };
702
703 child = add_regulator_linked(TWL6030_REG_VUSB,
704 &usb_fixed, &usb3v3, 1);
705 if (IS_ERR(child))
706 return PTR_ERR(child);
707 }
708
709 child = add_child(0, "twl6030_usb",
710 pdata->usb, sizeof(*pdata->usb),
711 true,
712 /* irq1 = VBUS_PRES, irq0 = USB ID */
713 pdata->irq_base + USBOTG_INTR_OFFSET,
714 pdata->irq_base + USB_PRES_INTR_OFFSET);
715
716 if (IS_ERR(child))
717 return PTR_ERR(child);
718 /* we need to connect regulators to this transceiver */
719 if (twl_has_regulator() && child)
720 usb3v3.dev = child;
721
722 }
dad759ff 723
80e45b1e
TK
724 if (twl_has_watchdog()) {
725 child = add_child(0, "twl4030_wdt", NULL, 0, false, 0, 0);
726 if (IS_ERR(child))
9c3664dd
FB
727 return PTR_ERR(child);
728 }
729
730 if (twl_has_pwrbutton()) {
731 child = add_child(1, "twl4030_pwrbutton",
732 NULL, 0, true, pdata->irq_base + 8 + 0, 0);
733 if (IS_ERR(child))
80e45b1e
TK
734 return PTR_ERR(child);
735 }
736
d62abe56
MLC
737 if (twl_has_codec() && pdata->codec && twl_class_is_4030()) {
738 sub_chip_id = twl_map[TWL_MODULE_AUDIO_VOICE].sid;
f0fba2ad 739 child = add_child(sub_chip_id, "twl4030-audio",
d62abe56
MLC
740 pdata->codec, sizeof(*pdata->codec),
741 false, 0, 0);
742 if (IS_ERR(child))
743 return PTR_ERR(child);
744 }
745
f0fba2ad 746 /* Phoenix codec driver is probed directly atm */
d62abe56
MLC
747 if (twl_has_codec() && pdata->codec && twl_class_is_6030()) {
748 sub_chip_id = twl_map[TWL_MODULE_AUDIO_VOICE].sid;
f0fba2ad 749 child = add_child(sub_chip_id, "twl6040-codec",
0b83ddeb
PU
750 pdata->codec, sizeof(*pdata->codec),
751 false, 0, 0);
752 if (IS_ERR(child))
753 return PTR_ERR(child);
754 }
755
9da66539
RN
756 /* twl4030 regulators */
757 if (twl_has_regulator() && twl_class_is_4030()) {
dad759ff
DB
758 child = add_regulator(TWL4030_REG_VPLL1, pdata->vpll1);
759 if (IS_ERR(child))
760 return PTR_ERR(child);
ab4abe05
JKS
761
762 child = add_regulator(TWL4030_REG_VIO, pdata->vio);
763 if (IS_ERR(child))
764 return PTR_ERR(child);
765
766 child = add_regulator(TWL4030_REG_VDD1, pdata->vdd1);
767 if (IS_ERR(child))
768 return PTR_ERR(child);
769
770 child = add_regulator(TWL4030_REG_VDD2, pdata->vdd2);
771 if (IS_ERR(child))
772 return PTR_ERR(child);
dad759ff
DB
773
774 child = add_regulator(TWL4030_REG_VMMC1, pdata->vmmc1);
775 if (IS_ERR(child))
776 return PTR_ERR(child);
777
778 child = add_regulator(TWL4030_REG_VDAC, pdata->vdac);
779 if (IS_ERR(child))
780 return PTR_ERR(child);
781
782 child = add_regulator((features & TWL4030_VAUX2)
783 ? TWL4030_REG_VAUX2_4030
784 : TWL4030_REG_VAUX2,
785 pdata->vaux2);
786 if (IS_ERR(child))
787 return PTR_ERR(child);
ab4abe05
JKS
788
789 child = add_regulator(TWL4030_REG_VINTANA1, pdata->vintana1);
790 if (IS_ERR(child))
791 return PTR_ERR(child);
792
793 child = add_regulator(TWL4030_REG_VINTANA2, pdata->vintana2);
794 if (IS_ERR(child))
795 return PTR_ERR(child);
796
797 child = add_regulator(TWL4030_REG_VINTDIG, pdata->vintdig);
798 if (IS_ERR(child))
799 return PTR_ERR(child);
dad759ff
DB
800 }
801
dad759ff 802 /* maybe add LDOs that are omitted on cost-reduced parts */
9da66539
RN
803 if (twl_has_regulator() && !(features & TPS_SUBSET)
804 && twl_class_is_4030()) {
dad759ff
DB
805 child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2);
806 if (IS_ERR(child))
807 return PTR_ERR(child);
dad759ff
DB
808
809 child = add_regulator(TWL4030_REG_VMMC2, pdata->vmmc2);
810 if (IS_ERR(child))
811 return PTR_ERR(child);
812
813 child = add_regulator(TWL4030_REG_VSIM, pdata->vsim);
814 if (IS_ERR(child))
815 return PTR_ERR(child);
816
817 child = add_regulator(TWL4030_REG_VAUX1, pdata->vaux1);
818 if (IS_ERR(child))
819 return PTR_ERR(child);
820
821 child = add_regulator(TWL4030_REG_VAUX3, pdata->vaux3);
822 if (IS_ERR(child))
823 return PTR_ERR(child);
824
825 child = add_regulator(TWL4030_REG_VAUX4, pdata->vaux4);
826 if (IS_ERR(child))
827 return PTR_ERR(child);
a603a7fa
DB
828 }
829
9da66539
RN
830 /* twl6030 regulators */
831 if (twl_has_regulator() && twl_class_is_6030()) {
832 child = add_regulator(TWL6030_REG_VMMC, pdata->vmmc);
833 if (IS_ERR(child))
834 return PTR_ERR(child);
835
836 child = add_regulator(TWL6030_REG_VPP, pdata->vpp);
837 if (IS_ERR(child))
838 return PTR_ERR(child);
839
840 child = add_regulator(TWL6030_REG_VUSIM, pdata->vusim);
841 if (IS_ERR(child))
842 return PTR_ERR(child);
843
844 child = add_regulator(TWL6030_REG_VANA, pdata->vana);
845 if (IS_ERR(child))
846 return PTR_ERR(child);
847
848 child = add_regulator(TWL6030_REG_VCXIO, pdata->vcxio);
849 if (IS_ERR(child))
850 return PTR_ERR(child);
851
852 child = add_regulator(TWL6030_REG_VDAC, pdata->vdac);
853 if (IS_ERR(child))
854 return PTR_ERR(child);
855
9da66539
RN
856 child = add_regulator(TWL6030_REG_VAUX1_6030, pdata->vaux1);
857 if (IS_ERR(child))
858 return PTR_ERR(child);
859
860 child = add_regulator(TWL6030_REG_VAUX2_6030, pdata->vaux2);
861 if (IS_ERR(child))
862 return PTR_ERR(child);
863
864 child = add_regulator(TWL6030_REG_VAUX3_6030, pdata->vaux3);
865 if (IS_ERR(child))
866 return PTR_ERR(child);
8e6de4a3
B
867
868 child = add_regulator(TWL6030_REG_CLK32KG, pdata->clk32kg);
869 if (IS_ERR(child))
870 return PTR_ERR(child);
9da66539
RN
871 }
872
11c39c4b
GI
873 if (twl_has_bci() && pdata->bci &&
874 !(features & (TPS_SUBSET | TWL5031))) {
875 child = add_child(3, "twl4030_bci",
876 pdata->bci, sizeof(*pdata->bci), false,
877 /* irq0 = CHG_PRES, irq1 = BCI */
878 pdata->irq_base + BCI_PRES_INTR_OFFSET,
879 pdata->irq_base + BCI_INTR_OFFSET);
880 if (IS_ERR(child))
881 return PTR_ERR(child);
882 }
883
5725d66b 884 return 0;
a603a7fa
DB
885}
886
887/*----------------------------------------------------------------------*/
888
889/*
890 * These three functions initialize the on-chip clock framework,
891 * letting it generate the right frequencies for USB, MADC, and
892 * other purposes.
893 */
894static inline int __init protect_pm_master(void)
895{
896 int e = 0;
897
49e6f87e
FB
898 e = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0,
899 TWL4030_PM_MASTER_PROTECT_KEY);
a603a7fa
DB
900 return e;
901}
902
903static inline int __init unprotect_pm_master(void)
904{
905 int e = 0;
906
49e6f87e
FB
907 e |= twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
908 TWL4030_PM_MASTER_KEY_CFG1,
909 TWL4030_PM_MASTER_PROTECT_KEY);
910 e |= twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
911 TWL4030_PM_MASTER_KEY_CFG2,
912 TWL4030_PM_MASTER_PROTECT_KEY);
913
a603a7fa
DB
914 return e;
915}
916
38a68496
IK
917static void clocks_init(struct device *dev,
918 struct twl4030_clock_init_data *clock)
a603a7fa
DB
919{
920 int e = 0;
921 struct clk *osc;
922 u32 rate;
923 u8 ctrl = HFCLK_FREQ_26_MHZ;
924
925#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
926 if (cpu_is_omap2430())
e6b50c8d 927 osc = clk_get(dev, "osc_ck");
a603a7fa 928 else
e6b50c8d 929 osc = clk_get(dev, "osc_sys_ck");
6354ab5c 930
a603a7fa 931 if (IS_ERR(osc)) {
fc7b92fc 932 printk(KERN_WARNING "Skipping twl internal clock init and "
a603a7fa
DB
933 "using bootloader value (unknown osc rate)\n");
934 return;
935 }
936
937 rate = clk_get_rate(osc);
938 clk_put(osc);
939
6354ab5c
SO
940#else
941 /* REVISIT for non-OMAP systems, pass the clock rate from
942 * board init code, using platform_data.
943 */
944 osc = ERR_PTR(-EIO);
945
fc7b92fc 946 printk(KERN_WARNING "Skipping twl internal clock init and "
6354ab5c
SO
947 "using bootloader value (unknown osc rate)\n");
948
949 return;
950#endif
951
a603a7fa
DB
952 switch (rate) {
953 case 19200000:
954 ctrl = HFCLK_FREQ_19p2_MHZ;
955 break;
956 case 26000000:
957 ctrl = HFCLK_FREQ_26_MHZ;
958 break;
959 case 38400000:
960 ctrl = HFCLK_FREQ_38p4_MHZ;
961 break;
962 }
963
964 ctrl |= HIGH_PERF_SQ;
38a68496
IK
965 if (clock && clock->ck32k_lowpwr_enable)
966 ctrl |= CK32K_LOWPWR_EN;
967
a603a7fa
DB
968 e |= unprotect_pm_master();
969 /* effect->MADC+USB ck en */
fc7b92fc 970 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT);
a603a7fa
DB
971 e |= protect_pm_master();
972
973 if (e < 0)
974 pr_err("%s: clock init err [%d]\n", DRIVER_NAME, e);
975}
976
977/*----------------------------------------------------------------------*/
978
e8deb28c
B
979int twl4030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end);
980int twl4030_exit_irq(void);
981int twl4030_init_chip_irq(const char *chip);
982int twl6030_init_irq(int irq_num, unsigned irq_base, unsigned irq_end);
983int twl6030_exit_irq(void);
a603a7fa 984
fc7b92fc 985static int twl_remove(struct i2c_client *client)
a603a7fa
DB
986{
987 unsigned i;
a30d46c0 988 int status;
a603a7fa 989
e8deb28c
B
990 if (twl_class_is_4030())
991 status = twl4030_exit_irq();
992 else
993 status = twl6030_exit_irq();
994
a30d46c0
DB
995 if (status < 0)
996 return status;
a603a7fa 997
fc7b92fc
B
998 for (i = 0; i < TWL_NUM_SLAVES; i++) {
999 struct twl_client *twl = &twl_modules[i];
a603a7fa
DB
1000
1001 if (twl->client && twl->client != client)
1002 i2c_unregister_device(twl->client);
fc7b92fc 1003 twl_modules[i].client = NULL;
a603a7fa
DB
1004 }
1005 inuse = false;
1006 return 0;
1007}
1008
1009/* NOTE: this driver only handles a single twl4030/tps659x0 chip */
5b9cecd6 1010static int __devinit
fc7b92fc 1011twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
a603a7fa
DB
1012{
1013 int status;
1014 unsigned i;
1015 struct twl4030_platform_data *pdata = client->dev.platform_data;
a29aaf55 1016 u8 temp;
a603a7fa
DB
1017
1018 if (!pdata) {
1019 dev_dbg(&client->dev, "no platform data?\n");
1020 return -EINVAL;
1021 }
1022
1023 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
1024 dev_dbg(&client->dev, "can't talk I2C?\n");
1025 return -EIO;
1026 }
1027
a30d46c0 1028 if (inuse) {
a603a7fa
DB
1029 dev_dbg(&client->dev, "driver is already in use\n");
1030 return -EBUSY;
1031 }
1032
fc7b92fc
B
1033 for (i = 0; i < TWL_NUM_SLAVES; i++) {
1034 struct twl_client *twl = &twl_modules[i];
a603a7fa
DB
1035
1036 twl->address = client->addr + i;
1037 if (i == 0)
1038 twl->client = client;
1039 else {
1040 twl->client = i2c_new_dummy(client->adapter,
1041 twl->address);
1042 if (!twl->client) {
a8643430 1043 dev_err(&client->dev,
a603a7fa
DB
1044 "can't attach client %d\n", i);
1045 status = -ENOMEM;
1046 goto fail;
1047 }
a603a7fa
DB
1048 }
1049 mutex_init(&twl->xfer_lock);
1050 }
1051 inuse = true;
e8deb28c
B
1052 if ((id->driver_data) & TWL6030_CLASS) {
1053 twl_id = TWL6030_CLASS_ID;
1054 twl_map = &twl6030_map[0];
1055 } else {
1056 twl_id = TWL4030_CLASS_ID;
1057 twl_map = &twl4030_map[0];
1058 }
a603a7fa
DB
1059
1060 /* setup clock framework */
38a68496 1061 clocks_init(&client->dev, pdata->clock);
a603a7fa 1062
ebf0bd36
AK
1063 /* load power event scripts */
1064 if (twl_has_power() && pdata->power)
1065 twl4030_power_init(pdata->power);
1066
a603a7fa
DB
1067 /* Maybe init the T2 Interrupt subsystem */
1068 if (client->irq
1069 && pdata->irq_base
1070 && pdata->irq_end > pdata->irq_base) {
e8deb28c
B
1071 if (twl_class_is_4030()) {
1072 twl4030_init_chip_irq(id->name);
1073 status = twl4030_init_irq(client->irq, pdata->irq_base,
1074 pdata->irq_end);
1075 } else {
1076 status = twl6030_init_irq(client->irq, pdata->irq_base,
1077 pdata->irq_end);
1078 }
1079
a30d46c0
DB
1080 if (status < 0)
1081 goto fail;
a603a7fa
DB
1082 }
1083
a29aaf55
MS
1084 /* Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface.
1085 * Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0,
1086 * SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0.
1087 */
1088
1089 if (twl_class_is_4030()) {
1090 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &temp, REG_GPPUPDCTR1);
1091 temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \
1092 I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU);
1093 twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1);
1094 }
1095
dad759ff 1096 status = add_children(pdata, id->driver_data);
a603a7fa
DB
1097fail:
1098 if (status < 0)
fc7b92fc 1099 twl_remove(client);
a603a7fa
DB
1100 return status;
1101}
1102
fc7b92fc 1103static const struct i2c_device_id twl_ids[] = {
dad759ff
DB
1104 { "twl4030", TWL4030_VAUX2 }, /* "Triton 2" */
1105 { "twl5030", 0 }, /* T2 updated */
1920a61e 1106 { "twl5031", TWL5031 }, /* TWL5030 updated */
dad759ff
DB
1107 { "tps65950", 0 }, /* catalog version of twl5030 */
1108 { "tps65930", TPS_SUBSET }, /* fewer LDOs and DACs; no charger */
1109 { "tps65920", TPS_SUBSET }, /* fewer LDOs; no codec or charger */
e8deb28c 1110 { "twl6030", TWL6030_CLASS }, /* "Phoenix power chip" */
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1111 { /* end of list */ },
1112};
fc7b92fc 1113MODULE_DEVICE_TABLE(i2c, twl_ids);
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1114
1115/* One Client Driver , 4 Clients */
fc7b92fc 1116static struct i2c_driver twl_driver = {
a603a7fa 1117 .driver.name = DRIVER_NAME,
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1118 .id_table = twl_ids,
1119 .probe = twl_probe,
1120 .remove = twl_remove,
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1121};
1122
fc7b92fc 1123static int __init twl_init(void)
a603a7fa 1124{
fc7b92fc 1125 return i2c_add_driver(&twl_driver);
a603a7fa 1126}
fc7b92fc 1127subsys_initcall(twl_init);
a603a7fa 1128
fc7b92fc 1129static void __exit twl_exit(void)
a603a7fa 1130{
fc7b92fc 1131 i2c_del_driver(&twl_driver);
a603a7fa 1132}
fc7b92fc 1133module_exit(twl_exit);
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1134
1135MODULE_AUTHOR("Texas Instruments, Inc.");
fc7b92fc 1136MODULE_DESCRIPTION("I2C Core interface for TWL");
a603a7fa 1137MODULE_LICENSE("GPL");